diff options
| author | Bastien Curutchet <bastien.curutchet@bootlin.com> | 2024-04-02 09:12:08 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2024-04-09 16:58:39 +0100 |
| commit | eff21f5f8ea01834835ebe35995dba40f8435795 (patch) | |
| tree | f84fe195ebf3313370f03ca80537f162b3e41eed /sound/soc/ti/davinci-i2s.c | |
| parent | 37e313cda35aa16623ccae630530651c786a1392 (diff) | |
ASoC: ti: davinci-i2s: Add handling of BP_FC format
McBSP is able to drive bit clock and consume frame clock but BP_FC
format is not handled by McBSP driver.
Add BP_FC format support.
When BP_FC is selected:
- CLKX and CLKR are configured as outputs
- The sample rate generator is configured to be able to provide bit
clock.
Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Link: https://msgid.link/r/20240402071213.11671-9-bastien.curutchet@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/ti/davinci-i2s.c')
| -rw-r--r-- | sound/soc/ti/davinci-i2s.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/sound/soc/ti/davinci-i2s.c b/sound/soc/ti/davinci-i2s.c index f9a67c2bc2f5..e51f05cda941 100644 --- a/sound/soc/ti/davinci-i2s.c +++ b/sound/soc/ti/davinci-i2s.c @@ -310,6 +310,12 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai, pcr = DAVINCI_MCBSP_PCR_FSRM | DAVINCI_MCBSP_PCR_FSXM; pcr |= DAVINCI_MCBSP_PCR_SCLKME; break; + case SND_SOC_DAIFMT_BP_FC: + /* cpu is bitclock provider */ + pcr = DAVINCI_MCBSP_PCR_CLKXM | + DAVINCI_MCBSP_PCR_CLKRM; + break; + case SND_SOC_DAIFMT_BC_FC: if (dev->tdm_slots || dev->slot_width) { dev_err(dev->dev, "TDM is not supported for BC_FC format\n"); @@ -500,6 +506,23 @@ static int davinci_i2s_hw_params(struct snd_pcm_substream *substream, clk_div &= 0xFF; srgr |= clk_div; break; + case SND_SOC_DAIFMT_BP_FC: + if (dev->ext_clk) { + freq = clk_get_rate(dev->ext_clk); + } else { + freq = clk_get_rate(dev->clk); + srgr = DAVINCI_MCBSP_SRGR_CLKSM; + } + if (dev->tdm_slots && dev->slot_width) { + clk_div = freq / (params->rate_num * params->rate_den) + / (dev->tdm_slots * dev->slot_width) - 1; + } else { + clk_div = freq / (mcbsp_word_length * 16) / + params->rate_num * params->rate_den; + } + clk_div &= 0xFF; + srgr |= clk_div; + break; case SND_SOC_DAIFMT_BC_FC: /* Clock and frame sync given from external sources */ i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS); |