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| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-07-06 13:52:01 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-07-07 10:01:26 -0700 |
| commit | a9701a897067db118f1a0fcf59ce8391e3612687 (patch) | |
| tree | 0d767e2de9a6bc89cc5390895fdb97b9317790f7 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 35ceabf3cdb557b23bbc09f0b6f7bb2b545185b1 (diff) | |
drm/i915/cnl: Get DDI clock based on PLLs.
PLLs are the source clocks for the DDIs so in order
to determine the ddi clock we need to check the PLL
configuration.
v2: Mika pointed out that 24 was hardcoded while it
should consider ref clock that can be either 24KHz
or 19.2KHz on CNL.
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499374321-31152-1-git-send-email-rodrigo.vivi@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions