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| author | Clinton A Taylor <clinton.a.taylor@intel.com> | 2019-09-20 13:58:05 -0700 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2019-09-23 10:38:11 -0700 |
| commit | 6171e58b1ff5c41632d8fb87f0e6bd003ed34c13 (patch) | |
| tree | 975f44faf6fb041418178f479c5a6e838ba77a85 /tools/perf/scripts/python | |
| parent | 0d7cf7bc15e75bf79f2f65d61d19f896609f816a (diff) | |
drm/i915/tgl: Add missing ddi clock select during DP init sequence
Step 4.b was complete missed because it is only required to TC and TBT.
Bspec: 49190
Reviewed-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Clinton A Taylor <clinton.a.taylor@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190920205810.211048-2-jose.souza@intel.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions