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authorNuno Sá <nuno.sa@analog.com>2025-05-19 16:41:06 +0100
committerStephen Boyd <sboyd@kernel.org>2025-06-30 17:56:23 -0700
commitce8a9096699500e2c5bca09dde27b16edda5f636 (patch)
treef18008ef4dd049935babef11321c0a13b4faf4de /tools/perf/scripts/python
parent19272b37aa4f83ca52bdf9c16d5d81bdd1354494 (diff)
clk: clk-axi-clkgen: fix fpfd_max frequency for zynq
The fpfd_max frequency should be set to 450 MHz instead of 300 MHz. Well, it actually depends on the platform speed grade but we are being conservative for ultrascale so let's be consistent. In a following change we will set these limits at runtime. Fixes: 0e646c52cf0e ("clk: Add axi-clkgen driver") Signed-off-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20250519-dev-axi-clkgen-limits-v6-1-bc4b3b61d1d4@analog.com Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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