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authorElaine Zhang <zhangqing@rock-chips.com>2024-08-28 15:42:52 +0000
committerHeiko Stuebner <heiko@sntech.de>2024-08-29 11:13:28 +0200
commite781bffc296766b55dbd048890d558655031e8d1 (patch)
tree5e7f42905967606ad5b087d7aacbf47f76910402 /tools/perf
parent49c04453db81fc806906e26ef9fc53bdb635ff39 (diff)
clk: rockchip: Add new pll type pll_rk3588_ddr
That PLL type is similar to the other rk3588 pll types but the actual rate is twice the configured rate. Therefore, the returned calculated rate must be multiplied by two. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Acked-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/0102019199a76ec4-9d5846d4-d76a-4e69-a241-c88c2983d607-000000@eu-west-1.amazonses.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf')
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