diff options
| -rw-r--r-- | arch/arm/Kconfig | 10 | ||||
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 5 |
2 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 39cd37f29aaf..ed275aa293e5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1200,6 +1200,16 @@ config ARM_ERRATA_818325_852422 Feature Register. This bit disables an optimisation applied to a sequence of 2 instructions that use opposing condition codes. +config ARM_ERRATA_821420 + bool "ARM errata: A12: sequence of VMOV to core registers might lead to a dead lock" + depends on CPU_V7 + help + This option enables the workaround for the 821420 Cortex-A12 + (all revs) erratum. In very rare timing conditions, a sequence + of VMOV to Core registers instructions, for which the second + one is in the shadow of a branch or abort, can lead to a + deadlock when the VMOV instructions are issued out-of-order. + config ARM_ERRATA_852423 bool "ARM errata: A17: some seqs of opposed cond code instrs => deadlock or corruption" depends on CPU_V7 diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index b20b02e0b727..eefc10ff8e7e 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -368,6 +368,11 @@ __ca12_errata: orr r10, r10, #1 << 12 @ set bit #12 mcr p15, 0, r10, c15, c0, 1 @ write diagnostic register #endif +#ifdef CONFIG_ARM_ERRATA_821420 + mrc p15, 0, r10, c15, c0, 2 @ read internal feature reg + orr r10, r10, #1 << 1 @ set bit #1 + mcr p15, 0, r10, c15, c0, 2 @ write internal feature reg +#endif b __errata_finish __ca17_errata: |