diff options
401 files changed, 4561 insertions, 10568 deletions
diff --git a/Documentation/ABI/testing/sysfs-class-cxl b/Documentation/ABI/testing/sysfs-class-cxl index 4ba0a2a61926..640f65e79ef1 100644 --- a/Documentation/ABI/testing/sysfs-class-cxl +++ b/Documentation/ABI/testing/sysfs-class-cxl @@ -220,8 +220,11 @@ What: /sys/class/cxl/<card>/reset Date: October 2014 Contact: linuxppc-dev@lists.ozlabs.org Description: write only - Writing 1 will issue a PERST to card which may cause the card - to reload the FPGA depending on load_image_on_perst. + Writing 1 will issue a PERST to card provided there are no + contexts active on any one of the card AFUs. This may cause + the card to reload the FPGA depending on load_image_on_perst. + Writing -1 will do a force PERST irrespective of any active + contexts on the card AFUs. Users: https://github.com/ibm-capi/libcxl What: /sys/class/cxl/<card>/perst_reloads_same_image (not in a guest) diff --git a/Documentation/arm/stm32/overview.txt b/Documentation/arm/stm32/overview.txt index 09aed5588d7c..a03b0357c017 100644 --- a/Documentation/arm/stm32/overview.txt +++ b/Documentation/arm/stm32/overview.txt @@ -5,7 +5,8 @@ Introduction ------------ The STMicroelectronics family of Cortex-M based MCUs are supported by the - 'STM32' platform of ARM Linux. Currently only the STM32F429 is supported. + 'STM32' platform of ARM Linux. Currently only the STM32F429 (Cortex-M4) + and STM32F746 (Cortex-M7) are supported. Configuration diff --git a/Documentation/arm/stm32/stm32f746-overview.txt b/Documentation/arm/stm32/stm32f746-overview.txt new file mode 100644 index 000000000000..cffd2b1ccd6f --- /dev/null +++ b/Documentation/arm/stm32/stm32f746-overview.txt @@ -0,0 +1,34 @@ + STM32F746 Overview + ================== + + Introduction + ------------ + The STM32F746 is a Cortex-M7 MCU aimed at various applications. + It features: + - Cortex-M7 core running up to @216MHz + - 1MB internal flash, 320KBytes internal RAM (+4KB of backup SRAM) + - FMC controller to connect SDRAM, NOR and NAND memories + - Dual mode QSPI + - SD/MMC/SDIO support + - Ethernet controller + - USB OTFG FS & HS controllers + - I2C, SPI, CAN busses support + - Several 16 & 32 bits general purpose timers + - Serial Audio interface + - LCD controller + - HDMI-CEC + - SPDIFRX + + Resources + --------- + Datasheet and reference manual are publicly available on ST website: + - http://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32f7-series/stm32f7x6/stm32f746ng.html + + Document Author + --------------- + Alexandre Torgue <alexandre.torgue@st.com> + + + + + diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index f53e2ee65e35..454b1bec7542 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -86,6 +86,9 @@ SoCs: - DRA722 compatible = "ti,dra722", "ti,dra72", "ti,dra7" +- DRA718 + compatible = "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7" + - AM5728 compatible = "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7" @@ -181,6 +184,9 @@ Boards: - DRA722 EVM: Software Development Board for DRA722 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7" +- DRA718 EVM: Software Development Board for DRA718 + compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7" + - DM3730 Logic PD Torpedo + Wireless: Commercial System on Module with WiFi and Bluetooth compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3" diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index 2f0b7169f132..3c7acf22957a 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -13,6 +13,10 @@ SoCs: compatible = "renesas,r8a73a4" - R-Mobile A1 (R8A77400) compatible = "renesas,r8a7740" + - RZ/G1M (R8A77430) + compatible = "renesas,r8a7743" + - RZ/G1E (R8A77450) + compatible = "renesas,r8a7745" - R-Car M1A (R8A77781) compatible = "renesas,r8a7778" - R-Car H1 (R8A77790) @@ -35,7 +39,7 @@ SoCs: Boards: - - Alt + - Alt (RTP0RC7794SEB00010S) compatible = "renesas,alt", "renesas,r8a7794" - APE6-EVM compatible = "renesas,ape6evm", "renesas,r8a73a4" @@ -47,7 +51,7 @@ Boards: compatible = "renesas,bockw", "renesas,r8a7778" - Genmai (RTK772100BC00000BR) compatible = "renesas,genmai", "renesas,r7s72100" - - Gose + - Gose (RTP0RC7793SEB00010S) compatible = "renesas,gose", "renesas,r8a7793" - H3ULCB (RTP0RC7795SKB00010S) compatible = "renesas,h3ulcb", "renesas,r8a7795"; @@ -61,7 +65,7 @@ Boards: compatible = "renesas,kzm9g", "renesas,sh73a0" - Lager (RTP0RC7790SEB00010S) compatible = "renesas,lager", "renesas,r8a7790" - - Marzen + - Marzen (R0P7779A00010S) compatible = "renesas,marzen", "renesas,r8a7779" - Porter (M2-LCDP) compatible = "renesas,porter", "renesas,r8a7791" @@ -73,5 +77,9 @@ Boards: compatible = "renesas,salvator-x", "renesas,r8a7796"; - SILK (RTP0RC7794LCB00011S) compatible = "renesas,silk", "renesas,r8a7794" + - SK-RZG1E (YR8A77450S000BE) + compatible = "renesas,sk-rzg1e", "renesas,r8a7745" + - SK-RZG1M (YR8A77430S000BE) + compatible = "renesas,sk-rzg1m", "renesas,r8a7743" - Wheat compatible = "renesas,wheat", "renesas,r8a7792" diff --git a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-bt-bmc.txt b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-bt-bmc.txt new file mode 100644 index 000000000000..fbbacd958240 --- /dev/null +++ b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-bt-bmc.txt @@ -0,0 +1,23 @@ +* Aspeed BT (Block Transfer) IPMI interface + +The Aspeed SOCs (AST2400 and AST2500) are commonly used as BMCs +(BaseBoard Management Controllers) and the BT interface can be used to +perform in-band IPMI communication with their host. + +Required properties: + +- compatible : should be "aspeed,ast2400-bt-bmc" +- reg: physical address and size of the registers + +Optional properties: + +- interrupts: interrupt generated by the BT interface. without an + interrupt, the driver will operate in poll mode. + +Example: + + ibt@1e789140 { + compatible = "aspeed,ast2400-bt-bmc"; + reg = <0x1e789140 0x18>; + interrupts = <8>; + }; diff --git a/Documentation/devicetree/bindings/ipmi.txt b/Documentation/devicetree/bindings/ipmi/ipmi-smic.txt index d5f1a877ed3e..d5f1a877ed3e 100644 --- a/Documentation/devicetree/bindings/ipmi.txt +++ b/Documentation/devicetree/bindings/ipmi/ipmi-smic.txt diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt index 5e60ad18f147..2ad18c4ea55c 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt @@ -43,7 +43,9 @@ aspeed,ast2500-pinctrl, aspeed,g5-pinctrl: GPID0 GPID2 GPIE0 I2C10 I2C11 I2C12 I2C13 I2C14 I2C3 I2C4 I2C5 I2C6 I2C7 I2C8 I2C9 MAC1LINK MDIO1 MDIO2 OSCCLK PEWAKE PWM0 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7 -RGMII1 RGMII2 RMII1 RMII2 SD1 SPI1 TIMER4 TIMER5 TIMER6 TIMER7 TIMER8 +RGMII1 RGMII2 RMII1 RMII2 SD1 SPI1 SPI1DEBUG SPI1PASSTHRU TIMER4 TIMER5 TIMER6 +TIMER7 TIMER8 VGABIOSROM + Examples: diff --git a/Documentation/devicetree/bindings/timer/jcore,pit.txt b/Documentation/devicetree/bindings/timer/jcore,pit.txt new file mode 100644 index 000000000000..af5dd35469d7 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/jcore,pit.txt @@ -0,0 +1,24 @@ +J-Core Programmable Interval Timer and Clocksource + +Required properties: + +- compatible: Must be "jcore,pit". + +- reg: Memory region(s) for timer/clocksource registers. For SMP, + there should be one region per cpu, indexed by the sequential, + zero-based hardware cpu number. + +- interrupts: An interrupt to assign for the timer. The actual pit + core is integrated with the aic and allows the timer interrupt + assignment to be programmed by software, but this property is + required in order to reserve an interrupt number that doesn't + conflict with other devices. + + +Example: + +timer@200 { + compatible = "jcore,pit"; + reg = < 0x200 0x30 0x500 0x30 >; + interrupts = < 0x48 >; +}; diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt index 219ffd41a911..74329fd0add2 100644 --- a/Documentation/filesystems/proc.txt +++ b/Documentation/filesystems/proc.txt @@ -395,32 +395,6 @@ is not associated with a file: or if empty, the mapping is anonymous. -The /proc/PID/task/TID/maps is a view of the virtual memory from the viewpoint -of the individual tasks of a process. In this file you will see a mapping marked -as [stack] if that task sees it as a stack. Hence, for the example above, the -task-level map, i.e. /proc/PID/task/TID/maps for thread 1001 will look like this: - -08048000-08049000 r-xp 00000000 03:00 8312 /opt/test -08049000-0804a000 rw-p 00001000 03:00 8312 /opt/test -0804a000-0806b000 rw-p 00000000 00:00 0 [heap] -a7cb1000-a7cb2000 ---p 00000000 00:00 0 -a7cb2000-a7eb2000 rw-p 00000000 00:00 0 -a7eb2000-a7eb3000 ---p 00000000 00:00 0 -a7eb3000-a7ed5000 rw-p 00000000 00:00 0 [stack] -a7ed5000-a8008000 r-xp 00000000 03:00 4222 /lib/libc.so.6 -a8008000-a800a000 r--p 00133000 03:00 4222 /lib/libc.so.6 -a800a000-a800b000 rw-p 00135000 03:00 4222 /lib/libc.so.6 -a800b000-a800e000 rw-p 00000000 00:00 0 -a800e000-a8022000 r-xp 00000000 03:00 14462 /lib/libpthread.so.0 -a8022000-a8023000 r--p 00013000 03:00 14462 /lib/libpthread.so.0 -a8023000-a8024000 rw-p 00014000 03:00 14462 /lib/libpthread.so.0 -a8024000-a8027000 rw-p 00000000 00:00 0 -a8027000-a8043000 r-xp 00000000 03:00 8317 /lib/ld-linux.so.2 -a8043000-a8044000 r--p 0001b000 03:00 8317 /lib/ld-linux.so.2 -a8044000-a8045000 rw-p 0001c000 03:00 8317 /lib/ld-linux.so.2 -aff35000-aff4a000 rw-p 00000000 00:00 0 -ffffe000-fffff000 r-xp 00000000 00:00 0 [vdso] - The /proc/PID/smaps is an extension based on maps, showing the memory consumption for each of the process's mappings. For each of mappings there is a series of lines such as the following: diff --git a/MAINTAINERS b/MAINTAINERS index 1cd38a7e0064..c44795306342 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4620,8 +4620,9 @@ F: sound/usb/misc/ua101.c EXTENSIBLE FIRMWARE INTERFACE (EFI) M: Matt Fleming <matt@codeblueprint.co.uk> +M: Ard Biesheuvel <ard.biesheuvel@linaro.org> L: linux-efi@vger.kernel.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi.git S: Maintained F: Documentation/efi-stub.txt F: arch/ia64/kernel/efi.c @@ -8212,7 +8213,7 @@ F: include/linux/mfd/ MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND SDIO SUBSYSTEM M: Ulf Hansson <ulf.hansson@linaro.org> L: linux-mmc@vger.kernel.org -T: git git://git.linaro.org/people/ulf.hansson/mmc.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git S: Maintained F: Documentation/devicetree/bindings/mmc/ F: drivers/mmc/ @@ -9299,7 +9300,7 @@ S: Maintained F: drivers/pci/host/*designware* PCI DRIVER FOR SYNOPSYS PROTOTYPING DEVICE -M: Joao Pinto <jpinto@synopsys.com> +M: Jose Abreu <Jose.Abreu@synopsys.com> L: linux-pci@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/pci/designware-pcie.txt @@ -1,7 +1,7 @@ VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 0 -EXTRAVERSION = -rc1 +EXTRAVERSION = -rc2 NAME = Psychotic Stoned Sheep # *DOCUMENTATION* diff --git a/arch/alpha/kernel/ptrace.c b/arch/alpha/kernel/ptrace.c index d9ee81769899..940dfb406591 100644 --- a/arch/alpha/kernel/ptrace.c +++ b/arch/alpha/kernel/ptrace.c @@ -157,14 +157,16 @@ put_reg(struct task_struct *task, unsigned long regno, unsigned long data) static inline int read_int(struct task_struct *task, unsigned long addr, int * data) { - int copied = access_process_vm(task, addr, data, sizeof(int), 0); + int copied = access_process_vm(task, addr, data, sizeof(int), + FOLL_FORCE); return (copied == sizeof(int)) ? 0 : -EIO; } static inline int write_int(struct task_struct *task, unsigned long addr, int data) { - int copied = access_process_vm(task, addr, &data, sizeof(int), 1); + int copied = access_process_vm(task, addr, &data, sizeof(int), + FOLL_FORCE | FOLL_WRITE); return (copied == sizeof(int)) ? 0 : -EIO; } @@ -281,7 +283,8 @@ long arch_ptrace(struct task_struct *child, long request, /* When I and D space are separate, these will need to be fixed. */ case PTRACE_PEEKTEXT: /* read word at location addr. */ case PTRACE_PEEKDATA: - copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); + copied = access_process_vm(child, addr, &tmp, sizeof(tmp), + FOLL_FORCE); ret = -EIO; if (copied != sizeof(tmp)) break; diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b5d529fdffab..4353765a592f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -887,6 +887,11 @@ config MACH_STM32F429 depends on ARCH_STM32 default y +config MACH_STM32F746 + bool "STMicrolectronics STM32F746" + depends on ARCH_STM32 + default y + config ARCH_MPS2 bool "ARM MPS2 platform" depends on ARM_SINGLE_ARMV7M diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 6be9ee148b78..68312a9f660a 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -191,6 +191,7 @@ machine-$(CONFIG_ARCH_MXS) += mxs machine-$(CONFIG_ARCH_NETX) += netx machine-$(CONFIG_ARCH_NOMADIK) += nomadik machine-$(CONFIG_ARCH_NSPIRE) += nspire +machine-$(CONFIG_ARCH_OXNAS) += oxnas machine-$(CONFIG_ARCH_OMAP1) += omap1 machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 machine-$(CONFIG_ARCH_ORION5X) += orion5x diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index 03e9273f1876..08bb84f2ad58 100644 --- a/arch/arm/kvm/arm.c +++ b/arch/arm/kvm/arm.c @@ -1312,6 +1312,13 @@ static int init_hyp_mode(void) goto out_err; } + err = create_hyp_mappings(kvm_ksym_ref(__bss_start), + kvm_ksym_ref(__bss_stop), PAGE_HYP_RO); + if (err) { + kvm_err("Cannot map bss section\n"); + goto out_err; + } + /* * Map the Hyp stack pages */ diff --git a/arch/arm/mach-artpec/Kconfig b/arch/arm/mach-artpec/Kconfig index 6cbe5a2eabab..85a962abb77f 100644 --- a/arch/arm/mach-artpec/Kconfig +++ b/arch/arm/mach-artpec/Kconfig @@ -14,6 +14,7 @@ config MACH_ARTPEC6 select HAVE_ARM_ARCH_TIMER select HAVE_ARM_SCU select HAVE_ARM_TWD if SMP + select MFD_SYSCON help Support for Axis ARTPEC-6 ARM Cortex A9 Platform diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index da4c336b4637..0a2e6da45f28 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile @@ -36,5 +36,7 @@ obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o # Power Management obj-$(CONFIG_CPU_IDLE) += cpuidle.o -obj-$(CONFIG_SUSPEND) += pm.o sleep.o obj-$(CONFIG_HAVE_CLK) += pm_domain.o +ifeq ($(CONFIG_SUSPEND),y) +obj-$(CONFIG_ARCH_DAVINCI_DA850) += pm.o sleep.o +endif diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index ec5cb105e1d6..265abe7dd77c 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -196,18 +196,6 @@ static struct platform_device da850_evm_norflash_device = { .resource = da850_evm_norflash_resource, }; -static struct davinci_pm_config da850_pm_pdata = { - .sleepcount = 128, -}; - -static struct platform_device da850_pm_device = { - .name = "pm-davinci", - .dev = { - .platform_data = &da850_pm_pdata, - }, - .id = -1, -}; - /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash * (128K blocks). It may be used instead of the (default) SPI flash * to boot, using TI's tools to install the secondary boot loader @@ -1457,10 +1445,7 @@ static __init void da850_evm_init(void) if (ret) pr_warn("%s: cpuidle registration failed: %d\n", __func__, ret); - ret = da850_register_pm(&da850_pm_device); - if (ret) - pr_warn("%s: suspend registration failed: %d\n", __func__, ret); - + davinci_pm_init(); da850_vpif_init(); ret = spi_register_board_info(da850evm_spi_info, diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index 1a6d430742d4..b73ce7bae81f 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c @@ -498,18 +498,6 @@ static void __init mityomapl138_config_emac(void) pr_warn("emac registration failed: %d\n", ret); } -static struct davinci_pm_config da850_pm_pdata = { - .sleepcount = 128, -}; - -static struct platform_device da850_pm_device = { - .name = "pm-davinci", - .dev = { - .platform_data = &da850_pm_pdata, - }, - .id = -1, -}; - static void __init mityomapl138_init(void) { int ret; @@ -559,9 +547,7 @@ static void __init mityomapl138_init(void) if (ret) pr_warn("cpuidle registration failed: %d\n", ret); - ret = da850_register_pm(&da850_pm_device); - if (ret) - pr_warn("suspend registration failed: %d\n", ret); + davinci_pm_init(); } #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c index 049025f6d531..9f9fbfa6da0d 100644 --- a/arch/arm/mach-davinci/common.c +++ b/arch/arm/mach-davinci/common.c @@ -118,6 +118,5 @@ err: void __init davinci_init_late(void) { davinci_cpufreq_init(); - davinci_pm_init(); davinci_clk_disable_unused(); } diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 196e262b7147..512ccc19e4e1 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -1172,44 +1172,6 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate) } #endif -int __init da850_register_pm(struct platform_device *pdev) -{ - int ret; - struct davinci_pm_config *pdata = pdev->dev.platform_data; - - ret = davinci_cfg_reg(DA850_RTC_ALARM); - if (ret) - return ret; - - pdata->ddr2_ctlr_base = da8xx_get_mem_ctlr(); - pdata->deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG); - pdata->ddrpsc_num = DA8XX_LPSC1_EMIF3C; - - pdata->cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K); - if (!pdata->cpupll_reg_base) - return -ENOMEM; - - pdata->ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K); - if (!pdata->ddrpll_reg_base) { - ret = -ENOMEM; - goto no_ddrpll_mem; - } - - pdata->ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K); - if (!pdata->ddrpsc_reg_base) { - ret = -ENOMEM; - goto no_ddrpsc_mem; - } - - return platform_device_register(pdev); - -no_ddrpsc_mem: - iounmap(pdata->ddrpll_reg_base); -no_ddrpll_mem: - iounmap(pdata->cpupll_reg_base); - return ret; -} - /* VPIF resource, platform data */ static u64 da850_vpif_dma_mask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 43322be26bd5..85ff2183b6db 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -106,7 +106,6 @@ int da8xx_register_gpio(void *pdata); int da850_register_cpufreq(char *async_clk); int da8xx_register_cpuidle(void); void __iomem *da8xx_get_mem_ctlr(void); -int da850_register_pm(struct platform_device *pdev); int da850_register_sata(unsigned long refclkpn); int da850_register_vpif(void); int da850_register_vpif_display diff --git a/arch/arm/mach-davinci/pm.c b/arch/arm/mach-davinci/pm.c index 8929569b1f8a..0afd201ab980 100644 --- a/arch/arm/mach-davinci/pm.c +++ b/arch/arm/mach-davinci/pm.c @@ -21,15 +21,22 @@ #include <mach/common.h> #include <mach/da8xx.h> -#include "sram.h" +#include <mach/mux.h> #include <mach/pm.h> #include "clock.h" +#include "psc.h" +#include "sram.h" +#define DA850_PLL1_BASE 0x01e1a000 #define DEEPSLEEP_SLEEPCOUNT_MASK 0xFFFF +#define DEEPSLEEP_SLEEPCOUNT 128 static void (*davinci_sram_suspend) (struct davinci_pm_config *); -static struct davinci_pm_config *pdata; +static struct davinci_pm_config pm_config = { + .sleepcount = DEEPSLEEP_SLEEPCOUNT, + .ddrpsc_num = DA8XX_LPSC1_EMIF3C, +}; static void davinci_sram_push(void *dest, void *src, unsigned int size) { @@ -41,58 +48,58 @@ static void davinci_pm_suspend(void) { unsigned val; - if (pdata->cpupll_reg_base != pdata->ddrpll_reg_base) { + if (pm_config.cpupll_reg_base != pm_config.ddrpll_reg_base) { /* Switch CPU PLL to bypass mode */ - val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); + val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); val &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN); - __raw_writel(val, pdata->cpupll_reg_base + PLLCTL); + __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); udelay(PLL_BYPASS_TIME); /* Powerdown CPU PLL */ - val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); + val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); val |= PLLCTL_PLLPWRDN; - __raw_writel(val, pdata->cpupll_reg_base + PLLCTL); + __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); } /* Configure sleep count in deep sleep register */ - val = __raw_readl(pdata->deepsleep_reg); + val = __raw_readl(pm_config.deepsleep_reg); val &= ~DEEPSLEEP_SLEEPCOUNT_MASK, - val |= pdata->sleepcount; - __raw_writel(val, pdata->deepsleep_reg); + val |= pm_config.sleepcount; + __raw_writel(val, pm_config.deepsleep_reg); /* System goes to sleep in this call */ - davinci_sram_suspend(pdata); + davinci_sram_suspend(&pm_config); - if (pdata->cpupll_reg_base != pdata->ddrpll_reg_base) { + if (pm_config.cpupll_reg_base != pm_config.ddrpll_reg_base) { /* put CPU PLL in reset */ - val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); + val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); val &= ~PLLCTL_PLLRST; - __raw_writel(val, pdata->cpupll_reg_base + PLLCTL); + __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); /* put CPU PLL in power down */ - val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); + val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); val &= ~PLLCTL_PLLPWRDN; - __raw_writel(val, pdata->cpupll_reg_base + PLLCTL); + __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); /* wait for CPU PLL reset */ udelay(PLL_RESET_TIME); /* bring CPU PLL out of reset */ - val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); + val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); val |= PLLCTL_PLLRST; - __raw_writel(val, pdata->cpupll_reg_base + PLLCTL); + __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); /* Wait for CPU PLL to lock */ udelay(PLL_LOCK_TIME); /* Remove CPU PLL from bypass mode */ - val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); + val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); val &= ~PLLCTL_PLLENSRC; val |= PLLCTL_PLLEN; - __raw_writel(val, pdata->cpupll_reg_base + PLLCTL); + __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); } } @@ -117,17 +124,36 @@ static const struct platform_suspend_ops davinci_pm_ops = { .valid = suspend_valid_only_mem, }; -static int __init davinci_pm_probe(struct platform_device *pdev) +int __init davinci_pm_init(void) { - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "cannot get platform data\n"); - return -ENOENT; + int ret; + + ret = davinci_cfg_reg(DA850_RTC_ALARM); + if (ret) + return ret; + + pm_config.ddr2_ctlr_base = da8xx_get_mem_ctlr(); + pm_config.deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG); + + pm_config.cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K); + if (!pm_config.cpupll_reg_base) + return -ENOMEM; + + pm_config.ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K); + if (!pm_config.ddrpll_reg_base) { + ret = -ENOMEM; + goto no_ddrpll_mem; + } + + pm_config.ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K); + if (!pm_config.ddrpsc_reg_base) { + ret = -ENOMEM; + goto no_ddrpsc_mem; } davinci_sram_suspend = sram_alloc(davinci_cpu_suspend_sz, NULL); if (!davinci_sram_suspend) { - dev_err(&pdev->dev, "cannot allocate SRAM memory\n"); + pr_err("PM: cannot allocate SRAM memory\n"); return -ENOMEM; } @@ -136,23 +162,9 @@ static int __init davinci_pm_probe(struct platform_device *pdev) suspend_set_ops(&davinci_pm_ops); - return 0; -} - -static int __exit davinci_pm_remove(struct platform_device *pdev) -{ - sram_free(davinci_sram_suspend, davinci_cpu_suspend_sz); - return 0; -} - -static struct platform_driver davinci_pm_driver = { - .driver = { - .name = "pm-davinci", - }, - .remove = __exit_p(davinci_pm_remove), -}; - -int __init davinci_pm_init(void) -{ - return platform_driver_probe(&davinci_pm_driver, davinci_pm_probe); +no_ddrpsc_mem: + iounmap(pm_config.ddrpll_reg_base); +no_ddrpll_mem: + iounmap(pm_config.cpupll_reg_base); + return ret; } diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 9155b639c9aa..936c59d0e18b 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -557,7 +557,6 @@ config SOC_VF610 bool "Vybrid Family VF610 support" select ARM_GIC if ARCH_MULTI_V7 select PINCTRL_VF610 - select PL310_ERRATA_769419 if CACHE_L2X0 help This enables support for Freescale Vybrid VF610 processor. diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c index 58a2b88233e6..6cb8a22b617d 100644 --- a/arch/arm/mach-imx/mach-imx6ul.c +++ b/arch/arm/mach-imx/mach-imx6ul.c @@ -89,6 +89,7 @@ static void __init imx6ul_init_late(void) static const char * const imx6ul_dt_compat[] __initconst = { "fsl,imx6ul", + "fsl,imx6ull", NULL, }; diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c index db9621c718ec..ba96bf979625 100644 --- a/arch/arm/mach-imx/mmdc.c +++ b/arch/arm/mach-imx/mmdc.c @@ -1,5 +1,5 @@ /* - * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011,2016 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. * * The code contained herein is licensed under the GNU General Public @@ -10,12 +10,16 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include <linux/hrtimer.h> #include <linux/init.h> +#include <linux/interrupt.h> #include <linux/io.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_device.h> +#include <linux/perf_event.h> +#include <linux/slab.h> #include "common.h" @@ -27,8 +31,489 @@ #define BM_MMDC_MDMISC_DDR_TYPE 0x18 #define BP_MMDC_MDMISC_DDR_TYPE 0x3 +#define TOTAL_CYCLES 0x0 +#define BUSY_CYCLES 0x1 +#define READ_ACCESSES 0x2 +#define WRITE_ACCESSES 0x3 +#define READ_BYTES 0x4 +#define WRITE_BYTES 0x5 + +/* Enables, resets, freezes, overflow profiling*/ +#define DBG_DIS 0x0 +#define DBG_EN 0x1 +#define DBG_RST 0x2 +#define PRF_FRZ 0x4 +#define CYC_OVF 0x8 +#define PROFILE_SEL 0x10 + +#define MMDC_MADPCR0 0x410 +#define MMDC_MADPSR0 0x418 +#define MMDC_MADPSR1 0x41C +#define MMDC_MADPSR2 0x420 +#define MMDC_MADPSR3 0x424 +#define MMDC_MADPSR4 0x428 +#define MMDC_MADPSR5 0x42C + +#define MMDC_NUM_COUNTERS 6 + +#define MMDC_FLAG_PROFILE_SEL 0x1 + +#define to_mmdc_pmu(p) container_of(p, struct mmdc_pmu, pmu) + static int ddr_type; +struct fsl_mmdc_devtype_data { + unsigned int flags; +}; + +static const struct fsl_mmdc_devtype_data imx6q_data = { +}; + +static const struct fsl_mmdc_devtype_data imx6qp_data = { + .flags = MMDC_FLAG_PROFILE_SEL, +}; + +static const struct of_device_id imx_mmdc_dt_ids[] = { + { .compatible = "fsl,imx6q-mmdc", .data = (void *)&imx6q_data}, + { .compatible = "fsl,imx6qp-mmdc", .data = (void *)&imx6qp_data}, + { /* sentinel */ } +}; + +#ifdef CONFIG_PERF_EVENTS + +static DEFINE_IDA(mmdc_ida); + +PMU_EVENT_ATTR_STRING(total-cycles, mmdc_pmu_total_cycles, "event=0x00") +PMU_EVENT_ATTR_STRING(busy-cycles, mmdc_pmu_busy_cycles, "event=0x01") +PMU_EVENT_ATTR_STRING(read-accesses, mmdc_pmu_read_accesses, "event=0x02") +PMU_EVENT_ATTR_STRING(write-accesses, mmdc_pmu_write_accesses, "config=0x03") +PMU_EVENT_ATTR_STRING(read-bytes, mmdc_pmu_read_bytes, "event=0x04") +PMU_EVENT_ATTR_STRING(read-bytes.unit, mmdc_pmu_read_bytes_unit, "MB"); +PMU_EVENT_ATTR_STRING(read-bytes.scale, mmdc_pmu_read_bytes_scale, "0.000001"); +PMU_EVENT_ATTR_STRING(write-bytes, mmdc_pmu_write_bytes, "event=0x05") +PMU_EVENT_ATTR_STRING(write-bytes.unit, mmdc_pmu_write_bytes_unit, "MB"); +PMU_EVENT_ATTR_STRING(write-bytes.scale, mmdc_pmu_write_bytes_scale, "0.000001"); + +struct mmdc_pmu { + struct pmu pmu; + void __iomem *mmdc_base; + cpumask_t cpu; + struct hrtimer hrtimer; + unsigned int active_events; + struct device *dev; + struct perf_event *mmdc_events[MMDC_NUM_COUNTERS]; + struct hlist_node node; + struct fsl_mmdc_devtype_data *devtype_data; +}; + +/* + * Polling period is set to one second, overflow of total-cycles (the fastest + * increasing counter) takes ten seconds so one second is safe + */ +static unsigned int mmdc_pmu_poll_period_us = 1000000; + +module_param_named(pmu_pmu_poll_period_us, mmdc_pmu_poll_period_us, uint, + S_IRUGO | S_IWUSR); + +static ktime_t mmdc_pmu_timer_period(void) +{ + return ns_to_ktime((u64)mmdc_pmu_poll_period_us * 1000); +} + +static ssize_t mmdc_pmu_cpumask_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct mmdc_pmu *pmu_mmdc = dev_get_drvdata(dev); + + return cpumap_print_to_pagebuf(true, buf, &pmu_mmdc->cpu); +} + +static struct device_attribute mmdc_pmu_cpumask_attr = + __ATTR(cpumask, S_IRUGO, mmdc_pmu_cpumask_show, NULL); + +static struct attribute *mmdc_pmu_cpumask_attrs[] = { + &mmdc_pmu_cpumask_attr.attr, + NULL, +}; + +static struct attribute_group mmdc_pmu_cpumask_attr_group = { + .attrs = mmdc_pmu_cpumask_attrs, +}; + +static struct attribute *mmdc_pmu_events_attrs[] = { + &mmdc_pmu_total_cycles.attr.attr, + &mmdc_pmu_busy_cycles.attr.attr, + &mmdc_pmu_read_accesses.attr.attr, + &mmdc_pmu_write_accesses.attr.attr, + &mmdc_pmu_read_bytes.attr.attr, + &mmdc_pmu_read_bytes_unit.attr.attr, + &mmdc_pmu_read_bytes_scale.attr.attr, + &mmdc_pmu_write_bytes.attr.attr, + &mmdc_pmu_write_bytes_unit.attr.attr, + &mmdc_pmu_write_bytes_scale.attr.attr, + NULL, +}; + +static struct attribute_group mmdc_pmu_events_attr_group = { + .name = "events", + .attrs = mmdc_pmu_events_attrs, +}; + +PMU_FORMAT_ATTR(event, "config:0-63"); +static struct attribute *mmdc_pmu_format_attrs[] = { + &format_attr_event.attr, + NULL, +}; + +static struct attribute_group mmdc_pmu_format_attr_group = { + .name = "format", + .attrs = mmdc_pmu_format_attrs, +}; + +static const struct attribute_group *attr_groups[] = { + &mmdc_pmu_events_attr_group, + &mmdc_pmu_format_attr_group, + &mmdc_pmu_cpumask_attr_group, + NULL, +}; + +static u32 mmdc_pmu_read_counter(struct mmdc_pmu *pmu_mmdc, int cfg) +{ + void __iomem *mmdc_base, *reg; + + mmdc_base = pmu_mmdc->mmdc_base; + + switch (cfg) { + case TOTAL_CYCLES: + reg = mmdc_base + MMDC_MADPSR0; + break; + case BUSY_CYCLES: + reg = mmdc_base + MMDC_MADPSR1; + break; + case READ_ACCESSES: + reg = mmdc_base + MMDC_MADPSR2; + break; + case WRITE_ACCESSES: + reg = mmdc_base + MMDC_MADPSR3; + break; + case READ_BYTES: + reg = mmdc_base + MMDC_MADPSR4; + break; + case WRITE_BYTES: + reg = mmdc_base + MMDC_MADPSR5; + break; + default: + return WARN_ONCE(1, + "invalid configuration %d for mmdc counter", cfg); + } + return readl(reg); +} + +static int mmdc_pmu_offline_cpu(unsigned int cpu, struct hlist_node *node) +{ + struct mmdc_pmu *pmu_mmdc = hlist_entry_safe(node, struct mmdc_pmu, node); + int target; + + if (!cpumask_test_and_clear_cpu(cpu, &pmu_mmdc->cpu)) + return 0; + + target = cpumask_any_but(cpu_online_mask, cpu); + if (target >= nr_cpu_ids) + return 0; + + perf_pmu_migrate_context(&pmu_mmdc->pmu, cpu, target); + cpumask_set_cpu(target, &pmu_mmdc->cpu); + + return 0; +} + +static bool mmdc_pmu_group_event_is_valid(struct perf_event *event, + struct pmu *pmu, + unsigned long *used_counters) +{ + int cfg = event->attr.config; + + if (is_software_event(event)) + return true; + + if (event->pmu != pmu) + return false; + + return !test_and_set_bit(cfg, used_counters); +} + +/* + * Each event has a single fixed-purpose counter, so we can only have a + * single active event for each at any point in time. Here we just check + * for duplicates, and rely on mmdc_pmu_event_init to verify that the HW + * event numbers are valid. + */ +static bool mmdc_pmu_group_is_valid(struct perf_event *event) +{ + struct pmu *pmu = event->pmu; + struct perf_event *leader = event->group_leader; + struct perf_event *sibling; + unsigned long counter_mask = 0; + + set_bit(leader->attr.config, &counter_mask); + + if (event != leader) { + if (!mmdc_pmu_group_event_is_valid(event, pmu, &counter_mask)) + return false; + } + + list_for_each_entry(sibling, &leader->sibling_list, group_entry) { + if (!mmdc_pmu_group_event_is_valid(sibling, pmu, &counter_mask)) + return false; + } + + return true; +} + +static int mmdc_pmu_event_init(struct perf_event *event) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + int cfg = event->attr.config; + + if (event->attr.type != event->pmu->type) + return -ENOENT; + + if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + return -EOPNOTSUPP; + + if (event->cpu < 0) { + dev_warn(pmu_mmdc->dev, "Can't provide per-task data!\n"); + return -EOPNOTSUPP; + } + + if (event->attr.exclude_user || + event->attr.exclude_kernel || + event->attr.exclude_hv || + event->attr.exclude_idle || + event->attr.exclude_host || + event->attr.exclude_guest || + event->attr.sample_period) + return -EINVAL; + + if (cfg < 0 || cfg >= MMDC_NUM_COUNTERS) + return -EINVAL; + + if (!mmdc_pmu_group_is_valid(event)) + return -EINVAL; + + event->cpu = cpumask_first(&pmu_mmdc->cpu); + return 0; +} + +static void mmdc_pmu_event_update(struct perf_event *event) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + struct hw_perf_event *hwc = &event->hw; + u64 delta, prev_raw_count, new_raw_count; + + do { + prev_raw_count = local64_read(&hwc->prev_count); + new_raw_count = mmdc_pmu_read_counter(pmu_mmdc, + event->attr.config); + } while (local64_cmpxchg(&hwc->prev_count, prev_raw_count, + new_raw_count) != prev_raw_count); + + delta = (new_raw_count - prev_raw_count) & 0xFFFFFFFF; + + local64_add(delta, &event->count); +} + +static void mmdc_pmu_event_start(struct perf_event *event, int flags) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + struct hw_perf_event *hwc = &event->hw; + void __iomem *mmdc_base, *reg; + u32 val; + + mmdc_base = pmu_mmdc->mmdc_base; + reg = mmdc_base + MMDC_MADPCR0; + + /* + * hrtimer is required because mmdc does not provide an interrupt so + * polling is necessary + */ + hrtimer_start(&pmu_mmdc->hrtimer, mmdc_pmu_timer_period(), + HRTIMER_MODE_REL_PINNED); + + local64_set(&hwc->prev_count, 0); + + writel(DBG_RST, reg); + + val = DBG_EN; + if (pmu_mmdc->devtype_data->flags & MMDC_FLAG_PROFILE_SEL) + val |= PROFILE_SEL; + + writel(val, reg); +} + +static int mmdc_pmu_event_add(struct perf_event *event, int flags) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + struct hw_perf_event *hwc = &event->hw; + + int cfg = event->attr.config; + + if (flags & PERF_EF_START) + mmdc_pmu_event_start(event, flags); + + if (pmu_mmdc->mmdc_events[cfg] != NULL) + return -EAGAIN; + + pmu_mmdc->mmdc_events[cfg] = event; + pmu_mmdc->active_events++; + + local64_set(&hwc->prev_count, mmdc_pmu_read_counter(pmu_mmdc, cfg)); + + return 0; +} + +static void mmdc_pmu_event_stop(struct perf_event *event, int flags) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + void __iomem *mmdc_base, *reg; + + mmdc_base = pmu_mmdc->mmdc_base; + reg = mmdc_base + MMDC_MADPCR0; + + writel(PRF_FRZ, reg); + mmdc_pmu_event_update(event); +} + +static void mmdc_pmu_event_del(struct perf_event *event, int flags) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + int cfg = event->attr.config; + + pmu_mmdc->mmdc_events[cfg] = NULL; + pmu_mmdc->active_events--; + + if (pmu_mmdc->active_events == 0) + hrtimer_cancel(&pmu_mmdc->hrtimer); + + mmdc_pmu_event_stop(event, PERF_EF_UPDATE); +} + +static void mmdc_pmu_overflow_handler(struct mmdc_pmu *pmu_mmdc) +{ + int i; + + for (i = 0; i < MMDC_NUM_COUNTERS; i++) { + struct perf_event *event = pmu_mmdc->mmdc_events[i]; + + if (event) + mmdc_pmu_event_update(event); + } +} + +static enum hrtimer_restart mmdc_pmu_timer_handler(struct hrtimer *hrtimer) +{ + struct mmdc_pmu *pmu_mmdc = container_of(hrtimer, struct mmdc_pmu, + hrtimer); + + mmdc_pmu_overflow_handler(pmu_mmdc); + hrtimer_forward_now(hrtimer, mmdc_pmu_timer_period()); + + return HRTIMER_RESTART; +} + +static int mmdc_pmu_init(struct mmdc_pmu *pmu_mmdc, + void __iomem *mmdc_base, struct device *dev) +{ + int mmdc_num; + + *pmu_mmdc = (struct mmdc_pmu) { + .pmu = (struct pmu) { + .task_ctx_nr = perf_invalid_context, + .attr_groups = attr_groups, + .event_init = mmdc_pmu_event_init, + .add = mmdc_pmu_event_add, + .del = mmdc_pmu_event_del, + .start = mmdc_pmu_event_start, + .stop = mmdc_pmu_event_stop, + .read = mmdc_pmu_event_update, + }, + .mmdc_base = mmdc_base, + .dev = dev, + .active_events = 0, + }; + + mmdc_num = ida_simple_get(&mmdc_ida, 0, 0, GFP_KERNEL); + + return mmdc_num; +} + +static int imx_mmdc_remove(struct platform_device *pdev) +{ + struct mmdc_pmu *pmu_mmdc = platform_get_drvdata(pdev); + + perf_pmu_unregister(&pmu_mmdc->pmu); + cpuhp_remove_state_nocalls(CPUHP_ONLINE); + kfree(pmu_mmdc); + return 0; +} + +static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_base) +{ + struct mmdc_pmu *pmu_mmdc; + char *name; + int mmdc_num; + int ret; + const struct of_device_id *of_id = + of_match_device(imx_mmdc_dt_ids, &pdev->dev); + + pmu_mmdc = kzalloc(sizeof(*pmu_mmdc), GFP_KERNEL); + if (!pmu_mmdc) { + pr_err("failed to allocate PMU device!\n"); + return -ENOMEM; + } + + mmdc_num = mmdc_pmu_init(pmu_mmdc, mmdc_base, &pdev->dev); + if (mmdc_num == 0) + name = "mmdc"; + else + name = devm_kasprintf(&pdev->dev, + GFP_KERNEL, "mmdc%d", mmdc_num); + + pmu_mmdc->devtype_data = (struct fsl_mmdc_devtype_data *)of_id->data; + + hrtimer_init(&pmu_mmdc->hrtimer, CLOCK_MONOTONIC, + HRTIMER_MODE_REL); + pmu_mmdc->hrtimer.function = mmdc_pmu_timer_handler; + + cpuhp_state_add_instance_nocalls(CPUHP_ONLINE, + &pmu_mmdc->node); + cpumask_set_cpu(smp_processor_id(), &pmu_mmdc->cpu); + ret = cpuhp_setup_state_multi(CPUHP_AP_NOTIFY_ONLINE, + "MMDC_ONLINE", NULL, + mmdc_pmu_offline_cpu); + if (ret) { + pr_err("cpuhp_setup_state_multi failure\n"); + goto pmu_register_err; + } + + ret = perf_pmu_register(&(pmu_mmdc->pmu), name, -1); + platform_set_drvdata(pdev, pmu_mmdc); + if (ret) + goto pmu_register_err; + return 0; + +pmu_register_err: + pr_warn("MMDC Perf PMU failed (%d), disabled\n", ret); + hrtimer_cancel(&pmu_mmdc->hrtimer); + kfree(pmu_mmdc); + return ret; +} + +#else +#define imx_mmdc_remove NULL +#define imx_mmdc_perf_init(pdev, mmdc_base) 0 +#endif + static int imx_mmdc_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -62,7 +547,7 @@ static int imx_mmdc_probe(struct platform_device *pdev) return -EBUSY; } - return 0; + return imx_mmdc_perf_init(pdev, mmdc_base); } int imx_mmdc_get_ddr_type(void) @@ -70,17 +555,13 @@ int imx_mmdc_get_ddr_type(void) return ddr_type; } -static const struct of_device_id imx_mmdc_dt_ids[] = { - { .compatible = "fsl,imx6q-mmdc", }, - { /* sentinel */ } -}; - static struct platform_driver imx_mmdc_driver = { .driver = { .name = "imx-mmdc", .of_match_table = imx_mmdc_dt_ids, }, .probe = imx_mmdc_probe, + .remove = imx_mmdc_remove, }; static int __init imx_mmdc_init(void) diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 23b98fd414bf..a1af634f8709 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -27,6 +27,8 @@ #include <linux/of_address.h> #include <linux/of_platform.h> #include <linux/termios.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -37,11 +39,8 @@ #include "pci_v3.h" #include "lm.h" -/* Base address to the AP system controller */ -void __iomem *ap_syscon_base; -/* Base address to the external bus interface */ -static void __iomem *ebi_base; - +/* Regmap to the AP system controller */ +static struct regmap *ap_syscon_map; /* * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx @@ -125,6 +124,7 @@ static void integrator_uart_set_mctrl(struct amba_device *dev, { unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask; u32 phybase = dev->res.start; + int ret; if (phybase == INTEGRATOR_UART0_BASE) { /* UART0 */ @@ -146,8 +146,17 @@ static void integrator_uart_set_mctrl(struct amba_device *dev, else ctrls |= dtr_mask; - __raw_writel(ctrls, ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET); - __raw_writel(ctrlc, ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET); + ret = regmap_write(ap_syscon_map, + INTEGRATOR_SC_CTRLS_OFFSET, + ctrls); + if (ret) + pr_err("MODEM: unable to write PL010 UART CTRLS\n"); + + ret = regmap_write(ap_syscon_map, + INTEGRATOR_SC_CTRLC_OFFSET, + ctrlc); + if (ret) + pr_err("MODEM: unable to write PL010 UART CRTLC\n"); } struct amba_pl010_data ap_uart_data = { @@ -178,35 +187,32 @@ static const struct of_device_id ap_syscon_match[] = { { }, }; -static const struct of_device_id ebi_match[] = { - { .compatible = "arm,external-bus-interface"}, - { }, -}; - static void __init ap_init_of(void) { - unsigned long sc_dec; + u32 sc_dec; struct device_node *syscon; - struct device_node *ebi; + int ret; int i; + of_platform_default_populate(NULL, ap_auxdata_lookup, NULL); + syscon = of_find_matching_node(NULL, ap_syscon_match); if (!syscon) return; - ebi = of_find_matching_node(NULL, ebi_match); - if (!ebi) + ap_syscon_map = syscon_node_to_regmap(syscon); + if (IS_ERR(ap_syscon_map)) { + pr_crit("could not find Integrator/AP system controller\n"); return; + } - ap_syscon_base = of_iomap(syscon, 0); - if (!ap_syscon_base) - return; - ebi_base = of_iomap(ebi, 0); - if (!ebi_base) + ret = regmap_read(ap_syscon_map, + INTEGRATOR_SC_DEC_OFFSET, + &sc_dec); + if (ret) { + pr_crit("could not read from Integrator/AP syscon\n"); return; + } - of_platform_default_populate(NULL, ap_auxdata_lookup, NULL); - - sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET); for (i = 0; i < 4; i++) { struct lm_device *lmdev; diff --git a/arch/arm/mach-lpc32xx/clock.h b/arch/arm/mach-lpc32xx/clock.h deleted file mode 100644 index c0a8434307f7..000000000000 --- a/arch/arm/mach-lpc32xx/clock.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * arch/arm/mach-lpc32xx/clock.h - * - * Author: Kevin Wells <kevin.wells@nxp.com> - * - * Copyright (C) 2010 NXP Semiconductors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __LPC32XX_CLOCK_H -#define __LPC32XX_CLOCK_H - -struct clk { - struct list_head node; - struct clk *parent; - u32 rate; - u32 usecount; - - int (*set_rate) (struct clk *, unsigned long); - unsigned long (*round_rate) (struct clk *, unsigned long); - unsigned long (*get_rate) (struct clk *clk); - int (*enable) (struct clk *, int); - - /* Register address and bit mask for simple clocks */ - void __iomem *enable_reg; - u32 enable_mask; -}; - -#endif diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h index 30c9e64fc65b..02575c2444e4 100644 --- a/arch/arm/mach-lpc32xx/common.h +++ b/arch/arm/mach-lpc32xx/common.h @@ -24,7 +24,6 @@ /* * Other arch specific structures and functions */ -extern void __init lpc32xx_init_irq(void); extern void __init lpc32xx_map_io(void); extern void __init lpc32xx_serial_init(void); diff --git a/arch/arm/mach-lpc32xx/include/mach/irqs.h b/arch/arm/mach-lpc32xx/include/mach/irqs.h deleted file mode 100644 index 00190535df90..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/irqs.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * arch/arm/mach-lpc32xx/include/mach/irqs.h - * - * Author: Kevin Wells <kevin.wells@nxp.com> - * - * Copyright (C) 2010 NXP Semiconductors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARM_ARCH_IRQS_H -#define __ASM_ARM_ARCH_IRQS_H - -#define LPC32XX_SIC1_IRQ(n) (32 + (n)) -#define LPC32XX_SIC2_IRQ(n) (64 + (n)) - -/* - * MIC interrupts - */ -#define IRQ_LPC32XX_SUB1IRQ 0 -#define IRQ_LPC32XX_SUB2IRQ 1 -#define IRQ_LPC32XX_PWM3 3 -#define IRQ_LPC32XX_PWM4 4 -#define IRQ_LPC32XX_HSTIMER 5 -#define IRQ_LPC32XX_WATCH 6 -#define IRQ_LPC32XX_UART_IIR3 7 -#define IRQ_LPC32XX_UART_IIR4 8 -#define IRQ_LPC32XX_UART_IIR5 9 -#define IRQ_LPC32XX_UART_IIR6 10 -#define IRQ_LPC32XX_FLASH 11 -#define IRQ_LPC32XX_SD1 13 -#define IRQ_LPC32XX_LCD 14 -#define IRQ_LPC32XX_SD0 15 -#define IRQ_LPC32XX_TIMER0 16 -#define IRQ_LPC32XX_TIMER1 17 -#define IRQ_LPC32XX_TIMER2 18 -#define IRQ_LPC32XX_TIMER3 19 -#define IRQ_LPC32XX_SSP0 20 -#define IRQ_LPC32XX_SSP1 21 -#define IRQ_LPC32XX_I2S0 22 -#define IRQ_LPC32XX_I2S1 23 -#define IRQ_LPC32XX_UART_IIR7 24 -#define IRQ_LPC32XX_UART_IIR2 25 -#define IRQ_LPC32XX_UART_IIR1 26 -#define IRQ_LPC32XX_MSTIMER 27 -#define IRQ_LPC32XX_DMA 28 -#define IRQ_LPC32XX_ETHERNET 29 -#define IRQ_LPC32XX_SUB1FIQ 30 -#define IRQ_LPC32XX_SUB2FIQ 31 - -/* - * SIC1 interrupts start at offset 32 - */ -#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1) -#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2) -#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4) -#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6) -#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7) -#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8) -#define IRQ_LPC32XX_SPI2 LPC32XX_SIC1_IRQ(12) -#define IRQ_LPC32XX_PLLUSB LPC32XX_SIC1_IRQ(13) -#define IRQ_LPC32XX_PLLHCLK LPC32XX_SIC1_IRQ(14) -#define IRQ_LPC32XX_PLL397 LPC32XX_SIC1_IRQ(17) -#define IRQ_LPC32XX_I2C_2 LPC32XX_SIC1_IRQ(18) -#define IRQ_LPC32XX_I2C_1 LPC32XX_SIC1_IRQ(19) -#define IRQ_LPC32XX_RTC LPC32XX_SIC1_IRQ(20) -#define IRQ_LPC32XX_KEY LPC32XX_SIC1_IRQ(22) -#define IRQ_LPC32XX_SPI1 LPC32XX_SIC1_IRQ(23) -#define IRQ_LPC32XX_SW LPC32XX_SIC1_IRQ(24) -#define IRQ_LPC32XX_USB_OTG_TIMER LPC32XX_SIC1_IRQ(25) -#define IRQ_LPC32XX_USB_OTG_ATX LPC32XX_SIC1_IRQ(26) -#define IRQ_LPC32XX_USB_HOST LPC32XX_SIC1_IRQ(27) -#define IRQ_LPC32XX_USB_DEV_DMA LPC32XX_SIC1_IRQ(28) -#define IRQ_LPC32XX_USB_DEV_LP LPC32XX_SIC1_IRQ(29) -#define IRQ_LPC32XX_USB_DEV_HP LPC32XX_SIC1_IRQ(30) -#define IRQ_LPC32XX_USB_I2C LPC32XX_SIC1_IRQ(31) - -/* - * SIC2 interrupts start at offset 64 - */ -#define IRQ_LPC32XX_GPIO_00 LPC32XX_SIC2_IRQ(0) -#define IRQ_LPC32XX_GPIO_01 LPC32XX_SIC2_IRQ(1) -#define IRQ_LPC32XX_GPIO_02 LPC32XX_SIC2_IRQ(2) -#define IRQ_LPC32XX_GPIO_03 LPC32XX_SIC2_IRQ(3) -#define IRQ_LPC32XX_GPIO_04 LPC32XX_SIC2_IRQ(4) -#define IRQ_LPC32XX_GPIO_05 LPC32XX_SIC2_IRQ(5) -#define IRQ_LPC32XX_SPI2_DATAIN LPC32XX_SIC2_IRQ(6) -#define IRQ_LPC32XX_U2_HCTS LPC32XX_SIC2_IRQ(7) -#define IRQ_LPC32XX_P0_P1_IRQ LPC32XX_SIC2_IRQ(8) -#define IRQ_LPC32XX_GPI_08 LPC32XX_SIC2_IRQ(9) -#define IRQ_LPC32XX_GPI_09 LPC32XX_SIC2_IRQ(10) -#define IRQ_LPC32XX_GPI_19 LPC32XX_SIC2_IRQ(11) -#define IRQ_LPC32XX_U7_HCTS LPC32XX_SIC2_IRQ(12) -#define IRQ_LPC32XX_GPI_07 LPC32XX_SIC2_IRQ(15) -#define IRQ_LPC32XX_SDIO LPC32XX_SIC2_IRQ(18) -#define IRQ_LPC32XX_U5_RX LPC32XX_SIC2_IRQ(19) -#define IRQ_LPC32XX_SPI1_DATAIN LPC32XX_SIC2_IRQ(20) -#define IRQ_LPC32XX_GPI_00 LPC32XX_SIC2_IRQ(22) -#define IRQ_LPC32XX_GPI_01 LPC32XX_SIC2_IRQ(23) -#define IRQ_LPC32XX_GPI_02 LPC32XX_SIC2_IRQ(24) -#define IRQ_LPC32XX_GPI_03 LPC32XX_SIC2_IRQ(25) -#define IRQ_LPC32XX_GPI_04 LPC32XX_SIC2_IRQ(26) -#define IRQ_LPC32XX_GPI_05 LPC32XX_SIC2_IRQ(27) -#define IRQ_LPC32XX_GPI_06 LPC32XX_SIC2_IRQ(28) -#define IRQ_LPC32XX_SYSCLK LPC32XX_SIC2_IRQ(31) - -#define LPC32XX_NR_IRQS 96 - -#endif diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c index 207e81275ff0..62471570d586 100644 --- a/arch/arm/mach-lpc32xx/pm.c +++ b/arch/arm/mach-lpc32xx/pm.c @@ -73,7 +73,6 @@ #include <mach/hardware.h> #include <mach/platform.h> #include "common.h" -#include "clock.h" #define TEMP_IRAM_AREA IO_ADDRESS(LPC32XX_IRAM_BASE) diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile index 21164605b83f..dadae67d79b7 100644 --- a/arch/arm/mach-mediatek/Makefile +++ b/arch/arm/mach-mediatek/Makefile @@ -1,4 +1,2 @@ -ifeq ($(CONFIG_SMP),y) -obj-$(CONFIG_ARCH_MEDIATEK) += platsmp.o -endif -obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o +obj-$(CONFIG_SMP) += platsmp.o +obj-y += mediatek.o diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index afb809509140..45c6b733c881 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -31,6 +31,32 @@ config ARCH_OMAP16XX select ARCH_OMAP_OTG select CPU_ARM926T +config OMAP_MUX + bool "OMAP multiplexing support" + depends on ARCH_OMAP + default y + help + Pin multiplexing support for OMAP boards. If your bootloader + sets the multiplexing correctly, say N. Otherwise, or if unsure, + say Y. + +config OMAP_MUX_DEBUG + bool "Multiplexing debug output" + depends on OMAP_MUX + help + Makes the multiplexing functions print out a lot of debug info. + This is useful if you want to find out the correct values of the + multiplexing registers. + +config OMAP_MUX_WARNINGS + bool "Warn about pins the bootloader didn't set up" + depends on OMAP_MUX + default y + help + Choose Y here to warn whenever driver initialization logic needs + to change the pin multiplexing setup. When there are no warnings + printed, it's safe to deselect OMAP_MUX for your product. + comment "OMAP Board Type" depends on ARCH_OMAP1 diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c index 82887d645a6a..32f6c53367bf 100644 --- a/arch/arm/mach-omap1/i2c.c +++ b/arch/arm/mach-omap1/i2c.c @@ -19,6 +19,7 @@ * */ +#include <linux/i2c.h> #include <linux/i2c-omap.h> #include <mach/mux.h> #include "soc.h" @@ -91,6 +92,88 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata, return platform_device_register(pdev); } +#define OMAP_I2C_MAX_CONTROLLERS 4 +static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS]; + +#define OMAP_I2C_CMDLINE_SETUP (BIT(31)) + +/** + * omap_i2c_bus_setup - Process command line options for the I2C bus speed + * @str: String of options + * + * This function allow to override the default I2C bus speed for given I2C + * bus with a command line option. + * + * Format: i2c_bus=bus_id,clkrate (in kHz) + * + * Returns 1 on success, 0 otherwise. + */ +static int __init omap_i2c_bus_setup(char *str) +{ + int ints[3]; + + get_options(str, 3, ints); + if (ints[0] < 2 || ints[1] < 1 || + ints[1] > OMAP_I2C_MAX_CONTROLLERS) + return 0; + i2c_pdata[ints[1] - 1].clkrate = ints[2]; + i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP; + + return 1; +} +__setup("i2c_bus=", omap_i2c_bus_setup); + +/* + * Register busses defined in command line but that are not registered with + * omap_register_i2c_bus from board initialization code. + */ +int __init omap_register_i2c_bus_cmdline(void) +{ + int i, err = 0; + + for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++) + if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) { + i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; + err = omap_i2c_add_bus(&i2c_pdata[i], i + 1); + if (err) + goto out; + } + +out: + return err; +} + +/** + * omap_register_i2c_bus - register I2C bus with device descriptors + * @bus_id: bus id counting from number 1 + * @clkrate: clock rate of the bus in kHz + * @info: pointer into I2C device descriptor table or NULL + * @len: number of descriptors in the table + * + * Returns 0 on success or an error code. + */ +int __init omap_register_i2c_bus(int bus_id, u32 clkrate, + struct i2c_board_info const *info, + unsigned len) +{ + int err; + + BUG_ON(bus_id < 1 || bus_id > OMAP_I2C_MAX_CONTROLLERS); + + if (info) { + err = i2c_register_board_info(bus_id, info, len); + if (err) + return err; + } + + if (!i2c_pdata[bus_id - 1].clkrate) + i2c_pdata[bus_id - 1].clkrate = clkrate; + + i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; + + return omap_i2c_add_bus(&i2c_pdata[bus_id - 1], bus_id); +} + static int __init omap_i2c_cmdline(void) { return omap_register_i2c_bus_cmdline(); diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 5b37ec29996e..469894082fea 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -6,7 +6,7 @@ ccflags-y := -I$(srctree)/$(src)/include \ -I$(srctree)/arch/arm/plat-omap/include # Common support -obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o timer.o pm.o \ +obj-y := id.o io.o control.o devices.o fb.o timer.o pm.o \ common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ omap_device.o omap-headsmp.o sram.o drm.o @@ -63,9 +63,6 @@ obj-$(CONFIG_ARCH_OMAP4) += omap4-restart.o obj-$(CONFIG_SOC_OMAP5) += omap4-restart.o obj-$(CONFIG_SOC_DRA7XX) += omap4-restart.o -# Pin multiplexing -obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o - # SMS/SDRC obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o # obj-$(CONFIG_ARCH_OMAP3) += sdrc3xxx.o @@ -80,7 +77,7 @@ endif # Power Management omap-4-5-pm-common = omap-mpuss-lowpower.o obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-pm-common) -obj-$(CONFIG_ARCH_OMAP5) += $(omap-4-5-pm-common) +obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-pm-common) obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o ifeq ($(CONFIG_PM),y) @@ -235,26 +232,15 @@ obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o # Platform specific device init code -omap-flash-$(CONFIG_MTD_NAND_OMAP2) := board-flash.o -omap-flash-$(CONFIG_MTD_ONENAND_OMAP2) := board-flash.o -obj-y += $(omap-flash-y) $(omap-flash-m) - omap-hsmmc-$(CONFIG_MMC_OMAP_HS) := hsmmc.o obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y) -obj-y += usb-musb.o obj-y += omap_phy_internal.o obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o -obj-y += usb-host.o onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o obj-y += $(onenand-m) $(onenand-y) nand-$(CONFIG_MTD_NAND_OMAP2) := gpmc-nand.o obj-y += $(nand-m) $(nand-y) - -smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o -obj-y += $(smsc911x-m) $(smsc911x-y) - -obj-y += common-board-devices.o twl-common.o dss-common.o diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c deleted file mode 100644 index 2188dc30e232..000000000000 --- a/arch/arm/mach-omap2/board-flash.c +++ /dev/null @@ -1,242 +0,0 @@ -/* - * board-flash.c - * Modified from mach-omap2/board-3430sdp-flash.c - * - * Copyright (C) 2009 Nokia Corporation - * Copyright (C) 2009 Texas Instruments - * - * Vimal Singh <vimalsingh@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/omap-gpmc.h> -#include <linux/platform_device.h> -#include <linux/mtd/physmap.h> -#include <linux/io.h> - -#include <linux/platform_data/mtd-nand-omap2.h> -#include <linux/platform_data/mtd-onenand-omap2.h> - -#include "soc.h" -#include "common.h" -#include "board-flash.h" - -#define REG_FPGA_REV 0x10 -#define REG_FPGA_DIP_SWITCH_INPUT2 0x60 -#define MAX_SUPPORTED_GPMC_CONFIG 3 - -#define DEBUG_BASE 0x08000000 /* debug board */ - -/* various memory sizes */ -#define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */ -#define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */ - -static struct physmap_flash_data board_nor_data = { - .width = 2, -}; - -static struct resource board_nor_resource = { - .flags = IORESOURCE_MEM, -}; - -static struct platform_device board_nor_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &board_nor_data, - }, - .num_resources = 1, - .resource = &board_nor_resource, -}; - -static void -__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs) -{ - int err; - - board_nor_data.parts = nor_parts; - board_nor_data.nr_parts = nr_parts; - - /* Configure start address and size of NOR device */ - if (omap_rev() >= OMAP3430_REV_ES1_0) { - err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1, - (unsigned long *)&board_nor_resource.start); - board_nor_resource.end = board_nor_resource.start - + FLASH_SIZE_SDPV2 - 1; - } else { - err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1, - (unsigned long *)&board_nor_resource.start); - board_nor_resource.end = board_nor_resource.start - + FLASH_SIZE_SDPV1 - 1; - } - if (err < 0) { - pr_err("NOR: Can't request GPMC CS\n"); - return; - } - if (platform_device_register(&board_nor_device) < 0) - pr_err("Unable to register NOR device\n"); -} - -#if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2) -static struct omap_onenand_platform_data board_onenand_data = { - .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */ -}; - -void -__init board_onenand_init(struct mtd_partition *onenand_parts, - u8 nr_parts, u8 cs) -{ - board_onenand_data.cs = cs; - board_onenand_data.parts = onenand_parts; - board_onenand_data.nr_parts = nr_parts; - - gpmc_onenand_init(&board_onenand_data); -} -#endif /* IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2) */ - -#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2) - -/* Note that all values in this struct are in nanoseconds */ -struct gpmc_timings nand_default_timings[1] = { - { - .sync_clk = 0, - - .cs_on = 0, - .cs_rd_off = 36, - .cs_wr_off = 36, - - .we_on = 6, - .oe_on = 6, - - .adv_on = 6, - .adv_rd_off = 24, - .adv_wr_off = 36, - - .we_off = 30, - .oe_off = 48, - - .access = 54, - .rd_cycle = 72, - .wr_cycle = 72, - - .wr_access = 30, - .wr_data_mux_bus = 0, - }, -}; - -static struct omap_nand_platform_data board_nand_data; - -void -__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, - int nand_type, struct gpmc_timings *gpmc_t) -{ - board_nand_data.cs = cs; - board_nand_data.parts = nand_parts; - board_nand_data.nr_parts = nr_parts; - board_nand_data.devsize = nand_type; - - board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_SW; - gpmc_nand_init(&board_nand_data, gpmc_t); -} -#endif /* IS_ENABLED(CONFIG_MTD_NAND_OMAP2) */ - -/** - * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get - * the various cs values. - */ -static u8 get_gpmc0_type(void) -{ - u8 cs = 0; - void __iomem *fpga_map_addr; - - fpga_map_addr = ioremap(DEBUG_BASE, 4096); - if (!fpga_map_addr) - return -ENOMEM; - - if (!(readw_relaxed(fpga_map_addr + REG_FPGA_REV))) - /* we dont have an DEBUG FPGA??? */ - /* Depend on #defines!! default to strata boot return param */ - goto unmap; - - /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */ - cs = readw_relaxed(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf; - - /* ES2.0 SDP's onwards 4 dip switches are provided for CS */ - if (omap_rev() >= OMAP3430_REV_ES1_0) - /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */ - cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) | - ((cs & 2) << 1) | ((cs & 1) << 3); - else - /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */ - cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2); -unmap: - iounmap(fpga_map_addr); - return cs; -} - -/** - * board_flash_init - Identify devices connected to GPMC and register. - * - * @return - void. - */ -void __init board_flash_init(struct flash_partitions partition_info[], - char chip_sel_board[][GPMC_CS_NUM], int nand_type) -{ - u8 cs = 0; - u8 norcs = GPMC_CS_NUM + 1; - u8 nandcs = GPMC_CS_NUM + 1; - u8 onenandcs = GPMC_CS_NUM + 1; - u8 idx; - unsigned char *config_sel = NULL; - - /* REVISIT: Is this return correct idx for 2430 SDP? - * for which cs configuration matches for 2430 SDP? - */ - idx = get_gpmc0_type(); - if (idx >= MAX_SUPPORTED_GPMC_CONFIG) { - pr_err("%s: Invalid chip select: %d\n", __func__, cs); - return; - } - config_sel = (unsigned char *)(chip_sel_board[idx]); - - while (cs < GPMC_CS_NUM) { - switch (config_sel[cs]) { - case PDC_NOR: - if (norcs > GPMC_CS_NUM) - norcs = cs; - break; - case PDC_NAND: - if (nandcs > GPMC_CS_NUM) - nandcs = cs; - break; - case PDC_ONENAND: - if (onenandcs > GPMC_CS_NUM) - onenandcs = cs; - break; - } - cs++; - } - - if (norcs > GPMC_CS_NUM) - pr_err("NOR: Unable to find configuration in GPMC\n"); - else - board_nor_init(partition_info[0].parts, - partition_info[0].nr_parts, norcs); - - if (onenandcs > GPMC_CS_NUM) - pr_err("OneNAND: Unable to find configuration in GPMC\n"); - else - board_onenand_init(partition_info[1].parts, - partition_info[1].nr_parts, onenandcs); - - if (nandcs > GPMC_CS_NUM) - pr_err("NAND: Unable to find configuration in GPMC\n"); - else - board_nand_init(partition_info[2].parts, - partition_info[2].nr_parts, nandcs, - nand_type, nand_default_timings); -} diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h deleted file mode 100644 index 8b39eec07318..000000000000 --- a/arch/arm/mach-omap2/board-flash.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * board-sdp.h - * - * Information structures for SDP-specific board config data - * - * Copyright (C) 2009 Nokia Corporation - * Copyright (C) 2009 Texas Instruments - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#define PDC_NOR 1 -#define PDC_NAND 2 -#define PDC_ONENAND 3 -#define DBG_MPDB 4 - -struct flash_partitions { - struct mtd_partition *parts; - int nr_parts; -}; - -#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2) || IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2) -extern void board_flash_init(struct flash_partitions [], - char chip_sel[][GPMC_CS_NUM], int nand_type); -#else -static inline void board_flash_init(struct flash_partitions part[], - char chip_sel[][GPMC_CS_NUM], int nand_type) -{ -} -#endif - -#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2) -extern void board_nand_init(struct mtd_partition *nand_parts, - u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t); -extern struct gpmc_timings nand_default_timings[]; -#else -static inline void board_nand_init(struct mtd_partition *nand_parts, - u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t) -{ -} -#define nand_default_timings NULL -#endif - -#if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2) -extern void board_onenand_init(struct mtd_partition *nand_parts, - u8 nr_parts, u8 cs); -#else -static inline void board_onenand_init(struct mtd_partition *nand_parts, - u8 nr_parts, u8 cs) -{ -} -#endif diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index bab814d2f37d..981b23a39f29 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -341,6 +341,7 @@ static const char *const dra72x_boards_compat[] __initconst = { "ti,am5718", "ti,am5716", "ti,dra722", + "ti,dra718", NULL, }; diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c b/arch/arm/mach-omap2/clockdomains7xx_data.c index ef9ed36e8a61..6c679659cda5 100644 --- a/arch/arm/mach-omap2/clockdomains7xx_data.c +++ b/arch/arm/mach-omap2/clockdomains7xx_data.c @@ -409,7 +409,7 @@ static struct clockdomain l4sec_7xx_clkdm = { .dep_bit = DRA7XX_L4SEC_STATDEP_SHIFT, .wkdep_srcs = l4sec_wkup_sleep_deps, .sleepdep_srcs = l4sec_wkup_sleep_deps, - .flags = CLKDM_CAN_HWSUP_SWSUP, + .flags = CLKDM_CAN_SWSUP, }; static struct clockdomain l3main1_7xx_clkdm = { diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c deleted file mode 100644 index 5388fcd3de72..000000000000 --- a/arch/arm/mach-omap2/common-board-devices.c +++ /dev/null @@ -1,102 +0,0 @@ -/* - * common-board-devices.c - * - * Copyright (C) 2011 CompuLab, Ltd. - * Author: Mike Rapoport <mike@compulab.co.il> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA - * 02110-1301 USA - * - */ - -#include <linux/gpio.h> -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> - -#include <linux/platform_data/spi-omap2-mcspi.h> - -#include "common.h" -#include "common-board-devices.h" - -#if IS_ENABLED(CONFIG_TOUCHSCREEN_ADS7846) -static struct omap2_mcspi_device_config ads7846_mcspi_config = { - .turbo_mode = 0, -}; - -static struct ads7846_platform_data ads7846_config = { - .x_max = 0x0fff, - .y_max = 0x0fff, - .x_plate_ohms = 180, - .pressure_max = 255, - .debounce_max = 10, - .debounce_tol = 3, - .debounce_rep = 1, - .gpio_pendown = -EINVAL, - .keep_vref_on = 1, -}; - -static struct spi_board_info ads7846_spi_board_info __initdata = { - .modalias = "ads7846", - .bus_num = -EINVAL, - .chip_select = 0, - .max_speed_hz = 1500000, - .controller_data = &ads7846_mcspi_config, - .irq = -EINVAL, - .platform_data = &ads7846_config, -}; - -void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, - struct ads7846_platform_data *board_pdata) -{ - struct spi_board_info *spi_bi = &ads7846_spi_board_info; - int err; - - /* - * If a board defines get_pendown_state() function, request the pendown - * GPIO and set the GPIO debounce time. - * If a board does not define the get_pendown_state() function, then - * the ads7846 driver will setup the pendown GPIO itself. - */ - if (board_pdata && board_pdata->get_pendown_state) { - err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown"); - if (err) { - pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err); - return; - } - - if (gpio_debounce) - gpio_set_debounce(gpio_pendown, gpio_debounce); - - gpio_export(gpio_pendown, 0); - } - - spi_bi->bus_num = bus_num; - spi_bi->irq = gpio_to_irq(gpio_pendown); - - ads7846_config.gpio_pendown = gpio_pendown; - - if (board_pdata) { - board_pdata->gpio_pendown = gpio_pendown; - board_pdata->gpio_pendown_debounce = gpio_debounce; - spi_bi->platform_data = board_pdata; - } - - spi_register_board_info(&ads7846_spi_board_info, 1); -} -#else -void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, - struct ads7846_platform_data *board_pdata) -{ -} -#endif diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h index 07c88ae083fb..335c7822fea1 100644 --- a/arch/arm/mach-omap2/common-board-devices.h +++ b/arch/arm/mach-omap2/common-board-devices.h @@ -3,15 +3,7 @@ #include <sound/tlv320aic3x.h> #include <linux/mfd/menelaus.h> -#include "twl-common.h" -#define NAND_BLOCK_SIZE SZ_128K - -struct mtd_partition; -struct ads7846_platform_data; - -void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, - struct ads7846_platform_data *board_pdata); void *n8x0_legacy_init(void); extern struct menelaus_platform_data n8x0_menelaus_platform_data; diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index deed42e1dd9c..14652e78bde7 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -77,15 +77,6 @@ static inline int omap4_pm_init_early(void) } #endif -#ifdef CONFIG_OMAP_MUX -int omap_mux_late_init(void); -#else -static inline int omap_mux_late_init(void) -{ - return 0; -} -#endif - extern void omap2_init_common_infrastructure(void); extern void omap_init_time(void); @@ -262,8 +253,6 @@ extern void __iomem *omap4_get_sar_ram_base(void); extern void omap4_mpuss_early_init(void); extern void omap_do_wfi(void); -extern void omap4_secondary_startup(void); -extern void omap4460_secondary_startup(void); #ifdef CONFIG_SMP /* Needed for secondary core boot */ @@ -275,16 +264,11 @@ extern void omap4_cpu_die(unsigned int cpu); extern int omap4_cpu_kill(unsigned int cpu); extern const struct smp_operations omap4_smp_ops; - -extern void omap5_secondary_startup(void); -extern void omap5_secondary_hyp_startup(void); #endif #if defined(CONFIG_SMP) && defined(CONFIG_PM) extern int omap4_mpuss_init(void); extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); -extern int omap4_finish_suspend(unsigned long cpu_state); -extern void omap4_cpu_resume(void); extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); #else static inline int omap4_enter_lowpower(unsigned int cpu, @@ -305,14 +289,41 @@ static inline int omap4_mpuss_init(void) return 0; } +#endif + +#ifdef CONFIG_ARCH_OMAP4 +void omap4_secondary_startup(void); +void omap4460_secondary_startup(void); +int omap4_finish_suspend(unsigned long cpu_state); +void omap4_cpu_resume(void); +#else +static inline void omap4_secondary_startup(void) +{ +} + +static inline void omap4460_secondary_startup(void) +{ +} static inline int omap4_finish_suspend(unsigned long cpu_state) { return 0; } - static inline void omap4_cpu_resume(void) -{} +{ +} +#endif +#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) +void omap5_secondary_startup(void); +void omap5_secondary_hyp_startup(void); +#else +static inline void omap5_secondary_startup(void) +{ +} + +static inline void omap5_secondary_hyp_startup(void) +{ +} #endif void pdata_quirks_init(const struct of_device_id *); diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index fa138d4032b6..a8b291f00109 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -21,6 +21,7 @@ #include "common.h" #include "pm.h" #include "prm.h" +#include "soc.h" #include "clockdomain.h" #define MAX_CPUS 2 @@ -30,6 +31,7 @@ struct idle_statedata { u32 cpu_state; u32 mpu_logic_state; u32 mpu_state; + u32 mpu_state_vote; }; static struct idle_statedata omap4_idle_data[] = { @@ -50,12 +52,26 @@ static struct idle_statedata omap4_idle_data[] = { }, }; +static struct idle_statedata omap5_idle_data[] = { + { + .cpu_state = PWRDM_POWER_ON, + .mpu_state = PWRDM_POWER_ON, + .mpu_logic_state = PWRDM_POWER_ON, + }, + { + .cpu_state = PWRDM_POWER_RET, + .mpu_state = PWRDM_POWER_RET, + .mpu_logic_state = PWRDM_POWER_RET, + }, +}; + static struct powerdomain *mpu_pd, *cpu_pd[MAX_CPUS]; static struct clockdomain *cpu_clkdm[MAX_CPUS]; static atomic_t abort_barrier; static bool cpu_done[MAX_CPUS]; static struct idle_statedata *state_ptr = &omap4_idle_data[0]; +static DEFINE_RAW_SPINLOCK(mpu_lock); /* Private functions */ @@ -77,6 +93,32 @@ static int omap_enter_idle_simple(struct cpuidle_device *dev, return index; } +static int omap_enter_idle_smp(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int index) +{ + struct idle_statedata *cx = state_ptr + index; + unsigned long flag; + + raw_spin_lock_irqsave(&mpu_lock, flag); + cx->mpu_state_vote++; + if (cx->mpu_state_vote == num_online_cpus()) { + pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state); + omap_set_pwrdm_state(mpu_pd, cx->mpu_state); + } + raw_spin_unlock_irqrestore(&mpu_lock, flag); + + omap4_enter_lowpower(dev->cpu, cx->cpu_state); + + raw_spin_lock_irqsave(&mpu_lock, flag); + if (cx->mpu_state_vote == num_online_cpus()) + omap_set_pwrdm_state(mpu_pd, PWRDM_POWER_ON); + cx->mpu_state_vote--; + raw_spin_unlock_irqrestore(&mpu_lock, flag); + + return index; +} + static int omap_enter_idle_coupled(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) @@ -220,6 +262,32 @@ static struct cpuidle_driver omap4_idle_driver = { .safe_state_index = 0, }; +static struct cpuidle_driver omap5_idle_driver = { + .name = "omap5_idle", + .owner = THIS_MODULE, + .states = { + { + /* C1 - CPU0 ON + CPU1 ON + MPU ON */ + .exit_latency = 2 + 2, + .target_residency = 5, + .enter = omap_enter_idle_simple, + .name = "C1", + .desc = "CPUx WFI, MPUSS ON" + }, + { + /* C2 - CPU0 RET + CPU1 RET + MPU CSWR */ + .exit_latency = 48 + 60, + .target_residency = 100, + .flags = CPUIDLE_FLAG_TIMER_STOP, + .enter = omap_enter_idle_smp, + .name = "C2", + .desc = "CPUx CSWR, MPUSS CSWR", + }, + }, + .state_count = ARRAY_SIZE(omap5_idle_data), + .safe_state_index = 0, +}; + /* Public functions */ /** @@ -230,6 +298,16 @@ static struct cpuidle_driver omap4_idle_driver = { */ int __init omap4_idle_init(void) { + struct cpuidle_driver *idle_driver; + + if (soc_is_omap54xx()) { + state_ptr = &omap5_idle_data[0]; + idle_driver = &omap5_idle_driver; + } else { + state_ptr = &omap4_idle_data[0]; + idle_driver = &omap4_idle_driver; + } + mpu_pd = pwrdm_lookup("mpu_pwrdm"); cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm"); cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm"); @@ -244,5 +322,5 @@ int __init omap4_idle_init(void) /* Configure the broadcast timer on each cpu */ on_each_cpu(omap_setup_broadcast_timer, NULL, 1); - return cpuidle_register(&omap4_idle_driver, cpu_online_mask); + return cpuidle_register(idle_driver, cpu_online_mask); } diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 60a20f3b44de..3fdb94599184 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -30,7 +30,6 @@ #include "soc.h" #include "common.h" -#include "mux.h" #include "control.h" #include "display.h" diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c deleted file mode 100644 index 1d583bc0b1a9..000000000000 --- a/arch/arm/mach-omap2/dss-common.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2012 Texas Instruments, Inc.. - * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA - * 02110-1301 USA - * - */ - -/* - * NOTE: this is a transitional file to help with DT adaptation. - * This file will be removed when DSS supports DT. - */ - -#include <linux/kernel.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> - -#include <linux/platform_data/omapdss.h> -#include <video/omap-panel-data.h> - -#include "soc.h" -#include "dss-common.h" -#include "mux.h" -#include "display.h" - diff --git a/arch/arm/mach-omap2/dss-common.h b/arch/arm/mach-omap2/dss-common.h deleted file mode 100644 index a9becf0d5be8..000000000000 --- a/arch/arm/mach-omap2/dss-common.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __OMAP_DSS_COMMON__ -#define __OMAP_DSS_COMMON__ - -/* - * NOTE: this is a transitional file to help with DT adaptation. - * This file will be removed when DSS supports DT. - */ - -void __init omap4_panda_display_init_of(void); -void __init omap_4430sdp_display_init_of(void); -void __init omap3_igep2_display_init_of(void); - -#endif diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c deleted file mode 100644 index 2757504a13c4..000000000000 --- a/arch/arm/mach-omap2/gpmc-smsc911x.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/gpmc-smsc911x.c - * - * Copyright (C) 2009 Li-Pro.Net - * Stephan Linz <linz@li-pro.net> - * - * Modified from linux/arch/arm/mach-omap2/gpmc-smc91x.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#define pr_fmt(fmt) "%s: " fmt, __func__ - -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/gpio.h> -#include <linux/delay.h> -#include <linux/interrupt.h> -#include <linux/io.h> -#include <linux/smsc911x.h> - -#include "gpmc.h" -#include "gpmc-smsc911x.h" - -static struct resource gpmc_smsc911x_resources[] = { - [0] = { - .flags = IORESOURCE_MEM, - }, - [1] = { - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, - }, -}; - -static struct smsc911x_platform_config gpmc_smsc911x_config = { - .phy_interface = PHY_INTERFACE_MODE_MII, - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, - .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, -}; - -/* - * Initialize smsc911x device connected to the GPMC. Note that we - * assume that pin multiplexing is done in the board-*.c file, - * or in the bootloader. - */ -void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg) -{ - struct platform_device *pdev; - unsigned long cs_mem_base; - int ret; - - if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { - pr_err("Failed to request GPMC mem region\n"); - return; - } - - gpmc_smsc911x_resources[0].start = cs_mem_base + 0x0; - gpmc_smsc911x_resources[0].end = cs_mem_base + 0xff; - - if (gpio_request_one(gpmc_cfg->gpio_irq, GPIOF_IN, "smsc911x irq")) { - pr_err("Failed to request IRQ GPIO%d\n", gpmc_cfg->gpio_irq); - goto free1; - } - - gpmc_smsc911x_resources[1].start = gpio_to_irq(gpmc_cfg->gpio_irq); - - if (gpio_is_valid(gpmc_cfg->gpio_reset)) { - ret = gpio_request_one(gpmc_cfg->gpio_reset, - GPIOF_OUT_INIT_HIGH, "smsc911x reset"); - if (ret) { - pr_err("Failed to request reset GPIO%d\n", - gpmc_cfg->gpio_reset); - goto free2; - } - - gpio_set_value(gpmc_cfg->gpio_reset, 0); - msleep(100); - gpio_set_value(gpmc_cfg->gpio_reset, 1); - } - - gpmc_smsc911x_config.flags = gpmc_cfg->flags ? : SMSC911X_USE_16BIT; - - pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id, - gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources), - &gpmc_smsc911x_config, sizeof(gpmc_smsc911x_config)); - if (IS_ERR(pdev)) { - pr_err("Unable to register platform device\n"); - gpio_free(gpmc_cfg->gpio_reset); - goto free2; - } - - return; - -free2: - gpio_free(gpmc_cfg->gpio_irq); -free1: - gpmc_cs_free(gpmc_cfg->cs); - - pr_err("Could not initialize smsc911x device\n"); -} diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.h b/arch/arm/mach-omap2/gpmc-smsc911x.h deleted file mode 100644 index 99a05b8412fa..000000000000 --- a/arch/arm/mach-omap2/gpmc-smsc911x.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * arch/arm/plat-omap/include/plat/gpmc-smsc911x.h - * - * Copyright (C) 2009 Li-Pro.Net - * Stephan Linz <linz@li-pro.net> - * - * Modified from arch/arm/plat-omap/include/plat/gpmc-smc91x.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_OMAP_GPMC_SMSC911X_H__ - -struct omap_smsc911x_platform_data { - int id; - int cs; - int gpio_irq; - int gpio_reset; - u32 flags; -}; - -#if IS_ENABLED(CONFIG_SMSC911X) - -extern void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d); - -#else - -static inline void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d) -{ -} - -#endif -#endif diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index 478097741bce..cb754c46747e 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -22,7 +22,6 @@ #include "omap_device.h" #include "omap-pm.h" -#include "mux.h" #include "hsmmc.h" #include "control.h" @@ -147,91 +146,6 @@ static int nop_mmc_set_power(struct device *dev, int power_on, int vdd) return 0; } -static inline void omap_hsmmc_mux(struct omap_hsmmc_platform_data - *mmc_controller, int controller_nr) -{ - if (gpio_is_valid(mmc_controller->gpio_cd) && - (mmc_controller->gpio_cd < OMAP_MAX_GPIO_LINES)) - omap_mux_init_gpio(mmc_controller->gpio_cd, - OMAP_PIN_INPUT_PULLUP); - if (gpio_is_valid(mmc_controller->gpio_cod) && - (mmc_controller->gpio_cod < OMAP_MAX_GPIO_LINES)) - omap_mux_init_gpio(mmc_controller->gpio_cod, - OMAP_PIN_INPUT_PULLUP); - if (gpio_is_valid(mmc_controller->gpio_wp) && - (mmc_controller->gpio_wp < OMAP_MAX_GPIO_LINES)) - omap_mux_init_gpio(mmc_controller->gpio_wp, - OMAP_PIN_INPUT_PULLUP); - if (cpu_is_omap34xx()) { - if (controller_nr == 0) { - omap_mux_init_signal("sdmmc1_clk", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc1_cmd", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc1_dat0", - OMAP_PIN_INPUT_PULLUP); - if (mmc_controller->caps & - (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) { - omap_mux_init_signal("sdmmc1_dat1", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc1_dat2", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc1_dat3", - OMAP_PIN_INPUT_PULLUP); - } - if (mmc_controller->caps & - MMC_CAP_8_BIT_DATA) { - omap_mux_init_signal("sdmmc1_dat4", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc1_dat5", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc1_dat6", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc1_dat7", - OMAP_PIN_INPUT_PULLUP); - } - } - if (controller_nr == 1) { - /* MMC2 */ - omap_mux_init_signal("sdmmc2_clk", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc2_cmd", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc2_dat0", - OMAP_PIN_INPUT_PULLUP); - - /* - * For 8 wire configurations, Lines DAT4, 5, 6 and 7 - * need to be muxed in the board-*.c files - */ - if (mmc_controller->caps & - (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) { - omap_mux_init_signal("sdmmc2_dat1", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc2_dat2", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc2_dat3", - OMAP_PIN_INPUT_PULLUP); - } - if (mmc_controller->caps & - MMC_CAP_8_BIT_DATA) { - omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7", - OMAP_PIN_INPUT_PULLUP); - } - } - - /* - * For MMC3 the pins need to be muxed in the board-*.c files - */ - } -} - static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, struct omap_hsmmc_platform_data *mmc) { @@ -410,8 +324,6 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo, if (res < 0) goto free_mmc; - omap_hsmmc_mux(mmc_data, (ctrl_nr - 1)); - name = "omap_hsmmc"; res = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN, "mmc%d", ctrl_nr); diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index b9d8e47ffe8e..91a21c3923b2 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -26,7 +26,6 @@ #include "prm.h" #include "common.h" -#include "mux.h" #include "i2c.h" /* In register I2C_CON, Bit 15 is the I2C enable bit */ @@ -36,20 +35,6 @@ #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16 -static void __init omap2_i2c_mux_pins(int bus_id) -{ - char mux_name[sizeof("i2c2_scl.i2c2_scl")]; - - /* First I2C bus is not muxable */ - if (bus_id == 1) - return; - - sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id); - omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); - sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); - omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); -} - /** * omap_i2c_reset - reset the omap i2c module. * @oh: struct omap_hwmod * @@ -107,85 +92,3 @@ int omap_i2c_reset(struct omap_hwmod *oh) return 0; } - -static int __init omap_i2c_nr_ports(void) -{ - int ports = 0; - - if (cpu_is_omap24xx()) - ports = 2; - else if (cpu_is_omap34xx()) - ports = 3; - else if (cpu_is_omap44xx()) - ports = 4; - return ports; -} - -/* - * XXX This function is a temporary compatibility wrapper - only - * needed until the I2C driver can be converted to call - * omap_pm_set_max_dev_wakeup_lat() and handle a return code. - */ -static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t) -{ - omap_pm_set_max_mpu_wakeup_lat(dev, t); -} - -static const char name[] = "omap_i2c"; - -int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata, - int bus_id) -{ - int l; - struct omap_hwmod *oh; - struct platform_device *pdev; - char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN]; - struct omap_i2c_bus_platform_data *pdata; - struct omap_i2c_dev_attr *dev_attr; - - if (bus_id > omap_i2c_nr_ports()) - return -EINVAL; - - omap2_i2c_mux_pins(bus_id); - - l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id); - WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN, - "String buffer overflow in I2C%d device setup\n", bus_id); - oh = omap_hwmod_lookup(oh_name); - if (!oh) { - pr_err("Could not look up %s\n", oh_name); - return -EEXIST; - } - - pdata = i2c_pdata; - /* - * pass the hwmod class's CPU-specific knowledge of I2C IP revision in - * use, and functionality implementation flags, up to the OMAP I2C - * driver via platform data - */ - pdata->rev = oh->class->rev; - - dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; - pdata->flags = dev_attr->flags; - - /* - * When waiting for completion of a i2c transfer, we need to - * set a wake up latency constraint for the MPU. This is to - * ensure quick enough wakeup from idle, when transfer - * completes. - * Only omap3 has support for constraints - */ - if (cpu_is_omap34xx()) - pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat; - pdev = omap_device_build(name, bus_id, oh, pdata, - sizeof(struct omap_i2c_bus_platform_data)); - WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name); - - return PTR_ERR_OR_ZERO(pdev); -} - -static int __init omap_i2c_cmdline(void) -{ - return omap_register_i2c_bus_cmdline(); -} -omap_subsys_initcall(omap_i2c_cmdline); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 0e9acdd95d70..5aafb8449c40 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -427,7 +427,6 @@ static void __init omap_hwmod_init_postsetup(void) static void __init __maybe_unused omap_common_late_init(void) { - omap_mux_late_init(); omap2_common_pm_late_init(); omap_soc_device_init(); } @@ -717,10 +716,11 @@ void __init omap5_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap2_control_base_init(); - omap4_pm_init_early(); omap2_prcm_base_init(); omap5xxx_check_revision(); omap4_sar_ram_init(); + omap4_mpuss_early_init(); + omap4_pm_init_early(); omap54xx_voltagedomains_init(); omap54xx_powerdomains_init(); omap54xx_clockdomains_init(); diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c index 8bdf182422bd..5a3bc3de58d0 100644 --- a/arch/arm/mach-omap2/msdi.c +++ b/arch/arm/mach-omap2/msdi.c @@ -30,7 +30,6 @@ #include "control.h" #include "omap_hwmod.h" #include "omap_device.h" -#include "mux.h" #include "mmc.h" /* diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c deleted file mode 100644 index 176eef6ef338..000000000000 --- a/arch/arm/mach-omap2/mux.c +++ /dev/null @@ -1,1153 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/mux.c - * - * OMAP2, OMAP3 and OMAP4 pin multiplexing configurations - * - * Copyright (C) 2004 - 2010 Texas Instruments Inc. - * Copyright (C) 2003 - 2008 Nokia Corporation - * - * Written by Tony Lindgren - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/list.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/debugfs.h> -#include <linux/seq_file.h> -#include <linux/uaccess.h> -#include <linux/irq.h> -#include <linux/interrupt.h> - - -#include "omap_hwmod.h" - -#include "soc.h" -#include "control.h" -#include "mux.h" -#include "prm.h" -#include "common.h" - -#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ -#define OMAP_MUX_BASE_SZ 0x5ca - -struct omap_mux_entry { - struct omap_mux mux; - struct list_head node; -}; - -static LIST_HEAD(mux_partitions); -static DEFINE_MUTEX(muxmode_mutex); - -struct omap_mux_partition *omap_mux_get(const char *name) -{ - struct omap_mux_partition *partition; - - list_for_each_entry(partition, &mux_partitions, node) { - if (!strcmp(name, partition->name)) - return partition; - } - - return NULL; -} - -u16 omap_mux_read(struct omap_mux_partition *partition, u16 reg) -{ - if (partition->flags & OMAP_MUX_REG_8BIT) - return readb_relaxed(partition->base + reg); - else - return readw_relaxed(partition->base + reg); -} - -void omap_mux_write(struct omap_mux_partition *partition, u16 val, - u16 reg) -{ - if (partition->flags & OMAP_MUX_REG_8BIT) - writeb_relaxed(val, partition->base + reg); - else - writew_relaxed(val, partition->base + reg); -} - -void omap_mux_write_array(struct omap_mux_partition *partition, - struct omap_board_mux *board_mux) -{ - if (!board_mux) - return; - - while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { - omap_mux_write(partition, board_mux->value, - board_mux->reg_offset); - board_mux++; - } -} - -#ifdef CONFIG_OMAP_MUX - -static char *omap_mux_options; - -static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition, - int gpio, int val) -{ - struct omap_mux_entry *e; - struct omap_mux *gpio_mux = NULL; - u16 old_mode; - u16 mux_mode; - int found = 0; - struct list_head *muxmodes = &partition->muxmodes; - - if (!gpio) - return -EINVAL; - - list_for_each_entry(e, muxmodes, node) { - struct omap_mux *m = &e->mux; - if (gpio == m->gpio) { - gpio_mux = m; - found++; - } - } - - if (found == 0) { - pr_err("%s: Could not set gpio%i\n", __func__, gpio); - return -ENODEV; - } - - if (found > 1) { - pr_info("%s: Multiple gpio paths (%d) for gpio%i\n", __func__, - found, gpio); - return -EINVAL; - } - - old_mode = omap_mux_read(partition, gpio_mux->reg_offset); - mux_mode = val & ~(OMAP_MUX_NR_MODES - 1); - mux_mode |= partition->gpio; - pr_debug("%s: Setting signal %s.gpio%i 0x%04x -> 0x%04x\n", __func__, - gpio_mux->muxnames[0], gpio, old_mode, mux_mode); - omap_mux_write(partition, mux_mode, gpio_mux->reg_offset); - - return 0; -} - -int __init omap_mux_init_gpio(int gpio, int val) -{ - struct omap_mux_partition *partition; - int ret; - - list_for_each_entry(partition, &mux_partitions, node) { - ret = _omap_mux_init_gpio(partition, gpio, val); - if (!ret) - return ret; - } - - return -ENODEV; -} - -static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition, - const char *muxname, - struct omap_mux **found_mux) -{ - struct omap_mux *mux = NULL; - struct omap_mux_entry *e; - const char *mode_name; - int found = 0, found_mode = 0, mode0_len = 0; - struct list_head *muxmodes = &partition->muxmodes; - - mode_name = strchr(muxname, '.'); - if (mode_name) { - mode0_len = strlen(muxname) - strlen(mode_name); - mode_name++; - } else { - mode_name = muxname; - } - - list_for_each_entry(e, muxmodes, node) { - char *m0_entry; - int i; - - mux = &e->mux; - m0_entry = mux->muxnames[0]; - - /* First check for full name in mode0.muxmode format */ - if (mode0_len) - if (strncmp(muxname, m0_entry, mode0_len) || - (strlen(m0_entry) != mode0_len)) - continue; - - /* Then check for muxmode only */ - for (i = 0; i < OMAP_MUX_NR_MODES; i++) { - char *mode_cur = mux->muxnames[i]; - - if (!mode_cur) - continue; - - if (!strcmp(mode_name, mode_cur)) { - *found_mux = mux; - found++; - found_mode = i; - } - } - } - - if (found == 1) { - return found_mode; - } - - if (found > 1) { - pr_err("%s: Multiple signal paths (%i) for %s\n", __func__, - found, muxname); - return -EINVAL; - } - - return -ENODEV; -} - -int __init omap_mux_get_by_name(const char *muxname, - struct omap_mux_partition **found_partition, - struct omap_mux **found_mux) -{ - struct omap_mux_partition *partition; - - list_for_each_entry(partition, &mux_partitions, node) { - struct omap_mux *mux = NULL; - int mux_mode = _omap_mux_get_by_name(partition, muxname, &mux); - if (mux_mode < 0) - continue; - - *found_partition = partition; - *found_mux = mux; - - return mux_mode; - } - - pr_err("%s: Could not find signal %s\n", __func__, muxname); - - return -ENODEV; -} - -int __init omap_mux_init_signal(const char *muxname, int val) -{ - struct omap_mux_partition *partition = NULL; - struct omap_mux *mux = NULL; - u16 old_mode; - int mux_mode; - - mux_mode = omap_mux_get_by_name(muxname, &partition, &mux); - if (mux_mode < 0 || !mux) - return mux_mode; - - old_mode = omap_mux_read(partition, mux->reg_offset); - mux_mode |= val; - pr_debug("%s: Setting signal %s 0x%04x -> 0x%04x\n", - __func__, muxname, old_mode, mux_mode); - omap_mux_write(partition, mux_mode, mux->reg_offset); - - return 0; -} - -struct omap_hwmod_mux_info * __init -omap_hwmod_mux_init(struct omap_device_pad *bpads, int nr_pads) -{ - struct omap_hwmod_mux_info *hmux; - int i, nr_pads_dynamic = 0; - - if (!bpads || nr_pads < 1) - return NULL; - - hmux = kzalloc(sizeof(struct omap_hwmod_mux_info), GFP_KERNEL); - if (!hmux) - goto err1; - - hmux->nr_pads = nr_pads; - - hmux->pads = kzalloc(sizeof(struct omap_device_pad) * - nr_pads, GFP_KERNEL); - if (!hmux->pads) - goto err2; - - for (i = 0; i < hmux->nr_pads; i++) { - struct omap_mux_partition *partition; - struct omap_device_pad *bpad = &bpads[i], *pad = &hmux->pads[i]; - struct omap_mux *mux; - int mux_mode; - - mux_mode = omap_mux_get_by_name(bpad->name, &partition, &mux); - if (mux_mode < 0) - goto err3; - if (!pad->partition) - pad->partition = partition; - if (!pad->mux) - pad->mux = mux; - - pad->name = kzalloc(strlen(bpad->name) + 1, GFP_KERNEL); - if (!pad->name) { - int j; - - for (j = i - 1; j >= 0; j--) - kfree(hmux->pads[j].name); - goto err3; - } - strcpy(pad->name, bpad->name); - - pad->flags = bpad->flags; - pad->enable = bpad->enable; - pad->idle = bpad->idle; - pad->off = bpad->off; - - if (pad->flags & - (OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP)) - nr_pads_dynamic++; - - pr_debug("%s: Initialized %s\n", __func__, pad->name); - } - - if (!nr_pads_dynamic) - return hmux; - - /* - * Add pads that need dynamic muxing into a separate list - */ - - hmux->nr_pads_dynamic = nr_pads_dynamic; - hmux->pads_dynamic = kzalloc(sizeof(struct omap_device_pad *) * - nr_pads_dynamic, GFP_KERNEL); - if (!hmux->pads_dynamic) { - pr_err("%s: Could not allocate dynamic pads\n", __func__); - return hmux; - } - - nr_pads_dynamic = 0; - for (i = 0; i < hmux->nr_pads; i++) { - struct omap_device_pad *pad = &hmux->pads[i]; - - if (pad->flags & - (OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP)) { - pr_debug("%s: pad %s tagged dynamic\n", - __func__, pad->name); - hmux->pads_dynamic[nr_pads_dynamic] = pad; - nr_pads_dynamic++; - } - } - - return hmux; - -err3: - kfree(hmux->pads); -err2: - kfree(hmux); -err1: - pr_err("%s: Could not allocate device mux entry\n", __func__); - - return NULL; -} - -/** - * omap_hwmod_mux_scan_wakeups - omap hwmod scan wakeup pads - * @hmux: Pads for a hwmod - * @mpu_irqs: MPU irq array for a hwmod - * - * Scans the wakeup status of pads for a single hwmod. If an irq - * array is defined for this mux, the parser will call the registered - * ISRs for corresponding pads, otherwise the parser will stop at the - * first wakeup active pad and return. Returns true if there is a - * pending and non-served wakeup event for the mux, otherwise false. - */ -static bool omap_hwmod_mux_scan_wakeups(struct omap_hwmod_mux_info *hmux, - struct omap_hwmod_irq_info *mpu_irqs) -{ - int i, irq; - unsigned int val; - u32 handled_irqs = 0; - - for (i = 0; i < hmux->nr_pads_dynamic; i++) { - struct omap_device_pad *pad = hmux->pads_dynamic[i]; - - if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP) || - !(pad->idle & OMAP_WAKEUP_EN)) - continue; - - val = omap_mux_read(pad->partition, pad->mux->reg_offset); - if (!(val & OMAP_WAKEUP_EVENT)) - continue; - - if (!hmux->irqs) - return true; - - irq = hmux->irqs[i]; - /* make sure we only handle each irq once */ - if (handled_irqs & 1 << irq) - continue; - - handled_irqs |= 1 << irq; - - generic_handle_irq(mpu_irqs[irq].irq); - } - - return false; -} - -/** - * _omap_hwmod_mux_handle_irq - Process wakeup events for a single hwmod - * - * Checks a single hwmod for every wakeup capable pad to see if there is an - * active wakeup event. If this is the case, call the corresponding ISR. - */ -static int _omap_hwmod_mux_handle_irq(struct omap_hwmod *oh, void *data) -{ - if (!oh->mux || !oh->mux->enabled) - return 0; - if (omap_hwmod_mux_scan_wakeups(oh->mux, oh->mpu_irqs)) - generic_handle_irq(oh->mpu_irqs[0].irq); - return 0; -} - -/** - * omap_hwmod_mux_handle_irq - Process pad wakeup irqs. - * - * Calls a function for each registered omap_hwmod to check - * pad wakeup statuses. - */ -static irqreturn_t omap_hwmod_mux_handle_irq(int irq, void *unused) -{ - omap_hwmod_for_each(_omap_hwmod_mux_handle_irq, NULL); - return IRQ_HANDLED; -} - -/* Assumes the calling function takes care of locking */ -void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state) -{ - int i; - - /* Runtime idling of dynamic pads */ - if (state == _HWMOD_STATE_IDLE && hmux->enabled) { - for (i = 0; i < hmux->nr_pads_dynamic; i++) { - struct omap_device_pad *pad = hmux->pads_dynamic[i]; - int val = -EINVAL; - - val = pad->idle; - omap_mux_write(pad->partition, val, - pad->mux->reg_offset); - } - - return; - } - - /* Runtime enabling of dynamic pads */ - if ((state == _HWMOD_STATE_ENABLED) && hmux->pads_dynamic - && hmux->enabled) { - for (i = 0; i < hmux->nr_pads_dynamic; i++) { - struct omap_device_pad *pad = hmux->pads_dynamic[i]; - int val = -EINVAL; - - val = pad->enable; - omap_mux_write(pad->partition, val, - pad->mux->reg_offset); - } - - return; - } - - /* Enabling or disabling of all pads */ - for (i = 0; i < hmux->nr_pads; i++) { - struct omap_device_pad *pad = &hmux->pads[i]; - int flags, val = -EINVAL; - - flags = pad->flags; - - switch (state) { - case _HWMOD_STATE_ENABLED: - val = pad->enable; - pr_debug("%s: Enabling %s %x\n", __func__, - pad->name, val); - break; - case _HWMOD_STATE_DISABLED: - /* Use safe mode unless OMAP_DEVICE_PAD_REMUX */ - if (flags & OMAP_DEVICE_PAD_REMUX) - val = pad->off; - else - val = OMAP_MUX_MODE7; - pr_debug("%s: Disabling %s %x\n", __func__, - pad->name, val); - break; - default: - /* Nothing to be done */ - break; - } - - if (val >= 0) { - omap_mux_write(pad->partition, val, - pad->mux->reg_offset); - pad->flags = flags; - } - } - - if (state == _HWMOD_STATE_ENABLED) - hmux->enabled = true; - else - hmux->enabled = false; -} - -#ifdef CONFIG_DEBUG_FS - -#define OMAP_MUX_MAX_NR_FLAGS 10 -#define OMAP_MUX_TEST_FLAG(val, mask) \ - if (((val) & (mask)) == (mask)) { \ - i++; \ - flags[i] = #mask; \ - } - -/* REVISIT: Add checking for non-optimal mux settings */ -static inline void omap_mux_decode(struct seq_file *s, u16 val) -{ - char *flags[OMAP_MUX_MAX_NR_FLAGS]; - char mode[sizeof("OMAP_MUX_MODE") + 1]; - int i = -1; - - sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7); - i++; - flags[i] = mode; - - OMAP_MUX_TEST_FLAG(val, OMAP_PIN_OFF_WAKEUPENABLE); - if (val & OMAP_OFF_EN) { - if (!(val & OMAP_OFFOUT_EN)) { - if (!(val & OMAP_OFF_PULL_UP)) { - OMAP_MUX_TEST_FLAG(val, - OMAP_PIN_OFF_INPUT_PULLDOWN); - } else { - OMAP_MUX_TEST_FLAG(val, - OMAP_PIN_OFF_INPUT_PULLUP); - } - } else { - if (!(val & OMAP_OFFOUT_VAL)) { - OMAP_MUX_TEST_FLAG(val, - OMAP_PIN_OFF_OUTPUT_LOW); - } else { - OMAP_MUX_TEST_FLAG(val, - OMAP_PIN_OFF_OUTPUT_HIGH); - } - } - } - - if (val & OMAP_INPUT_EN) { - if (val & OMAP_PULL_ENA) { - if (!(val & OMAP_PULL_UP)) { - OMAP_MUX_TEST_FLAG(val, - OMAP_PIN_INPUT_PULLDOWN); - } else { - OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT_PULLUP); - } - } else { - OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT); - } - } else { - i++; - flags[i] = "OMAP_PIN_OUTPUT"; - } - - do { - seq_printf(s, "%s", flags[i]); - if (i > 0) - seq_printf(s, " | "); - } while (i-- > 0); -} - -#define OMAP_MUX_DEFNAME_LEN 32 - -static int omap_mux_dbg_board_show(struct seq_file *s, void *unused) -{ - struct omap_mux_partition *partition = s->private; - struct omap_mux_entry *e; - u8 omap_gen = omap_rev() >> 28; - - list_for_each_entry(e, &partition->muxmodes, node) { - struct omap_mux *m = &e->mux; - char m0_def[OMAP_MUX_DEFNAME_LEN]; - char *m0_name = m->muxnames[0]; - u16 val; - int i, mode; - - if (!m0_name) - continue; - - /* REVISIT: Needs to be updated if mode0 names get longer */ - for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) { - if (m0_name[i] == '\0') { - m0_def[i] = m0_name[i]; - break; - } - m0_def[i] = toupper(m0_name[i]); - } - val = omap_mux_read(partition, m->reg_offset); - mode = val & OMAP_MUX_MODE7; - if (mode != 0) - seq_printf(s, "/* %s */\n", m->muxnames[mode]); - - /* - * XXX: Might be revisited to support differences across - * same OMAP generation. - */ - seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def); - omap_mux_decode(s, val); - seq_printf(s, "),\n"); - } - - return 0; -} - -static int omap_mux_dbg_board_open(struct inode *inode, struct file *file) -{ - return single_open(file, omap_mux_dbg_board_show, inode->i_private); -} - -static const struct file_operations omap_mux_dbg_board_fops = { - .open = omap_mux_dbg_board_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static struct omap_mux_partition *omap_mux_get_partition(struct omap_mux *mux) -{ - struct omap_mux_partition *partition; - - list_for_each_entry(partition, &mux_partitions, node) { - struct list_head *muxmodes = &partition->muxmodes; - struct omap_mux_entry *e; - - list_for_each_entry(e, muxmodes, node) { - struct omap_mux *m = &e->mux; - - if (m == mux) - return partition; - } - } - - return NULL; -} - -static int omap_mux_dbg_signal_show(struct seq_file *s, void *unused) -{ - struct omap_mux *m = s->private; - struct omap_mux_partition *partition; - const char *none = "NA"; - u16 val; - int mode; - - partition = omap_mux_get_partition(m); - if (!partition) - return 0; - - val = omap_mux_read(partition, m->reg_offset); - mode = val & OMAP_MUX_MODE7; - - seq_printf(s, "name: %s.%s (0x%08x/0x%03x = 0x%04x), b %s, t %s\n", - m->muxnames[0], m->muxnames[mode], - partition->phys + m->reg_offset, m->reg_offset, val, - m->balls[0] ? m->balls[0] : none, - m->balls[1] ? m->balls[1] : none); - seq_printf(s, "mode: "); - omap_mux_decode(s, val); - seq_printf(s, "\n"); - seq_printf(s, "signals: %s | %s | %s | %s | %s | %s | %s | %s\n", - m->muxnames[0] ? m->muxnames[0] : none, - m->muxnames[1] ? m->muxnames[1] : none, - m->muxnames[2] ? m->muxnames[2] : none, - m->muxnames[3] ? m->muxnames[3] : none, - m->muxnames[4] ? m->muxnames[4] : none, - m->muxnames[5] ? m->muxnames[5] : none, - m->muxnames[6] ? m->muxnames[6] : none, - m->muxnames[7] ? m->muxnames[7] : none); - - return 0; -} - -#define OMAP_MUX_MAX_ARG_CHAR 7 - -static ssize_t omap_mux_dbg_signal_write(struct file *file, - const char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct seq_file *seqf; - struct omap_mux *m; - u16 val; - int ret; - struct omap_mux_partition *partition; - - if (count > OMAP_MUX_MAX_ARG_CHAR) - return -EINVAL; - - ret = kstrtou16_from_user(user_buf, count, 0x10, &val); - if (ret < 0) - return ret; - - seqf = file->private_data; - m = seqf->private; - - partition = omap_mux_get_partition(m); - if (!partition) - return -ENODEV; - - omap_mux_write(partition, val, m->reg_offset); - *ppos += count; - - return count; -} - -static int omap_mux_dbg_signal_open(struct inode *inode, struct file *file) -{ - return single_open(file, omap_mux_dbg_signal_show, inode->i_private); -} - -static const struct file_operations omap_mux_dbg_signal_fops = { - .open = omap_mux_dbg_signal_open, - .read = seq_read, - .write = omap_mux_dbg_signal_write, - .llseek = seq_lseek, - .release = single_release, -}; - -static struct dentry *mux_dbg_dir; - -static void __init omap_mux_dbg_create_entry( - struct omap_mux_partition *partition, - struct dentry *mux_dbg_dir) -{ - struct omap_mux_entry *e; - - list_for_each_entry(e, &partition->muxmodes, node) { - struct omap_mux *m = &e->mux; - - (void)debugfs_create_file(m->muxnames[0], S_IWUSR | S_IRUGO, - mux_dbg_dir, m, - &omap_mux_dbg_signal_fops); - } -} - -static void __init omap_mux_dbg_init(void) -{ - struct omap_mux_partition *partition; - static struct dentry *mux_dbg_board_dir; - - mux_dbg_dir = debugfs_create_dir("omap_mux", NULL); - if (!mux_dbg_dir) - return; - - mux_dbg_board_dir = debugfs_create_dir("board", mux_dbg_dir); - if (!mux_dbg_board_dir) - return; - - list_for_each_entry(partition, &mux_partitions, node) { - omap_mux_dbg_create_entry(partition, mux_dbg_dir); - (void)debugfs_create_file(partition->name, S_IRUGO, - mux_dbg_board_dir, partition, - &omap_mux_dbg_board_fops); - } -} - -#else -static inline void omap_mux_dbg_init(void) -{ -} -#endif /* CONFIG_DEBUG_FS */ - -static void __init omap_mux_free_names(struct omap_mux *m) -{ - int i; - - for (i = 0; i < OMAP_MUX_NR_MODES; i++) - kfree(m->muxnames[i]); - -#ifdef CONFIG_DEBUG_FS - for (i = 0; i < OMAP_MUX_NR_SIDES; i++) - kfree(m->balls[i]); -#endif - -} - -/* Free all data except for GPIO pins unless CONFIG_DEBUG_FS is set */ -int __init omap_mux_late_init(void) -{ - struct omap_mux_partition *partition; - int ret; - - list_for_each_entry(partition, &mux_partitions, node) { - struct omap_mux_entry *e, *tmp; - list_for_each_entry_safe(e, tmp, &partition->muxmodes, node) { - struct omap_mux *m = &e->mux; - u16 mode = omap_mux_read(partition, m->reg_offset); - - if (OMAP_MODE_GPIO(partition, mode)) - continue; - -#ifndef CONFIG_DEBUG_FS - mutex_lock(&muxmode_mutex); - list_del(&e->node); - mutex_unlock(&muxmode_mutex); - omap_mux_free_names(m); - kfree(m); -#endif - } - } - - omap_mux_dbg_init(); - - /* see pinctrl-single-omap for the wake-up interrupt handling */ - if (of_have_populated_dt()) - return 0; - - ret = request_irq(omap_prcm_event_to_irq("io"), - omap_hwmod_mux_handle_irq, IRQF_SHARED | IRQF_NO_SUSPEND, - "hwmod_io", omap_mux_late_init); - - if (ret) - pr_warn("mux: Failed to setup hwmod io irq %d\n", ret); - - return 0; -} - -static void __init omap_mux_package_fixup(struct omap_mux *p, - struct omap_mux *superset) -{ - while (p->reg_offset != OMAP_MUX_TERMINATOR) { - struct omap_mux *s = superset; - int found = 0; - - while (s->reg_offset != OMAP_MUX_TERMINATOR) { - if (s->reg_offset == p->reg_offset) { - *s = *p; - found++; - break; - } - s++; - } - if (!found) - pr_err("%s: Unknown entry offset 0x%x\n", __func__, - p->reg_offset); - p++; - } -} - -#ifdef CONFIG_DEBUG_FS - -static void __init omap_mux_package_init_balls(struct omap_ball *b, - struct omap_mux *superset) -{ - while (b->reg_offset != OMAP_MUX_TERMINATOR) { - struct omap_mux *s = superset; - int found = 0; - - while (s->reg_offset != OMAP_MUX_TERMINATOR) { - if (s->reg_offset == b->reg_offset) { - s->balls[0] = b->balls[0]; - s->balls[1] = b->balls[1]; - found++; - break; - } - s++; - } - if (!found) - pr_err("%s: Unknown ball offset 0x%x\n", __func__, - b->reg_offset); - b++; - } -} - -#else /* CONFIG_DEBUG_FS */ - -static inline void omap_mux_package_init_balls(struct omap_ball *b, - struct omap_mux *superset) -{ -} - -#endif /* CONFIG_DEBUG_FS */ - -static int __init omap_mux_setup(char *options) -{ - if (!options) - return 0; - - omap_mux_options = options; - - return 1; -} -__setup("omap_mux=", omap_mux_setup); - -/* - * Note that the omap_mux=some.signal1=0x1234,some.signal2=0x1234 - * cmdline options only override the bootloader values. - * During development, please enable CONFIG_DEBUG_FS, and use the - * signal specific entries under debugfs. - */ -static void __init omap_mux_set_cmdline_signals(void) -{ - char *options, *next_opt, *token; - - if (!omap_mux_options) - return; - - options = kstrdup(omap_mux_options, GFP_KERNEL); - if (!options) - return; - - next_opt = options; - - while ((token = strsep(&next_opt, ",")) != NULL) { - char *keyval, *name; - u16 val; - - keyval = token; - name = strsep(&keyval, "="); - if (name) { - int res; - - res = kstrtou16(keyval, 0x10, &val); - if (res < 0) - continue; - - omap_mux_init_signal(name, (u16)val); - } - } - - kfree(options); -} - -static int __init omap_mux_copy_names(struct omap_mux *src, - struct omap_mux *dst) -{ - int i; - - for (i = 0; i < OMAP_MUX_NR_MODES; i++) { - if (src->muxnames[i]) { - dst->muxnames[i] = kstrdup(src->muxnames[i], - GFP_KERNEL); - if (!dst->muxnames[i]) - goto free; - } - } - -#ifdef CONFIG_DEBUG_FS - for (i = 0; i < OMAP_MUX_NR_SIDES; i++) { - if (src->balls[i]) { - dst->balls[i] = kstrdup(src->balls[i], GFP_KERNEL); - if (!dst->balls[i]) - goto free; - } - } -#endif - - return 0; - -free: - omap_mux_free_names(dst); - return -ENOMEM; - -} - -#endif /* CONFIG_OMAP_MUX */ - -static struct omap_mux *omap_mux_get_by_gpio( - struct omap_mux_partition *partition, - int gpio) -{ - struct omap_mux_entry *e; - struct omap_mux *ret = NULL; - - list_for_each_entry(e, &partition->muxmodes, node) { - struct omap_mux *m = &e->mux; - if (m->gpio == gpio) { - ret = m; - break; - } - } - - return ret; -} - -/* Needed for dynamic muxing of GPIO pins for off-idle */ -u16 omap_mux_get_gpio(int gpio) -{ - struct omap_mux_partition *partition; - struct omap_mux *m = NULL; - - list_for_each_entry(partition, &mux_partitions, node) { - m = omap_mux_get_by_gpio(partition, gpio); - if (m) - return omap_mux_read(partition, m->reg_offset); - } - - if (!m || m->reg_offset == OMAP_MUX_TERMINATOR) - pr_err("%s: Could not get gpio%i\n", __func__, gpio); - - return OMAP_MUX_TERMINATOR; -} - -/* Needed for dynamic muxing of GPIO pins for off-idle */ -void omap_mux_set_gpio(u16 val, int gpio) -{ - struct omap_mux_partition *partition; - struct omap_mux *m = NULL; - - list_for_each_entry(partition, &mux_partitions, node) { - m = omap_mux_get_by_gpio(partition, gpio); - if (m) { - omap_mux_write(partition, val, m->reg_offset); - return; - } - } - - if (!m || m->reg_offset == OMAP_MUX_TERMINATOR) - pr_err("%s: Could not set gpio%i\n", __func__, gpio); -} - -static struct omap_mux * __init omap_mux_list_add( - struct omap_mux_partition *partition, - struct omap_mux *src) -{ - struct omap_mux_entry *entry; - struct omap_mux *m; - - entry = kzalloc(sizeof(struct omap_mux_entry), GFP_KERNEL); - if (!entry) - return NULL; - - m = &entry->mux; - entry->mux = *src; - -#ifdef CONFIG_OMAP_MUX - if (omap_mux_copy_names(src, m)) { - kfree(entry); - return NULL; - } -#endif - - mutex_lock(&muxmode_mutex); - list_add_tail(&entry->node, &partition->muxmodes); - mutex_unlock(&muxmode_mutex); - - return m; -} - -/* - * Note if CONFIG_OMAP_MUX is not selected, we will only initialize - * the GPIO to mux offset mapping that is needed for dynamic muxing - * of GPIO pins for off-idle. - */ -static void __init omap_mux_init_list(struct omap_mux_partition *partition, - struct omap_mux *superset) -{ - while (superset->reg_offset != OMAP_MUX_TERMINATOR) { - struct omap_mux *entry; - -#ifdef CONFIG_OMAP_MUX - if (!superset->muxnames[0]) { - superset++; - continue; - } -#else - /* Skip pins that are not muxed as GPIO by bootloader */ - if (!OMAP_MODE_GPIO(partition, omap_mux_read(partition, - superset->reg_offset))) { - superset++; - continue; - } -#endif - - entry = omap_mux_list_add(partition, superset); - if (!entry) { - pr_err("%s: Could not add entry\n", __func__); - return; - } - superset++; - } -} - -#ifdef CONFIG_OMAP_MUX - -static void omap_mux_init_package(struct omap_mux *superset, - struct omap_mux *package_subset, - struct omap_ball *package_balls) -{ - if (package_subset) - omap_mux_package_fixup(package_subset, superset); - if (package_balls) - omap_mux_package_init_balls(package_balls, superset); -} - -static void __init omap_mux_init_signals(struct omap_mux_partition *partition, - struct omap_board_mux *board_mux) -{ - omap_mux_set_cmdline_signals(); - omap_mux_write_array(partition, board_mux); -} - -#else - -static void omap_mux_init_package(struct omap_mux *superset, - struct omap_mux *package_subset, - struct omap_ball *package_balls) -{ -} - -static void __init omap_mux_init_signals(struct omap_mux_partition *partition, - struct omap_board_mux *board_mux) -{ -} - -#endif - -static u32 mux_partitions_cnt; - -int __init omap_mux_init(const char *name, u32 flags, - u32 mux_pbase, u32 mux_size, - struct omap_mux *superset, - struct omap_mux *package_subset, - struct omap_board_mux *board_mux, - struct omap_ball *package_balls) -{ - struct omap_mux_partition *partition; - - partition = kzalloc(sizeof(struct omap_mux_partition), GFP_KERNEL); - if (!partition) - return -ENOMEM; - - partition->name = name; - partition->flags = flags; - partition->gpio = flags & OMAP_MUX_MODE7; - partition->size = mux_size; - partition->phys = mux_pbase; - partition->base = ioremap(mux_pbase, mux_size); - if (!partition->base) { - pr_err("%s: Could not ioremap mux partition at 0x%08x\n", - __func__, partition->phys); - kfree(partition); - return -ENODEV; - } - - INIT_LIST_HEAD(&partition->muxmodes); - - list_add_tail(&partition->node, &mux_partitions); - mux_partitions_cnt++; - pr_info("%s: Add partition: #%d: %s, flags: %x\n", __func__, - mux_partitions_cnt, partition->name, partition->flags); - - omap_mux_init_package(superset, package_subset, package_balls); - omap_mux_init_list(partition, superset); - omap_mux_init_signals(partition, board_mux); - - return 0; -} - diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h deleted file mode 100644 index d121fb6df4e6..000000000000 --- a/arch/arm/mach-omap2/mux.h +++ /dev/null @@ -1,352 +0,0 @@ -/* - * Copyright (C) 2009 Nokia - * Copyright (C) 2009-2010 Texas Instruments - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "mux34xx.h" - -#define OMAP_MUX_TERMINATOR 0xffff - -/* 34xx mux mode options for each pin. See TRM for options */ -#define OMAP_MUX_MODE0 0 -#define OMAP_MUX_MODE1 1 -#define OMAP_MUX_MODE2 2 -#define OMAP_MUX_MODE3 3 -#define OMAP_MUX_MODE4 4 -#define OMAP_MUX_MODE5 5 -#define OMAP_MUX_MODE6 6 -#define OMAP_MUX_MODE7 7 - -/* 24xx/34xx mux bit defines */ -#define OMAP_PULL_ENA (1 << 3) -#define OMAP_PULL_UP (1 << 4) -#define OMAP_ALTELECTRICALSEL (1 << 5) - -/* omap3/4/5 specific mux bit defines */ -#define OMAP_INPUT_EN (1 << 8) -#define OMAP_OFF_EN (1 << 9) -#define OMAP_OFFOUT_EN (1 << 10) -#define OMAP_OFFOUT_VAL (1 << 11) -#define OMAP_OFF_PULL_EN (1 << 12) -#define OMAP_OFF_PULL_UP (1 << 13) -#define OMAP_WAKEUP_EN (1 << 14) -#define OMAP_WAKEUP_EVENT (1 << 15) - -/* Active pin states */ -#define OMAP_PIN_OUTPUT 0 -#define OMAP_PIN_INPUT OMAP_INPUT_EN -#define OMAP_PIN_INPUT_PULLUP (OMAP_PULL_ENA | OMAP_INPUT_EN \ - | OMAP_PULL_UP) -#define OMAP_PIN_INPUT_PULLDOWN (OMAP_PULL_ENA | OMAP_INPUT_EN) - -/* Off mode states */ -#define OMAP_PIN_OFF_NONE 0 -#define OMAP_PIN_OFF_OUTPUT_HIGH (OMAP_OFF_EN | OMAP_OFFOUT_EN \ - | OMAP_OFFOUT_VAL) -#define OMAP_PIN_OFF_OUTPUT_LOW (OMAP_OFF_EN | OMAP_OFFOUT_EN) -#define OMAP_PIN_OFF_INPUT_PULLUP (OMAP_OFF_EN | OMAP_OFF_PULL_EN \ - | OMAP_OFF_PULL_UP) -#define OMAP_PIN_OFF_INPUT_PULLDOWN (OMAP_OFF_EN | OMAP_OFF_PULL_EN) -#define OMAP_PIN_OFF_WAKEUPENABLE OMAP_WAKEUP_EN - -#define OMAP_MODE_GPIO(partition, x) (((x) & OMAP_MUX_MODE7) == \ - partition->gpio) -#define OMAP_MODE_UART(x) (((x) & OMAP_MUX_MODE7) == OMAP_MUX_MODE0) - -/* Flags for omapX_mux_init */ -#define OMAP_PACKAGE_MASK 0xffff -#define OMAP_PACKAGE_CBP 6 /* 515-pin 0.40 0.50 */ -#define OMAP_PACKAGE_CUS 5 /* 423-pin 0.65 */ -#define OMAP_PACKAGE_CBB 4 /* 515-pin 0.40 0.50 */ -#define OMAP_PACKAGE_CBC 3 /* 515-pin 0.50 0.65 */ - -#define OMAP_MUX_NR_MODES 8 /* Available modes */ -#define OMAP_MUX_NR_SIDES 2 /* Bottom & top */ - -/* - * omap_mux_init flags definition: - * - * OMAP_GPIO_MUX_MODE, bits 0-2: gpio muxing mode, same like pad control - * register which includes values from 0-7. - * OMAP_MUX_REG_8BIT: Ensure that access to padconf is done in 8 bits. - * The default value is 16 bits. - */ -#define OMAP_MUX_GPIO_IN_MODE0 OMAP_MUX_MODE0 -#define OMAP_MUX_GPIO_IN_MODE1 OMAP_MUX_MODE1 -#define OMAP_MUX_GPIO_IN_MODE2 OMAP_MUX_MODE2 -#define OMAP_MUX_GPIO_IN_MODE3 OMAP_MUX_MODE3 -#define OMAP_MUX_GPIO_IN_MODE4 OMAP_MUX_MODE4 -#define OMAP_MUX_GPIO_IN_MODE5 OMAP_MUX_MODE5 -#define OMAP_MUX_GPIO_IN_MODE6 OMAP_MUX_MODE6 -#define OMAP_MUX_GPIO_IN_MODE7 OMAP_MUX_MODE7 -#define OMAP_MUX_REG_8BIT (1 << 3) - -/** - * struct omap_board_data - board specific device data - * @id: instance id - * @flags: additional flags for platform init code - * @pads: array of device specific pads - * @pads_cnt: ARRAY_SIZE() of pads - */ -struct omap_board_data { - int id; - u32 flags; - struct omap_device_pad *pads; - int pads_cnt; -}; - -/** - * struct mux_partition - contain partition related information - * @name: name of the current partition - * @flags: flags specific to this partition - * @gpio: gpio mux mode - * @phys: physical address - * @size: partition size - * @base: virtual address after ioremap - * @muxmodes: list of nodes that belong to a partition - * @node: list node for the partitions linked list - */ -struct omap_mux_partition { - const char *name; - u32 flags; - u32 gpio; - u32 phys; - u32 size; - void __iomem *base; - struct list_head muxmodes; - struct list_head node; -}; - -/** - * struct omap_mux - data for omap mux register offset and it's value - * @reg_offset: mux register offset from the mux base - * @gpio: GPIO number - * @muxnames: available signal modes for a ball - * @balls: available balls on the package - */ -struct omap_mux { - u16 reg_offset; - u16 gpio; -#ifdef CONFIG_OMAP_MUX - char *muxnames[OMAP_MUX_NR_MODES]; -#ifdef CONFIG_DEBUG_FS - char *balls[OMAP_MUX_NR_SIDES]; -#endif -#endif -}; - -/** - * struct omap_ball - data for balls on omap package - * @reg_offset: mux register offset from the mux base - * @balls: available balls on the package - */ -struct omap_ball { - u16 reg_offset; - char *balls[OMAP_MUX_NR_SIDES]; -}; - -/** - * struct omap_board_mux - data for initializing mux registers - * @reg_offset: mux register offset from the mux base - * @mux_value: desired mux value to set - */ -struct omap_board_mux { - u16 reg_offset; - u16 value; -}; - -#define OMAP_DEVICE_PAD_REMUX BIT(1) /* Dynamically remux a pad, - needs enable, idle and off - values */ -#define OMAP_DEVICE_PAD_WAKEUP BIT(0) /* Pad is wake-up capable */ - -/** - * struct omap_device_pad - device specific pad configuration - * @name: signal name - * @flags: pad specific runtime flags - * @enable: runtime value for a pad - * @idle: idle value for a pad - * @off: off value for a pad, defaults to safe mode - * @partition: mux partition - * @mux: mux register - */ -struct omap_device_pad { - char *name; - u8 flags; - u16 enable; - u16 idle; - u16 off; - struct omap_mux_partition *partition; - struct omap_mux *mux; -}; - -struct omap_hwmod_mux_info; - -#define OMAP_MUX_STATIC(signal, mode) \ -{ \ - .name = (signal), \ - .enable = (mode), \ -} - -#if defined(CONFIG_OMAP_MUX) - -/** - * omap_mux_init_gpio - initialize a signal based on the GPIO number - * @gpio: GPIO number - * @val: Options for the mux register value - */ -int omap_mux_init_gpio(int gpio, int val); - -/** - * omap_mux_init_signal - initialize a signal based on the signal name - * @muxname: Mux name in mode0_name.signal_name format - * @val: Options for the mux register value - */ -int omap_mux_init_signal(const char *muxname, int val); - -/** - * omap_hwmod_mux_init - initialize hwmod specific mux data - * @bpads: Board specific device signal names - * @nr_pads: Number of signal names for the device - */ -extern struct omap_hwmod_mux_info * -omap_hwmod_mux_init(struct omap_device_pad *bpads, int nr_pads); - -/** - * omap_hwmod_mux - omap hwmod specific pin muxing - * @hmux: Pads for a hwmod - * @state: Desired _HWMOD_STATE - * - * Called only from omap_hwmod.c, do not use. - */ -void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state); - -int omap_mux_get_by_name(const char *muxname, - struct omap_mux_partition **found_partition, - struct omap_mux **found_mux); -#else - -static inline int omap_mux_get_by_name(const char *muxname, - struct omap_mux_partition **found_partition, - struct omap_mux **found_mux) -{ - return 0; -} - -static inline int omap_mux_init_gpio(int gpio, int val) -{ - return 0; -} -static inline int omap_mux_init_signal(char *muxname, int val) -{ - return 0; -} - -static inline struct omap_hwmod_mux_info * -omap_hwmod_mux_init(struct omap_device_pad *bpads, int nr_pads) -{ - return NULL; -} - -static inline void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state) -{ -} - -static struct omap_board_mux *board_mux __maybe_unused; - -#endif - -/** - * omap_mux_get_gpio() - get mux register value based on GPIO number - * @gpio: GPIO number - * - */ -u16 omap_mux_get_gpio(int gpio); - -/** - * omap_mux_set_gpio() - set mux register value based on GPIO number - * @val: New mux register value - * @gpio: GPIO number - * - */ -void omap_mux_set_gpio(u16 val, int gpio); - -/** - * omap_mux_get() - get a mux partition by name - * @name: Name of the mux partition - * - */ -struct omap_mux_partition *omap_mux_get(const char *name); - -/** - * omap_mux_read() - read mux register - * @partition: Mux partition - * @mux_offset: Offset of the mux register - * - */ -u16 omap_mux_read(struct omap_mux_partition *p, u16 mux_offset); - -/** - * omap_mux_write() - write mux register - * @partition: Mux partition - * @val: New mux register value - * @mux_offset: Offset of the mux register - * - * This should be only needed for dynamic remuxing of non-gpio signals. - */ -void omap_mux_write(struct omap_mux_partition *p, u16 val, u16 mux_offset); - -/** - * omap_mux_write_array() - write an array of mux registers - * @partition: Mux partition - * @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR - * - * This should be only needed for dynamic remuxing of non-gpio signals. - */ -void omap_mux_write_array(struct omap_mux_partition *p, - struct omap_board_mux *board_mux); - -/** - * omap2420_mux_init() - initialize mux system with board specific set - * @board_mux: Board specific mux table - * @flags: OMAP package type used for the board - */ -int omap2420_mux_init(struct omap_board_mux *board_mux, int flags); - -/** - * omap2430_mux_init() - initialize mux system with board specific set - * @board_mux: Board specific mux table - * @flags: OMAP package type used for the board - */ -int omap2430_mux_init(struct omap_board_mux *board_mux, int flags); - -/** - * omap3_mux_init() - initialize mux system with board specific set - * @board_mux: Board specific mux table - * @flags: OMAP package type used for the board - */ -int omap3_mux_init(struct omap_board_mux *board_mux, int flags); - -/** - * omap4_mux_init() - initialize mux system with board specific set - * @board_subset: Board specific mux table - * @board_wkup_subset: Board specific mux table for wakeup instance - * @flags: OMAP package type used for the board - */ -int omap4_mux_init(struct omap_board_mux *board_subset, - struct omap_board_mux *board_wkup_subset, int flags); - -/** - * omap_mux_init - private mux init function, do not call - */ -int omap_mux_init(const char *name, u32 flags, - u32 mux_pbase, u32 mux_size, - struct omap_mux *superset, - struct omap_mux *package_subset, - struct omap_board_mux *board_mux, - struct omap_ball *package_balls); - diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c deleted file mode 100644 index 393e687f99e2..000000000000 --- a/arch/arm/mach-omap2/mux34xx.c +++ /dev/null @@ -1,2061 +0,0 @@ -/* - * Copyright (C) 2009 Nokia - * Copyright (C) 2009 Texas Instruments - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/module.h> -#include <linux/init.h> - -#include "mux.h" - -#ifdef CONFIG_OMAP_MUX - -#define _OMAP3_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ -{ \ - .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \ - .gpio = (g), \ - .muxnames = { m0, m1, m2, m3, m4, m5, m6, m7 }, \ -} - -#else - -#define _OMAP3_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ -{ \ - .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \ - .gpio = (g), \ -} - -#endif - -#define _OMAP3_BALLENTRY(M0, bb, bt) \ -{ \ - .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \ - .balls = { bb, bt }, \ -} - -/* - * Superset of all mux modes for omap3 - */ -static struct omap_mux __initdata omap3_muxmodes[] = { - _OMAP3_MUXENTRY(CAM_D0, 99, - "cam_d0", NULL, NULL, NULL, - "gpio_99", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D1, 100, - "cam_d1", NULL, NULL, NULL, - "gpio_100", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D10, 109, - "cam_d10", NULL, NULL, NULL, - "gpio_109", "hw_dbg8", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D11, 110, - "cam_d11", NULL, NULL, NULL, - "gpio_110", "hw_dbg9", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D2, 101, - "cam_d2", NULL, NULL, NULL, - "gpio_101", "hw_dbg4", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D3, 102, - "cam_d3", NULL, NULL, NULL, - "gpio_102", "hw_dbg5", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D4, 103, - "cam_d4", NULL, NULL, NULL, - "gpio_103", "hw_dbg6", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D5, 104, - "cam_d5", NULL, NULL, NULL, - "gpio_104", "hw_dbg7", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D6, 105, - "cam_d6", NULL, NULL, NULL, - "gpio_105", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D7, 106, - "cam_d7", NULL, NULL, NULL, - "gpio_106", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D8, 107, - "cam_d8", NULL, NULL, NULL, - "gpio_107", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D9, 108, - "cam_d9", NULL, NULL, NULL, - "gpio_108", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_FLD, 98, - "cam_fld", NULL, "cam_global_reset", NULL, - "gpio_98", "hw_dbg3", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_HS, 94, - "cam_hs", NULL, NULL, NULL, - "gpio_94", "hw_dbg0", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_PCLK, 97, - "cam_pclk", NULL, NULL, NULL, - "gpio_97", "hw_dbg2", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_STROBE, 126, - "cam_strobe", NULL, NULL, NULL, - "gpio_126", "hw_dbg11", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_VS, 95, - "cam_vs", NULL, NULL, NULL, - "gpio_95", "hw_dbg1", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_WEN, 167, - "cam_wen", NULL, "cam_shutter", NULL, - "gpio_167", "hw_dbg10", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_XCLKA, 96, - "cam_xclka", NULL, NULL, NULL, - "gpio_96", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_XCLKB, 111, - "cam_xclkb", NULL, NULL, NULL, - "gpio_111", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CSI2_DX0, 112, - "csi2_dx0", NULL, NULL, NULL, - "gpio_112", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CSI2_DX1, 114, - "csi2_dx1", NULL, NULL, NULL, - "gpio_114", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CSI2_DY0, 113, - "csi2_dy0", NULL, NULL, NULL, - "gpio_113", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CSI2_DY1, 115, - "csi2_dy1", NULL, NULL, NULL, - "gpio_115", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_ACBIAS, 69, - "dss_acbias", NULL, NULL, NULL, - "gpio_69", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA0, 70, - "dss_data0", NULL, "uart1_cts", NULL, - "gpio_70", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA1, 71, - "dss_data1", NULL, "uart1_rts", NULL, - "gpio_71", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA10, 80, - "dss_data10", NULL, NULL, NULL, - "gpio_80", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA11, 81, - "dss_data11", NULL, NULL, NULL, - "gpio_81", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA12, 82, - "dss_data12", NULL, NULL, NULL, - "gpio_82", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA13, 83, - "dss_data13", NULL, NULL, NULL, - "gpio_83", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA14, 84, - "dss_data14", NULL, NULL, NULL, - "gpio_84", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA15, 85, - "dss_data15", NULL, NULL, NULL, - "gpio_85", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA16, 86, - "dss_data16", NULL, NULL, NULL, - "gpio_86", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA17, 87, - "dss_data17", NULL, NULL, NULL, - "gpio_87", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA18, 88, - "dss_data18", NULL, "mcspi3_clk", "dss_data0", - "gpio_88", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA19, 89, - "dss_data19", NULL, "mcspi3_simo", "dss_data1", - "gpio_89", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA20, 90, - "dss_data20", NULL, "mcspi3_somi", "dss_data2", - "gpio_90", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA21, 91, - "dss_data21", NULL, "mcspi3_cs0", "dss_data3", - "gpio_91", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA22, 92, - "dss_data22", NULL, "mcspi3_cs1", "dss_data4", - "gpio_92", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA23, 93, - "dss_data23", NULL, NULL, "dss_data5", - "gpio_93", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA2, 72, - "dss_data2", NULL, NULL, NULL, - "gpio_72", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA3, 73, - "dss_data3", NULL, NULL, NULL, - "gpio_73", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA4, 74, - "dss_data4", NULL, "uart3_rx_irrx", NULL, - "gpio_74", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA5, 75, - "dss_data5", NULL, "uart3_tx_irtx", NULL, - "gpio_75", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA6, 76, - "dss_data6", NULL, "uart1_tx", NULL, - "gpio_76", "hw_dbg14", NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA7, 77, - "dss_data7", NULL, "uart1_rx", NULL, - "gpio_77", "hw_dbg15", NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA8, 78, - "dss_data8", NULL, NULL, NULL, - "gpio_78", "hw_dbg16", NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA9, 79, - "dss_data9", NULL, NULL, NULL, - "gpio_79", "hw_dbg17", NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_HSYNC, 67, - "dss_hsync", NULL, NULL, NULL, - "gpio_67", "hw_dbg13", NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_PCLK, 66, - "dss_pclk", NULL, NULL, NULL, - "gpio_66", "hw_dbg12", NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_VSYNC, 68, - "dss_vsync", NULL, NULL, NULL, - "gpio_68", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(ETK_CLK, 12, - "etk_clk", "mcbsp5_clkx", "sdmmc3_clk", "hsusb1_stp", - "gpio_12", "mm1_rxdp", "hsusb1_tll_stp", "hw_dbg0"), - _OMAP3_MUXENTRY(ETK_CTL, 13, - "etk_ctl", NULL, "sdmmc3_cmd", "hsusb1_clk", - "gpio_13", NULL, "hsusb1_tll_clk", "hw_dbg1"), - _OMAP3_MUXENTRY(ETK_D0, 14, - "etk_d0", "mcspi3_simo", "sdmmc3_dat4", "hsusb1_data0", - "gpio_14", "mm1_rxrcv", "hsusb1_tll_data0", "hw_dbg2"), - _OMAP3_MUXENTRY(ETK_D1, 15, - "etk_d1", "mcspi3_somi", NULL, "hsusb1_data1", - "gpio_15", "mm1_txse0", "hsusb1_tll_data1", "hw_dbg3"), - _OMAP3_MUXENTRY(ETK_D10, 24, - "etk_d10", NULL, "uart1_rx", "hsusb2_clk", - "gpio_24", NULL, "hsusb2_tll_clk", "hw_dbg12"), - _OMAP3_MUXENTRY(ETK_D11, 25, - "etk_d11", NULL, NULL, "hsusb2_stp", - "gpio_25", "mm2_rxdp", "hsusb2_tll_stp", "hw_dbg13"), - _OMAP3_MUXENTRY(ETK_D12, 26, - "etk_d12", NULL, NULL, "hsusb2_dir", - "gpio_26", NULL, "hsusb2_tll_dir", "hw_dbg14"), - _OMAP3_MUXENTRY(ETK_D13, 27, - "etk_d13", NULL, NULL, "hsusb2_nxt", - "gpio_27", "mm2_rxdm", "hsusb2_tll_nxt", "hw_dbg15"), - _OMAP3_MUXENTRY(ETK_D14, 28, - "etk_d14", NULL, NULL, "hsusb2_data0", - "gpio_28", "mm2_rxrcv", "hsusb2_tll_data0", "hw_dbg16"), - _OMAP3_MUXENTRY(ETK_D15, 29, - "etk_d15", NULL, NULL, "hsusb2_data1", - "gpio_29", "mm2_txse0", "hsusb2_tll_data1", "hw_dbg17"), - _OMAP3_MUXENTRY(ETK_D2, 16, - "etk_d2", "mcspi3_cs0", NULL, "hsusb1_data2", - "gpio_16", "mm1_txdat", "hsusb1_tll_data2", "hw_dbg4"), - _OMAP3_MUXENTRY(ETK_D3, 17, - "etk_d3", "mcspi3_clk", "sdmmc3_dat3", "hsusb1_data7", - "gpio_17", NULL, "hsusb1_tll_data7", "hw_dbg5"), - _OMAP3_MUXENTRY(ETK_D4, 18, - "etk_d4", "mcbsp5_dr", "sdmmc3_dat0", "hsusb1_data4", - "gpio_18", NULL, "hsusb1_tll_data4", "hw_dbg6"), - _OMAP3_MUXENTRY(ETK_D5, 19, - "etk_d5", "mcbsp5_fsx", "sdmmc3_dat1", "hsusb1_data5", - "gpio_19", NULL, "hsusb1_tll_data5", "hw_dbg7"), - _OMAP3_MUXENTRY(ETK_D6, 20, - "etk_d6", "mcbsp5_dx", "sdmmc3_dat2", "hsusb1_data6", - "gpio_20", NULL, "hsusb1_tll_data6", "hw_dbg8"), - _OMAP3_MUXENTRY(ETK_D7, 21, - "etk_d7", "mcspi3_cs1", "sdmmc3_dat7", "hsusb1_data3", - "gpio_21", "mm1_txen_n", "hsusb1_tll_data3", "hw_dbg9"), - _OMAP3_MUXENTRY(ETK_D8, 22, - "etk_d8", "sys_drm_msecure", "sdmmc3_dat6", "hsusb1_dir", - "gpio_22", NULL, "hsusb1_tll_dir", "hw_dbg10"), - _OMAP3_MUXENTRY(ETK_D9, 23, - "etk_d9", "sys_secure_indicator", "sdmmc3_dat5", "hsusb1_nxt", - "gpio_23", "mm1_rxdm", "hsusb1_tll_nxt", "hw_dbg11"), - _OMAP3_MUXENTRY(GPMC_A1, 34, - "gpmc_a1", NULL, NULL, NULL, - "gpio_34", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_A10, 43, - "gpmc_a10", "sys_ndmareq3", NULL, NULL, - "gpio_43", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_A2, 35, - "gpmc_a2", NULL, NULL, NULL, - "gpio_35", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_A3, 36, - "gpmc_a3", NULL, NULL, NULL, - "gpio_36", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_A4, 37, - "gpmc_a4", NULL, NULL, NULL, - "gpio_37", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_A5, 38, - "gpmc_a5", NULL, NULL, NULL, - "gpio_38", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_A6, 39, - "gpmc_a6", NULL, NULL, NULL, - "gpio_39", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_A7, 40, - "gpmc_a7", NULL, NULL, NULL, - "gpio_40", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_A8, 41, - "gpmc_a8", NULL, NULL, NULL, - "gpio_41", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_A9, 42, - "gpmc_a9", "sys_ndmareq2", NULL, NULL, - "gpio_42", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_CLK, 59, - "gpmc_clk", NULL, NULL, NULL, - "gpio_59", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_D10, 46, - "gpmc_d10", NULL, NULL, NULL, - "gpio_46", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_D11, 47, - "gpmc_d11", NULL, NULL, NULL, - "gpio_47", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_D12, 48, - "gpmc_d12", NULL, NULL, NULL, - "gpio_48", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_D13, 49, - "gpmc_d13", NULL, NULL, NULL, - "gpio_49", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_D14, 50, - "gpmc_d14", NULL, NULL, NULL, - "gpio_50", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_D15, 51, - "gpmc_d15", NULL, NULL, NULL, - "gpio_51", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_D8, 44, - "gpmc_d8", NULL, NULL, NULL, - "gpio_44", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_D9, 45, - "gpmc_d9", NULL, NULL, NULL, - "gpio_45", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_NBE0_CLE, 60, - "gpmc_nbe0_cle", NULL, NULL, NULL, - "gpio_60", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_NBE1, 61, - "gpmc_nbe1", NULL, NULL, NULL, - "gpio_61", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_NCS1, 52, - "gpmc_ncs1", NULL, NULL, NULL, - "gpio_52", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_NCS2, 53, - "gpmc_ncs2", NULL, NULL, NULL, - "gpio_53", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_NCS3, 54, - "gpmc_ncs3", "sys_ndmareq0", NULL, NULL, - "gpio_54", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_NCS4, 55, - "gpmc_ncs4", "sys_ndmareq1", "mcbsp4_clkx", "gpt9_pwm_evt", - "gpio_55", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_NCS5, 56, - "gpmc_ncs5", "sys_ndmareq2", "mcbsp4_dr", "gpt10_pwm_evt", - "gpio_56", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_NCS6, 57, - "gpmc_ncs6", "sys_ndmareq3", "mcbsp4_dx", "gpt11_pwm_evt", - "gpio_57", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_NCS7, 58, - "gpmc_ncs7", "gpmc_io_dir", "mcbsp4_fsx", "gpt8_pwm_evt", - "gpio_58", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_NWP, 62, - "gpmc_nwp", NULL, NULL, NULL, - "gpio_62", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_WAIT1, 63, - "gpmc_wait1", NULL, NULL, NULL, - "gpio_63", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_WAIT2, 64, - "gpmc_wait2", NULL, NULL, NULL, - "gpio_64", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_WAIT3, 65, - "gpmc_wait3", "sys_ndmareq1", NULL, NULL, - "gpio_65", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HDQ_SIO, 170, - "hdq_sio", "sys_altclk", "i2c2_sccbe", "i2c3_sccbe", - "gpio_170", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_CLK, 120, - "hsusb0_clk", NULL, NULL, NULL, - "gpio_120", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA0, 125, - "hsusb0_data0", NULL, "uart3_tx_irtx", NULL, - "gpio_125", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA1, 130, - "hsusb0_data1", NULL, "uart3_rx_irrx", NULL, - "gpio_130", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA2, 131, - "hsusb0_data2", NULL, "uart3_rts_sd", NULL, - "gpio_131", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA3, 169, - "hsusb0_data3", NULL, "uart3_cts_rctx", NULL, - "gpio_169", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA4, 188, - "hsusb0_data4", NULL, NULL, NULL, - "gpio_188", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA5, 189, - "hsusb0_data5", NULL, NULL, NULL, - "gpio_189", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA6, 190, - "hsusb0_data6", NULL, NULL, NULL, - "gpio_190", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA7, 191, - "hsusb0_data7", NULL, NULL, NULL, - "gpio_191", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DIR, 122, - "hsusb0_dir", NULL, NULL, NULL, - "gpio_122", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_NXT, 124, - "hsusb0_nxt", NULL, NULL, NULL, - "gpio_124", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_STP, 121, - "hsusb0_stp", NULL, NULL, NULL, - "gpio_121", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(I2C2_SCL, 168, - "i2c2_scl", NULL, NULL, NULL, - "gpio_168", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(I2C2_SDA, 183, - "i2c2_sda", NULL, NULL, NULL, - "gpio_183", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(I2C3_SCL, 184, - "i2c3_scl", NULL, NULL, NULL, - "gpio_184", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(I2C3_SDA, 185, - "i2c3_sda", NULL, NULL, NULL, - "gpio_185", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(I2C4_SCL, 0, - "i2c4_scl", "sys_nvmode1", NULL, NULL, - NULL, NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(I2C4_SDA, 0, - "i2c4_sda", "sys_nvmode2", NULL, NULL, - NULL, NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(JTAG_EMU0, 11, - "jtag_emu0", NULL, NULL, NULL, - "gpio_11", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(JTAG_EMU1, 31, - "jtag_emu1", NULL, NULL, NULL, - "gpio_31", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP1_CLKR, 156, - "mcbsp1_clkr", "mcspi4_clk", NULL, NULL, - "gpio_156", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP1_CLKX, 162, - "mcbsp1_clkx", NULL, "mcbsp3_clkx", NULL, - "gpio_162", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP1_DR, 159, - "mcbsp1_dr", "mcspi4_somi", "mcbsp3_dr", NULL, - "gpio_159", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP1_DX, 158, - "mcbsp1_dx", "mcspi4_simo", "mcbsp3_dx", NULL, - "gpio_158", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP1_FSR, 157, - "mcbsp1_fsr", NULL, "cam_global_reset", NULL, - "gpio_157", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP1_FSX, 161, - "mcbsp1_fsx", "mcspi4_cs0", "mcbsp3_fsx", NULL, - "gpio_161", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP2_CLKX, 117, - "mcbsp2_clkx", NULL, NULL, NULL, - "gpio_117", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP2_DR, 118, - "mcbsp2_dr", NULL, NULL, NULL, - "gpio_118", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP2_DX, 119, - "mcbsp2_dx", NULL, NULL, NULL, - "gpio_119", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP2_FSX, 116, - "mcbsp2_fsx", NULL, NULL, NULL, - "gpio_116", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP3_CLKX, 142, - "mcbsp3_clkx", "uart2_tx", NULL, NULL, - "gpio_142", "hsusb3_tll_data6", NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP3_DR, 141, - "mcbsp3_dr", "uart2_rts", NULL, NULL, - "gpio_141", "hsusb3_tll_data5", NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP3_DX, 140, - "mcbsp3_dx", "uart2_cts", NULL, NULL, - "gpio_140", "hsusb3_tll_data4", NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP3_FSX, 143, - "mcbsp3_fsx", "uart2_rx", NULL, NULL, - "gpio_143", "hsusb3_tll_data7", NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP4_CLKX, 152, - "mcbsp4_clkx", NULL, NULL, NULL, - "gpio_152", "hsusb3_tll_data1", "mm3_txse0", "safe_mode"), - _OMAP3_MUXENTRY(MCBSP4_DR, 153, - "mcbsp4_dr", NULL, NULL, NULL, - "gpio_153", "hsusb3_tll_data0", "mm3_rxrcv", "safe_mode"), - _OMAP3_MUXENTRY(MCBSP4_DX, 154, - "mcbsp4_dx", NULL, NULL, NULL, - "gpio_154", "hsusb3_tll_data2", "mm3_txdat", "safe_mode"), - _OMAP3_MUXENTRY(MCBSP4_FSX, 155, - "mcbsp4_fsx", NULL, NULL, NULL, - "gpio_155", "hsusb3_tll_data3", "mm3_txen_n", "safe_mode"), - _OMAP3_MUXENTRY(MCBSP_CLKS, 160, - "mcbsp_clks", NULL, "cam_shutter", NULL, - "gpio_160", "uart1_cts", NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI1_CLK, 171, - "mcspi1_clk", "sdmmc2_dat4", NULL, NULL, - "gpio_171", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI1_CS0, 174, - "mcspi1_cs0", "sdmmc2_dat7", NULL, NULL, - "gpio_174", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI1_CS1, 175, - "mcspi1_cs1", NULL, NULL, "sdmmc3_cmd", - "gpio_175", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI1_CS2, 176, - "mcspi1_cs2", NULL, NULL, "sdmmc3_clk", - "gpio_176", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI1_CS3, 177, - "mcspi1_cs3", NULL, "hsusb2_tll_data2", "hsusb2_data2", - "gpio_177", "mm2_txdat", NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI1_SIMO, 172, - "mcspi1_simo", "sdmmc2_dat5", NULL, NULL, - "gpio_172", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI1_SOMI, 173, - "mcspi1_somi", "sdmmc2_dat6", NULL, NULL, - "gpio_173", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI2_CLK, 178, - "mcspi2_clk", NULL, "hsusb2_tll_data7", "hsusb2_data7", - "gpio_178", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI2_CS0, 181, - "mcspi2_cs0", "gpt11_pwm_evt", - "hsusb2_tll_data6", "hsusb2_data6", - "gpio_181", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI2_CS1, 182, - "mcspi2_cs1", "gpt8_pwm_evt", - "hsusb2_tll_data3", "hsusb2_data3", - "gpio_182", "mm2_txen_n", NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI2_SIMO, 179, - "mcspi2_simo", "gpt9_pwm_evt", - "hsusb2_tll_data4", "hsusb2_data4", - "gpio_179", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCSPI2_SOMI, 180, - "mcspi2_somi", "gpt10_pwm_evt", - "hsusb2_tll_data5", "hsusb2_data5", - "gpio_180", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_CLK, 120, - "sdmmc1_clk", NULL, NULL, NULL, - "gpio_120", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_CMD, 121, - "sdmmc1_cmd", NULL, NULL, NULL, - "gpio_121", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT0, 122, - "sdmmc1_dat0", NULL, NULL, NULL, - "gpio_122", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT1, 123, - "sdmmc1_dat1", NULL, NULL, NULL, - "gpio_123", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT2, 124, - "sdmmc1_dat2", NULL, NULL, NULL, - "gpio_124", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT3, 125, - "sdmmc1_dat3", NULL, NULL, NULL, - "gpio_125", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT4, 126, - "sdmmc1_dat4", NULL, "sim_io", NULL, - "gpio_126", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT5, 127, - "sdmmc1_dat5", NULL, "sim_clk", NULL, - "gpio_127", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT6, 128, - "sdmmc1_dat6", NULL, "sim_pwrctrl", NULL, - "gpio_128", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT7, 129, - "sdmmc1_dat7", NULL, "sim_rst", NULL, - "gpio_129", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_CLK, 130, - "sdmmc2_clk", "mcspi3_clk", NULL, NULL, - "gpio_130", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_CMD, 131, - "sdmmc2_cmd", "mcspi3_simo", NULL, NULL, - "gpio_131", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_DAT0, 132, - "sdmmc2_dat0", "mcspi3_somi", NULL, NULL, - "gpio_132", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_DAT1, 133, - "sdmmc2_dat1", NULL, NULL, NULL, - "gpio_133", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_DAT2, 134, - "sdmmc2_dat2", "mcspi3_cs1", NULL, NULL, - "gpio_134", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_DAT3, 135, - "sdmmc2_dat3", "mcspi3_cs0", NULL, NULL, - "gpio_135", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_DAT4, 136, - "sdmmc2_dat4", "sdmmc2_dir_dat0", NULL, "sdmmc3_dat0", - "gpio_136", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_DAT5, 137, - "sdmmc2_dat5", "sdmmc2_dir_dat1", - "cam_global_reset", "sdmmc3_dat1", - "gpio_137", "hsusb3_tll_stp", "mm3_rxdp", "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_DAT6, 138, - "sdmmc2_dat6", "sdmmc2_dir_cmd", "cam_shutter", "sdmmc3_dat2", - "gpio_138", "hsusb3_tll_dir", NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_DAT7, 139, - "sdmmc2_dat7", "sdmmc2_clkin", NULL, "sdmmc3_dat3", - "gpio_139", "hsusb3_tll_nxt", "mm3_rxdm", "safe_mode"), - _OMAP3_MUXENTRY(SDRC_CKE0, 0, - "sdrc_cke0", NULL, NULL, NULL, - NULL, NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDRC_CKE1, 0, - "sdrc_cke1", NULL, NULL, NULL, - NULL, NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT0, 2, - "sys_boot0", NULL, NULL, NULL, - "gpio_2", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT1, 3, - "sys_boot1", NULL, NULL, NULL, - "gpio_3", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT2, 4, - "sys_boot2", NULL, NULL, NULL, - "gpio_4", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT3, 5, - "sys_boot3", NULL, NULL, NULL, - "gpio_5", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT4, 6, - "sys_boot4", "sdmmc2_dir_dat2", NULL, NULL, - "gpio_6", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT5, 7, - "sys_boot5", "sdmmc2_dir_dat3", NULL, NULL, - "gpio_7", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT6, 8, - "sys_boot6", NULL, NULL, NULL, - "gpio_8", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_CLKOUT1, 10, - "sys_clkout1", NULL, NULL, NULL, - "gpio_10", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_CLKOUT2, 186, - "sys_clkout2", NULL, NULL, NULL, - "gpio_186", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_CLKREQ, 1, - "sys_clkreq", NULL, NULL, NULL, - "gpio_1", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_NIRQ, 0, - "sys_nirq", NULL, NULL, NULL, - "gpio_0", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_NRESWARM, 30, - "sys_nreswarm", NULL, NULL, NULL, - "gpio_30", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_OFF_MODE, 9, - "sys_off_mode", NULL, NULL, NULL, - "gpio_9", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART1_CTS, 150, - "uart1_cts", "ssi1_rdy_tx", NULL, NULL, - "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART1_RTS, 149, - "uart1_rts", "ssi1_flag_tx", NULL, NULL, - "gpio_149", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART1_RX, 151, - "uart1_rx", "ssi1_wake_tx", "mcbsp1_clkr", "mcspi4_clk", - "gpio_151", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART1_TX, 148, - "uart1_tx", "ssi1_dat_tx", NULL, NULL, - "gpio_148", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART2_CTS, 144, - "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL, - "gpio_144", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART2_RTS, 145, - "uart2_rts", "mcbsp3_dr", "gpt10_pwm_evt", NULL, - "gpio_145", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART2_RX, 147, - "uart2_rx", "mcbsp3_fsx", "gpt8_pwm_evt", NULL, - "gpio_147", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART2_TX, 146, - "uart2_tx", "mcbsp3_clkx", "gpt11_pwm_evt", NULL, - "gpio_146", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART3_CTS_RCTX, 163, - "uart3_cts_rctx", NULL, NULL, NULL, - "gpio_163", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART3_RTS_SD, 164, - "uart3_rts_sd", NULL, NULL, NULL, - "gpio_164", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART3_RX_IRRX, 165, - "uart3_rx_irrx", NULL, NULL, NULL, - "gpio_165", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART3_TX_IRTX, 166, - "uart3_tx_irtx", NULL, NULL, NULL, - "gpio_166", NULL, NULL, "safe_mode"), - - /* Only on 3630, see omap36xx_cbp_subset for the signals */ - _OMAP3_MUXENTRY(GPMC_A11, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MBUSFLAG, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MREAD, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MWRITE, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_SBUSFLAG, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_SREAD, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_SWRITE, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(GPMC_A11, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD28, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD29, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD32, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD33, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD34, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD35, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD36, 0, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL), - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; - -/* - * Signals different on CBC package compared to the superset - */ -#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBC) -static struct omap_mux __initdata omap3_cbc_subset[] = { - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#else -#define omap3_cbc_subset NULL -#endif - -/* - * Balls for CBC package - * 515-pin s-PBGA Package, 0.65mm Ball Pitch (Top), 0.50mm Ball Pitch (Bottom) - * - * FIXME: What's up with the outdated TI documentation? See: - * - * http://wiki.davincidsp.com/index.php/Datasheet_Errata_for_OMAP35x_CBC_Package - * http://community.ti.com/forums/t/10982.aspx - */ -#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \ - && defined(CONFIG_OMAP_PACKAGE_CBC) -static struct omap_ball __initdata omap3_cbc_ball[] = { - _OMAP3_BALLENTRY(CAM_D0, "ae16", NULL), - _OMAP3_BALLENTRY(CAM_D1, "ae15", NULL), - _OMAP3_BALLENTRY(CAM_D10, "d25", NULL), - _OMAP3_BALLENTRY(CAM_D11, "e26", NULL), - _OMAP3_BALLENTRY(CAM_D2, "a24", NULL), - _OMAP3_BALLENTRY(CAM_D3, "b24", NULL), - _OMAP3_BALLENTRY(CAM_D4, "d24", NULL), - _OMAP3_BALLENTRY(CAM_D5, "c24", NULL), - _OMAP3_BALLENTRY(CAM_D6, "p25", NULL), - _OMAP3_BALLENTRY(CAM_D7, "p26", NULL), - _OMAP3_BALLENTRY(CAM_D8, "n25", NULL), - _OMAP3_BALLENTRY(CAM_D9, "n26", NULL), - _OMAP3_BALLENTRY(CAM_FLD, "b23", NULL), - _OMAP3_BALLENTRY(CAM_HS, "c23", NULL), - _OMAP3_BALLENTRY(CAM_PCLK, "c26", NULL), - _OMAP3_BALLENTRY(CAM_STROBE, "d26", NULL), - _OMAP3_BALLENTRY(CAM_VS, "d23", NULL), - _OMAP3_BALLENTRY(CAM_WEN, "a23", NULL), - _OMAP3_BALLENTRY(CAM_XCLKA, "c25", NULL), - _OMAP3_BALLENTRY(CAM_XCLKB, "e25", NULL), - _OMAP3_BALLENTRY(CSI2_DX0, "ad17", NULL), - _OMAP3_BALLENTRY(CSI2_DX1, "ae18", NULL), - _OMAP3_BALLENTRY(CSI2_DY0, "ad16", NULL), - _OMAP3_BALLENTRY(CSI2_DY1, "ae17", NULL), - _OMAP3_BALLENTRY(DSS_ACBIAS, "f26", NULL), - _OMAP3_BALLENTRY(DSS_DATA0, "ae21", NULL), - _OMAP3_BALLENTRY(DSS_DATA1, "ae22", NULL), - _OMAP3_BALLENTRY(DSS_DATA10, "ac26", NULL), - _OMAP3_BALLENTRY(DSS_DATA11, "ad26", NULL), - _OMAP3_BALLENTRY(DSS_DATA12, "aa25", NULL), - _OMAP3_BALLENTRY(DSS_DATA13, "y25", NULL), - _OMAP3_BALLENTRY(DSS_DATA14, "aa26", NULL), - _OMAP3_BALLENTRY(DSS_DATA15, "ab26", NULL), - _OMAP3_BALLENTRY(DSS_DATA16, "l25", NULL), - _OMAP3_BALLENTRY(DSS_DATA17, "l26", NULL), - _OMAP3_BALLENTRY(DSS_DATA18, "m24", NULL), - _OMAP3_BALLENTRY(DSS_DATA19, "m26", NULL), - _OMAP3_BALLENTRY(DSS_DATA2, "ae23", NULL), - _OMAP3_BALLENTRY(DSS_DATA20, "f25", NULL), - _OMAP3_BALLENTRY(DSS_DATA21, "n24", NULL), - _OMAP3_BALLENTRY(DSS_DATA22, "ac25", NULL), - _OMAP3_BALLENTRY(DSS_DATA23, "ab25", NULL), - _OMAP3_BALLENTRY(DSS_DATA3, "ae24", NULL), - _OMAP3_BALLENTRY(DSS_DATA4, "ad23", NULL), - _OMAP3_BALLENTRY(DSS_DATA5, "ad24", NULL), - _OMAP3_BALLENTRY(DSS_DATA6, "g26", NULL), - _OMAP3_BALLENTRY(DSS_DATA7, "h25", NULL), - _OMAP3_BALLENTRY(DSS_DATA8, "h26", NULL), - _OMAP3_BALLENTRY(DSS_DATA9, "j26", NULL), - _OMAP3_BALLENTRY(DSS_HSYNC, "k24", NULL), - _OMAP3_BALLENTRY(DSS_PCLK, "g25", NULL), - _OMAP3_BALLENTRY(DSS_VSYNC, "m25", NULL), - _OMAP3_BALLENTRY(ETK_CLK, "ab2", NULL), - _OMAP3_BALLENTRY(ETK_CTL, "ab3", NULL), - _OMAP3_BALLENTRY(ETK_D0, "ac3", NULL), - _OMAP3_BALLENTRY(ETK_D1, "ad4", NULL), - _OMAP3_BALLENTRY(ETK_D10, "ae4", NULL), - _OMAP3_BALLENTRY(ETK_D11, "af6", NULL), - _OMAP3_BALLENTRY(ETK_D12, "ae6", NULL), - _OMAP3_BALLENTRY(ETK_D13, "af7", NULL), - _OMAP3_BALLENTRY(ETK_D14, "af9", NULL), - _OMAP3_BALLENTRY(ETK_D15, "ae9", NULL), - _OMAP3_BALLENTRY(ETK_D2, "ad3", NULL), - _OMAP3_BALLENTRY(ETK_D3, "aa3", NULL), - _OMAP3_BALLENTRY(ETK_D4, "y3", NULL), - _OMAP3_BALLENTRY(ETK_D5, "ab1", NULL), - _OMAP3_BALLENTRY(ETK_D6, "ae3", NULL), - _OMAP3_BALLENTRY(ETK_D7, "ad2", NULL), - _OMAP3_BALLENTRY(ETK_D8, "aa4", NULL), - _OMAP3_BALLENTRY(ETK_D9, "v2", NULL), - _OMAP3_BALLENTRY(GPMC_A1, "j2", NULL), - _OMAP3_BALLENTRY(GPMC_A10, "d2", NULL), - _OMAP3_BALLENTRY(GPMC_A2, "h1", NULL), - _OMAP3_BALLENTRY(GPMC_A3, "h2", NULL), - _OMAP3_BALLENTRY(GPMC_A4, "g2", NULL), - _OMAP3_BALLENTRY(GPMC_A5, "f1", NULL), - _OMAP3_BALLENTRY(GPMC_A6, "f2", NULL), - _OMAP3_BALLENTRY(GPMC_A7, "e1", NULL), - _OMAP3_BALLENTRY(GPMC_A8, "e2", NULL), - _OMAP3_BALLENTRY(GPMC_A9, "d1", NULL), - _OMAP3_BALLENTRY(GPMC_CLK, "n1", "l1"), - _OMAP3_BALLENTRY(GPMC_D10, "t1", "n1"), - _OMAP3_BALLENTRY(GPMC_D11, "u2", "p2"), - _OMAP3_BALLENTRY(GPMC_D12, "u1", "p1"), - _OMAP3_BALLENTRY(GPMC_D13, "p1", "m1"), - _OMAP3_BALLENTRY(GPMC_D14, "l2", "j2"), - _OMAP3_BALLENTRY(GPMC_D15, "m2", "k2"), - _OMAP3_BALLENTRY(GPMC_D8, "v1", "r1"), - _OMAP3_BALLENTRY(GPMC_D9, "y1", "t1"), - _OMAP3_BALLENTRY(GPMC_NBE0_CLE, "k2", NULL), - _OMAP3_BALLENTRY(GPMC_NBE1, "j1", NULL), - _OMAP3_BALLENTRY(GPMC_NCS1, "ad1", "w1"), - _OMAP3_BALLENTRY(GPMC_NCS2, "a3", NULL), - _OMAP3_BALLENTRY(GPMC_NCS3, "b6", NULL), - _OMAP3_BALLENTRY(GPMC_NCS4, "b4", NULL), - _OMAP3_BALLENTRY(GPMC_NCS5, "c4", NULL), - _OMAP3_BALLENTRY(GPMC_NCS6, "b5", NULL), - _OMAP3_BALLENTRY(GPMC_NCS7, "c5", NULL), - _OMAP3_BALLENTRY(GPMC_NWP, "ac6", "y5"), - _OMAP3_BALLENTRY(GPMC_WAIT1, "ac8", "y8"), - _OMAP3_BALLENTRY(GPMC_WAIT2, "b3", NULL), - _OMAP3_BALLENTRY(GPMC_WAIT3, "c6", NULL), - _OMAP3_BALLENTRY(HDQ_SIO, "j23", NULL), - _OMAP3_BALLENTRY(HSUSB0_CLK, "w19", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA0, "v20", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA1, "y20", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA2, "v18", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA3, "w20", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA4, "w17", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA5, "y18", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA6, "y19", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA7, "y17", NULL), - _OMAP3_BALLENTRY(HSUSB0_DIR, "v19", NULL), - _OMAP3_BALLENTRY(HSUSB0_NXT, "w18", NULL), - _OMAP3_BALLENTRY(HSUSB0_STP, "u20", NULL), - _OMAP3_BALLENTRY(I2C2_SCL, "c2", NULL), - _OMAP3_BALLENTRY(I2C2_SDA, "c1", NULL), - _OMAP3_BALLENTRY(I2C3_SCL, "ab4", NULL), - _OMAP3_BALLENTRY(I2C3_SDA, "ac4", NULL), - _OMAP3_BALLENTRY(I2C4_SCL, "ad15", NULL), - _OMAP3_BALLENTRY(I2C4_SDA, "w16", NULL), - _OMAP3_BALLENTRY(JTAG_EMU0, "y15", NULL), - _OMAP3_BALLENTRY(JTAG_EMU1, "y14", NULL), - _OMAP3_BALLENTRY(MCBSP1_CLKR, "u19", NULL), - _OMAP3_BALLENTRY(MCBSP1_CLKX, "t17", NULL), - _OMAP3_BALLENTRY(MCBSP1_DR, "t20", NULL), - _OMAP3_BALLENTRY(MCBSP1_DX, "u17", NULL), - _OMAP3_BALLENTRY(MCBSP1_FSR, "v17", NULL), - _OMAP3_BALLENTRY(MCBSP1_FSX, "p20", NULL), - _OMAP3_BALLENTRY(MCBSP2_CLKX, "r18", NULL), - _OMAP3_BALLENTRY(MCBSP2_DR, "t18", NULL), - _OMAP3_BALLENTRY(MCBSP2_DX, "r19", NULL), - _OMAP3_BALLENTRY(MCBSP2_FSX, "u18", NULL), - _OMAP3_BALLENTRY(MCBSP3_CLKX, "u3", NULL), - _OMAP3_BALLENTRY(MCBSP3_DR, "n3", NULL), - _OMAP3_BALLENTRY(MCBSP3_DX, "p3", NULL), - _OMAP3_BALLENTRY(MCBSP3_FSX, "w3", NULL), - _OMAP3_BALLENTRY(MCBSP4_CLKX, "v3", NULL), - _OMAP3_BALLENTRY(MCBSP4_DR, "u4", NULL), - _OMAP3_BALLENTRY(MCBSP4_DX, "r3", NULL), - _OMAP3_BALLENTRY(MCBSP4_FSX, "t3", NULL), - _OMAP3_BALLENTRY(MCBSP_CLKS, "t19", NULL), - _OMAP3_BALLENTRY(MCSPI1_CLK, "p9", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS0, "r7", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS1, "r8", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS2, "r9", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS3, "t8", NULL), - _OMAP3_BALLENTRY(MCSPI1_SIMO, "p8", NULL), - _OMAP3_BALLENTRY(MCSPI1_SOMI, "p7", NULL), - _OMAP3_BALLENTRY(MCSPI2_CLK, "w7", NULL), - _OMAP3_BALLENTRY(MCSPI2_CS0, "v8", NULL), - _OMAP3_BALLENTRY(MCSPI2_CS1, "v9", NULL), - _OMAP3_BALLENTRY(MCSPI2_SIMO, "w8", NULL), - _OMAP3_BALLENTRY(MCSPI2_SOMI, "u8", NULL), - _OMAP3_BALLENTRY(SDMMC1_CLK, "n19", NULL), - _OMAP3_BALLENTRY(SDMMC1_CMD, "l18", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT0, "m19", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT1, "m18", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT2, "k18", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT3, "n20", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT4, "m20", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT5, "p17", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT6, "p18", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT7, "p19", NULL), - _OMAP3_BALLENTRY(SDMMC2_CLK, "w10", NULL), - _OMAP3_BALLENTRY(SDMMC2_CMD, "r10", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT0, "t10", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT1, "t9", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT2, "u10", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT3, "u9", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT4, "v10", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT5, "m3", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT6, "l3", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT7, "k3", NULL), - _OMAP3_BALLENTRY(SYS_BOOT0, "f3", NULL), - _OMAP3_BALLENTRY(SYS_BOOT1, "d3", NULL), - _OMAP3_BALLENTRY(SYS_BOOT2, "c3", NULL), - _OMAP3_BALLENTRY(SYS_BOOT3, "e3", NULL), - _OMAP3_BALLENTRY(SYS_BOOT4, "e4", NULL), - _OMAP3_BALLENTRY(SYS_BOOT5, "g3", NULL), - _OMAP3_BALLENTRY(SYS_BOOT6, "d4", NULL), - _OMAP3_BALLENTRY(SYS_CLKOUT1, "ae14", NULL), - _OMAP3_BALLENTRY(SYS_CLKOUT2, "w11", NULL), - _OMAP3_BALLENTRY(SYS_CLKREQ, "w15", NULL), - _OMAP3_BALLENTRY(SYS_NIRQ, "v16", NULL), - _OMAP3_BALLENTRY(SYS_NRESWARM, "ad7", "aa5"), - _OMAP3_BALLENTRY(SYS_OFF_MODE, "v12", NULL), - _OMAP3_BALLENTRY(UART1_CTS, "w2", NULL), - _OMAP3_BALLENTRY(UART1_RTS, "r2", NULL), - _OMAP3_BALLENTRY(UART1_RX, "h3", NULL), - _OMAP3_BALLENTRY(UART1_TX, "l4", NULL), - _OMAP3_BALLENTRY(UART2_CTS, "y24", NULL), - _OMAP3_BALLENTRY(UART2_RTS, "aa24", NULL), - _OMAP3_BALLENTRY(UART2_RX, "ad21", NULL), - _OMAP3_BALLENTRY(UART2_TX, "ad22", NULL), - _OMAP3_BALLENTRY(UART3_CTS_RCTX, "f23", NULL), - _OMAP3_BALLENTRY(UART3_RTS_SD, "f24", NULL), - _OMAP3_BALLENTRY(UART3_RX_IRRX, "h24", NULL), - _OMAP3_BALLENTRY(UART3_TX_IRTX, "g24", NULL), - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#else -#define omap3_cbc_ball NULL -#endif - -/* - * Signals different on CUS package compared to superset - */ -#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CUS) -static struct omap_mux __initdata omap3_cus_subset[] = { - _OMAP3_MUXENTRY(CAM_D10, 109, - "cam_d10", NULL, NULL, NULL, - "gpio_109", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D11, 110, - "cam_d11", NULL, NULL, NULL, - "gpio_110", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D2, 101, - "cam_d2", NULL, NULL, NULL, - "gpio_101", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D3, 102, - "cam_d3", NULL, NULL, NULL, - "gpio_102", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D4, 103, - "cam_d4", NULL, NULL, NULL, - "gpio_103", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D5, 104, - "cam_d5", NULL, NULL, NULL, - "gpio_104", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_FLD, 98, - "cam_fld", NULL, "cam_global_reset", NULL, - "gpio_98", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_HS, 94, - "cam_hs", NULL, NULL, NULL, - "gpio_94", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_PCLK, 97, - "cam_pclk", NULL, NULL, NULL, - "gpio_97", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_STROBE, 126, - "cam_strobe", NULL, NULL, NULL, - "gpio_126", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_VS, 95, - "cam_vs", NULL, NULL, NULL, - "gpio_95", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_WEN, 167, - "cam_wen", NULL, "cam_shutter", NULL, - "gpio_167", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA6, 76, - "dss_data6", NULL, "uart1_tx", NULL, - "gpio_76", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA7, 77, - "dss_data7", NULL, "uart1_rx", NULL, - "gpio_77", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA8, 78, - "dss_data8", NULL, NULL, NULL, - "gpio_78", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA9, 79, - "dss_data9", NULL, NULL, NULL, - "gpio_79", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_HSYNC, 67, - "dss_hsync", NULL, NULL, NULL, - "gpio_67", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_PCLK, 66, - "dss_pclk", NULL, NULL, NULL, - "gpio_66", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(ETK_CLK, 12, - "etk_clk", "mcbsp5_clkx", "sdmmc3_clk", "hsusb1_stp", - "gpio_12", "mm1_rxdp", "hsusb1_tll_stp", NULL), - _OMAP3_MUXENTRY(ETK_CTL, 13, - "etk_ctl", NULL, "sdmmc3_cmd", "hsusb1_clk", - "gpio_13", NULL, "hsusb1_tll_clk", NULL), - _OMAP3_MUXENTRY(ETK_D0, 14, - "etk_d0", "mcspi3_simo", "sdmmc3_dat4", "hsusb1_data0", - "gpio_14", "mm1_rxrcv", "hsusb1_tll_data0", NULL), - _OMAP3_MUXENTRY(ETK_D1, 15, - "etk_d1", "mcspi3_somi", NULL, "hsusb1_data1", - "gpio_15", "mm1_txse0", "hsusb1_tll_data1", NULL), - _OMAP3_MUXENTRY(ETK_D10, 24, - "etk_d10", NULL, "uart1_rx", "hsusb2_clk", - "gpio_24", NULL, "hsusb2_tll_clk", NULL), - _OMAP3_MUXENTRY(ETK_D11, 25, - "etk_d11", NULL, NULL, "hsusb2_stp", - "gpio_25", "mm2_rxdp", "hsusb2_tll_stp", NULL), - _OMAP3_MUXENTRY(ETK_D12, 26, - "etk_d12", NULL, NULL, "hsusb2_dir", - "gpio_26", NULL, "hsusb2_tll_dir", NULL), - _OMAP3_MUXENTRY(ETK_D13, 27, - "etk_d13", NULL, NULL, "hsusb2_nxt", - "gpio_27", "mm2_rxdm", "hsusb2_tll_nxt", NULL), - _OMAP3_MUXENTRY(ETK_D14, 28, - "etk_d14", NULL, NULL, "hsusb2_data0", - "gpio_28", "mm2_rxrcv", "hsusb2_tll_data0", NULL), - _OMAP3_MUXENTRY(ETK_D15, 29, - "etk_d15", NULL, NULL, "hsusb2_data1", - "gpio_29", "mm2_txse0", "hsusb2_tll_data1", NULL), - _OMAP3_MUXENTRY(ETK_D2, 16, - "etk_d2", "mcspi3_cs0", NULL, "hsusb1_data2", - "gpio_16", "mm1_txdat", "hsusb1_tll_data2", NULL), - _OMAP3_MUXENTRY(ETK_D3, 17, - "etk_d3", "mcspi3_clk", "sdmmc3_dat3", "hsusb1_data7", - "gpio_17", NULL, "hsusb1_tll_data7", NULL), - _OMAP3_MUXENTRY(ETK_D4, 18, - "etk_d4", "mcbsp5_dr", "sdmmc3_dat0", "hsusb1_data4", - "gpio_18", NULL, "hsusb1_tll_data4", NULL), - _OMAP3_MUXENTRY(ETK_D5, 19, - "etk_d5", "mcbsp5_fsx", "sdmmc3_dat1", "hsusb1_data5", - "gpio_19", NULL, "hsusb1_tll_data5", NULL), - _OMAP3_MUXENTRY(ETK_D6, 20, - "etk_d6", "mcbsp5_dx", "sdmmc3_dat2", "hsusb1_data6", - "gpio_20", NULL, "hsusb1_tll_data6", NULL), - _OMAP3_MUXENTRY(ETK_D7, 21, - "etk_d7", "mcspi3_cs1", "sdmmc3_dat7", "hsusb1_data3", - "gpio_21", "mm1_txen_n", "hsusb1_tll_data3", NULL), - _OMAP3_MUXENTRY(ETK_D8, 22, - "etk_d8", "sys_drm_msecure", "sdmmc3_dat6", "hsusb1_dir", - "gpio_22", NULL, "hsusb1_tll_dir", NULL), - _OMAP3_MUXENTRY(ETK_D9, 23, - "etk_d9", "sys_secure_indicator", "sdmmc3_dat5", "hsusb1_nxt", - "gpio_23", "mm1_rxdm", "hsusb1_tll_nxt", NULL), - _OMAP3_MUXENTRY(MCBSP3_CLKX, 142, - "mcbsp3_clkx", "uart2_tx", NULL, NULL, - "gpio_142", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP3_DR, 141, - "mcbsp3_dr", "uart2_rts", NULL, NULL, - "gpio_141", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP3_DX, 140, - "mcbsp3_dx", "uart2_cts", NULL, NULL, - "gpio_140", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP3_FSX, 143, - "mcbsp3_fsx", "uart2_rx", NULL, NULL, - "gpio_143", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_DAT5, 137, - "sdmmc2_dat5", "sdmmc2_dir_dat1", - "cam_global_reset", "sdmmc3_dat1", - "gpio_137", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_DAT6, 138, - "sdmmc2_dat6", "sdmmc2_dir_cmd", "cam_shutter", "sdmmc3_dat2", - "gpio_138", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC2_DAT7, 139, - "sdmmc2_dat7", "sdmmc2_clkin", NULL, "sdmmc3_dat3", - "gpio_139", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART1_CTS, 150, - "uart1_cts", NULL, NULL, NULL, - "gpio_150", NULL, NULL, "safe_mode"), - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#else -#define omap3_cus_subset NULL -#endif - -/* - * Balls for CUS package - * 423-pin s-PBGA Package, 0.65mm Ball Pitch (Bottom) - */ -#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \ - && defined(CONFIG_OMAP_PACKAGE_CUS) -static struct omap_ball __initdata omap3_cus_ball[] = { - _OMAP3_BALLENTRY(CAM_D0, "ab18", NULL), - _OMAP3_BALLENTRY(CAM_D1, "ac18", NULL), - _OMAP3_BALLENTRY(CAM_D10, "f21", NULL), - _OMAP3_BALLENTRY(CAM_D11, "g21", NULL), - _OMAP3_BALLENTRY(CAM_D2, "g19", NULL), - _OMAP3_BALLENTRY(CAM_D3, "f19", NULL), - _OMAP3_BALLENTRY(CAM_D4, "g20", NULL), - _OMAP3_BALLENTRY(CAM_D5, "b21", NULL), - _OMAP3_BALLENTRY(CAM_D6, "l24", NULL), - _OMAP3_BALLENTRY(CAM_D7, "k24", NULL), - _OMAP3_BALLENTRY(CAM_D8, "j23", NULL), - _OMAP3_BALLENTRY(CAM_D9, "k23", NULL), - _OMAP3_BALLENTRY(CAM_FLD, "h24", NULL), - _OMAP3_BALLENTRY(CAM_HS, "a22", NULL), - _OMAP3_BALLENTRY(CAM_PCLK, "j19", NULL), - _OMAP3_BALLENTRY(CAM_STROBE, "j20", NULL), - _OMAP3_BALLENTRY(CAM_VS, "e18", NULL), - _OMAP3_BALLENTRY(CAM_WEN, "f18", NULL), - _OMAP3_BALLENTRY(CAM_XCLKA, "b22", NULL), - _OMAP3_BALLENTRY(CAM_XCLKB, "c22", NULL), - _OMAP3_BALLENTRY(DSS_ACBIAS, "j21", NULL), - _OMAP3_BALLENTRY(DSS_DATA0, "ac19", NULL), - _OMAP3_BALLENTRY(DSS_DATA1, "ab19", NULL), - _OMAP3_BALLENTRY(DSS_DATA10, "ac22", NULL), - _OMAP3_BALLENTRY(DSS_DATA11, "ac23", NULL), - _OMAP3_BALLENTRY(DSS_DATA12, "ab22", NULL), - _OMAP3_BALLENTRY(DSS_DATA13, "y22", NULL), - _OMAP3_BALLENTRY(DSS_DATA14, "w22", NULL), - _OMAP3_BALLENTRY(DSS_DATA15, "v22", NULL), - _OMAP3_BALLENTRY(DSS_DATA16, "j22", NULL), - _OMAP3_BALLENTRY(DSS_DATA17, "g23", NULL), - _OMAP3_BALLENTRY(DSS_DATA18, "g24", NULL), - _OMAP3_BALLENTRY(DSS_DATA19, "h23", NULL), - _OMAP3_BALLENTRY(DSS_DATA2, "ad20", NULL), - _OMAP3_BALLENTRY(DSS_DATA20, "d23", NULL), - _OMAP3_BALLENTRY(DSS_DATA21, "k22", NULL), - _OMAP3_BALLENTRY(DSS_DATA22, "v21", NULL), - _OMAP3_BALLENTRY(DSS_DATA23, "w21", NULL), - _OMAP3_BALLENTRY(DSS_DATA3, "ac20", NULL), - _OMAP3_BALLENTRY(DSS_DATA4, "ad21", NULL), - _OMAP3_BALLENTRY(DSS_DATA5, "ac21", NULL), - _OMAP3_BALLENTRY(DSS_DATA6, "d24", NULL), - _OMAP3_BALLENTRY(DSS_DATA7, "e23", NULL), - _OMAP3_BALLENTRY(DSS_DATA8, "e24", NULL), - _OMAP3_BALLENTRY(DSS_DATA9, "f23", NULL), - _OMAP3_BALLENTRY(DSS_HSYNC, "e22", NULL), - _OMAP3_BALLENTRY(DSS_PCLK, "g22", NULL), - _OMAP3_BALLENTRY(DSS_VSYNC, "f22", NULL), - _OMAP3_BALLENTRY(ETK_CLK, "ac1", NULL), - _OMAP3_BALLENTRY(ETK_CTL, "ad3", NULL), - _OMAP3_BALLENTRY(ETK_D0, "ad6", NULL), - _OMAP3_BALLENTRY(ETK_D1, "ac6", NULL), - _OMAP3_BALLENTRY(ETK_D10, "ac3", NULL), - _OMAP3_BALLENTRY(ETK_D11, "ac9", NULL), - _OMAP3_BALLENTRY(ETK_D12, "ac10", NULL), - _OMAP3_BALLENTRY(ETK_D13, "ad11", NULL), - _OMAP3_BALLENTRY(ETK_D14, "ac11", NULL), - _OMAP3_BALLENTRY(ETK_D15, "ad12", NULL), - _OMAP3_BALLENTRY(ETK_D2, "ac7", NULL), - _OMAP3_BALLENTRY(ETK_D3, "ad8", NULL), - _OMAP3_BALLENTRY(ETK_D4, "ac5", NULL), - _OMAP3_BALLENTRY(ETK_D5, "ad2", NULL), - _OMAP3_BALLENTRY(ETK_D6, "ac8", NULL), - _OMAP3_BALLENTRY(ETK_D7, "ad9", NULL), - _OMAP3_BALLENTRY(ETK_D8, "ac4", NULL), - _OMAP3_BALLENTRY(ETK_D9, "ad5", NULL), - _OMAP3_BALLENTRY(GPMC_A1, "k4", NULL), - _OMAP3_BALLENTRY(GPMC_A10, "g2", NULL), - _OMAP3_BALLENTRY(GPMC_A2, "k3", NULL), - _OMAP3_BALLENTRY(GPMC_A3, "k2", NULL), - _OMAP3_BALLENTRY(GPMC_A4, "j4", NULL), - _OMAP3_BALLENTRY(GPMC_A5, "j3", NULL), - _OMAP3_BALLENTRY(GPMC_A6, "j2", NULL), - _OMAP3_BALLENTRY(GPMC_A7, "j1", NULL), - _OMAP3_BALLENTRY(GPMC_A8, "h1", NULL), - _OMAP3_BALLENTRY(GPMC_A9, "h2", NULL), - _OMAP3_BALLENTRY(GPMC_CLK, "w2", NULL), - _OMAP3_BALLENTRY(GPMC_D10, "u1", NULL), - _OMAP3_BALLENTRY(GPMC_D11, "r3", NULL), - _OMAP3_BALLENTRY(GPMC_D12, "t3", NULL), - _OMAP3_BALLENTRY(GPMC_D13, "u2", NULL), - _OMAP3_BALLENTRY(GPMC_D14, "v1", NULL), - _OMAP3_BALLENTRY(GPMC_D15, "v2", NULL), - _OMAP3_BALLENTRY(GPMC_D8, "r2", NULL), - _OMAP3_BALLENTRY(GPMC_D9, "t2", NULL), - _OMAP3_BALLENTRY(GPMC_NBE0_CLE, "k5", NULL), - _OMAP3_BALLENTRY(GPMC_NBE1, "l1", NULL), - _OMAP3_BALLENTRY(GPMC_NCS3, "d2", NULL), - _OMAP3_BALLENTRY(GPMC_NCS4, "f4", NULL), - _OMAP3_BALLENTRY(GPMC_NCS5, "g5", NULL), - _OMAP3_BALLENTRY(GPMC_NCS6, "f3", NULL), - _OMAP3_BALLENTRY(GPMC_NCS7, "g4", NULL), - _OMAP3_BALLENTRY(GPMC_NWP, "e1", NULL), - _OMAP3_BALLENTRY(GPMC_WAIT3, "c2", NULL), - _OMAP3_BALLENTRY(HDQ_SIO, "a24", NULL), - _OMAP3_BALLENTRY(HSUSB0_CLK, "r21", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA0, "t24", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA1, "t23", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA2, "u24", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA3, "u23", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA4, "w24", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA5, "v23", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA6, "w23", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA7, "t22", NULL), - _OMAP3_BALLENTRY(HSUSB0_DIR, "p23", NULL), - _OMAP3_BALLENTRY(HSUSB0_NXT, "r22", NULL), - _OMAP3_BALLENTRY(HSUSB0_STP, "r23", NULL), - _OMAP3_BALLENTRY(I2C2_SCL, "ac15", NULL), - _OMAP3_BALLENTRY(I2C2_SDA, "ac14", NULL), - _OMAP3_BALLENTRY(I2C3_SCL, "ac13", NULL), - _OMAP3_BALLENTRY(I2C3_SDA, "ac12", NULL), - _OMAP3_BALLENTRY(I2C4_SCL, "y16", NULL), - _OMAP3_BALLENTRY(I2C4_SDA, "y15", NULL), - _OMAP3_BALLENTRY(JTAG_EMU0, "ac24", NULL), - _OMAP3_BALLENTRY(JTAG_EMU1, "ad24", NULL), - _OMAP3_BALLENTRY(MCBSP1_CLKR, "w19", NULL), - _OMAP3_BALLENTRY(MCBSP1_CLKX, "v18", NULL), - _OMAP3_BALLENTRY(MCBSP1_DR, "y18", NULL), - _OMAP3_BALLENTRY(MCBSP1_DX, "w18", NULL), - _OMAP3_BALLENTRY(MCBSP1_FSR, "ab20", NULL), - _OMAP3_BALLENTRY(MCBSP1_FSX, "aa19", NULL), - _OMAP3_BALLENTRY(MCBSP2_CLKX, "t21", NULL), - _OMAP3_BALLENTRY(MCBSP2_DR, "v19", NULL), - _OMAP3_BALLENTRY(MCBSP2_DX, "r20", NULL), - _OMAP3_BALLENTRY(MCBSP2_FSX, "v20", NULL), - _OMAP3_BALLENTRY(MCBSP3_CLKX, "w4", NULL), - _OMAP3_BALLENTRY(MCBSP3_DR, "v5", NULL), - _OMAP3_BALLENTRY(MCBSP3_DX, "v6", NULL), - _OMAP3_BALLENTRY(MCBSP3_FSX, "v4", NULL), - _OMAP3_BALLENTRY(MCBSP_CLKS, "aa18", NULL), - _OMAP3_BALLENTRY(MCSPI1_CLK, "t5", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS0, "t6", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS3, "r5", NULL), - _OMAP3_BALLENTRY(MCSPI1_SIMO, "r4", NULL), - _OMAP3_BALLENTRY(MCSPI1_SOMI, "t4", NULL), - _OMAP3_BALLENTRY(MCSPI2_CLK, "n5", NULL), - _OMAP3_BALLENTRY(MCSPI2_CS0, "m5", NULL), - _OMAP3_BALLENTRY(MCSPI2_CS1, "m4", NULL), - _OMAP3_BALLENTRY(MCSPI2_SIMO, "n4", NULL), - _OMAP3_BALLENTRY(MCSPI2_SOMI, "n3", NULL), - _OMAP3_BALLENTRY(SDMMC1_CLK, "m23", NULL), - _OMAP3_BALLENTRY(SDMMC1_CMD, "l23", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT0, "m22", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT1, "m21", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT2, "m20", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT3, "n23", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT4, "n22", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT5, "n21", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT6, "n20", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT7, "p24", NULL), - _OMAP3_BALLENTRY(SDMMC2_CLK, "y1", NULL), - _OMAP3_BALLENTRY(SDMMC2_CMD, "ab5", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT0, "ab3", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT1, "y3", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT2, "w3", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT3, "v3", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT4, "ab2", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT5, "aa2", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT6, "y2", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT7, "aa1", NULL), - _OMAP3_BALLENTRY(SYS_BOOT0, "ab12", NULL), - _OMAP3_BALLENTRY(SYS_BOOT1, "ac16", NULL), - _OMAP3_BALLENTRY(SYS_BOOT2, "ad17", NULL), - _OMAP3_BALLENTRY(SYS_BOOT3, "ad18", NULL), - _OMAP3_BALLENTRY(SYS_BOOT4, "ac17", NULL), - _OMAP3_BALLENTRY(SYS_BOOT5, "ab16", NULL), - _OMAP3_BALLENTRY(SYS_BOOT6, "aa15", NULL), - _OMAP3_BALLENTRY(SYS_CLKOUT1, "y7", NULL), - _OMAP3_BALLENTRY(SYS_CLKOUT2, "aa6", NULL), - _OMAP3_BALLENTRY(SYS_CLKREQ, "y13", NULL), - _OMAP3_BALLENTRY(SYS_NIRQ, "w16", NULL), - _OMAP3_BALLENTRY(SYS_NRESWARM, "y10", NULL), - _OMAP3_BALLENTRY(SYS_OFF_MODE, "ad23", NULL), - _OMAP3_BALLENTRY(UART1_CTS, "ac2", NULL), - _OMAP3_BALLENTRY(UART1_RTS, "w6", NULL), - _OMAP3_BALLENTRY(UART1_RX, "v7", NULL), - _OMAP3_BALLENTRY(UART1_TX, "w7", NULL), - _OMAP3_BALLENTRY(UART3_CTS_RCTX, "a23", NULL), - _OMAP3_BALLENTRY(UART3_RTS_SD, "b23", NULL), - _OMAP3_BALLENTRY(UART3_RX_IRRX, "b24", NULL), - _OMAP3_BALLENTRY(UART3_TX_IRTX, "c23", NULL), - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#else -#define omap3_cus_ball NULL -#endif - -/* - * Signals different on CBB package compared to superset - */ -#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBB) -static struct omap_mux __initdata omap3_cbb_subset[] = { - _OMAP3_MUXENTRY(CAM_D10, 109, - "cam_d10", NULL, NULL, NULL, - "gpio_109", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D11, 110, - "cam_d11", NULL, NULL, NULL, - "gpio_110", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D2, 101, - "cam_d2", NULL, NULL, NULL, - "gpio_101", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D3, 102, - "cam_d3", NULL, NULL, NULL, - "gpio_102", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D4, 103, - "cam_d4", NULL, NULL, NULL, - "gpio_103", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D5, 104, - "cam_d5", NULL, NULL, NULL, - "gpio_104", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_FLD, 98, - "cam_fld", NULL, "cam_global_reset", NULL, - "gpio_98", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_HS, 94, - "cam_hs", NULL, NULL, NULL, - "gpio_94", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_PCLK, 97, - "cam_pclk", NULL, NULL, NULL, - "gpio_97", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_STROBE, 126, - "cam_strobe", NULL, NULL, NULL, - "gpio_126", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_VS, 95, - "cam_vs", NULL, NULL, NULL, - "gpio_95", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_WEN, 167, - "cam_wen", NULL, "cam_shutter", NULL, - "gpio_167", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA6, 76, - "dss_data6", NULL, "uart1_tx", NULL, - "gpio_76", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA7, 77, - "dss_data7", NULL, "uart1_rx", NULL, - "gpio_77", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA8, 78, - "dss_data8", NULL, NULL, NULL, - "gpio_78", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA9, 79, - "dss_data9", NULL, NULL, NULL, - "gpio_79", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_HSYNC, 67, - "dss_hsync", NULL, NULL, NULL, - "gpio_67", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_PCLK, 66, - "dss_pclk", NULL, NULL, NULL, - "gpio_66", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(ETK_CLK, 12, - "etk_clk", "mcbsp5_clkx", "sdmmc3_clk", "hsusb1_stp", - "gpio_12", "mm1_rxdp", "hsusb1_tll_stp", NULL), - _OMAP3_MUXENTRY(ETK_CTL, 13, - "etk_ctl", NULL, "sdmmc3_cmd", "hsusb1_clk", - "gpio_13", NULL, "hsusb1_tll_clk", NULL), - _OMAP3_MUXENTRY(ETK_D0, 14, - "etk_d0", "mcspi3_simo", "sdmmc3_dat4", "hsusb1_data0", - "gpio_14", "mm1_rxrcv", "hsusb1_tll_data0", NULL), - _OMAP3_MUXENTRY(ETK_D1, 15, - "etk_d1", "mcspi3_somi", NULL, "hsusb1_data1", - "gpio_15", "mm1_txse0", "hsusb1_tll_data1", NULL), - _OMAP3_MUXENTRY(ETK_D10, 24, - "etk_d10", NULL, "uart1_rx", "hsusb2_clk", - "gpio_24", NULL, "hsusb2_tll_clk", NULL), - _OMAP3_MUXENTRY(ETK_D11, 25, - "etk_d11", NULL, NULL, "hsusb2_stp", - "gpio_25", "mm2_rxdp", "hsusb2_tll_stp", NULL), - _OMAP3_MUXENTRY(ETK_D12, 26, - "etk_d12", NULL, NULL, "hsusb2_dir", - "gpio_26", NULL, "hsusb2_tll_dir", NULL), - _OMAP3_MUXENTRY(ETK_D13, 27, - "etk_d13", NULL, NULL, "hsusb2_nxt", - "gpio_27", "mm2_rxdm", "hsusb2_tll_nxt", NULL), - _OMAP3_MUXENTRY(ETK_D14, 28, - "etk_d14", NULL, NULL, "hsusb2_data0", - "gpio_28", "mm2_rxrcv", "hsusb2_tll_data0", NULL), - _OMAP3_MUXENTRY(ETK_D15, 29, - "etk_d15", NULL, NULL, "hsusb2_data1", - "gpio_29", "mm2_txse0", "hsusb2_tll_data1", NULL), - _OMAP3_MUXENTRY(ETK_D2, 16, - "etk_d2", "mcspi3_cs0", NULL, "hsusb1_data2", - "gpio_16", "mm1_txdat", "hsusb1_tll_data2", NULL), - _OMAP3_MUXENTRY(ETK_D3, 17, - "etk_d3", "mcspi3_clk", "sdmmc3_dat3", "hsusb1_data7", - "gpio_17", NULL, "hsusb1_tll_data7", NULL), - _OMAP3_MUXENTRY(ETK_D4, 18, - "etk_d4", "mcbsp5_dr", "sdmmc3_dat0", "hsusb1_data4", - "gpio_18", NULL, "hsusb1_tll_data4", NULL), - _OMAP3_MUXENTRY(ETK_D5, 19, - "etk_d5", "mcbsp5_fsx", "sdmmc3_dat1", "hsusb1_data5", - "gpio_19", NULL, "hsusb1_tll_data5", NULL), - _OMAP3_MUXENTRY(ETK_D6, 20, - "etk_d6", "mcbsp5_dx", "sdmmc3_dat2", "hsusb1_data6", - "gpio_20", NULL, "hsusb1_tll_data6", NULL), - _OMAP3_MUXENTRY(ETK_D7, 21, - "etk_d7", "mcspi3_cs1", "sdmmc3_dat7", "hsusb1_data3", - "gpio_21", "mm1_txen_n", "hsusb1_tll_data3", NULL), - _OMAP3_MUXENTRY(ETK_D8, 22, - "etk_d8", "sys_drm_msecure", "sdmmc3_dat6", "hsusb1_dir", - "gpio_22", NULL, "hsusb1_tll_dir", NULL), - _OMAP3_MUXENTRY(ETK_D9, 23, - "etk_d9", "sys_secure_indicator", "sdmmc3_dat5", "hsusb1_nxt", - "gpio_23", "mm1_rxdm", "hsusb1_tll_nxt", NULL), - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#else -#define omap3_cbb_subset NULL -#endif - -/* - * Balls for CBB package - * 515-pin s-PBGA Package, 0.50mm Ball Pitch (Top), 0.40mm Ball Pitch (Bottom) - */ -#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \ - && defined(CONFIG_OMAP_PACKAGE_CBB) -static struct omap_ball __initdata omap3_cbb_ball[] = { - _OMAP3_BALLENTRY(CAM_D0, "ag17", NULL), - _OMAP3_BALLENTRY(CAM_D1, "ah17", NULL), - _OMAP3_BALLENTRY(CAM_D10, "b25", NULL), - _OMAP3_BALLENTRY(CAM_D11, "c26", NULL), - _OMAP3_BALLENTRY(CAM_D2, "b24", NULL), - _OMAP3_BALLENTRY(CAM_D3, "c24", NULL), - _OMAP3_BALLENTRY(CAM_D4, "d24", NULL), - _OMAP3_BALLENTRY(CAM_D5, "a25", NULL), - _OMAP3_BALLENTRY(CAM_D6, "k28", NULL), - _OMAP3_BALLENTRY(CAM_D7, "l28", NULL), - _OMAP3_BALLENTRY(CAM_D8, "k27", NULL), - _OMAP3_BALLENTRY(CAM_D9, "l27", NULL), - _OMAP3_BALLENTRY(CAM_FLD, "c23", NULL), - _OMAP3_BALLENTRY(CAM_HS, "a24", NULL), - _OMAP3_BALLENTRY(CAM_PCLK, "c27", NULL), - _OMAP3_BALLENTRY(CAM_STROBE, "d25", NULL), - _OMAP3_BALLENTRY(CAM_VS, "a23", NULL), - _OMAP3_BALLENTRY(CAM_WEN, "b23", NULL), - _OMAP3_BALLENTRY(CAM_XCLKA, "c25", NULL), - _OMAP3_BALLENTRY(CAM_XCLKB, "b26", NULL), - _OMAP3_BALLENTRY(CSI2_DX0, "ag19", NULL), - _OMAP3_BALLENTRY(CSI2_DX1, "ag18", NULL), - _OMAP3_BALLENTRY(CSI2_DY0, "ah19", NULL), - _OMAP3_BALLENTRY(CSI2_DY1, "ah18", NULL), - _OMAP3_BALLENTRY(DSS_ACBIAS, "e27", NULL), - _OMAP3_BALLENTRY(DSS_DATA0, "ag22", NULL), - _OMAP3_BALLENTRY(DSS_DATA1, "ah22", NULL), - _OMAP3_BALLENTRY(DSS_DATA10, "ad28", NULL), - _OMAP3_BALLENTRY(DSS_DATA11, "ad27", NULL), - _OMAP3_BALLENTRY(DSS_DATA12, "ab28", NULL), - _OMAP3_BALLENTRY(DSS_DATA13, "ab27", NULL), - _OMAP3_BALLENTRY(DSS_DATA14, "aa28", NULL), - _OMAP3_BALLENTRY(DSS_DATA15, "aa27", NULL), - _OMAP3_BALLENTRY(DSS_DATA16, "g25", NULL), - _OMAP3_BALLENTRY(DSS_DATA17, "h27", NULL), - _OMAP3_BALLENTRY(DSS_DATA18, "h26", NULL), - _OMAP3_BALLENTRY(DSS_DATA19, "h25", NULL), - _OMAP3_BALLENTRY(DSS_DATA2, "ag23", NULL), - _OMAP3_BALLENTRY(DSS_DATA20, "e28", NULL), - _OMAP3_BALLENTRY(DSS_DATA21, "j26", NULL), - _OMAP3_BALLENTRY(DSS_DATA22, "ac27", NULL), - _OMAP3_BALLENTRY(DSS_DATA23, "ac28", NULL), - _OMAP3_BALLENTRY(DSS_DATA3, "ah23", NULL), - _OMAP3_BALLENTRY(DSS_DATA4, "ag24", NULL), - _OMAP3_BALLENTRY(DSS_DATA5, "ah24", NULL), - _OMAP3_BALLENTRY(DSS_DATA6, "e26", NULL), - _OMAP3_BALLENTRY(DSS_DATA7, "f28", NULL), - _OMAP3_BALLENTRY(DSS_DATA8, "f27", NULL), - _OMAP3_BALLENTRY(DSS_DATA9, "g26", NULL), - _OMAP3_BALLENTRY(DSS_HSYNC, "d26", NULL), - _OMAP3_BALLENTRY(DSS_PCLK, "d28", NULL), - _OMAP3_BALLENTRY(DSS_VSYNC, "d27", NULL), - _OMAP3_BALLENTRY(ETK_CLK, "af10", NULL), - _OMAP3_BALLENTRY(ETK_CTL, "ae10", NULL), - _OMAP3_BALLENTRY(ETK_D0, "af11", NULL), - _OMAP3_BALLENTRY(ETK_D1, "ag12", NULL), - _OMAP3_BALLENTRY(ETK_D10, "ae7", NULL), - _OMAP3_BALLENTRY(ETK_D11, "af7", NULL), - _OMAP3_BALLENTRY(ETK_D12, "ag7", NULL), - _OMAP3_BALLENTRY(ETK_D13, "ah7", NULL), - _OMAP3_BALLENTRY(ETK_D14, "ag8", NULL), - _OMAP3_BALLENTRY(ETK_D15, "ah8", NULL), - _OMAP3_BALLENTRY(ETK_D2, "ah12", NULL), - _OMAP3_BALLENTRY(ETK_D3, "ae13", NULL), - _OMAP3_BALLENTRY(ETK_D4, "ae11", NULL), - _OMAP3_BALLENTRY(ETK_D5, "ah9", NULL), - _OMAP3_BALLENTRY(ETK_D6, "af13", NULL), - _OMAP3_BALLENTRY(ETK_D7, "ah14", NULL), - _OMAP3_BALLENTRY(ETK_D8, "af9", NULL), - _OMAP3_BALLENTRY(ETK_D9, "ag9", NULL), - _OMAP3_BALLENTRY(GPMC_A1, "n4", "ac15"), - _OMAP3_BALLENTRY(GPMC_A10, "k3", "ab19"), - _OMAP3_BALLENTRY(GPMC_A2, "m4", "ab15"), - _OMAP3_BALLENTRY(GPMC_A3, "l4", "ac16"), - _OMAP3_BALLENTRY(GPMC_A4, "k4", "ab16"), - _OMAP3_BALLENTRY(GPMC_A5, "t3", "ac17"), - _OMAP3_BALLENTRY(GPMC_A6, "r3", "ab17"), - _OMAP3_BALLENTRY(GPMC_A7, "n3", "ac18"), - _OMAP3_BALLENTRY(GPMC_A8, "m3", "ab18"), - _OMAP3_BALLENTRY(GPMC_A9, "l3", "ac19"), - _OMAP3_BALLENTRY(GPMC_CLK, "t4", "w2"), - _OMAP3_BALLENTRY(GPMC_D10, "p1", "ab4"), - _OMAP3_BALLENTRY(GPMC_D11, "r1", "ac4"), - _OMAP3_BALLENTRY(GPMC_D12, "r2", "ab6"), - _OMAP3_BALLENTRY(GPMC_D13, "t2", "ac6"), - _OMAP3_BALLENTRY(GPMC_D14, "w1", "ab7"), - _OMAP3_BALLENTRY(GPMC_D15, "y1", "ac7"), - _OMAP3_BALLENTRY(GPMC_D8, "h2", "ab3"), - _OMAP3_BALLENTRY(GPMC_D9, "k2", "ac3"), - _OMAP3_BALLENTRY(GPMC_NBE0_CLE, "g3", "ac12"), - _OMAP3_BALLENTRY(GPMC_NBE1, "u3", NULL), - _OMAP3_BALLENTRY(GPMC_NCS1, "h3", "y1"), - _OMAP3_BALLENTRY(GPMC_NCS2, "v8", NULL), - _OMAP3_BALLENTRY(GPMC_NCS3, "u8", NULL), - _OMAP3_BALLENTRY(GPMC_NCS4, "t8", NULL), - _OMAP3_BALLENTRY(GPMC_NCS5, "r8", NULL), - _OMAP3_BALLENTRY(GPMC_NCS6, "p8", NULL), - _OMAP3_BALLENTRY(GPMC_NCS7, "n8", NULL), - _OMAP3_BALLENTRY(GPMC_NWP, "h1", "ab10"), - _OMAP3_BALLENTRY(GPMC_WAIT1, "l8", "ac10"), - _OMAP3_BALLENTRY(GPMC_WAIT2, "k8", NULL), - _OMAP3_BALLENTRY(GPMC_WAIT3, "j8", NULL), - _OMAP3_BALLENTRY(HDQ_SIO, "j25", NULL), - _OMAP3_BALLENTRY(HSUSB0_CLK, "t28", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA0, "t27", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA1, "u28", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA2, "u27", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA3, "u26", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA4, "u25", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA5, "v28", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA6, "v27", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA7, "v26", NULL), - _OMAP3_BALLENTRY(HSUSB0_DIR, "r28", NULL), - _OMAP3_BALLENTRY(HSUSB0_NXT, "t26", NULL), - _OMAP3_BALLENTRY(HSUSB0_STP, "t25", NULL), - _OMAP3_BALLENTRY(I2C2_SCL, "af15", NULL), - _OMAP3_BALLENTRY(I2C2_SDA, "ae15", NULL), - _OMAP3_BALLENTRY(I2C3_SCL, "af14", NULL), - _OMAP3_BALLENTRY(I2C3_SDA, "ag14", NULL), - _OMAP3_BALLENTRY(I2C4_SCL, "ad26", NULL), - _OMAP3_BALLENTRY(I2C4_SDA, "ae26", NULL), - _OMAP3_BALLENTRY(JTAG_EMU0, "aa11", NULL), - _OMAP3_BALLENTRY(JTAG_EMU1, "aa10", NULL), - _OMAP3_BALLENTRY(MCBSP1_CLKR, "y21", NULL), - _OMAP3_BALLENTRY(MCBSP1_CLKX, "w21", NULL), - _OMAP3_BALLENTRY(MCBSP1_DR, "u21", NULL), - _OMAP3_BALLENTRY(MCBSP1_DX, "v21", NULL), - _OMAP3_BALLENTRY(MCBSP1_FSR, "aa21", NULL), - _OMAP3_BALLENTRY(MCBSP1_FSX, "k26", NULL), - _OMAP3_BALLENTRY(MCBSP2_CLKX, "n21", NULL), - _OMAP3_BALLENTRY(MCBSP2_DR, "r21", NULL), - _OMAP3_BALLENTRY(MCBSP2_DX, "m21", NULL), - _OMAP3_BALLENTRY(MCBSP2_FSX, "p21", NULL), - _OMAP3_BALLENTRY(MCBSP3_CLKX, "af5", NULL), - _OMAP3_BALLENTRY(MCBSP3_DR, "ae6", NULL), - _OMAP3_BALLENTRY(MCBSP3_DX, "af6", NULL), - _OMAP3_BALLENTRY(MCBSP3_FSX, "ae5", NULL), - _OMAP3_BALLENTRY(MCBSP4_CLKX, "ae1", NULL), - _OMAP3_BALLENTRY(MCBSP4_DR, "ad1", NULL), - _OMAP3_BALLENTRY(MCBSP4_DX, "ad2", NULL), - _OMAP3_BALLENTRY(MCBSP4_FSX, "ac1", NULL), - _OMAP3_BALLENTRY(MCBSP_CLKS, "t21", NULL), - _OMAP3_BALLENTRY(MCSPI1_CLK, "ab3", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS0, "ac2", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS1, "ac3", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS2, "ab1", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS3, "ab2", NULL), - _OMAP3_BALLENTRY(MCSPI1_SIMO, "ab4", NULL), - _OMAP3_BALLENTRY(MCSPI1_SOMI, "aa4", NULL), - _OMAP3_BALLENTRY(MCSPI2_CLK, "aa3", NULL), - _OMAP3_BALLENTRY(MCSPI2_CS0, "y4", NULL), - _OMAP3_BALLENTRY(MCSPI2_CS1, "v3", NULL), - _OMAP3_BALLENTRY(MCSPI2_SIMO, "y2", NULL), - _OMAP3_BALLENTRY(MCSPI2_SOMI, "y3", NULL), - _OMAP3_BALLENTRY(SDMMC1_CLK, "n28", NULL), - _OMAP3_BALLENTRY(SDMMC1_CMD, "m27", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT0, "n27", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT1, "n26", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT2, "n25", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT3, "p28", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT4, "p27", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT5, "p26", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT6, "r27", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT7, "r25", NULL), - _OMAP3_BALLENTRY(SDMMC2_CLK, "ae2", NULL), - _OMAP3_BALLENTRY(SDMMC2_CMD, "ag5", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT0, "ah5", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT1, "ah4", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT2, "ag4", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT3, "af4", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT4, "ae4", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT5, "ah3", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT6, "af3", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT7, "ae3", NULL), - _OMAP3_BALLENTRY(SYS_BOOT0, "ah26", NULL), - _OMAP3_BALLENTRY(SYS_BOOT1, "ag26", NULL), - _OMAP3_BALLENTRY(SYS_BOOT2, "ae14", NULL), - _OMAP3_BALLENTRY(SYS_BOOT3, "af18", NULL), - _OMAP3_BALLENTRY(SYS_BOOT4, "af19", NULL), - _OMAP3_BALLENTRY(SYS_BOOT5, "ae21", NULL), - _OMAP3_BALLENTRY(SYS_BOOT6, "af21", NULL), - _OMAP3_BALLENTRY(SYS_CLKOUT1, "ag25", NULL), - _OMAP3_BALLENTRY(SYS_CLKOUT2, "ae22", NULL), - _OMAP3_BALLENTRY(SYS_CLKREQ, "af25", NULL), - _OMAP3_BALLENTRY(SYS_NIRQ, "af26", NULL), - _OMAP3_BALLENTRY(SYS_NRESWARM, "af24", NULL), - _OMAP3_BALLENTRY(SYS_OFF_MODE, "af22", NULL), - _OMAP3_BALLENTRY(UART1_CTS, "w8", NULL), - _OMAP3_BALLENTRY(UART1_RTS, "aa9", NULL), - _OMAP3_BALLENTRY(UART1_RX, "y8", NULL), - _OMAP3_BALLENTRY(UART1_TX, "aa8", NULL), - _OMAP3_BALLENTRY(UART2_CTS, "ab26", NULL), - _OMAP3_BALLENTRY(UART2_RTS, "ab25", NULL), - _OMAP3_BALLENTRY(UART2_RX, "ad25", NULL), - _OMAP3_BALLENTRY(UART2_TX, "aa25", NULL), - _OMAP3_BALLENTRY(UART3_CTS_RCTX, "h18", NULL), - _OMAP3_BALLENTRY(UART3_RTS_SD, "h19", NULL), - _OMAP3_BALLENTRY(UART3_RX_IRRX, "h20", NULL), - _OMAP3_BALLENTRY(UART3_TX_IRTX, "h21", NULL), - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#else -#define omap3_cbb_ball NULL -#endif - -/* - * Signals different on 36XX CBP package compared to 34XX CBC package - */ -#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBP) -static struct omap_mux __initdata omap36xx_cbp_subset[] = { - _OMAP3_MUXENTRY(CAM_D0, 99, - "cam_d0", NULL, "csi2_dx2", NULL, - "gpio_99", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D1, 100, - "cam_d1", NULL, "csi2_dy2", NULL, - "gpio_100", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D10, 109, - "cam_d10", "ssi2_wake", NULL, NULL, - "gpio_109", "hw_dbg8", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D2, 101, - "cam_d2", "ssi2_rdy_tx", NULL, NULL, - "gpio_101", "hw_dbg4", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D3, 102, - "cam_d3", "ssi2_dat_rx", NULL, NULL, - "gpio_102", "hw_dbg5", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D4, 103, - "cam_d4", "ssi2_flag_rx", NULL, NULL, - "gpio_103", "hw_dbg6", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_D5, 104, - "cam_d5", "ssi2_rdy_rx", NULL, NULL, - "gpio_104", "hw_dbg7", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_HS, 94, - "cam_hs", "ssi2_dat_tx", NULL, NULL, - "gpio_94", "hw_dbg0", NULL, "safe_mode"), - _OMAP3_MUXENTRY(CAM_VS, 95, - "cam_vs", "ssi2_flag_tx", NULL, NULL, - "gpio_95", "hw_dbg1", NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA0, 70, - "dss_data0", "dsi_dx0", "uart1_cts", NULL, - "gpio_70", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA1, 71, - "dss_data1", "dsi_dy0", "uart1_rts", NULL, - "gpio_71", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA2, 72, - "dss_data2", "dsi_dx1", NULL, NULL, - "gpio_72", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA3, 73, - "dss_data3", "dsi_dy1", NULL, NULL, - "gpio_73", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA4, 74, - "dss_data4", "dsi_dx2", "uart3_rx_irrx", NULL, - "gpio_74", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA5, 75, - "dss_data5", "dsi_dy2", "uart3_tx_irtx", NULL, - "gpio_75", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA6, 76, - "dss_data6", NULL, "uart1_tx", "dssvenc656_data6", - "gpio_76", "hw_dbg14", NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA7, 77, - "dss_data7", NULL, "uart1_rx", "dssvenc656_data7", - "gpio_77", "hw_dbg15", NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA8, 78, - "dss_data8", NULL, "uart3_rx_irrx", NULL, - "gpio_78", "hw_dbg16", NULL, "safe_mode"), - _OMAP3_MUXENTRY(DSS_DATA9, 79, - "dss_data9", NULL, "uart3_tx_irtx", NULL, - "gpio_79", "hw_dbg17", NULL, "safe_mode"), - _OMAP3_MUXENTRY(ETK_D12, 26, - "etk_d12", "sys_drm_msecure", NULL, "hsusb2_dir", - "gpio_26", NULL, "hsusb2_tll_dir", "hw_dbg14"), - _OMAP3_MUXENTRY(GPMC_A11, 0, - "gpmc_a11", NULL, NULL, NULL, - NULL, NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_WAIT2, 64, - "gpmc_wait2", NULL, "uart4_tx", NULL, - "gpio_64", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(GPMC_WAIT3, 65, - "gpmc_wait3", "sys_ndmareq1", "uart4_rx", NULL, - "gpio_65", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA0, 125, - "hsusb0_data0", NULL, "uart3_tx_irtx", NULL, - "gpio_125", "uart2_tx", NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA1, 130, - "hsusb0_data1", NULL, "uart3_rx_irrx", NULL, - "gpio_130", "uart2_rx", NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA2, 131, - "hsusb0_data2", NULL, "uart3_rts_sd", NULL, - "gpio_131", "uart2_rts", NULL, "safe_mode"), - _OMAP3_MUXENTRY(HSUSB0_DATA3, 169, - "hsusb0_data3", NULL, "uart3_cts_rctx", NULL, - "gpio_169", "uart2_cts", NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP1_CLKR, 156, - "mcbsp1_clkr", "mcspi4_clk", "sim_cd", NULL, - "gpio_156", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP1_FSR, 157, - "mcbsp1_fsr", "adpllv2d_dithering_en1", - "cam_global_reset", NULL, - "gpio_157", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(MCBSP4_CLKX, 152, - "mcbsp4_clkx", "ssi1_dat_rx", NULL, NULL, - "gpio_152", "hsusb3_tll_data1", "mm3_txse0", "safe_mode"), - _OMAP3_MUXENTRY(MCBSP4_DR, 153, - "mcbsp4_dr", "ssi1_flag_rx", NULL, NULL, - "gpio_153", "hsusb3_tll_data0", "mm3_rxrcv", "safe_mode"), - _OMAP3_MUXENTRY(MCBSP4_DX, 154, - "mcbsp4_dx", "ssi1_rdy_rx", NULL, NULL, - "gpio_154", "hsusb3_tll_data2", "mm3_txdat", "safe_mode"), - _OMAP3_MUXENTRY(MCBSP4_FSX, 155, - "mcbsp4_fsx", "ssi1_wake", NULL, NULL, - "gpio_155", "hsusb3_tll_data3", "mm3_txen_n", "safe_mode"), - _OMAP3_MUXENTRY(MCSPI1_CS1, 175, - "mcspi1_cs1", "adpllv2d_dithering_en2", NULL, "sdmmc3_cmd", - "gpio_175", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SAD2D_MBUSFLAG, 0, - "sad2d_mbusflag", "mad2d_sbusflag", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD28, 0, - "sad2d_mcad28", "mad2d_mcad28", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD29, 0, - "sad2d_mcad29", "mad2d_mcad29", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD32, 0, - "sad2d_mcad32", "mad2d_mcad32", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD33, 0, - "sad2d_mcad33", "mad2d_mcad33", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD34, 0, - "sad2d_mcad34", "mad2d_mcad34", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD35, 0, - "sad2d_mcad35", "mad2d_mcad35", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MCAD36, 0, - "sad2d_mcad36", "mad2d_mcad36", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MREAD, 0, - "sad2d_mread", "mad2d_sread", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_MWRITE, 0, - "sad2d_mwrite", "mad2d_swrite", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_SBUSFLAG, 0, - "sad2d_sbusflag", "mad2d_mbusflag", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_SREAD, 0, - "sad2d_sread", "mad2d_mread", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SAD2D_SWRITE, 0, - "sad2d_swrite", "mad2d_mwrite", NULL, NULL, - NULL, NULL, NULL, NULL), - _OMAP3_MUXENTRY(SDMMC1_CLK, 120, - "sdmmc1_clk", "ms_clk", NULL, NULL, - "gpio_120", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_CMD, 121, - "sdmmc1_cmd", "ms_bs", NULL, NULL, - "gpio_121", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT0, 122, - "sdmmc1_dat0", "ms_dat0", NULL, NULL, - "gpio_122", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT1, 123, - "sdmmc1_dat1", "ms_dat1", NULL, NULL, - "gpio_123", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT2, 124, - "sdmmc1_dat2", "ms_dat2", NULL, NULL, - "gpio_124", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDMMC1_DAT3, 125, - "sdmmc1_dat3", "ms_dat3", NULL, NULL, - "gpio_125", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SDRC_CKE0, 0, - "sdrc_cke0", NULL, NULL, NULL, - NULL, NULL, NULL, "safe_mode_out1"), - _OMAP3_MUXENTRY(SDRC_CKE1, 0, - "sdrc_cke1", NULL, NULL, NULL, - NULL, NULL, NULL, "safe_mode_out1"), - _OMAP3_MUXENTRY(SIM_IO, 126, - "sim_io", "sim_io_low_impedance", NULL, NULL, - "gpio_126", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SIM_CLK, 127, - "sim_clk", NULL, NULL, NULL, - "gpio_127", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SIM_PWRCTRL, 128, - "sim_pwrctrl", NULL, NULL, NULL, - "gpio_128", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SIM_RST, 129, - "sim_rst", NULL, NULL, NULL, - "gpio_129", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT0, 2, - "sys_boot0", NULL, NULL, "dss_data18", - "gpio_2", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT1, 3, - "sys_boot1", NULL, NULL, "dss_data19", - "gpio_3", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT3, 5, - "sys_boot3", NULL, NULL, "dss_data20", - "gpio_5", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT4, 6, - "sys_boot4", "sdmmc2_dir_dat2", NULL, "dss_data21", - "gpio_6", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT5, 7, - "sys_boot5", "sdmmc2_dir_dat3", NULL, "dss_data22", - "gpio_7", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(SYS_BOOT6, 8, - "sys_boot6", NULL, NULL, "dss_data23", - "gpio_8", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART1_CTS, 150, - "uart1_cts", "ssi1_rdy_tx", NULL, NULL, - "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART1_RTS, 149, - "uart1_rts", "ssi1_flag_tx", NULL, NULL, - "gpio_149", NULL, NULL, "safe_mode"), - _OMAP3_MUXENTRY(UART1_TX, 148, - "uart1_tx", "ssi1_dat_tx", NULL, NULL, - "gpio_148", NULL, NULL, "safe_mode"), - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#else -#define omap36xx_cbp_subset NULL -#endif - -/* - * Balls for 36XX CBP package - * 515-pin s-PBGA Package, 0.50mm Ball Pitch (Top), 0.40mm Ball Pitch (Bottom) - */ -#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \ - && defined (CONFIG_OMAP_PACKAGE_CBP) -static struct omap_ball __initdata omap36xx_cbp_ball[] = { - _OMAP3_BALLENTRY(CAM_D0, "ag17", NULL), - _OMAP3_BALLENTRY(CAM_D1, "ah17", NULL), - _OMAP3_BALLENTRY(CAM_D10, "b25", NULL), - _OMAP3_BALLENTRY(CAM_D11, "c26", NULL), - _OMAP3_BALLENTRY(CAM_D2, "b24", NULL), - _OMAP3_BALLENTRY(CAM_D3, "c24", NULL), - _OMAP3_BALLENTRY(CAM_D4, "d24", NULL), - _OMAP3_BALLENTRY(CAM_D5, "a25", NULL), - _OMAP3_BALLENTRY(CAM_D6, "k28", NULL), - _OMAP3_BALLENTRY(CAM_D7, "l28", NULL), - _OMAP3_BALLENTRY(CAM_D8, "k27", NULL), - _OMAP3_BALLENTRY(CAM_D9, "l27", NULL), - _OMAP3_BALLENTRY(CAM_FLD, "c23", NULL), - _OMAP3_BALLENTRY(CAM_HS, "a24", NULL), - _OMAP3_BALLENTRY(CAM_PCLK, "c27", NULL), - _OMAP3_BALLENTRY(CAM_STROBE, "d25", NULL), - _OMAP3_BALLENTRY(CAM_VS, "a23", NULL), - _OMAP3_BALLENTRY(CAM_WEN, "b23", NULL), - _OMAP3_BALLENTRY(CAM_XCLKA, "c25", NULL), - _OMAP3_BALLENTRY(CAM_XCLKB, "b26", NULL), - _OMAP3_BALLENTRY(CSI2_DX0, "ag19", NULL), - _OMAP3_BALLENTRY(CSI2_DX1, "ag18", NULL), - _OMAP3_BALLENTRY(CSI2_DY0, "ah19", NULL), - _OMAP3_BALLENTRY(CSI2_DY1, "ah18", NULL), - _OMAP3_BALLENTRY(DSS_ACBIAS, "e27", NULL), - _OMAP3_BALLENTRY(DSS_DATA0, "ag22", NULL), - _OMAP3_BALLENTRY(DSS_DATA1, "ah22", NULL), - _OMAP3_BALLENTRY(DSS_DATA10, "ad28", NULL), - _OMAP3_BALLENTRY(DSS_DATA11, "ad27", NULL), - _OMAP3_BALLENTRY(DSS_DATA12, "ab28", NULL), - _OMAP3_BALLENTRY(DSS_DATA13, "ab27", NULL), - _OMAP3_BALLENTRY(DSS_DATA14, "aa28", NULL), - _OMAP3_BALLENTRY(DSS_DATA15, "aa27", NULL), - _OMAP3_BALLENTRY(DSS_DATA16, "g25", NULL), - _OMAP3_BALLENTRY(DSS_DATA17, "h27", NULL), - _OMAP3_BALLENTRY(DSS_DATA18, "h26", NULL), - _OMAP3_BALLENTRY(DSS_DATA19, "h25", NULL), - _OMAP3_BALLENTRY(DSS_DATA2, "ag23", NULL), - _OMAP3_BALLENTRY(DSS_DATA20, "e28", NULL), - _OMAP3_BALLENTRY(DSS_DATA21, "j26", NULL), - _OMAP3_BALLENTRY(DSS_DATA22, "ac27", NULL), - _OMAP3_BALLENTRY(DSS_DATA23, "ac28", NULL), - _OMAP3_BALLENTRY(DSS_DATA3, "ah23", NULL), - _OMAP3_BALLENTRY(DSS_DATA4, "ag24", NULL), - _OMAP3_BALLENTRY(DSS_DATA5, "ah24", NULL), - _OMAP3_BALLENTRY(DSS_DATA6, "e26", NULL), - _OMAP3_BALLENTRY(DSS_DATA7, "f28", NULL), - _OMAP3_BALLENTRY(DSS_DATA8, "f27", NULL), - _OMAP3_BALLENTRY(DSS_DATA9, "g26", NULL), - _OMAP3_BALLENTRY(DSS_HSYNC, "d26", NULL), - _OMAP3_BALLENTRY(DSS_PCLK, "d28", NULL), - _OMAP3_BALLENTRY(DSS_VSYNC, "d27", NULL), - _OMAP3_BALLENTRY(ETK_CLK, "af10", NULL), - _OMAP3_BALLENTRY(ETK_CTL, "ae10", NULL), - _OMAP3_BALLENTRY(ETK_D0, "af11", NULL), - _OMAP3_BALLENTRY(ETK_D1, "ag12", NULL), - _OMAP3_BALLENTRY(ETK_D10, "ae7", NULL), - _OMAP3_BALLENTRY(ETK_D11, "af7", NULL), - _OMAP3_BALLENTRY(ETK_D12, "ag7", NULL), - _OMAP3_BALLENTRY(ETK_D13, "ah7", NULL), - _OMAP3_BALLENTRY(ETK_D14, "ag8", NULL), - _OMAP3_BALLENTRY(ETK_D15, "ah8", NULL), - _OMAP3_BALLENTRY(ETK_D2, "ah12", NULL), - _OMAP3_BALLENTRY(ETK_D3, "ae13", NULL), - _OMAP3_BALLENTRY(ETK_D4, "ae11", NULL), - _OMAP3_BALLENTRY(ETK_D5, "ah9", NULL), - _OMAP3_BALLENTRY(ETK_D6, "af13", NULL), - _OMAP3_BALLENTRY(ETK_D7, "ah14", NULL), - _OMAP3_BALLENTRY(ETK_D8, "af9", NULL), - _OMAP3_BALLENTRY(ETK_D9, "ag9", NULL), - _OMAP3_BALLENTRY(GPMC_A1, "n4", "ac15"), - _OMAP3_BALLENTRY(GPMC_A10, "k3", "ab19"), - _OMAP3_BALLENTRY(GPMC_A11, NULL, "ac20"), - _OMAP3_BALLENTRY(GPMC_A2, "m4", "ab15"), - _OMAP3_BALLENTRY(GPMC_A3, "l4", "ac16"), - _OMAP3_BALLENTRY(GPMC_A4, "k4", "ab16"), - _OMAP3_BALLENTRY(GPMC_A5, "t3", "ac17"), - _OMAP3_BALLENTRY(GPMC_A6, "r3", "ab17"), - _OMAP3_BALLENTRY(GPMC_A7, "n3", "ac18"), - _OMAP3_BALLENTRY(GPMC_A8, "m3", "ab18"), - _OMAP3_BALLENTRY(GPMC_A9, "l3", "ac19"), - _OMAP3_BALLENTRY(GPMC_CLK, "t4", "w2"), - _OMAP3_BALLENTRY(GPMC_D10, "p1", "ab4"), - _OMAP3_BALLENTRY(GPMC_D11, "r1", "ac4"), - _OMAP3_BALLENTRY(GPMC_D12, "r2", "ab6"), - _OMAP3_BALLENTRY(GPMC_D13, "t2", "ac6"), - _OMAP3_BALLENTRY(GPMC_D14, "w1", "ab7"), - _OMAP3_BALLENTRY(GPMC_D15, "y1", "ac7"), - _OMAP3_BALLENTRY(GPMC_D9, "k2", "ac3"), - _OMAP3_BALLENTRY(GPMC_NBE0_CLE, "g3", "ac12"), - _OMAP3_BALLENTRY(GPMC_NBE1, "u3", NULL), - _OMAP3_BALLENTRY(GPMC_NCS1, "h3", "y1"), - _OMAP3_BALLENTRY(GPMC_NCS2, "v8", NULL), - _OMAP3_BALLENTRY(GPMC_NCS3, "u8", NULL), - _OMAP3_BALLENTRY(GPMC_NCS4, "t8", NULL), - _OMAP3_BALLENTRY(GPMC_NCS5, "r8", NULL), - _OMAP3_BALLENTRY(GPMC_NCS6, "p8", NULL), - _OMAP3_BALLENTRY(GPMC_NCS7, "n8", NULL), - _OMAP3_BALLENTRY(GPMC_NWP, "h1", "ab10"), - _OMAP3_BALLENTRY(GPMC_WAIT1, "l8", "ac10"), - _OMAP3_BALLENTRY(GPMC_WAIT2, "k8", NULL), - _OMAP3_BALLENTRY(GPMC_WAIT3, "j8", NULL), - _OMAP3_BALLENTRY(HDQ_SIO, "j25", NULL), - _OMAP3_BALLENTRY(HSUSB0_CLK, "t28", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA0, "t27", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA1, "u28", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA2, "u27", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA3, "u26", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA4, "u25", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA5, "v28", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA6, "v27", NULL), - _OMAP3_BALLENTRY(HSUSB0_DATA7, "v26", NULL), - _OMAP3_BALLENTRY(HSUSB0_DIR, "r28", NULL), - _OMAP3_BALLENTRY(HSUSB0_NXT, "t26", NULL), - _OMAP3_BALLENTRY(HSUSB0_STP, "t25", NULL), - _OMAP3_BALLENTRY(I2C2_SCL, "af15", NULL), - _OMAP3_BALLENTRY(I2C2_SDA, "ae15", NULL), - _OMAP3_BALLENTRY(I2C3_SCL, "af14", NULL), - _OMAP3_BALLENTRY(I2C3_SDA, "ag14", NULL), - _OMAP3_BALLENTRY(I2C4_SCL, "ad26", NULL), - _OMAP3_BALLENTRY(I2C4_SDA, "ae26", NULL), - _OMAP3_BALLENTRY(JTAG_EMU0, "aa11", NULL), - _OMAP3_BALLENTRY(JTAG_EMU1, "aa10", NULL), - _OMAP3_BALLENTRY(MCBSP1_CLKR, "y21", NULL), - _OMAP3_BALLENTRY(MCBSP1_CLKX, "w21", NULL), - _OMAP3_BALLENTRY(MCBSP1_DR, "u21", NULL), - _OMAP3_BALLENTRY(MCBSP1_DX, "v21", NULL), - _OMAP3_BALLENTRY(MCBSP1_FSR, "aa21", NULL), - _OMAP3_BALLENTRY(MCBSP1_FSX, "k26", NULL), - _OMAP3_BALLENTRY(MCBSP2_CLKX, "n21", NULL), - _OMAP3_BALLENTRY(MCBSP2_DR, "r21", NULL), - _OMAP3_BALLENTRY(MCBSP2_DX, "m21", NULL), - _OMAP3_BALLENTRY(MCBSP2_FSX, "p21", NULL), - _OMAP3_BALLENTRY(MCBSP3_CLKX, "af5", NULL), - _OMAP3_BALLENTRY(MCBSP3_DR, "ae6", NULL), - _OMAP3_BALLENTRY(MCBSP3_DX, "af6", NULL), - _OMAP3_BALLENTRY(MCBSP3_FSX, "ae5", NULL), - _OMAP3_BALLENTRY(MCBSP4_CLKX, "ae1", NULL), - _OMAP3_BALLENTRY(MCBSP4_DR, "ad1", NULL), - _OMAP3_BALLENTRY(MCBSP4_DX, "ad2", NULL), - _OMAP3_BALLENTRY(MCBSP4_FSX, "ac1", NULL), - _OMAP3_BALLENTRY(MCBSP_CLKS, "t21", NULL), - _OMAP3_BALLENTRY(MCSPI1_CLK, "ab3", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS0, "ac2", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS1, "ac3", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS2, "ab1", NULL), - _OMAP3_BALLENTRY(MCSPI1_CS3, "ab2", NULL), - _OMAP3_BALLENTRY(MCSPI1_SIMO, "ab4", NULL), - _OMAP3_BALLENTRY(MCSPI1_SOMI, "aa4", NULL), - _OMAP3_BALLENTRY(MCSPI2_CLK, "aa3", NULL), - _OMAP3_BALLENTRY(MCSPI2_CS0, "y4", NULL), - _OMAP3_BALLENTRY(MCSPI2_CS1, "v3", NULL), - _OMAP3_BALLENTRY(MCSPI2_SIMO, "y2", NULL), - _OMAP3_BALLENTRY(MCSPI2_SOMI, "y3", NULL), - _OMAP3_BALLENTRY(SDMMC1_CLK, "n28", NULL), - _OMAP3_BALLENTRY(SDMMC1_CMD, "m27", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT0, "n27", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT1, "n26", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT2, "n25", NULL), - _OMAP3_BALLENTRY(SDMMC1_DAT3, "p28", NULL), - _OMAP3_BALLENTRY(SDMMC2_CLK, "ae2", NULL), - _OMAP3_BALLENTRY(SDMMC2_CMD, "ag5", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT0, "ah5", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT1, "ah4", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT2, "ag4", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT3, "af4", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT4, "ae4", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT5, "ah3", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT6, "af3", NULL), - _OMAP3_BALLENTRY(SDMMC2_DAT7, "ae3", NULL), - _OMAP3_BALLENTRY(SDRC_CKE0, "h16", "j22"), - _OMAP3_BALLENTRY(SDRC_CKE1, "h17", "j23"), - _OMAP3_BALLENTRY(SIM_CLK, "p26", NULL), - _OMAP3_BALLENTRY(SIM_IO, "p27", NULL), - _OMAP3_BALLENTRY(SIM_PWRCTRL, "r27", NULL), - _OMAP3_BALLENTRY(SIM_RST, "r25", NULL), - _OMAP3_BALLENTRY(SYS_BOOT0, "ah26", NULL), - _OMAP3_BALLENTRY(SYS_BOOT1, "ag26", NULL), - _OMAP3_BALLENTRY(SYS_BOOT2, "ae14", NULL), - _OMAP3_BALLENTRY(SYS_BOOT3, "af18", NULL), - _OMAP3_BALLENTRY(SYS_BOOT4, "af19", NULL), - _OMAP3_BALLENTRY(SYS_BOOT5, "ae21", NULL), - _OMAP3_BALLENTRY(SYS_BOOT6, "af21", NULL), - _OMAP3_BALLENTRY(SYS_CLKOUT1, "ag25", NULL), - _OMAP3_BALLENTRY(SYS_CLKOUT2, "ae22", NULL), - _OMAP3_BALLENTRY(SYS_CLKREQ, "af25", NULL), - _OMAP3_BALLENTRY(SYS_NIRQ, "af26", NULL), - _OMAP3_BALLENTRY(SYS_NRESWARM, "af24", NULL), - _OMAP3_BALLENTRY(SYS_OFF_MODE, "af22", NULL), - _OMAP3_BALLENTRY(UART1_CTS, "w8", NULL), - _OMAP3_BALLENTRY(UART1_RTS, "aa9", NULL), - _OMAP3_BALLENTRY(UART1_RX, "y8", NULL), - _OMAP3_BALLENTRY(UART1_TX, "aa8", NULL), - _OMAP3_BALLENTRY(UART2_CTS, "ab26", NULL), - _OMAP3_BALLENTRY(UART2_RTS, "ab25", NULL), - _OMAP3_BALLENTRY(UART2_RX, "ad25", NULL), - _OMAP3_BALLENTRY(UART2_TX, "aa25", NULL), - _OMAP3_BALLENTRY(UART3_CTS_RCTX, "h18", NULL), - _OMAP3_BALLENTRY(UART3_RTS_SD, "h19", NULL), - _OMAP3_BALLENTRY(UART3_RX_IRRX, "h20", NULL), - _OMAP3_BALLENTRY(UART3_TX_IRTX, "h21", NULL), - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#else -#define omap36xx_cbp_ball NULL -#endif - -int __init omap3_mux_init(struct omap_board_mux *board_subset, int flags) -{ - struct omap_mux *package_subset; - struct omap_ball *package_balls; - - switch (flags & OMAP_PACKAGE_MASK) { - case OMAP_PACKAGE_CBC: - package_subset = omap3_cbc_subset; - package_balls = omap3_cbc_ball; - break; - case OMAP_PACKAGE_CBB: - package_subset = omap3_cbb_subset; - package_balls = omap3_cbb_ball; - break; - case OMAP_PACKAGE_CUS: - package_subset = omap3_cus_subset; - package_balls = omap3_cus_ball; - break; - case OMAP_PACKAGE_CBP: - package_subset = omap36xx_cbp_subset; - package_balls = omap36xx_cbp_ball; - break; - default: - pr_err("%s Unknown omap package, mux disabled\n", __func__); - return -EINVAL; - } - - return omap_mux_init("core", OMAP_MUX_GPIO_IN_MODE4, - OMAP3_CONTROL_PADCONF_MUX_PBASE, - OMAP3_CONTROL_PADCONF_MUX_SIZE, - omap3_muxmodes, package_subset, board_subset, - package_balls); -} diff --git a/arch/arm/mach-omap2/mux34xx.h b/arch/arm/mach-omap2/mux34xx.h deleted file mode 100644 index 3f26d297c082..000000000000 --- a/arch/arm/mach-omap2/mux34xx.h +++ /dev/null @@ -1,402 +0,0 @@ -/* - * Copyright (C) 2009 Nokia - * Copyright (C) 2009 Texas Instruments - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#define OMAP3_CONTROL_PADCONF_MUX_PBASE 0x48002030LU - -#define OMAP3_MUX(mode0, mux_value) \ -{ \ - .reg_offset = (OMAP3_CONTROL_PADCONF_##mode0##_OFFSET), \ - .value = (mux_value), \ -} - -/* - * OMAP3 CONTROL_PADCONF* register offsets for pin-muxing - * - * Extracted from the TRM. Add 0x48002030 to these values to get the - * absolute addresses. The name in the macro is the mode-0 name of - * the pin. NOTE: These registers are 16-bits wide. - * - * Note that 34XX TRM uses MMC instead of SDMMC and SAD2D instead - * of CHASSIS for some registers. For the defines, we follow the - * 36XX naming, and use SDMMC and CHASSIS. - */ -#define OMAP3_CONTROL_PADCONF_SDRC_D0_OFFSET 0x000 -#define OMAP3_CONTROL_PADCONF_SDRC_D1_OFFSET 0x002 -#define OMAP3_CONTROL_PADCONF_SDRC_D2_OFFSET 0x004 -#define OMAP3_CONTROL_PADCONF_SDRC_D3_OFFSET 0x006 -#define OMAP3_CONTROL_PADCONF_SDRC_D4_OFFSET 0x008 -#define OMAP3_CONTROL_PADCONF_SDRC_D5_OFFSET 0x00a -#define OMAP3_CONTROL_PADCONF_SDRC_D6_OFFSET 0x00c -#define OMAP3_CONTROL_PADCONF_SDRC_D7_OFFSET 0x00e -#define OMAP3_CONTROL_PADCONF_SDRC_D8_OFFSET 0x010 -#define OMAP3_CONTROL_PADCONF_SDRC_D9_OFFSET 0x012 -#define OMAP3_CONTROL_PADCONF_SDRC_D10_OFFSET 0x014 -#define OMAP3_CONTROL_PADCONF_SDRC_D11_OFFSET 0x016 -#define OMAP3_CONTROL_PADCONF_SDRC_D12_OFFSET 0x018 -#define OMAP3_CONTROL_PADCONF_SDRC_D13_OFFSET 0x01a -#define OMAP3_CONTROL_PADCONF_SDRC_D14_OFFSET 0x01c -#define OMAP3_CONTROL_PADCONF_SDRC_D15_OFFSET 0x01e -#define OMAP3_CONTROL_PADCONF_SDRC_D16_OFFSET 0x020 -#define OMAP3_CONTROL_PADCONF_SDRC_D17_OFFSET 0x022 -#define OMAP3_CONTROL_PADCONF_SDRC_D18_OFFSET 0x024 -#define OMAP3_CONTROL_PADCONF_SDRC_D19_OFFSET 0x026 -#define OMAP3_CONTROL_PADCONF_SDRC_D20_OFFSET 0x028 -#define OMAP3_CONTROL_PADCONF_SDRC_D21_OFFSET 0x02a -#define OMAP3_CONTROL_PADCONF_SDRC_D22_OFFSET 0x02c -#define OMAP3_CONTROL_PADCONF_SDRC_D23_OFFSET 0x02e -#define OMAP3_CONTROL_PADCONF_SDRC_D24_OFFSET 0x030 -#define OMAP3_CONTROL_PADCONF_SDRC_D25_OFFSET 0x032 -#define OMAP3_CONTROL_PADCONF_SDRC_D26_OFFSET 0x034 -#define OMAP3_CONTROL_PADCONF_SDRC_D27_OFFSET 0x036 -#define OMAP3_CONTROL_PADCONF_SDRC_D28_OFFSET 0x038 -#define OMAP3_CONTROL_PADCONF_SDRC_D29_OFFSET 0x03a -#define OMAP3_CONTROL_PADCONF_SDRC_D30_OFFSET 0x03c -#define OMAP3_CONTROL_PADCONF_SDRC_D31_OFFSET 0x03e -#define OMAP3_CONTROL_PADCONF_SDRC_CLK_OFFSET 0x040 -#define OMAP3_CONTROL_PADCONF_SDRC_DQS0_OFFSET 0x042 -#define OMAP3_CONTROL_PADCONF_SDRC_DQS1_OFFSET 0x044 -#define OMAP3_CONTROL_PADCONF_SDRC_DQS2_OFFSET 0x046 -#define OMAP3_CONTROL_PADCONF_SDRC_DQS3_OFFSET 0x048 -#define OMAP3_CONTROL_PADCONF_GPMC_A1_OFFSET 0x04a -#define OMAP3_CONTROL_PADCONF_GPMC_A2_OFFSET 0x04c -#define OMAP3_CONTROL_PADCONF_GPMC_A3_OFFSET 0x04e -#define OMAP3_CONTROL_PADCONF_GPMC_A4_OFFSET 0x050 -#define OMAP3_CONTROL_PADCONF_GPMC_A5_OFFSET 0x052 -#define OMAP3_CONTROL_PADCONF_GPMC_A6_OFFSET 0x054 -#define OMAP3_CONTROL_PADCONF_GPMC_A7_OFFSET 0x056 -#define OMAP3_CONTROL_PADCONF_GPMC_A8_OFFSET 0x058 -#define OMAP3_CONTROL_PADCONF_GPMC_A9_OFFSET 0x05a -#define OMAP3_CONTROL_PADCONF_GPMC_A10_OFFSET 0x05c -#define OMAP3_CONTROL_PADCONF_GPMC_D0_OFFSET 0x05e -#define OMAP3_CONTROL_PADCONF_GPMC_D1_OFFSET 0x060 -#define OMAP3_CONTROL_PADCONF_GPMC_D2_OFFSET 0x062 -#define OMAP3_CONTROL_PADCONF_GPMC_D3_OFFSET 0x064 -#define OMAP3_CONTROL_PADCONF_GPMC_D4_OFFSET 0x066 -#define OMAP3_CONTROL_PADCONF_GPMC_D5_OFFSET 0x068 -#define OMAP3_CONTROL_PADCONF_GPMC_D6_OFFSET 0x06a -#define OMAP3_CONTROL_PADCONF_GPMC_D7_OFFSET 0x06c -#define OMAP3_CONTROL_PADCONF_GPMC_D8_OFFSET 0x06e -#define OMAP3_CONTROL_PADCONF_GPMC_D9_OFFSET 0x070 -#define OMAP3_CONTROL_PADCONF_GPMC_D10_OFFSET 0x072 -#define OMAP3_CONTROL_PADCONF_GPMC_D11_OFFSET 0x074 -#define OMAP3_CONTROL_PADCONF_GPMC_D12_OFFSET 0x076 -#define OMAP3_CONTROL_PADCONF_GPMC_D13_OFFSET 0x078 -#define OMAP3_CONTROL_PADCONF_GPMC_D14_OFFSET 0x07a -#define OMAP3_CONTROL_PADCONF_GPMC_D15_OFFSET 0x07c -#define OMAP3_CONTROL_PADCONF_GPMC_NCS0_OFFSET 0x07e -#define OMAP3_CONTROL_PADCONF_GPMC_NCS1_OFFSET 0x080 -#define OMAP3_CONTROL_PADCONF_GPMC_NCS2_OFFSET 0x082 -#define OMAP3_CONTROL_PADCONF_GPMC_NCS3_OFFSET 0x084 -#define OMAP3_CONTROL_PADCONF_GPMC_NCS4_OFFSET 0x086 -#define OMAP3_CONTROL_PADCONF_GPMC_NCS5_OFFSET 0x088 -#define OMAP3_CONTROL_PADCONF_GPMC_NCS6_OFFSET 0x08a -#define OMAP3_CONTROL_PADCONF_GPMC_NCS7_OFFSET 0x08c -#define OMAP3_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x08e -#define OMAP3_CONTROL_PADCONF_GPMC_NADV_ALE_OFFSET 0x090 -#define OMAP3_CONTROL_PADCONF_GPMC_NOE_OFFSET 0x092 -#define OMAP3_CONTROL_PADCONF_GPMC_NWE_OFFSET 0x094 -#define OMAP3_CONTROL_PADCONF_GPMC_NBE0_CLE_OFFSET 0x096 -#define OMAP3_CONTROL_PADCONF_GPMC_NBE1_OFFSET 0x098 -#define OMAP3_CONTROL_PADCONF_GPMC_NWP_OFFSET 0x09a -#define OMAP3_CONTROL_PADCONF_GPMC_WAIT0_OFFSET 0x09c -#define OMAP3_CONTROL_PADCONF_GPMC_WAIT1_OFFSET 0x09e -#define OMAP3_CONTROL_PADCONF_GPMC_WAIT2_OFFSET 0x0a0 -#define OMAP3_CONTROL_PADCONF_GPMC_WAIT3_OFFSET 0x0a2 -#define OMAP3_CONTROL_PADCONF_DSS_PCLK_OFFSET 0x0a4 -#define OMAP3_CONTROL_PADCONF_DSS_HSYNC_OFFSET 0x0a6 -#define OMAP3_CONTROL_PADCONF_DSS_VSYNC_OFFSET 0x0a8 -#define OMAP3_CONTROL_PADCONF_DSS_ACBIAS_OFFSET 0x0aa -#define OMAP3_CONTROL_PADCONF_DSS_DATA0_OFFSET 0x0ac -#define OMAP3_CONTROL_PADCONF_DSS_DATA1_OFFSET 0x0ae -#define OMAP3_CONTROL_PADCONF_DSS_DATA2_OFFSET 0x0b0 -#define OMAP3_CONTROL_PADCONF_DSS_DATA3_OFFSET 0x0b2 -#define OMAP3_CONTROL_PADCONF_DSS_DATA4_OFFSET 0x0b4 -#define OMAP3_CONTROL_PADCONF_DSS_DATA5_OFFSET 0x0b6 -#define OMAP3_CONTROL_PADCONF_DSS_DATA6_OFFSET 0x0b8 -#define OMAP3_CONTROL_PADCONF_DSS_DATA7_OFFSET 0x0ba -#define OMAP3_CONTROL_PADCONF_DSS_DATA8_OFFSET 0x0bc -#define OMAP3_CONTROL_PADCONF_DSS_DATA9_OFFSET 0x0be -#define OMAP3_CONTROL_PADCONF_DSS_DATA10_OFFSET 0x0c0 -#define OMAP3_CONTROL_PADCONF_DSS_DATA11_OFFSET 0x0c2 -#define OMAP3_CONTROL_PADCONF_DSS_DATA12_OFFSET 0x0c4 -#define OMAP3_CONTROL_PADCONF_DSS_DATA13_OFFSET 0x0c6 -#define OMAP3_CONTROL_PADCONF_DSS_DATA14_OFFSET 0x0c8 -#define OMAP3_CONTROL_PADCONF_DSS_DATA15_OFFSET 0x0ca -#define OMAP3_CONTROL_PADCONF_DSS_DATA16_OFFSET 0x0cc -#define OMAP3_CONTROL_PADCONF_DSS_DATA17_OFFSET 0x0ce -#define OMAP3_CONTROL_PADCONF_DSS_DATA18_OFFSET 0x0d0 -#define OMAP3_CONTROL_PADCONF_DSS_DATA19_OFFSET 0x0d2 -#define OMAP3_CONTROL_PADCONF_DSS_DATA20_OFFSET 0x0d4 -#define OMAP3_CONTROL_PADCONF_DSS_DATA21_OFFSET 0x0d6 -#define OMAP3_CONTROL_PADCONF_DSS_DATA22_OFFSET 0x0d8 -#define OMAP3_CONTROL_PADCONF_DSS_DATA23_OFFSET 0x0da -#define OMAP3_CONTROL_PADCONF_CAM_HS_OFFSET 0x0dc -#define OMAP3_CONTROL_PADCONF_CAM_VS_OFFSET 0x0de -#define OMAP3_CONTROL_PADCONF_CAM_XCLKA_OFFSET 0x0e0 -#define OMAP3_CONTROL_PADCONF_CAM_PCLK_OFFSET 0x0e2 -#define OMAP3_CONTROL_PADCONF_CAM_FLD_OFFSET 0x0e4 -#define OMAP3_CONTROL_PADCONF_CAM_D0_OFFSET 0x0e6 -#define OMAP3_CONTROL_PADCONF_CAM_D1_OFFSET 0x0e8 -#define OMAP3_CONTROL_PADCONF_CAM_D2_OFFSET 0x0ea -#define OMAP3_CONTROL_PADCONF_CAM_D3_OFFSET 0x0ec -#define OMAP3_CONTROL_PADCONF_CAM_D4_OFFSET 0x0ee -#define OMAP3_CONTROL_PADCONF_CAM_D5_OFFSET 0x0f0 -#define OMAP3_CONTROL_PADCONF_CAM_D6_OFFSET 0x0f2 -#define OMAP3_CONTROL_PADCONF_CAM_D7_OFFSET 0x0f4 -#define OMAP3_CONTROL_PADCONF_CAM_D8_OFFSET 0x0f6 -#define OMAP3_CONTROL_PADCONF_CAM_D9_OFFSET 0x0f8 -#define OMAP3_CONTROL_PADCONF_CAM_D10_OFFSET 0x0fa -#define OMAP3_CONTROL_PADCONF_CAM_D11_OFFSET 0x0fc -#define OMAP3_CONTROL_PADCONF_CAM_XCLKB_OFFSET 0x0fe -#define OMAP3_CONTROL_PADCONF_CAM_WEN_OFFSET 0x100 -#define OMAP3_CONTROL_PADCONF_CAM_STROBE_OFFSET 0x102 -#define OMAP3_CONTROL_PADCONF_CSI2_DX0_OFFSET 0x104 -#define OMAP3_CONTROL_PADCONF_CSI2_DY0_OFFSET 0x106 -#define OMAP3_CONTROL_PADCONF_CSI2_DX1_OFFSET 0x108 -#define OMAP3_CONTROL_PADCONF_CSI2_DY1_OFFSET 0x10a -#define OMAP3_CONTROL_PADCONF_MCBSP2_FSX_OFFSET 0x10c -#define OMAP3_CONTROL_PADCONF_MCBSP2_CLKX_OFFSET 0x10e -#define OMAP3_CONTROL_PADCONF_MCBSP2_DR_OFFSET 0x110 -#define OMAP3_CONTROL_PADCONF_MCBSP2_DX_OFFSET 0x112 -#define OMAP3_CONTROL_PADCONF_SDMMC1_CLK_OFFSET 0x114 -#define OMAP3_CONTROL_PADCONF_SDMMC1_CMD_OFFSET 0x116 -#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT0_OFFSET 0x118 -#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT1_OFFSET 0x11a -#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT2_OFFSET 0x11c -#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT3_OFFSET 0x11e - -/* SDMMC1_DAT4 - DAT7 are SIM_IO SIM_CLK SIM_PWRCTRL and SIM_RST on 36xx */ -#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT4_OFFSET 0x120 -#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT5_OFFSET 0x122 -#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT6_OFFSET 0x124 -#define OMAP3_CONTROL_PADCONF_SDMMC1_DAT7_OFFSET 0x126 - -#define OMAP3_CONTROL_PADCONF_SDMMC2_CLK_OFFSET 0x128 -#define OMAP3_CONTROL_PADCONF_SDMMC2_CMD_OFFSET 0x12a -#define OMAP3_CONTROL_PADCONF_SDMMC2_DAT0_OFFSET 0x12c -#define OMAP3_CONTROL_PADCONF_SDMMC2_DAT1_OFFSET 0x12e -#define OMAP3_CONTROL_PADCONF_SDMMC2_DAT2_OFFSET 0x130 -#define OMAP3_CONTROL_PADCONF_SDMMC2_DAT3_OFFSET 0x132 -#define OMAP3_CONTROL_PADCONF_SDMMC2_DAT4_OFFSET 0x134 -#define OMAP3_CONTROL_PADCONF_SDMMC2_DAT5_OFFSET 0x136 -#define OMAP3_CONTROL_PADCONF_SDMMC2_DAT6_OFFSET 0x138 -#define OMAP3_CONTROL_PADCONF_SDMMC2_DAT7_OFFSET 0x13a -#define OMAP3_CONTROL_PADCONF_MCBSP3_DX_OFFSET 0x13c -#define OMAP3_CONTROL_PADCONF_MCBSP3_DR_OFFSET 0x13e -#define OMAP3_CONTROL_PADCONF_MCBSP3_CLKX_OFFSET 0x140 -#define OMAP3_CONTROL_PADCONF_MCBSP3_FSX_OFFSET 0x142 -#define OMAP3_CONTROL_PADCONF_UART2_CTS_OFFSET 0x144 -#define OMAP3_CONTROL_PADCONF_UART2_RTS_OFFSET 0x146 -#define OMAP3_CONTROL_PADCONF_UART2_TX_OFFSET 0x148 -#define OMAP3_CONTROL_PADCONF_UART2_RX_OFFSET 0x14a -#define OMAP3_CONTROL_PADCONF_UART1_TX_OFFSET 0x14c -#define OMAP3_CONTROL_PADCONF_UART1_RTS_OFFSET 0x14e -#define OMAP3_CONTROL_PADCONF_UART1_CTS_OFFSET 0x150 -#define OMAP3_CONTROL_PADCONF_UART1_RX_OFFSET 0x152 -#define OMAP3_CONTROL_PADCONF_MCBSP4_CLKX_OFFSET 0x154 -#define OMAP3_CONTROL_PADCONF_MCBSP4_DR_OFFSET 0x156 -#define OMAP3_CONTROL_PADCONF_MCBSP4_DX_OFFSET 0x158 -#define OMAP3_CONTROL_PADCONF_MCBSP4_FSX_OFFSET 0x15a -#define OMAP3_CONTROL_PADCONF_MCBSP1_CLKR_OFFSET 0x15c -#define OMAP3_CONTROL_PADCONF_MCBSP1_FSR_OFFSET 0x15e -#define OMAP3_CONTROL_PADCONF_MCBSP1_DX_OFFSET 0x160 -#define OMAP3_CONTROL_PADCONF_MCBSP1_DR_OFFSET 0x162 -#define OMAP3_CONTROL_PADCONF_MCBSP_CLKS_OFFSET 0x164 -#define OMAP3_CONTROL_PADCONF_MCBSP1_FSX_OFFSET 0x166 -#define OMAP3_CONTROL_PADCONF_MCBSP1_CLKX_OFFSET 0x168 -#define OMAP3_CONTROL_PADCONF_UART3_CTS_RCTX_OFFSET 0x16a -#define OMAP3_CONTROL_PADCONF_UART3_RTS_SD_OFFSET 0x16c -#define OMAP3_CONTROL_PADCONF_UART3_RX_IRRX_OFFSET 0x16e -#define OMAP3_CONTROL_PADCONF_UART3_TX_IRTX_OFFSET 0x170 -#define OMAP3_CONTROL_PADCONF_HSUSB0_CLK_OFFSET 0x172 -#define OMAP3_CONTROL_PADCONF_HSUSB0_STP_OFFSET 0x174 -#define OMAP3_CONTROL_PADCONF_HSUSB0_DIR_OFFSET 0x176 -#define OMAP3_CONTROL_PADCONF_HSUSB0_NXT_OFFSET 0x178 -#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA0_OFFSET 0x17a -#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA1_OFFSET 0x17c -#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA2_OFFSET 0x17e -#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA3_OFFSET 0x180 -#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA4_OFFSET 0x182 -#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA5_OFFSET 0x184 -#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA6_OFFSET 0x186 -#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA7_OFFSET 0x188 -#define OMAP3_CONTROL_PADCONF_I2C1_SCL_OFFSET 0x18a -#define OMAP3_CONTROL_PADCONF_I2C1_SDA_OFFSET 0x18c -#define OMAP3_CONTROL_PADCONF_I2C2_SCL_OFFSET 0x18e -#define OMAP3_CONTROL_PADCONF_I2C2_SDA_OFFSET 0x190 -#define OMAP3_CONTROL_PADCONF_I2C3_SCL_OFFSET 0x192 -#define OMAP3_CONTROL_PADCONF_I2C3_SDA_OFFSET 0x194 -#define OMAP3_CONTROL_PADCONF_HDQ_SIO_OFFSET 0x196 -#define OMAP3_CONTROL_PADCONF_MCSPI1_CLK_OFFSET 0x198 -#define OMAP3_CONTROL_PADCONF_MCSPI1_SIMO_OFFSET 0x19a -#define OMAP3_CONTROL_PADCONF_MCSPI1_SOMI_OFFSET 0x19c -#define OMAP3_CONTROL_PADCONF_MCSPI1_CS0_OFFSET 0x19e -#define OMAP3_CONTROL_PADCONF_MCSPI1_CS1_OFFSET 0x1a0 -#define OMAP3_CONTROL_PADCONF_MCSPI1_CS2_OFFSET 0x1a2 -#define OMAP3_CONTROL_PADCONF_MCSPI1_CS3_OFFSET 0x1a4 -#define OMAP3_CONTROL_PADCONF_MCSPI2_CLK_OFFSET 0x1a6 -#define OMAP3_CONTROL_PADCONF_MCSPI2_SIMO_OFFSET 0x1a8 -#define OMAP3_CONTROL_PADCONF_MCSPI2_SOMI_OFFSET 0x1aa -#define OMAP3_CONTROL_PADCONF_MCSPI2_CS0_OFFSET 0x1ac -#define OMAP3_CONTROL_PADCONF_MCSPI2_CS1_OFFSET 0x1ae -#define OMAP3_CONTROL_PADCONF_SYS_NIRQ_OFFSET 0x1b0 -#define OMAP3_CONTROL_PADCONF_SYS_CLKOUT2_OFFSET 0x1b2 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD0_OFFSET 0x1b4 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD1_OFFSET 0x1b6 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD2_OFFSET 0x1b8 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD3_OFFSET 0x1ba -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD4_OFFSET 0x1bc -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD5_OFFSET 0x1be -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD6_OFFSET 0x1c0 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD7_OFFSET 0x1c2 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD8_OFFSET 0x1c4 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD9_OFFSET 0x1c6 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD10_OFFSET 0x1c8 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD11_OFFSET 0x1ca -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD12_OFFSET 0x1cc -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD13_OFFSET 0x1ce -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD14_OFFSET 0x1d0 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD15_OFFSET 0x1d2 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD16_OFFSET 0x1d4 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD17_OFFSET 0x1d6 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD18_OFFSET 0x1d8 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD19_OFFSET 0x1da -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD20_OFFSET 0x1dc -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD21_OFFSET 0x1de -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD22_OFFSET 0x1e0 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD23_OFFSET 0x1e2 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD24_OFFSET 0x1e4 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD25_OFFSET 0x1e6 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD26_OFFSET 0x1e8 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD27_OFFSET 0x1ea -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD28_OFFSET 0x1ec -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD29_OFFSET 0x1ee -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD30_OFFSET 0x1f0 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD31_OFFSET 0x1f2 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD32_OFFSET 0x1f4 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD33_OFFSET 0x1f6 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD34_OFFSET 0x1f8 -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD35_OFFSET 0x1fa -#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD36_OFFSET 0x1fc - -/* Note that 34xx TRM has SAD2D instead of CHASSIS for these */ -#define OMAP3_CONTROL_PADCONF_CHASSIS_CLK26MI_OFFSET 0x1fe -#define OMAP3_CONTROL_PADCONF_CHASSIS_NRESPWRON_OFFSET 0x200 -#define OMAP3_CONTROL_PADCONF_CHASSIS_NRESWARW_OFFSET 0x202 -#define OMAP3_CONTROL_PADCONF_CHASSIS_NIRQ_OFFSET 0x204 -#define OMAP3_CONTROL_PADCONF_CHASSIS_FIQ_OFFSET 0x206 -#define OMAP3_CONTROL_PADCONF_CHASSIS_ARMIRQ_OFFSET 0x208 -#define OMAP3_CONTROL_PADCONF_CHASSIS_IVAIRQ_OFFSET 0x20a -#define OMAP3_CONTROL_PADCONF_CHASSIS_DMAREQ0_OFFSET 0x20c -#define OMAP3_CONTROL_PADCONF_CHASSIS_DMAREQ1_OFFSET 0x20e -#define OMAP3_CONTROL_PADCONF_CHASSIS_DMAREQ2_OFFSET 0x210 -#define OMAP3_CONTROL_PADCONF_CHASSIS_DMAREQ3_OFFSET 0x212 -#define OMAP3_CONTROL_PADCONF_CHASSIS_NTRST_OFFSET 0x214 -#define OMAP3_CONTROL_PADCONF_CHASSIS_TDI_OFFSET 0x216 -#define OMAP3_CONTROL_PADCONF_CHASSIS_TDO_OFFSET 0x218 -#define OMAP3_CONTROL_PADCONF_CHASSIS_TMS_OFFSET 0x21a -#define OMAP3_CONTROL_PADCONF_CHASSIS_TCK_OFFSET 0x21c -#define OMAP3_CONTROL_PADCONF_CHASSIS_RTCK_OFFSET 0x21e -#define OMAP3_CONTROL_PADCONF_CHASSIS_MSTDBY_OFFSET 0x220 -#define OMAP3_CONTROL_PADCONF_CHASSIS_IDLEREQ_OFFSET 0x222 -#define OMAP3_CONTROL_PADCONF_CHASSIS_IDLEACK_OFFSET 0x224 - -#define OMAP3_CONTROL_PADCONF_SAD2D_MWRITE_OFFSET 0x226 -#define OMAP3_CONTROL_PADCONF_SAD2D_SWRITE_OFFSET 0x228 -#define OMAP3_CONTROL_PADCONF_SAD2D_MREAD_OFFSET 0x22a -#define OMAP3_CONTROL_PADCONF_SAD2D_SREAD_OFFSET 0x22c -#define OMAP3_CONTROL_PADCONF_SAD2D_MBUSFLAG_OFFSET 0x22e -#define OMAP3_CONTROL_PADCONF_SAD2D_SBUSFLAG_OFFSET 0x230 -#define OMAP3_CONTROL_PADCONF_SDRC_CKE0_OFFSET 0x232 -#define OMAP3_CONTROL_PADCONF_SDRC_CKE1_OFFSET 0x234 - -/* 36xx only */ -#define OMAP3_CONTROL_PADCONF_GPMC_A11_OFFSET 0x236 -#define OMAP3_CONTROL_PADCONF_SDRC_BA0_OFFSET 0x570 -#define OMAP3_CONTROL_PADCONF_SDRC_BA1_OFFSET 0x572 -#define OMAP3_CONTROL_PADCONF_SDRC_A0_OFFSET 0x574 -#define OMAP3_CONTROL_PADCONF_SDRC_A1_OFFSET 0x576 -#define OMAP3_CONTROL_PADCONF_SDRC_A2_OFFSET 0x578 -#define OMAP3_CONTROL_PADCONF_SDRC_A3_OFFSET 0x57a -#define OMAP3_CONTROL_PADCONF_SDRC_A4_OFFSET 0x57c -#define OMAP3_CONTROL_PADCONF_SDRC_A5_OFFSET 0x57e -#define OMAP3_CONTROL_PADCONF_SDRC_A6_OFFSET 0x580 -#define OMAP3_CONTROL_PADCONF_SDRC_A7_OFFSET 0x582 -#define OMAP3_CONTROL_PADCONF_SDRC_A8_OFFSET 0x584 -#define OMAP3_CONTROL_PADCONF_SDRC_A9_OFFSET 0x586 -#define OMAP3_CONTROL_PADCONF_SDRC_A10_OFFSET 0x588 -#define OMAP3_CONTROL_PADCONF_SDRC_A11_OFFSET 0x58a -#define OMAP3_CONTROL_PADCONF_SDRC_A12_OFFSET 0x58c -#define OMAP3_CONTROL_PADCONF_SDRC_A13_OFFSET 0x58e -#define OMAP3_CONTROL_PADCONF_SDRC_A14_OFFSET 0x590 -#define OMAP3_CONTROL_PADCONF_SDRC_NCS0_OFFSET 0x592 -#define OMAP3_CONTROL_PADCONF_SDRC_NCS1_OFFSET 0x594 -#define OMAP3_CONTROL_PADCONF_SDRC_NCLK_OFFSET 0x596 -#define OMAP3_CONTROL_PADCONF_SDRC_NRAS_OFFSET 0x598 -#define OMAP3_CONTROL_PADCONF_SDRC_NCAS_OFFSET 0x59a -#define OMAP3_CONTROL_PADCONF_SDRC_NWE_OFFSET 0x59c -#define OMAP3_CONTROL_PADCONF_SDRC_DM0_OFFSET 0x59e -#define OMAP3_CONTROL_PADCONF_SDRC_DM1_OFFSET 0x5a0 -#define OMAP3_CONTROL_PADCONF_SDRC_DM2_OFFSET 0x5a2 -#define OMAP3_CONTROL_PADCONF_SDRC_DM3_OFFSET 0x5a4 - -/* 36xx only, these are SDMMC1_DAT4 - DAT7 on 34xx */ -#define OMAP3_CONTROL_PADCONF_SIM_IO_OFFSET 0x120 -#define OMAP3_CONTROL_PADCONF_SIM_CLK_OFFSET 0x122 -#define OMAP3_CONTROL_PADCONF_SIM_PWRCTRL_OFFSET 0x124 -#define OMAP3_CONTROL_PADCONF_SIM_RST_OFFSET 0x126 - -#define OMAP3_CONTROL_PADCONF_ETK_CLK_OFFSET 0x5a8 -#define OMAP3_CONTROL_PADCONF_ETK_CTL_OFFSET 0x5aa -#define OMAP3_CONTROL_PADCONF_ETK_D0_OFFSET 0x5ac -#define OMAP3_CONTROL_PADCONF_ETK_D1_OFFSET 0x5ae -#define OMAP3_CONTROL_PADCONF_ETK_D2_OFFSET 0x5b0 -#define OMAP3_CONTROL_PADCONF_ETK_D3_OFFSET 0x5b2 -#define OMAP3_CONTROL_PADCONF_ETK_D4_OFFSET 0x5b4 -#define OMAP3_CONTROL_PADCONF_ETK_D5_OFFSET 0x5b6 -#define OMAP3_CONTROL_PADCONF_ETK_D6_OFFSET 0x5b8 -#define OMAP3_CONTROL_PADCONF_ETK_D7_OFFSET 0x5ba -#define OMAP3_CONTROL_PADCONF_ETK_D8_OFFSET 0x5bc -#define OMAP3_CONTROL_PADCONF_ETK_D9_OFFSET 0x5be -#define OMAP3_CONTROL_PADCONF_ETK_D10_OFFSET 0x5c0 -#define OMAP3_CONTROL_PADCONF_ETK_D11_OFFSET 0x5c2 -#define OMAP3_CONTROL_PADCONF_ETK_D12_OFFSET 0x5c4 -#define OMAP3_CONTROL_PADCONF_ETK_D13_OFFSET 0x5c6 -#define OMAP3_CONTROL_PADCONF_ETK_D14_OFFSET 0x5c8 -#define OMAP3_CONTROL_PADCONF_ETK_D15_OFFSET 0x5ca -#define OMAP3_CONTROL_PADCONF_I2C4_SCL_OFFSET 0x9d0 -#define OMAP3_CONTROL_PADCONF_I2C4_SDA_OFFSET 0x9d2 -#define OMAP3_CONTROL_PADCONF_SYS_32K_OFFSET 0x9d4 -#define OMAP3_CONTROL_PADCONF_SYS_CLKREQ_OFFSET 0x9d6 -#define OMAP3_CONTROL_PADCONF_SYS_NRESWARM_OFFSET 0x9d8 -#define OMAP3_CONTROL_PADCONF_SYS_BOOT0_OFFSET 0x9da -#define OMAP3_CONTROL_PADCONF_SYS_BOOT1_OFFSET 0x9dc -#define OMAP3_CONTROL_PADCONF_SYS_BOOT2_OFFSET 0x9de -#define OMAP3_CONTROL_PADCONF_SYS_BOOT3_OFFSET 0x9e0 -#define OMAP3_CONTROL_PADCONF_SYS_BOOT4_OFFSET 0x9e2 -#define OMAP3_CONTROL_PADCONF_SYS_BOOT5_OFFSET 0x9e4 -#define OMAP3_CONTROL_PADCONF_SYS_BOOT6_OFFSET 0x9e6 -#define OMAP3_CONTROL_PADCONF_SYS_OFF_MODE_OFFSET 0x9e8 -#define OMAP3_CONTROL_PADCONF_SYS_CLKOUT1_OFFSET 0x9ea -#define OMAP3_CONTROL_PADCONF_JTAG_NTRST_OFFSET 0x9ec -#define OMAP3_CONTROL_PADCONF_JTAG_TCK_OFFSET 0x9ee -#define OMAP3_CONTROL_PADCONF_JTAG_TMS_TMSC_OFFSET 0x9f0 -#define OMAP3_CONTROL_PADCONF_JTAG_TDI_OFFSET 0x9f2 -#define OMAP3_CONTROL_PADCONF_JTAG_EMU0_OFFSET 0x9f4 -#define OMAP3_CONTROL_PADCONF_JTAG_EMU1_OFFSET 0x9f6 -#define OMAP3_CONTROL_PADCONF_SAD2D_SWAKEUP_OFFSET 0xa1c -#define OMAP3_CONTROL_PADCONF_JTAG_RTCK_OFFSET 0xa1e -#define OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET 0xa20 -#define OMAP3_CONTROL_PADCONF_GPIO_127 0xa24 -#define OMAP3_CONTROL_PADCONF_GPIO_126 0xa26 -#define OMAP3_CONTROL_PADCONF_GPIO_128 0xa28 -#define OMAP3_CONTROL_PADCONF_GPIO_129 0xa2a - -#define OMAP3_CONTROL_PADCONF_MUX_SIZE \ - (OMAP3_CONTROL_PADCONF_GPIO_129 + 0x2) diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index ad982465efd0..7d62ad48c7c9 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c @@ -48,6 +48,7 @@ #include <asm/smp_scu.h> #include <asm/pgalloc.h> #include <asm/suspend.h> +#include <asm/virt.h> #include <asm/hardware/cache-l2x0.h> #include "soc.h" @@ -244,10 +245,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) save_state = 1; break; case PWRDM_POWER_RET: - if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE)) { + if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE)) save_state = 0; - break; - } + break; default: /* * CPUx CSWR is invalid hardware state. Also CPUx OSWR @@ -371,8 +371,12 @@ int __init omap4_mpuss_init(void) pm_info = &per_cpu(omap4_pm_info, 0x0); if (sar_base) { pm_info->scu_sar_addr = sar_base + SCU_OFFSET0; - pm_info->wkup_sar_addr = sar_base + - CPU0_WAKEUP_NS_PA_ADDR_OFFSET; + if (cpu_is_omap44xx()) + pm_info->wkup_sar_addr = sar_base + + CPU0_WAKEUP_NS_PA_ADDR_OFFSET; + else + pm_info->wkup_sar_addr = sar_base + + OMAP5_CPU0_WAKEUP_NS_PA_ADDR_OFFSET; pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET0; } pm_info->pwrdm = pwrdm_lookup("cpu0_pwrdm"); @@ -391,8 +395,12 @@ int __init omap4_mpuss_init(void) pm_info = &per_cpu(omap4_pm_info, 0x1); if (sar_base) { pm_info->scu_sar_addr = sar_base + SCU_OFFSET1; - pm_info->wkup_sar_addr = sar_base + - CPU1_WAKEUP_NS_PA_ADDR_OFFSET; + if (cpu_is_omap44xx()) + pm_info->wkup_sar_addr = sar_base + + CPU1_WAKEUP_NS_PA_ADDR_OFFSET; + else + pm_info->wkup_sar_addr = sar_base + + OMAP5_CPU1_WAKEUP_NS_PA_ADDR_OFFSET; pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET1; } @@ -453,15 +461,24 @@ void __init omap4_mpuss_early_init(void) { unsigned long startup_pa; - if (!cpu_is_omap44xx()) + if (!(cpu_is_omap44xx() || soc_is_omap54xx())) return; sar_base = omap4_get_sar_ram_base(); if (cpu_is_omap443x()) startup_pa = virt_to_phys(omap4_secondary_startup); - else + else if (cpu_is_omap446x()) startup_pa = virt_to_phys(omap4460_secondary_startup); + else if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE) + startup_pa = virt_to_phys(omap5_secondary_hyp_startup); + else + startup_pa = virt_to_phys(omap5_secondary_startup); - writel_relaxed(startup_pa, sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET); + if (cpu_is_omap44xx()) + writel_relaxed(startup_pa, sar_base + + CPU1_WAKEUP_NS_PA_ADDR_OFFSET); + else + writel_relaxed(startup_pa, sar_base + + OMAP5_CPU1_WAKEUP_NS_PA_ADDR_OFFSET); } diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h index 792b1069f724..5b2966a0f733 100644 --- a/arch/arm/mach-omap2/omap4-sar-layout.h +++ b/arch/arm/mach-omap2/omap4-sar-layout.h @@ -31,6 +31,8 @@ /* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */ #define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04 #define CPU1_WAKEUP_NS_PA_ADDR_OFFSET 0xa08 +#define OMAP5_CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xe00 +#define OMAP5_CPU1_WAKEUP_NS_PA_ADDR_OFFSET 0xe04 #define SAR_BACKUP_STATUS_OFFSET (SAR_BANK3_OFFSET + 0x500) #define SAR_SECURE_RAM_SIZE_OFFSET (SAR_BANK3_OFFSET + 0x504) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 1052b29697b8..759e1d45ba25 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -160,7 +160,6 @@ #include "prm44xx.h" #include "prm33xx.h" #include "prminst44xx.h" -#include "mux.h" #include "pm.h" /* Name of the OMAP hwmod for the MPU */ @@ -217,9 +216,6 @@ static LIST_HEAD(omap_hwmod_list); /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ static struct omap_hwmod *mpu_oh; -/* io_chain_lock: used to serialize reconfigurations of the I/O chain */ -static DEFINE_SPINLOCK(io_chain_lock); - /* * linkspace: ptr to a buffer that struct omap_hwmod_link records are * allocated from - used to reduce the number of small memory @@ -594,51 +590,6 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, } /** - * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux - * @oh: struct omap_hwmod * - * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable - * - * Set or clear the I/O pad wakeup flag in the mux entries for the - * hwmod @oh. This function changes the @oh->mux->pads_dynamic array - * in memory. If the hwmod is currently idled, and the new idle - * values don't match the previous ones, this function will also - * update the SCM PADCTRL registers. Otherwise, if the hwmod is not - * currently idled, this function won't touch the hardware: the new - * mux settings are written to the SCM PADCTRL registers when the - * hwmod is idled. No return value. - */ -static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake) -{ - struct omap_device_pad *pad; - bool change = false; - u16 prev_idle; - int j; - - if (!oh->mux || !oh->mux->enabled) - return; - - for (j = 0; j < oh->mux->nr_pads_dynamic; j++) { - pad = oh->mux->pads_dynamic[j]; - - if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP)) - continue; - - prev_idle = pad->idle; - - if (set_wake) - pad->idle |= OMAP_WAKEUP_EN; - else - pad->idle &= ~OMAP_WAKEUP_EN; - - if (prev_idle != pad->idle) - change = true; - } - - if (change && oh->_state == _HWMOD_STATE_IDLE) - omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); -} - -/** * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware * @oh: struct omap_hwmod * * @@ -2018,29 +1969,6 @@ static int _reset(struct omap_hwmod *oh) } /** - * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain - * - * Call the appropriate PRM function to clear any logged I/O chain - * wakeups and to reconfigure the chain. This apparently needs to be - * done upon every mux change. Since hwmods can be concurrently - * enabled and idled, hold a spinlock around the I/O chain - * reconfiguration sequence. No return value. - * - * XXX When the PRM code is moved to drivers, this function can be removed, - * as the PRM infrastructure should abstract this. - */ -static void _reconfigure_io_chain(void) -{ - unsigned long flags; - - spin_lock_irqsave(&io_chain_lock, flags); - - omap_prm_reconfigure_io_chain(); - - spin_unlock_irqrestore(&io_chain_lock, flags); -} - -/** * _omap4_update_context_lost - increment hwmod context loss counter if * hwmod context was lost, and clear hardware context loss reg * @oh: hwmod to check for context loss @@ -2109,18 +2037,9 @@ static int _enable(struct omap_hwmod *oh) /* * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled - * state at init. Now that someone is really trying to enable - * them, just ensure that the hwmod mux is set. + * state at init. */ if (oh->_int_flags & _HWMOD_SKIP_ENABLE) { - /* - * If the caller has mux data populated, do the mux'ing - * which wouldn't have been done as part of the _enable() - * done during setup. - */ - if (oh->mux) - omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); - oh->_int_flags &= ~_HWMOD_SKIP_ENABLE; return 0; } @@ -2145,16 +2064,6 @@ static int _enable(struct omap_hwmod *oh) if (_are_all_hardreset_lines_asserted(oh)) return 0; - /* Mux pins for device runtime if populated */ - if (oh->mux && (!oh->mux->enabled || - ((oh->_state == _HWMOD_STATE_IDLE) && - oh->mux->pads_dynamic))) { - omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); - _reconfigure_io_chain(); - } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) { - _reconfigure_io_chain(); - } - _add_initiator_dep(oh, mpu_oh); if (oh->clkdm) { @@ -2260,14 +2169,6 @@ static int _idle(struct omap_hwmod *oh) clkdm_hwmod_disable(oh->clkdm, oh); } - /* Mux pins for device idle if populated */ - if (oh->mux && oh->mux->pads_dynamic) { - omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); - _reconfigure_io_chain(); - } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) { - _reconfigure_io_chain(); - } - oh->_state = _HWMOD_STATE_IDLE; return 0; @@ -2334,10 +2235,6 @@ static int _shutdown(struct omap_hwmod *oh) for (i = 0; i < oh->rst_lines_cnt; i++) _assert_hardreset(oh, oh->rst_lines[i].name); - /* Mux pins to safe mode or use populated off mode values */ - if (oh->mux) - omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); - oh->_state = _HWMOD_STATE_DISABLED; return 0; @@ -3729,7 +3626,6 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) _write_sysconfig(v, oh); } - _set_idle_ioring_wakeup(oh, true); spin_unlock_irqrestore(&oh->_lock, flags); return 0; @@ -3762,7 +3658,6 @@ int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) _write_sysconfig(v, oh); } - _set_idle_ioring_wakeup(oh, false); spin_unlock_irqrestore(&oh->_lock, flags); return 0; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c index c1e98d589100..6d2e32462df9 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c @@ -17,156 +17,11 @@ #include "omap_hwmod_common_data.h" -struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { - { - .pa_start = 0x4809c000, - .pa_end = 0x4809c1ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { - { - .pa_start = 0x480b4000, - .pa_end = 0x480b41ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = { - { - .pa_start = 0x48070000, - .pa_end = 0x48070000 + SZ_128 - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = { - { - .pa_start = 0x48072000, - .pa_end = 0x48072000 + SZ_128 - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -struct omap_hwmod_addr_space omap2_dss_addrs[] = { - { - .pa_start = 0x48050000, - .pa_end = 0x48050000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = { - { - .pa_start = 0x48050400, - .pa_end = 0x48050400 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = { - { - .pa_start = 0x48050800, - .pa_end = 0x48050800 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = { - { - .pa_start = 0x48050C00, - .pa_end = 0x48050C00 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -struct omap_hwmod_addr_space omap2_timer10_addrs[] = { - { - .pa_start = 0x48086000, - .pa_end = 0x48086000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -struct omap_hwmod_addr_space omap2_timer11_addrs[] = { - { - .pa_start = 0x48088000, - .pa_end = 0x48088000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = { - { - .pa_start = 0x4808a000, - .pa_end = 0x4808a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = { - { - .pa_start = 0x48098000, - .pa_end = 0x48098000 + SZ_256 - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = { - { - .pa_start = 0x4809a000, - .pa_end = 0x4809a000 + SZ_256 - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { - { - .pa_start = 0x480b8000, - .pa_end = 0x480b8000 + SZ_256 - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - struct omap_hwmod_addr_space omap2_dma_system_addrs[] = { { .pa_start = 0x48056000, .pa_end = 0x48056000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48074000, - .pa_end = 0x480740ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - -struct omap_hwmod_addr_space omap2_hdq1w_addr_space[] = { - { - .pa_start = 0x480b2000, - .pa_end = 0x480b2fff, - .flags = ADDR_TYPE_RT, + .flags = ADDR_TYPE_RT, }, - { } + { }, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c index c6c6384de867..cfaeb0f78cc8 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c @@ -45,204 +45,31 @@ struct omap_hwmod_class omap2_venc_hwmod_class = { .name = "venc", }; - -/* Common DMA request line data */ -struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = 50, }, - { .name = "tx", .dma_req = 49, }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = 52, }, - { .name = "tx", .dma_req = 51, }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = 54, }, - { .name = "tx", .dma_req = 53, }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = 27 }, - { .name = "rx", .dma_req = 28 }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = 29 }, - { .name = "rx", .dma_req = 30 }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { - { .name = "rx", .dma_req = 18 }, - { .name = "tx", .dma_req = 17 }, - { .dma_req = -1 } -}; - -/* Other IP block data */ - - /* * omap_hwmod class data */ struct omap_hwmod_class l3_hwmod_class = { - .name = "l3" + .name = "l3", }; struct omap_hwmod_class l4_hwmod_class = { - .name = "l4" + .name = "l4", }; struct omap_hwmod_class mpu_hwmod_class = { - .name = "mpu" + .name = "mpu", }; struct omap_hwmod_class iva_hwmod_class = { - .name = "iva" + .name = "iva", }; /* Common MPU IRQ line data */ -struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { - { .irq = 37 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = { - { .irq = 38 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = { - { .irq = 39 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = { - { .irq = 40 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = { - { .irq = 41 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = { - { .irq = 42 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = { - { .irq = 43 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = { - { .irq = 44 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = { - { .irq = 45 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = { - { .irq = 46 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = { - { .irq = 47 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = { - { .irq = 72 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = { - { .irq = 73 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = { - { .irq = 74 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - struct omap_hwmod_irq_info omap2_dispc_irqs[] = { { .irq = 25 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = { - { .irq = 56 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = { - { .irq = 57 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_gpio1_irqs[] = { - { .irq = 29 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK1 */ - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_gpio2_irqs[] = { - { .irq = 30 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK2 */ - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_gpio3_irqs[] = { - { .irq = 31 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK3 */ - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_gpio4_irqs[] = { - { .irq = 32 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK4 */ - { .irq = -1 }, + { .irq = -1, }, }; struct omap_hwmod_irq_info omap2_dma_system_irqs[] = { @@ -250,17 +77,7 @@ struct omap_hwmod_irq_info omap2_dma_system_irqs[] = { { .name = "1", .irq = 13 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ1 */ { .name = "2", .irq = 14 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ2 */ { .name = "3", .irq = 15 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ3 */ - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = { - { .irq = 65 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { - { .irq = 66 + OMAP_INTC_START, }, - { .irq = -1 }, + { .irq = -1, }, }; struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc = { @@ -277,9 +94,3 @@ struct omap_hwmod_class omap2_hdq1w_class = { .sysc = &omap2_hdq1w_sysc, .reset = &omap_hdq1w_reset, }; - -struct omap_hwmod_irq_info omap2_hdq1w_mpu_irqs[] = { - { .irq = 58 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c index 656861c29d5c..9b30b6b471ae 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c @@ -191,7 +191,6 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__dss = { .master = &omap2xxx_l4_core_hwmod, .slave = &omap2xxx_dss_core_hwmod, .clk = "dss_ick", - .addr = omap2_dss_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -206,7 +205,6 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc = { .master = &omap2xxx_l4_core_hwmod, .slave = &omap2xxx_dss_dispc_hwmod, .clk = "dss_ick", - .addr = omap2_dss_dispc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, @@ -221,7 +219,6 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi = { .master = &omap2xxx_l4_core_hwmod, .slave = &omap2xxx_dss_rfbi_hwmod, .clk = "dss_ick", - .addr = omap2_dss_rfbi_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -236,7 +233,6 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc = { .master = &omap2xxx_l4_core_hwmod, .slave = &omap2xxx_dss_venc_hwmod, .clk = "dss_ick", - .addr = omap2_dss_venc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index 36bcd2e75422..e047033caa3e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -569,7 +569,6 @@ struct omap_hwmod omap2xxx_dss_core_hwmod = { struct omap_hwmod omap2xxx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2_dispc_hwmod_class, - .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h index d3e61d1a02d7..434bd1a77229 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h @@ -68,6 +68,7 @@ extern struct omap_hwmod_ocp_if am33xx_l4_ls__uart6; extern struct omap_hwmod_ocp_if am33xx_l3_main__ocmc; extern struct omap_hwmod_ocp_if am33xx_l3_main__sha0; extern struct omap_hwmod_ocp_if am33xx_l3_main__aes0; +extern struct omap_hwmod_ocp_if am33xx_l4_per__rng; extern struct omap_hwmod am33xx_l3_main_hwmod; extern struct omap_hwmod am33xx_l3_s_hwmod; @@ -80,6 +81,7 @@ extern struct omap_hwmod am33xx_gfx_hwmod; extern struct omap_hwmod am33xx_prcm_hwmod; extern struct omap_hwmod am33xx_aes0_hwmod; extern struct omap_hwmod am33xx_sha0_hwmod; +extern struct omap_hwmod am33xx_rng_hwmod; extern struct omap_hwmod am33xx_ocmcram_hwmod; extern struct omap_hwmod am33xx_smartreflex0_hwmod; extern struct omap_hwmod am33xx_smartreflex1_hwmod; diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c index 10dff2f0086a..8236e5c49ec3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c @@ -547,3 +547,11 @@ struct omap_hwmod_ocp_if am33xx_l3_main__aes0 = { .addr = am33xx_aes0_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; + +/* l4 per -> rng */ +struct omap_hwmod_ocp_if am33xx_l4_per__rng = { + .master = &am33xx_l4_ls_hwmod, + .slave = &am33xx_rng_hwmod, + .clk = "rng_fck", + .user = OCP_USER_MPU, +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c index e2d84aa7f595..de06a1d5ffab 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c @@ -268,6 +268,33 @@ struct omap_hwmod am33xx_sha0_hwmod = { }, }; +/* rng */ +static struct omap_hwmod_class_sysconfig am33xx_rng_sysc = { + .rev_offs = 0x1fe0, + .sysc_offs = 0x1fe4, + .sysc_flags = SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE, + .idlemodes = SIDLE_FORCE | SIDLE_NO, + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class am33xx_rng_hwmod_class = { + .name = "rng", + .sysc = &am33xx_rng_sysc, +}; + +struct omap_hwmod am33xx_rng_hwmod = { + .name = "rng", + .class = &am33xx_rng_hwmod_class, + .clkdm_name = "l4ls_clkdm", + .flags = HWMOD_SWSUP_SIDLE, + .main_clk = "rng_fck", + .prcm = { + .omap4 = { + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + /* ocmcram */ static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = { .name = "ocmcram", @@ -1315,6 +1342,7 @@ static void omap_hwmod_am33xx_clkctrl(void) CLKCTRL(am33xx_ocmcram_hwmod , AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET); CLKCTRL(am33xx_sha0_hwmod , AM33XX_CM_PER_SHA0_CLKCTRL_OFFSET); CLKCTRL(am33xx_aes0_hwmod , AM33XX_CM_PER_AES0_CLKCTRL_OFFSET); + CLKCTRL(am33xx_rng_hwmod, AM33XX_CM_PER_RNG_CLKCTRL_OFFSET); } static void omap_hwmod_am33xx_rst(void) @@ -1388,6 +1416,7 @@ static void omap_hwmod_am43xx_clkctrl(void) CLKCTRL(am33xx_ocmcram_hwmod , AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET); CLKCTRL(am33xx_sha0_hwmod , AM43XX_CM_PER_SHA0_CLKCTRL_OFFSET); CLKCTRL(am33xx_aes0_hwmod , AM43XX_CM_PER_AES0_CLKCTRL_OFFSET); + CLKCTRL(am33xx_rng_hwmod, AM43XX_CM_PER_RNG_CLKCTRL_OFFSET); } static void omap_hwmod_am43xx_rst(void) diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index e1c2025d6d3e..6dc51a774a26 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -503,41 +503,6 @@ static struct omap_hwmod_ocp_if am33xx_l3_s__usbss = { .flags = OCPIF_SWSUP_IDLE, }; -/* rng */ -static struct omap_hwmod_class_sysconfig am33xx_rng_sysc = { - .rev_offs = 0x1fe0, - .sysc_offs = 0x1fe4, - .sysc_flags = SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE, - .idlemodes = SIDLE_FORCE | SIDLE_NO, - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class am33xx_rng_hwmod_class = { - .name = "rng", - .sysc = &am33xx_rng_sysc, -}; - -static struct omap_hwmod am33xx_rng_hwmod = { - .name = "rng", - .class = &am33xx_rng_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "rng_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_RNG_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_ocp_if am33xx_l4_per__rng = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_rng_hwmod, - .clk = "rng_fck", - .user = OCP_USER_MPU, -}; - static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l3_main__emif, &am33xx_mpu__l3_main, diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 1cc4a6f3954e..56f917ec8621 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -53,16 +53,10 @@ */ /* L3 */ -static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = { - { .irq = 9 + OMAP_INTC_START, }, - { .irq = 10 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_hwmod omap3xxx_l3_main_hwmod = { .name = "l3_main", .class = &l3_hwmod_class, - .mpu_irqs = omap3xxx_l3_main_irqs, .flags = HWMOD_NO_IDLEST, }; @@ -95,14 +89,9 @@ static struct omap_hwmod omap3xxx_l4_sec_hwmod = { }; /* MPU */ -static struct omap_hwmod_irq_info omap3xxx_mpu_irqs[] = { - { .name = "pmu", .irq = 3 + OMAP_INTC_START }, - { .irq = -1 } -}; static struct omap_hwmod omap3xxx_mpu_hwmod = { .name = "mpu", - .mpu_irqs = omap3xxx_mpu_irqs, .class = &mpu_hwmod_class, .main_clk = "arm_fck", }; @@ -128,7 +117,7 @@ static struct omap_hwmod omap3xxx_iva_hwmod = { .module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT, - } + }, }, }; @@ -197,7 +186,6 @@ static struct omap_timer_capability_dev_attr capability_dsp_pwm_dev_attr = { /* timer1 */ static struct omap_hwmod omap3xxx_timer1_hwmod = { .name = "timer1", - .mpu_irqs = omap2_timer1_mpu_irqs, .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -216,7 +204,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { /* timer2 */ static struct omap_hwmod omap3xxx_timer2_hwmod = { .name = "timer2", - .mpu_irqs = omap2_timer2_mpu_irqs, .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -234,7 +221,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { /* timer3 */ static struct omap_hwmod omap3xxx_timer3_hwmod = { .name = "timer3", - .mpu_irqs = omap2_timer3_mpu_irqs, .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -252,7 +238,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { /* timer4 */ static struct omap_hwmod omap3xxx_timer4_hwmod = { .name = "timer4", - .mpu_irqs = omap2_timer4_mpu_irqs, .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -270,7 +255,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { /* timer5 */ static struct omap_hwmod omap3xxx_timer5_hwmod = { .name = "timer5", - .mpu_irqs = omap2_timer5_mpu_irqs, .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -289,7 +273,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { /* timer6 */ static struct omap_hwmod omap3xxx_timer6_hwmod = { .name = "timer6", - .mpu_irqs = omap2_timer6_mpu_irqs, .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -308,7 +291,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { /* timer7 */ static struct omap_hwmod omap3xxx_timer7_hwmod = { .name = "timer7", - .mpu_irqs = omap2_timer7_mpu_irqs, .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -327,7 +309,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { /* timer8 */ static struct omap_hwmod omap3xxx_timer8_hwmod = { .name = "timer8", - .mpu_irqs = omap2_timer8_mpu_irqs, .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -346,7 +327,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { /* timer9 */ static struct omap_hwmod omap3xxx_timer9_hwmod = { .name = "timer9", - .mpu_irqs = omap2_timer9_mpu_irqs, .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -365,7 +345,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { /* timer10 */ static struct omap_hwmod omap3xxx_timer10_hwmod = { .name = "timer10", - .mpu_irqs = omap2_timer10_mpu_irqs, .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -384,7 +363,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { /* timer11 */ static struct omap_hwmod omap3xxx_timer11_hwmod = { .name = "timer11", - .mpu_irqs = omap2_timer11_mpu_irqs, .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -401,14 +379,9 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { }; /* timer12 */ -static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = { - { .irq = 95 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_hwmod omap3xxx_timer12_hwmod = { .name = "timer12", - .mpu_irqs = omap3xxx_timer12_mpu_irqs, .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -485,8 +458,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = { /* UART1 */ static struct omap_hwmod omap3xxx_uart1_hwmod = { .name = "uart1", - .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = omap2_uart1_sdma_reqs, .main_clk = "uart1_fck", .flags = DEBUG_TI81XXUART1_FLAGS | HWMOD_SWSUP_SIDLE, .prcm = { @@ -504,8 +475,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { /* UART2 */ static struct omap_hwmod omap3xxx_uart2_hwmod = { .name = "uart2", - .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = omap2_uart2_sdma_reqs, .main_clk = "uart2_fck", .flags = DEBUG_TI81XXUART2_FLAGS | HWMOD_SWSUP_SIDLE, .prcm = { @@ -523,8 +492,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { /* UART3 */ static struct omap_hwmod omap3xxx_uart3_hwmod = { .name = "uart3", - .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = omap2_uart3_sdma_reqs, .main_clk = "uart3_fck", .flags = DEBUG_OMAP3UART3_FLAGS | DEBUG_TI81XXUART3_FLAGS | HWMOD_SWSUP_SIDLE, @@ -541,21 +508,10 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { }; /* UART4 */ -static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { - { .irq = 80 + OMAP_INTC_START, }, - { .irq = -1 }, -}; -static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { - { .name = "rx", .dma_req = 82, }, - { .name = "tx", .dma_req = 81, }, - { .dma_req = -1 } -}; static struct omap_hwmod omap36xx_uart4_hwmod = { .name = "uart4", - .mpu_irqs = uart4_mpu_irqs, - .sdma_reqs = uart4_sdma_reqs, .main_clk = "uart4_fck", .flags = DEBUG_OMAP3UART4_FLAGS | HWMOD_SWSUP_SIDLE, .prcm = { @@ -570,16 +526,7 @@ static struct omap_hwmod omap36xx_uart4_hwmod = { .class = &omap2_uart_class, }; -static struct omap_hwmod_irq_info am35xx_uart4_mpu_irqs[] = { - { .irq = 84 + OMAP_INTC_START, }, - { .irq = -1 }, -}; -static struct omap_hwmod_dma_info am35xx_uart4_sdma_reqs[] = { - { .name = "rx", .dma_req = 55, }, - { .name = "tx", .dma_req = 54, }, - { .dma_req = -1 } -}; /* * XXX AM35xx UART4 cannot complete its softreset without uart1_fck or @@ -597,8 +544,6 @@ static struct omap_hwmod_opt_clk am35xx_uart4_opt_clks[] = { static struct omap_hwmod am35xx_uart4_hwmod = { .name = "uart4", - .mpu_irqs = am35xx_uart4_mpu_irqs, - .sdma_reqs = am35xx_uart4_sdma_reqs, .main_clk = "uart4_fck", .prcm = { .omap2 = { @@ -625,7 +570,7 @@ static struct omap_hwmod_class i2c_class = { static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .name = "dsi1", .dma_req = 74 }, - { .dma_req = -1 } + { .dma_req = -1, }, }; /* dss */ @@ -714,7 +659,7 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { }, }, .flags = HWMOD_NO_IDLEST, - .dev_attr = &omap2_3_dss_dispc_dev_attr + .dev_attr = &omap2_3_dss_dispc_dev_attr, }; /* @@ -738,11 +683,6 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = { .sysc = &omap3xxx_dsi_sysc, }; -static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = { - { .irq = 25 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - /* dss_dsi1 */ static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { { .role = "sys_clk", .clk = "dss2_alwon_fck" }, @@ -751,7 +691,6 @@ static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap3xxx_dsi_hwmod_class, - .mpu_irqs = omap3xxx_dsi1_irqs, .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -815,8 +754,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, - .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -840,8 +777,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, - .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -862,22 +797,11 @@ static struct omap_i2c_dev_attr i2c3_dev_attr = { .flags = OMAP_I2C_FLAG_BUS_SHIFT_2, }; -static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { - { .irq = 61 + OMAP_INTC_START, }, - { .irq = -1 }, -}; -static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { - { .name = "tx", .dma_req = 25 }, - { .name = "rx", .dma_req = 26 }, - { .dma_req = -1 } -}; static struct omap_hwmod omap3xxx_i2c3_hwmod = { .name = "i2c3", .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, - .mpu_irqs = i2c3_mpu_irqs, - .sdma_reqs = i2c3_sdma_reqs, .main_clk = "i2c3_fck", .prcm = { .omap2 = { @@ -928,7 +852,6 @@ static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { static struct omap_hwmod omap3xxx_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap2_gpio1_irqs, .main_clk = "gpio1_ick", .opt_clks = gpio1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), @@ -953,7 +876,6 @@ static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { static struct omap_hwmod omap3xxx_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap2_gpio2_irqs, .main_clk = "gpio2_ick", .opt_clks = gpio2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), @@ -978,7 +900,6 @@ static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { static struct omap_hwmod omap3xxx_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap2_gpio3_irqs, .main_clk = "gpio3_ick", .opt_clks = gpio3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), @@ -1003,7 +924,6 @@ static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { static struct omap_hwmod omap3xxx_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap2_gpio4_irqs, .main_clk = "gpio4_ick", .opt_clks = gpio4_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), @@ -1021,10 +941,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { }; /* gpio5 */ -static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = { - { .irq = 33 + OMAP_INTC_START, }, /* INT_34XX_GPIO_BANK5 */ - { .irq = -1 }, -}; static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { { .role = "dbclk", .clk = "gpio5_dbck", }, @@ -1033,7 +949,6 @@ static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { static struct omap_hwmod omap3xxx_gpio5_hwmod = { .name = "gpio5", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio5_irqs, .main_clk = "gpio5_ick", .opt_clks = gpio5_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks), @@ -1051,10 +966,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { }; /* gpio6 */ -static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = { - { .irq = 34 + OMAP_INTC_START, }, /* INT_34XX_GPIO_BANK6 */ - { .irq = -1 }, -}; static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { { .role = "dbclk", .clk = "gpio6_dbck", }, @@ -1063,7 +974,6 @@ static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { static struct omap_hwmod omap3xxx_gpio6_hwmod = { .name = "gpio6", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio6_irqs, .main_clk = "gpio6_ick", .opt_clks = gpio6_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks), @@ -1156,18 +1066,10 @@ static struct omap_hwmod_opt_clk mcbsp234_opt_clks[] = { }; /* mcbsp1 */ -static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { - { .name = "common", .irq = 16 + OMAP_INTC_START, }, - { .name = "tx", .irq = 59 + OMAP_INTC_START, }, - { .name = "rx", .irq = 60 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp1_irqs, - .sdma_reqs = omap2_mcbsp1_sdma_reqs, .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -1183,12 +1085,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { }; /* mcbsp2 */ -static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { - { .name = "common", .irq = 17 + OMAP_INTC_START, }, - { .name = "tx", .irq = 62 + OMAP_INTC_START, }, - { .name = "rx", .irq = 63 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_mcbsp_dev_attr omap34xx_mcbsp2_dev_attr = { .sidetone = "mcbsp2_sidetone", @@ -1197,8 +1093,6 @@ static struct omap_mcbsp_dev_attr omap34xx_mcbsp2_dev_attr = { static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp2_irqs, - .sdma_reqs = omap2_mcbsp2_sdma_reqs, .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -1215,12 +1109,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { }; /* mcbsp3 */ -static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { - { .name = "common", .irq = 22 + OMAP_INTC_START, }, - { .name = "tx", .irq = 89 + OMAP_INTC_START, }, - { .name = "rx", .irq = 90 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_mcbsp_dev_attr omap34xx_mcbsp3_dev_attr = { .sidetone = "mcbsp3_sidetone", @@ -1229,8 +1117,6 @@ static struct omap_mcbsp_dev_attr omap34xx_mcbsp3_dev_attr = { static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp3_irqs, - .sdma_reqs = omap2_mcbsp3_sdma_reqs, .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -1247,24 +1133,11 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { }; /* mcbsp4 */ -static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { - { .name = "common", .irq = 23 + OMAP_INTC_START, }, - { .name = "tx", .irq = 54 + OMAP_INTC_START, }, - { .name = "rx", .irq = 55 + OMAP_INTC_START, }, - { .irq = -1 }, -}; -static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { - { .name = "rx", .dma_req = 20 }, - { .name = "tx", .dma_req = 19 }, - { .dma_req = -1 } -}; static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { .name = "mcbsp4", .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp4_irqs, - .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, .main_clk = "mcbsp4_fck", .prcm = { .omap2 = { @@ -1280,24 +1153,11 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { }; /* mcbsp5 */ -static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { - { .name = "common", .irq = 27 + OMAP_INTC_START, }, - { .name = "tx", .irq = 81 + OMAP_INTC_START, }, - { .name = "rx", .irq = 82 + OMAP_INTC_START, }, - { .irq = -1 }, -}; -static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { - { .name = "rx", .dma_req = 22 }, - { .name = "tx", .dma_req = 21 }, - { .dma_req = -1 } -}; static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { .name = "mcbsp5", .class = &omap3xxx_mcbsp_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp5_irqs, - .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, .main_clk = "mcbsp5_fck", .prcm = { .omap2 = { @@ -1325,29 +1185,19 @@ static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = { }; /* mcbsp2_sidetone */ -static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = { - { .name = "irq", .irq = 4 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { .name = "mcbsp2_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, .main_clk = "mcbsp2_ick", .flags = HWMOD_NO_IDLEST, }; /* mcbsp3_sidetone */ -static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = { - { .name = "irq", .irq = 5 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = { .name = "mcbsp3_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, - .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, .main_clk = "mcbsp3_ick", .flags = HWMOD_NO_IDLEST, }; @@ -1394,10 +1244,6 @@ static struct omap_smartreflex_dev_attr sr1_dev_attr = { .sensor_voltdm_name = "mpu_iva", }; -static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = { - { .irq = 18 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_hwmod omap34xx_sr1_hwmod = { .name = "smartreflex_mpu_iva", @@ -1413,7 +1259,6 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { }, }, .dev_attr = &sr1_dev_attr, - .mpu_irqs = omap3_smartreflex_mpu_irqs, .flags = HWMOD_SET_DEFAULT_CLOCKACT, }; @@ -1431,7 +1276,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { }, }, .dev_attr = &sr1_dev_attr, - .mpu_irqs = omap3_smartreflex_mpu_irqs, }; /* SR2 */ @@ -1439,10 +1283,6 @@ static struct omap_smartreflex_dev_attr sr2_dev_attr = { .sensor_voltdm_name = "core", }; -static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = { - { .irq = 19 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_hwmod omap34xx_sr2_hwmod = { .name = "smartreflex_core", @@ -1458,7 +1298,6 @@ static struct omap_hwmod omap34xx_sr2_hwmod = { }, }, .dev_attr = &sr2_dev_attr, - .mpu_irqs = omap3_smartreflex_core_irqs, .flags = HWMOD_SET_DEFAULT_CLOCKACT, }; @@ -1476,7 +1315,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = { }, }, .dev_attr = &sr2_dev_attr, - .mpu_irqs = omap3_smartreflex_core_irqs, }; /* @@ -1545,8 +1383,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap34xx_mcspi1 = { .name = "mcspi1", - .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap2_mcspi1_sdma_reqs, .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1568,8 +1404,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap34xx_mcspi2 = { .name = "mcspi2", - .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap2_mcspi2_sdma_reqs, .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -1585,18 +1419,7 @@ static struct omap_hwmod omap34xx_mcspi2 = { }; /* mcspi3 */ -static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = { - { .name = "irq", .irq = 91 + OMAP_INTC_START, }, /* 91 */ - { .irq = -1 }, -}; -static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { - { .name = "tx0", .dma_req = 15 }, - { .name = "rx0", .dma_req = 16 }, - { .name = "tx1", .dma_req = 23 }, - { .name = "rx1", .dma_req = 24 }, - { .dma_req = -1 } -}; static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { .num_chipselect = 2, @@ -1604,8 +1427,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { static struct omap_hwmod omap34xx_mcspi3 = { .name = "mcspi3", - .mpu_irqs = omap34xx_mcspi3_mpu_irqs, - .sdma_reqs = omap34xx_mcspi3_sdma_reqs, .main_clk = "mcspi3_fck", .prcm = { .omap2 = { @@ -1621,16 +1442,7 @@ static struct omap_hwmod omap34xx_mcspi3 = { }; /* mcspi4 */ -static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { - { .name = "irq", .irq = 48 + OMAP_INTC_START, }, - { .irq = -1 }, -}; -static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { - { .name = "tx0", .dma_req = 70 }, /* DMA_SPI4_TX0 */ - { .name = "rx0", .dma_req = 71 }, /* DMA_SPI4_RX0 */ - { .dma_req = -1 } -}; static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = { .num_chipselect = 1, @@ -1638,8 +1450,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = { static struct omap_hwmod omap34xx_mcspi4 = { .name = "mcspi4", - .mpu_irqs = omap34xx_mcspi4_mpu_irqs, - .sdma_reqs = omap34xx_mcspi4_sdma_reqs, .main_clk = "mcspi4_fck", .prcm = { .omap2 = { @@ -1673,16 +1483,9 @@ static struct omap_hwmod_class usbotg_class = { }; /* usb_otg_hs */ -static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = { - - { .name = "mc", .irq = 92 + OMAP_INTC_START, }, - { .name = "dma", .irq = 93 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { .name = "usb_otg_hs", - .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs, .main_clk = "hsotgusb_ick", .prcm = { .omap2 = { @@ -1691,7 +1494,7 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { .module_offs = CORE_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT, - .idlest_stdby_bit = OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT + .idlest_stdby_bit = OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT, }, }, .class = &usbotg_class, @@ -1711,10 +1514,6 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { }; /* usb_otg_hs */ -static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = { - { .name = "mc", .irq = 71 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_hwmod_class am35xx_usbotg_class = { .name = "am35xx_usbotg", @@ -1722,7 +1521,6 @@ static struct omap_hwmod_class am35xx_usbotg_class = { static struct omap_hwmod am35xx_usbhsotg_hwmod = { .name = "am35x_otg_hs", - .mpu_irqs = am35xx_usbhsotg_mpu_irqs, .main_clk = "hsotgusb_fck", .class = &am35xx_usbotg_class, .flags = HWMOD_NO_IDLEST, @@ -1747,16 +1545,7 @@ static struct omap_hwmod_class omap34xx_mmc_class = { /* MMC/SD/SDIO1 */ -static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { - { .irq = 83 + OMAP_INTC_START, }, - { .irq = -1 }, -}; -static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { - { .name = "tx", .dma_req = 61, }, - { .name = "rx", .dma_req = 62, }, - { .dma_req = -1 } -}; static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = { { .role = "dbck", .clk = "omap_32k_fck", }, @@ -1774,8 +1563,6 @@ static struct omap_hsmmc_dev_attr mmc1_pre_es3_dev_attr = { static struct omap_hwmod omap3xxx_pre_es3_mmc1_hwmod = { .name = "mmc1", - .mpu_irqs = omap34xx_mmc1_mpu_irqs, - .sdma_reqs = omap34xx_mmc1_sdma_reqs, .opt_clks = omap34xx_mmc1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks), .main_clk = "mmchs1_fck", @@ -1794,8 +1581,6 @@ static struct omap_hwmod omap3xxx_pre_es3_mmc1_hwmod = { static struct omap_hwmod omap3xxx_es3plus_mmc1_hwmod = { .name = "mmc1", - .mpu_irqs = omap34xx_mmc1_mpu_irqs, - .sdma_reqs = omap34xx_mmc1_sdma_reqs, .opt_clks = omap34xx_mmc1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks), .main_clk = "mmchs1_fck", @@ -1814,16 +1599,7 @@ static struct omap_hwmod omap3xxx_es3plus_mmc1_hwmod = { /* MMC/SD/SDIO2 */ -static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { - { .irq = 86 + OMAP_INTC_START, }, - { .irq = -1 }, -}; -static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { - { .name = "tx", .dma_req = 47, }, - { .name = "rx", .dma_req = 48, }, - { .dma_req = -1 } -}; static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = { { .role = "dbck", .clk = "omap_32k_fck", }, @@ -1836,8 +1612,6 @@ static struct omap_hsmmc_dev_attr mmc2_pre_es3_dev_attr = { static struct omap_hwmod omap3xxx_pre_es3_mmc2_hwmod = { .name = "mmc2", - .mpu_irqs = omap34xx_mmc2_mpu_irqs, - .sdma_reqs = omap34xx_mmc2_sdma_reqs, .opt_clks = omap34xx_mmc2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks), .main_clk = "mmchs2_fck", @@ -1856,8 +1630,6 @@ static struct omap_hwmod omap3xxx_pre_es3_mmc2_hwmod = { static struct omap_hwmod omap3xxx_es3plus_mmc2_hwmod = { .name = "mmc2", - .mpu_irqs = omap34xx_mmc2_mpu_irqs, - .sdma_reqs = omap34xx_mmc2_sdma_reqs, .opt_clks = omap34xx_mmc2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks), .main_clk = "mmchs2_fck", @@ -1875,16 +1647,7 @@ static struct omap_hwmod omap3xxx_es3plus_mmc2_hwmod = { /* MMC/SD/SDIO3 */ -static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { - { .irq = 94 + OMAP_INTC_START, }, - { .irq = -1 }, -}; -static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { - { .name = "tx", .dma_req = 77, }, - { .name = "rx", .dma_req = 78, }, - { .dma_req = -1 } -}; static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = { { .role = "dbck", .clk = "omap_32k_fck", }, @@ -1892,8 +1655,6 @@ static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = { static struct omap_hwmod omap3xxx_mmc3_hwmod = { .name = "mmc3", - .mpu_irqs = omap34xx_mmc3_mpu_irqs, - .sdma_reqs = omap34xx_mmc3_sdma_reqs, .opt_clks = omap34xx_mmc3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc3_opt_clks), .main_clk = "mmchs3_fck", @@ -1931,17 +1692,11 @@ static struct omap_hwmod_class omap3xxx_usb_host_hs_hwmod_class = { .sysc = &omap3xxx_usb_host_hs_sysc, }; -static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = { - { .name = "ohci-irq", .irq = 76 + OMAP_INTC_START, }, - { .name = "ehci-irq", .irq = 77 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = { .name = "usb_host_hs", .class = &omap3xxx_usb_host_hs_hwmod_class, .clkdm_name = "usbhost_clkdm", - .mpu_irqs = omap3xxx_usb_host_hs_irqs, .main_clk = "usbhost_48m_fck", .prcm = { .omap2 = { @@ -2015,16 +1770,11 @@ static struct omap_hwmod_class omap3xxx_usb_tll_hs_hwmod_class = { .sysc = &omap3xxx_usb_tll_hs_sysc, }; -static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = { - { .name = "tll-irq", .irq = 78 + OMAP_INTC_START, }, - { .irq = -1 }, -}; static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = { .name = "usb_tll_hs", .class = &omap3xxx_usb_tll_hs_hwmod_class, .clkdm_name = "core_l4_clkdm", - .mpu_irqs = omap3xxx_usb_tll_hs_irqs, .main_clk = "usbtll_fck", .prcm = { .omap2 = { @@ -2039,7 +1789,6 @@ static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = { static struct omap_hwmod omap3xxx_hdq1w_hwmod = { .name = "hdq1w", - .mpu_irqs = omap2_hdq1w_mpu_irqs, .main_clk = "hdq_fck", .prcm = { .omap2 = { @@ -2134,16 +1883,10 @@ static struct omap_hwmod_class omap3xxx_gpmc_hwmod_class = { .sysc = &omap3xxx_gpmc_sysc, }; -static struct omap_hwmod_irq_info omap3xxx_gpmc_irqs[] = { - { .irq = 20 + OMAP_INTC_START, }, - { .irq = -1 } -}; - static struct omap_hwmod omap3xxx_gpmc_hwmod = { .name = "gpmc", .class = &omap3xxx_gpmc_hwmod_class, .clkdm_name = "core_l3_clkdm", - .mpu_irqs = omap3xxx_gpmc_irqs, .main_clk = "gpmc_fck", /* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */ .flags = HWMOD_NO_IDLEST | DEBUG_OMAP_GPMC_HWMOD_FLAGS, @@ -2167,37 +1910,19 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { - { - .pa_start = 0x68000000, - .pa_end = 0x6800ffff, - .flags = ADDR_TYPE_RT, - }, - { } -}; /* MPU -> L3 interface */ static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = { .master = &omap3xxx_mpu_hwmod, .slave = &omap3xxx_l3_main_hwmod, - .addr = omap3xxx_l3_main_addrs, .user = OCP_USER_MPU, }; -static struct omap_hwmod_addr_space omap3xxx_l4_emu_addrs[] = { - { - .pa_start = 0x54000000, - .pa_end = 0x547fffff, - .flags = ADDR_TYPE_RT, - }, - { } -}; /* l3 -> debugss */ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_debugss = { .master = &omap3xxx_l3_main_hwmod, .slave = &omap3xxx_debugss_hwmod, - .addr = omap3xxx_l4_emu_addrs, .user = OCP_USER_MPU, }; @@ -2215,7 +1940,7 @@ static struct omap_hwmod_ocp_if omap3xxx_dss__l3 = { .omap2 = { .l3_perm_bit = OMAP3_L3_CORE_FW_INIT_ID_DSS, .flags = OMAP_FIREWALL_L3, - } + }, }, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2256,18 +1981,16 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__pre_es3_mmc1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_pre_es3_mmc1_hwmod, .clk = "mmchs1_ick", - .addr = omap2430_mmc1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, - .flags = OMAP_FIREWALL_L4 + .flags = OMAP_FIREWALL_L4, }; static struct omap_hwmod_ocp_if omap3xxx_l4_core__es3plus_mmc1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_es3plus_mmc1_hwmod, .clk = "mmchs1_ick", - .addr = omap2430_mmc1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, - .flags = OMAP_FIREWALL_L4 + .flags = OMAP_FIREWALL_L4, }; /* L4 CORE -> MMC2 interface */ @@ -2275,126 +1998,70 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__pre_es3_mmc2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_pre_es3_mmc2_hwmod, .clk = "mmchs2_ick", - .addr = omap2430_mmc2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, - .flags = OMAP_FIREWALL_L4 + .flags = OMAP_FIREWALL_L4, }; static struct omap_hwmod_ocp_if omap3xxx_l4_core__es3plus_mmc2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_es3plus_mmc2_hwmod, .clk = "mmchs2_ick", - .addr = omap2430_mmc2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, - .flags = OMAP_FIREWALL_L4 + .flags = OMAP_FIREWALL_L4, }; /* L4 CORE -> MMC3 interface */ -static struct omap_hwmod_addr_space omap3xxx_mmc3_addr_space[] = { - { - .pa_start = 0x480ad000, - .pa_end = 0x480ad1ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_mmc3_hwmod, .clk = "mmchs3_ick", - .addr = omap3xxx_mmc3_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, - .flags = OMAP_FIREWALL_L4 + .flags = OMAP_FIREWALL_L4, }; /* L4 CORE -> UART1 interface */ -static struct omap_hwmod_addr_space omap3xxx_uart1_addr_space[] = { - { - .pa_start = OMAP3_UART1_BASE, - .pa_end = OMAP3_UART1_BASE + SZ_8K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_uart1_hwmod, .clk = "uart1_ick", - .addr = omap3xxx_uart1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> UART2 interface */ -static struct omap_hwmod_addr_space omap3xxx_uart2_addr_space[] = { - { - .pa_start = OMAP3_UART2_BASE, - .pa_end = OMAP3_UART2_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_uart2_hwmod, .clk = "uart2_ick", - .addr = omap3xxx_uart2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 PER -> UART3 interface */ -static struct omap_hwmod_addr_space omap3xxx_uart3_addr_space[] = { - { - .pa_start = OMAP3_UART3_BASE, - .pa_end = OMAP3_UART3_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_uart3_hwmod, .clk = "uart3_ick", - .addr = omap3xxx_uart3_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 PER -> UART4 interface */ -static struct omap_hwmod_addr_space omap36xx_uart4_addr_space[] = { - { - .pa_start = OMAP3_UART4_BASE, - .pa_end = OMAP3_UART4_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; static struct omap_hwmod_ocp_if omap36xx_l4_per__uart4 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap36xx_uart4_hwmod, .clk = "uart4_ick", - .addr = omap36xx_uart4_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* AM35xx: L4 CORE -> UART4 interface */ -static struct omap_hwmod_addr_space am35xx_uart4_addr_space[] = { - { - .pa_start = OMAP3_UART4_AM35XX_BASE, - .pa_end = OMAP3_UART4_AM35XX_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; static struct omap_hwmod_ocp_if am35xx_l4_core__uart4 = { .master = &omap3xxx_l4_core_hwmod, .slave = &am35xx_uart4_hwmod, .clk = "uart4_ick", - .addr = am35xx_uart4_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2403,13 +2070,12 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_i2c1_hwmod, .clk = "i2c1_ick", - .addr = omap2_i2c1_addr_space, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION, .l4_prot_group = 7, .flags = OMAP_FIREWALL_L4, - } + }, }, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2419,57 +2085,38 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_i2c2_hwmod, .clk = "i2c2_ick", - .addr = omap2_i2c2_addr_space, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION, .l4_prot_group = 7, .flags = OMAP_FIREWALL_L4, - } + }, }, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> I2C3 interface */ -static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { - { - .pa_start = 0x48060000, - .pa_end = 0x48060000 + SZ_128 - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_i2c3_hwmod, .clk = "i2c3_ick", - .addr = omap3xxx_i2c3_addr_space, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C3_REGION, .l4_prot_group = 7, .flags = OMAP_FIREWALL_L4, - } + }, }, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> SR1 interface */ -static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { - { - .pa_start = OMAP34XX_SR1_BASE, - .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; static struct omap_hwmod_ocp_if omap34xx_l4_core__sr1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_sr1_hwmod, .clk = "sr_l4_ick", - .addr = omap3_sr1_addr_space, .user = OCP_USER_MPU, }; @@ -2477,25 +2124,15 @@ static struct omap_hwmod_ocp_if omap36xx_l4_core__sr1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap36xx_sr1_hwmod, .clk = "sr_l4_ick", - .addr = omap3_sr1_addr_space, .user = OCP_USER_MPU, }; /* L4 CORE -> SR1 interface */ -static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = { - { - .pa_start = OMAP34XX_SR2_BASE, - .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; static struct omap_hwmod_ocp_if omap34xx_l4_core__sr2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_sr2_hwmod, .clk = "sr_l4_ick", - .addr = omap3_sr2_addr_space, .user = OCP_USER_MPU, }; @@ -2503,43 +2140,24 @@ static struct omap_hwmod_ocp_if omap36xx_l4_core__sr2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap36xx_sr2_hwmod, .clk = "sr_l4_ick", - .addr = omap3_sr2_addr_space, .user = OCP_USER_MPU, }; -static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = { - { - .pa_start = OMAP34XX_HSUSB_OTG_BASE, - .pa_end = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_core -> usbhsotg */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_usbhsotg_hwmod, .clk = "l4_ick", - .addr = omap3xxx_usbhsotg_addrs, .user = OCP_USER_MPU, }; -static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = { - { - .pa_start = AM35XX_IPSS_USBOTGSS_BASE, - .pa_end = AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_core -> usbhsotg */ static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = { .master = &omap3xxx_l4_core_hwmod, .slave = &am35xx_usbhsotg_hwmod, .clk = "hsotgusb_ick", - .addr = am35xx_usbhsotg_addrs, .user = OCP_USER_MPU, }; @@ -2558,165 +2176,84 @@ static struct omap_hwmod_ocp_if omap3xxx_l3__iva = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { - { - .pa_start = 0x48318000, - .pa_end = 0x48318000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_wkup -> timer1 */ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = { .master = &omap3xxx_l4_wkup_hwmod, .slave = &omap3xxx_timer1_hwmod, .clk = "gpt1_ick", - .addr = omap3xxx_timer1_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { - { - .pa_start = 0x49032000, - .pa_end = 0x49032000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> timer2 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_timer2_hwmod, .clk = "gpt2_ick", - .addr = omap3xxx_timer2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { - { - .pa_start = 0x49034000, - .pa_end = 0x49034000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> timer3 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_timer3_hwmod, .clk = "gpt3_ick", - .addr = omap3xxx_timer3_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { - { - .pa_start = 0x49036000, - .pa_end = 0x49036000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> timer4 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer4 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_timer4_hwmod, .clk = "gpt4_ick", - .addr = omap3xxx_timer4_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { - { - .pa_start = 0x49038000, - .pa_end = 0x49038000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> timer5 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer5 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_timer5_hwmod, .clk = "gpt5_ick", - .addr = omap3xxx_timer5_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { - { - .pa_start = 0x4903A000, - .pa_end = 0x4903A000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> timer6 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer6 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_timer6_hwmod, .clk = "gpt6_ick", - .addr = omap3xxx_timer6_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { - { - .pa_start = 0x4903C000, - .pa_end = 0x4903C000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> timer7 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer7 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_timer7_hwmod, .clk = "gpt7_ick", - .addr = omap3xxx_timer7_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { - { - .pa_start = 0x4903E000, - .pa_end = 0x4903E000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> timer8 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer8 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_timer8_hwmod, .clk = "gpt8_ick", - .addr = omap3xxx_timer8_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { - { - .pa_start = 0x49040000, - .pa_end = 0x49040000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> timer9 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer9 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_timer9_hwmod, .clk = "gpt9_ick", - .addr = omap3xxx_timer9_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2725,7 +2262,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_timer10_hwmod, .clk = "gpt10_ick", - .addr = omap2_timer10_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2734,43 +2270,24 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_timer11_hwmod, .clk = "gpt11_ick", - .addr = omap2_timer11_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { - { - .pa_start = 0x48304000, - .pa_end = 0x48304000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_core -> timer12 */ static struct omap_hwmod_ocp_if omap3xxx_l4_sec__timer12 = { .master = &omap3xxx_l4_sec_hwmod, .slave = &omap3xxx_timer12_hwmod, .clk = "gpt12_ick", - .addr = omap3xxx_timer12_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_wkup -> wd_timer2 */ -static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = { - { - .pa_start = 0x48314000, - .pa_end = 0x4831407f, - .flags = ADDR_TYPE_RT - }, - { } -}; static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { .master = &omap3xxx_l4_wkup_hwmod, .slave = &omap3xxx_wd_timer2_hwmod, .clk = "wdt2_ick", - .addr = omap3xxx_wd_timer2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2779,13 +2296,12 @@ static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3430es1_dss_core_hwmod, .clk = "dss_ick", - .addr = omap2_dss_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP, .flags = OMAP_FIREWALL_L4, - } + }, }, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2794,13 +2310,12 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_core_hwmod, .clk = "dss_ick", - .addr = omap2_dss_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION, .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP, .flags = OMAP_FIREWALL_L4, - } + }, }, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2810,38 +2325,27 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_dispc_hwmod, .clk = "dss_ick", - .addr = omap2_dss_dispc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION, .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP, .flags = OMAP_FIREWALL_L4, - } + }, }, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { - { - .pa_start = 0x4804FC00, - .pa_end = 0x4804FFFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_dsi1 */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_dsi1_hwmod, .clk = "dss_ick", - .addr = omap3xxx_dss_dsi1_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DSI_REGION, .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP, .flags = OMAP_FIREWALL_L4, - } + }, }, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2851,13 +2355,12 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_rfbi_hwmod, .clk = "dss_ick", - .addr = omap2_dss_rfbi_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP , .flags = OMAP_FIREWALL_L4, - } + }, }, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2867,66 +2370,38 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_venc_hwmod, .clk = "dss_ick", - .addr = omap2_dss_venc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION, .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP, .flags = OMAP_FIREWALL_L4, - } + }, }, .flags = OCPIF_SWSUP_IDLE, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_wkup -> gpio1 */ -static struct omap_hwmod_addr_space omap3xxx_gpio1_addrs[] = { - { - .pa_start = 0x48310000, - .pa_end = 0x483101ff, - .flags = ADDR_TYPE_RT - }, - { } -}; static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = { .master = &omap3xxx_l4_wkup_hwmod, .slave = &omap3xxx_gpio1_hwmod, - .addr = omap3xxx_gpio1_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_per -> gpio2 */ -static struct omap_hwmod_addr_space omap3xxx_gpio2_addrs[] = { - { - .pa_start = 0x49050000, - .pa_end = 0x490501ff, - .flags = ADDR_TYPE_RT - }, - { } -}; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio2_hwmod, - .addr = omap3xxx_gpio2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_per -> gpio3 */ -static struct omap_hwmod_addr_space omap3xxx_gpio3_addrs[] = { - { - .pa_start = 0x49052000, - .pa_end = 0x490521ff, - .flags = ADDR_TYPE_RT - }, - { } -}; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio3_hwmod, - .addr = omap3xxx_gpio3_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3002,53 +2477,26 @@ static struct omap_hwmod omap3xxx_mmu_iva_hwmod = { }; /* l4_per -> gpio4 */ -static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = { - { - .pa_start = 0x49054000, - .pa_end = 0x490541ff, - .flags = ADDR_TYPE_RT - }, - { } -}; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio4 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio4_hwmod, - .addr = omap3xxx_gpio4_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_per -> gpio5 */ -static struct omap_hwmod_addr_space omap3xxx_gpio5_addrs[] = { - { - .pa_start = 0x49056000, - .pa_end = 0x490561ff, - .flags = ADDR_TYPE_RT - }, - { } -}; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio5 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio5_hwmod, - .addr = omap3xxx_gpio5_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_per -> gpio6 */ -static struct omap_hwmod_addr_space omap3xxx_gpio6_addrs[] = { - { - .pa_start = 0x49058000, - .pa_end = 0x490581ff, - .flags = ADDR_TYPE_RT - }, - { } -}; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio6_hwmod, - .addr = omap3xxx_gpio6_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3064,9 +2512,9 @@ static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { { .pa_start = 0x48056000, .pa_end = 0x48056fff, - .flags = ADDR_TYPE_RT + .flags = ADDR_TYPE_RT, }, - { } + { }, }; /* l4_cfg -> dma_system */ @@ -3078,136 +2526,66 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48074000, - .pa_end = 0x480740ff, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_core -> mcbsp1 */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_mcbsp1_hwmod, .clk = "mcbsp1_ick", - .addr = omap3xxx_mcbsp1_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { - { - .name = "mpu", - .pa_start = 0x49022000, - .pa_end = 0x490220ff, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> mcbsp2 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_mcbsp2_hwmod, .clk = "mcbsp2_ick", - .addr = omap3xxx_mcbsp2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { - { - .name = "mpu", - .pa_start = 0x49024000, - .pa_end = 0x490240ff, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> mcbsp3 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_mcbsp3_hwmod, .clk = "mcbsp3_ick", - .addr = omap3xxx_mcbsp3_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { - { - .name = "mpu", - .pa_start = 0x49026000, - .pa_end = 0x490260ff, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> mcbsp4 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_mcbsp4_hwmod, .clk = "mcbsp4_ick", - .addr = omap3xxx_mcbsp4_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48096000, - .pa_end = 0x480960ff, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_core -> mcbsp5 */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_mcbsp5_hwmod, .clk = "mcbsp5_ick", - .addr = omap3xxx_mcbsp5_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { - { - .name = "sidetone", - .pa_start = 0x49028000, - .pa_end = 0x490280ff, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> mcbsp2_sidetone */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_mcbsp2_sidetone_hwmod, .clk = "mcbsp2_ick", - .addr = omap3xxx_mcbsp2_sidetone_addrs, .user = OCP_USER_MPU, }; -static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { - { - .name = "sidetone", - .pa_start = 0x4902A000, - .pa_end = 0x4902A0ff, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_per -> mcbsp3_sidetone */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_mcbsp3_sidetone_hwmod, .clk = "mcbsp3_ick", - .addr = omap3xxx_mcbsp3_sidetone_addrs, .user = OCP_USER_MPU, }; @@ -3223,7 +2601,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_mcspi1, .clk = "mcspi1_ick", - .addr = omap2_mcspi1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3232,7 +2609,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_mcspi2, .clk = "mcspi2_ick", - .addr = omap2_mcspi2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3241,25 +2617,15 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_mcspi3, .clk = "mcspi3_ick", - .addr = omap2430_mcspi3_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi4 interface */ -static struct omap_hwmod_addr_space omap34xx_mcspi4_addr_space[] = { - { - .pa_start = 0x480ba000, - .pa_end = 0x480ba0ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_mcspi4, .clk = "mcspi4_ick", - .addr = omap34xx_mcspi4_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3270,49 +2636,19 @@ static struct omap_hwmod_ocp_if omap3xxx_usb_host_hs__l3_main_2 = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_addr_space omap3xxx_usb_host_hs_addrs[] = { - { - .name = "uhh", - .pa_start = 0x48064000, - .pa_end = 0x480643ff, - .flags = ADDR_TYPE_RT - }, - { - .name = "ohci", - .pa_start = 0x48064400, - .pa_end = 0x480647ff, - }, - { - .name = "ehci", - .pa_start = 0x48064800, - .pa_end = 0x48064cff, - }, - {} -}; static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_host_hs = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_usb_host_hs_hwmod, .clk = "usbhost_ick", - .addr = omap3xxx_usb_host_hs_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap3xxx_usb_tll_hs_addrs[] = { - { - .name = "tll", - .pa_start = 0x48062000, - .pa_end = 0x48062fff, - .flags = ADDR_TYPE_RT - }, - {} -}; static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_tll_hs = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_usb_tll_hs_hwmod, .clk = "usbtll_ick", - .addr = omap3xxx_usb_tll_hs_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3321,35 +2657,17 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__hdq1w = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_hdq1w_hwmod, .clk = "hdq_ick", - .addr = omap2_hdq1w_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, }; /* l4_wkup -> 32ksync_counter */ -static struct omap_hwmod_addr_space omap3xxx_counter_32k_addrs[] = { - { - .pa_start = 0x48320000, - .pa_end = 0x4832001f, - .flags = ADDR_TYPE_RT - }, - { } -}; -static struct omap_hwmod_addr_space omap3xxx_gpmc_addrs[] = { - { - .pa_start = 0x6e000000, - .pa_end = 0x6e000fff, - .flags = ADDR_TYPE_RT - }, - { } -}; static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__counter_32k = { .master = &omap3xxx_l4_wkup_hwmod, .slave = &omap3xxx_counter_32k_hwmod, .clk = "omap_32ksync_ick", - .addr = omap3xxx_counter_32k_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3434,7 +2752,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__gpmc = { .master = &omap3xxx_l3_main_hwmod, .slave = &omap3xxx_gpmc_hwmod, .clk = "core_l3_ick", - .addr = omap3xxx_gpmc_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3459,20 +2776,10 @@ static struct omap_hwmod_class omap3xxx_sham_class = { .sysc = &omap3_sham_sysc, }; -static struct omap_hwmod_irq_info omap3_sham_mpu_irqs[] = { - { .irq = 49 + OMAP_INTC_START, }, - { .irq = -1 } -}; -static struct omap_hwmod_dma_info omap3_sham_sdma_reqs[] = { - { .name = "rx", .dma_req = 69, }, - { .dma_req = -1 } -}; static struct omap_hwmod omap3xxx_sham_hwmod = { .name = "sham", - .mpu_irqs = omap3_sham_mpu_irqs, - .sdma_reqs = omap3_sham_sdma_reqs, .main_clk = "sha12_ick", .prcm = { .omap2 = { @@ -3486,20 +2793,11 @@ static struct omap_hwmod omap3xxx_sham_hwmod = { .class = &omap3xxx_sham_class, }; -static struct omap_hwmod_addr_space omap3xxx_sham_addrs[] = { - { - .pa_start = 0x480c3000, - .pa_end = 0x480c3000 + 0x64 - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; static struct omap_hwmod_ocp_if omap3xxx_l4_core__sham = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_sham_hwmod, .clk = "sha12_ick", - .addr = omap3xxx_sham_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3525,15 +2823,9 @@ static struct omap_hwmod_class omap3xxx_aes_class = { .sysc = &omap3_aes_sysc, }; -static struct omap_hwmod_dma_info omap3_aes_sdma_reqs[] = { - { .name = "tx", .dma_req = 65, }, - { .name = "rx", .dma_req = 66, }, - { .dma_req = -1 } -}; static struct omap_hwmod omap3xxx_aes_hwmod = { .name = "aes", - .sdma_reqs = omap3_aes_sdma_reqs, .main_clk = "aes2_ick", .prcm = { .omap2 = { @@ -3547,20 +2839,11 @@ static struct omap_hwmod omap3xxx_aes_hwmod = { .class = &omap3xxx_aes_class, }; -static struct omap_hwmod_addr_space omap3xxx_aes_addrs[] = { - { - .pa_start = 0x480c5000, - .pa_end = 0x480c5000 + 0x50 - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; static struct omap_hwmod_ocp_if omap3xxx_l4_core__aes = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_aes_hwmod, .clk = "aes2_ick", - .addr = omap3xxx_aes_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3661,28 +2944,28 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { /* GP-only hwmod links */ static struct omap_hwmod_ocp_if *omap34xx_gp_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_sec__timer12, - NULL + NULL, }; static struct omap_hwmod_ocp_if *omap36xx_gp_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_sec__timer12, - NULL + NULL, }; static struct omap_hwmod_ocp_if *am35xx_gp_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_sec__timer12, - NULL + NULL, }; /* crypto hwmod links */ static struct omap_hwmod_ocp_if *omap34xx_sham_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__sham, - NULL + NULL, }; static struct omap_hwmod_ocp_if *omap34xx_aes_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__aes, - NULL + NULL, }; static struct omap_hwmod_ocp_if *omap36xx_sham_hwmod_ocp_ifs[] __initdata = { @@ -3710,14 +2993,14 @@ static struct omap_hwmod_ocp_if *am35xx_sham_hwmod_ocp_ifs[] __initdata = { static struct omap_hwmod_ocp_if *am35xx_aes_hwmod_ocp_ifs[] __initdata = { /* &omap3xxx_l4_core__aes, */ - NULL + NULL, }; /* 3430ES1-only hwmod links */ static struct omap_hwmod_ocp_if *omap3430es1_hwmod_ocp_ifs[] __initdata = { &omap3430es1_dss__l3, &omap3430es1_l4_core__dss, - NULL + NULL, }; /* 3430ES2+-only hwmod links */ @@ -3729,21 +3012,21 @@ static struct omap_hwmod_ocp_if *omap3430es2plus_hwmod_ocp_ifs[] __initdata = { &omap3xxx_usb_host_hs__l3_main_2, &omap3xxx_l4_core__usb_host_hs, &omap3xxx_l4_core__usb_tll_hs, - NULL + NULL, }; /* <= 3430ES3-only hwmod links */ static struct omap_hwmod_ocp_if *omap3430_pre_es3_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__pre_es3_mmc1, &omap3xxx_l4_core__pre_es3_mmc2, - NULL + NULL, }; /* 3430ES3+-only hwmod links */ static struct omap_hwmod_ocp_if *omap3430_es3plus_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__es3plus_mmc1, &omap3xxx_l4_core__es3plus_mmc2, - NULL + NULL, }; /* 34xx-only hwmod links (all ES revisions) */ @@ -3757,7 +3040,7 @@ static struct omap_hwmod_ocp_if *omap34xx_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__mmu_isp, &omap3xxx_l3_main__mmu_iva, &omap3xxx_l4_core__ssi, - NULL + NULL, }; /* 36xx-only hwmod links (all ES revisions) */ @@ -3781,7 +3064,7 @@ static struct omap_hwmod_ocp_if *omap36xx_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__mmu_isp, &omap3xxx_l3_main__mmu_iva, &omap3xxx_l4_core__ssi, - NULL + NULL, }; static struct omap_hwmod_ocp_if *am35xx_hwmod_ocp_ifs[] __initdata = { @@ -3800,7 +3083,7 @@ static struct omap_hwmod_ocp_if *am35xx_hwmod_ocp_ifs[] __initdata = { &am35xx_l4_core__mdio, &am35xx_emac__l3, &am35xx_l4_core__emac, - NULL + NULL, }; static struct omap_hwmod_ocp_if *omap3xxx_dss_hwmod_ocp_ifs[] __initdata = { @@ -3808,7 +3091,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__dss_dsi1, &omap3xxx_l4_core__dss_rfbi, &omap3xxx_l4_core__dss_venc, - NULL + NULL, }; /** diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c index 61f2f301d739..afbce1f6f641 100644 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c @@ -442,6 +442,31 @@ static struct omap_hwmod am43xx_adc_tsc_hwmod = { }, }; +static struct omap_hwmod_class_sysconfig am43xx_des_sysc = { + .rev_offs = 0x30, + .sysc_offs = 0x34, + .syss_offs = 0x38, + .sysc_flags = SYSS_HAS_RESET_STATUS, +}; + +static struct omap_hwmod_class am43xx_des_hwmod_class = { + .name = "des", + .sysc = &am43xx_des_sysc, +}; + +static struct omap_hwmod am43xx_des_hwmod = { + .name = "des", + .class = &am43xx_des_hwmod_class, + .clkdm_name = "l3_clkdm", + .main_clk = "l3_gclk", + .prcm = { + .omap4 = { + .clkctrl_offs = AM43XX_CM_PER_DES_CLKCTRL_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + /* dss */ static struct omap_hwmod am43xx_dss_core_hwmod = { @@ -870,6 +895,13 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__vpfe1 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +static struct omap_hwmod_ocp_if am43xx_l3_main__des = { + .master = &am33xx_l3_main_hwmod, + .slave = &am43xx_des_hwmod, + .clk = "l3_gclk", + .user = OCP_USER_MPU, +}; + static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_wkup__synctimer, &am43xx_l4_ls__timer8, @@ -917,6 +949,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_per__i2c2, &am33xx_l4_per__i2c3, &am33xx_l4_per__mailbox, + &am33xx_l4_per__rng, &am33xx_l4_ls__mcasp0, &am33xx_l4_ls__mcasp1, &am33xx_l4_ls__mmc0, @@ -950,6 +983,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am33xx_cpgmac0__mdio, &am33xx_l3_main__sha0, &am33xx_l3_main__aes0, + &am43xx_l3_main__des, &am43xx_l4_ls__ocp2scp0, &am43xx_l4_ls__ocp2scp1, &am43xx_l3_s__usbotgss0, diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index 1ab7096af8e2..d0585293a381 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -690,6 +690,78 @@ static struct omap_hwmod dra7xx_dss_hdmi_hwmod = { .parent_hwmod = &dra7xx_dss_hwmod, }; +/* AES (the 'P' (public) device) */ +static struct omap_hwmod_class_sysconfig dra7xx_aes_sysc = { + .rev_offs = 0x0080, + .sysc_offs = 0x0084, + .syss_offs = 0x0088, + .sysc_flags = SYSS_HAS_RESET_STATUS, +}; + +static struct omap_hwmod_class dra7xx_aes_hwmod_class = { + .name = "aes", + .sysc = &dra7xx_aes_sysc, + .rev = 2, +}; + +/* AES1 */ +static struct omap_hwmod dra7xx_aes1_hwmod = { + .name = "aes1", + .class = &dra7xx_aes_hwmod_class, + .clkdm_name = "l4sec_clkdm", + .main_clk = "l3_iclk_div", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4SEC_AES1_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4SEC_AES1_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, + }, + }, +}; + +/* AES2 */ +static struct omap_hwmod dra7xx_aes2_hwmod = { + .name = "aes2", + .class = &dra7xx_aes_hwmod_class, + .clkdm_name = "l4sec_clkdm", + .main_clk = "l3_iclk_div", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4SEC_AES2_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4SEC_AES2_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, + }, + }, +}; + +/* sha0 HIB2 (the 'P' (public) device) */ +static struct omap_hwmod_class_sysconfig dra7xx_sha0_sysc = { + .rev_offs = 0x100, + .sysc_offs = 0x110, + .syss_offs = 0x114, + .sysc_flags = SYSS_HAS_RESET_STATUS, +}; + +static struct omap_hwmod_class dra7xx_sha0_hwmod_class = { + .name = "sham", + .sysc = &dra7xx_sha0_sysc, + .rev = 2, +}; + +struct omap_hwmod dra7xx_sha0_hwmod = { + .name = "sham", + .class = &dra7xx_sha0_hwmod_class, + .clkdm_name = "l4sec_clkdm", + .main_clk = "l3_iclk_div", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4SEC_SHA2MD51_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, + }, + }, +}; + /* * 'elm' class * @@ -2541,6 +2613,62 @@ static struct omap_hwmod dra7xx_uart10_hwmod = { }, }; +/* DES (the 'P' (public) device) */ +static struct omap_hwmod_class_sysconfig dra7xx_des_sysc = { + .rev_offs = 0x0030, + .sysc_offs = 0x0034, + .syss_offs = 0x0038, + .sysc_flags = SYSS_HAS_RESET_STATUS, +}; + +static struct omap_hwmod_class dra7xx_des_hwmod_class = { + .name = "des", + .sysc = &dra7xx_des_sysc, +}; + +/* DES */ +static struct omap_hwmod dra7xx_des_hwmod = { + .name = "des", + .class = &dra7xx_des_hwmod_class, + .clkdm_name = "l4sec_clkdm", + .main_clk = "l3_iclk_div", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4SEC_DES3DES_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4SEC_DES3DES_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, + }, + }, +}; + +/* rng */ +static struct omap_hwmod_class_sysconfig dra7xx_rng_sysc = { + .rev_offs = 0x1fe0, + .sysc_offs = 0x1fe4, + .sysc_flags = SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE, + .idlemodes = SIDLE_FORCE | SIDLE_NO, + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class dra7xx_rng_hwmod_class = { + .name = "rng", + .sysc = &dra7xx_rng_sysc, +}; + +static struct omap_hwmod dra7xx_rng_hwmod = { + .name = "rng", + .class = &dra7xx_rng_hwmod_class, + .flags = HWMOD_SWSUP_SIDLE, + .clkdm_name = "l4sec_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4SEC_RNG_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4SEC_RNG_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, + }, + }, +}; + /* * 'usb_otg_ss' class * @@ -2929,6 +3057,30 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l3_main_1 -> aes1 */ +static struct omap_hwmod_ocp_if dra7xx_l3_main_1__aes1 = { + .master = &dra7xx_l3_main_1_hwmod, + .slave = &dra7xx_aes1_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_1 -> aes2 */ +static struct omap_hwmod_ocp_if dra7xx_l3_main_1__aes2 = { + .master = &dra7xx_l3_main_1_hwmod, + .slave = &dra7xx_aes2_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_1 -> sha0 */ +static struct omap_hwmod_ocp_if dra7xx_l3_main_1__sha0 = { + .master = &dra7xx_l3_main_1_hwmod, + .slave = &dra7xx_sha0_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* l4_per2 -> mcasp1 */ static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp1 = { .master = &dra7xx_l4_per2_hwmod, @@ -3642,6 +3794,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart7 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_per1 -> des */ +static struct omap_hwmod_ocp_if dra7xx_l4_per1__des = { + .master = &dra7xx_l4_per1_hwmod, + .slave = &dra7xx_des_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* l4_per2 -> uart8 */ static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart8 = { .master = &dra7xx_l4_per2_hwmod, @@ -3666,6 +3826,13 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__uart10 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_per1 -> rng */ +static struct omap_hwmod_ocp_if dra7xx_l4_per1__rng = { + .master = &dra7xx_l4_per1_hwmod, + .slave = &dra7xx_rng_hwmod, + .user = OCP_USER_MPU, +}; + /* l4_per3 -> usb_otg_ss1 */ static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss1 = { .master = &dra7xx_l4_per3_hwmod, @@ -3800,6 +3967,9 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l3_main_1__dss, &dra7xx_l3_main_1__dispc, &dra7xx_l3_main_1__hdmi, + &dra7xx_l3_main_1__aes1, + &dra7xx_l3_main_1__aes2, + &dra7xx_l3_main_1__sha0, &dra7xx_l4_per1__elm, &dra7xx_l4_wkup__gpio1, &dra7xx_l4_per1__gpio2, @@ -3845,7 +4015,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l3_main_1__pciess2, &dra7xx_l4_cfg__pciess2, &dra7xx_l3_main_1__qspi, - &dra7xx_l4_per3__rtcss, &dra7xx_l4_cfg__sata, &dra7xx_l4_cfg__smartreflex_core, &dra7xx_l4_cfg__smartreflex_mpu, @@ -3875,6 +4044,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l4_per2__uart8, &dra7xx_l4_per2__uart9, &dra7xx_l4_wkup__uart10, + &dra7xx_l4_per1__des, &dra7xx_l4_per3__usb_otg_ss1, &dra7xx_l4_per3__usb_otg_ss2, &dra7xx_l4_per3__usb_otg_ss3, @@ -3892,6 +4062,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { /* GP-only hwmod links */ static struct omap_hwmod_ocp_if *dra7xx_gp_hwmod_ocp_ifs[] __initdata = { &dra7xx_l4_wkup__timer12, + &dra7xx_l4_per1__rng, NULL, }; @@ -3905,6 +4076,11 @@ static struct omap_hwmod_ocp_if *dra72x_hwmod_ocp_ifs[] __initdata = { NULL, }; +static struct omap_hwmod_ocp_if *dra74x_dra72x_hwmod_ocp_ifs[] __initdata = { + &dra7xx_l4_per3__rtcss, + NULL, +}; + int __init dra7xx_hwmod_init(void) { int ret; @@ -3920,5 +4096,9 @@ int __init dra7xx_hwmod_init(void) if (!ret && omap_type() == OMAP2_DEVICE_TYPE_GP) ret = omap_hwmod_register_links(dra7xx_gp_hwmod_ocp_ifs); + /* now for the IPs *NOT* in dra71 */ + if (!ret && !of_machine_is_compatible("ti,dra718")) + ret = omap_hwmod_register_links(dra74x_dra72x_hwmod_ocp_ifs); + return ret; } diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index 11ed5a17dd77..cdfbb44ceb0c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -19,22 +19,7 @@ #include "display.h" /* Common address space across OMAP2xxx/3xxx */ -extern struct omap_hwmod_addr_space omap2_i2c1_addr_space[]; -extern struct omap_hwmod_addr_space omap2_i2c2_addr_space[]; -extern struct omap_hwmod_addr_space omap2_dss_addrs[]; -extern struct omap_hwmod_addr_space omap2_dss_dispc_addrs[]; -extern struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[]; -extern struct omap_hwmod_addr_space omap2_dss_venc_addrs[]; -extern struct omap_hwmod_addr_space omap2_timer10_addrs[]; -extern struct omap_hwmod_addr_space omap2_timer11_addrs[]; -extern struct omap_hwmod_addr_space omap2430_mmc1_addr_space[]; -extern struct omap_hwmod_addr_space omap2430_mmc2_addr_space[]; -extern struct omap_hwmod_addr_space omap2_mcspi1_addr_space[]; -extern struct omap_hwmod_addr_space omap2_mcspi2_addr_space[]; -extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[]; extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; -extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; -extern struct omap_hwmod_addr_space omap2_hdq1w_addr_space[]; /* Common IP block data across OMAP2xxx */ extern struct omap_gpio_dev_attr omap2xxx_gpio_dev_attr; diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 05e20aaf68dd..477910a48448 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -31,7 +31,6 @@ #include "common.h" #include "common-board-devices.h" -#include "dss-common.h" #include "control.h" #include "omap_device.h" #include "omap-pm.h" diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 678d2a31dcb8..76b0454ddc49 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -30,7 +30,6 @@ #include "powerdomain.h" #include "clockdomain.h" #include "pm.h" -#include "twl-common.h" #ifdef CONFIG_SUSPEND /* @@ -72,42 +71,6 @@ void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) } #endif -static int __init _init_omap_device(char *name) -{ - struct omap_hwmod *oh; - struct platform_device *pdev; - - oh = omap_hwmod_lookup(name); - if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", - __func__, name)) - return -ENODEV; - - pdev = omap_device_build(oh->name, 0, oh, NULL, 0); - if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n", - __func__, name)) - return -ENODEV; - - return 0; -} - -/* - * Build omap_devices for processors and bus. - */ -static void __init omap2_init_processor_devices(void) -{ - _init_omap_device("mpu"); - if (omap3_has_iva()) - _init_omap_device("iva"); - - if (cpu_is_omap44xx()) { - _init_omap_device("l3_main_1"); - _init_omap_device("dsp"); - _init_omap_device("iva"); - } else { - _init_omap_device("l3_main"); - } -} - int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused) { clkdm_allow_idle(clkdm); @@ -215,7 +178,7 @@ static int omap_pm_enter(suspend_state_t suspend_state) static int omap_pm_begin(suspend_state_t state) { cpu_idle_poll_ctrl(true); - if (cpu_is_omap34xx()) + if (soc_is_omap34xx()) omap_prcm_irq_prepare(); return 0; } @@ -227,7 +190,7 @@ static void omap_pm_end(void) static void omap_pm_finish(void) { - if (cpu_is_omap34xx()) + if (soc_is_omap34xx()) omap_prcm_irq_complete(); } @@ -252,7 +215,7 @@ void omap_common_suspend_init(void *pm_suspend) static void __init omap3_init_voltages(void) { - if (!cpu_is_omap34xx()) + if (!soc_is_omap34xx()) return; omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu"); @@ -261,7 +224,7 @@ static void __init omap3_init_voltages(void) static void __init omap4_init_voltages(void) { - if (!cpu_is_omap44xx()) + if (!soc_is_omap44xx()) return; omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu"); @@ -269,18 +232,8 @@ static void __init omap4_init_voltages(void) omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva"); } -static inline void omap_init_cpufreq(void) -{ - struct platform_device_info devinfo = { .name = "omap-cpufreq" }; - - if (!of_have_populated_dt()) - platform_device_register_full(&devinfo); -} - static int __init omap2_common_pm_init(void) { - if (!of_have_populated_dt()) - omap2_init_processor_devices(); omap_pm_if_init(); return 0; @@ -289,13 +242,9 @@ omap_postcore_initcall(omap2_common_pm_init); int __init omap2_common_pm_late_init(void) { - if (of_have_populated_dt()) { - omap3_twl_init(); - omap4_twl_init(); - } - /* Init the voltage layer */ - omap_pmic_late_init(); + omap3_twl_init(); + omap4_twl_init(); omap_voltage_late_init(); /* Initialize the voltages */ @@ -305,8 +254,5 @@ int __init omap2_common_pm_late_init(void) /* Smartreflex device init */ omap_devinit_smartreflex(); - /* cpufreq dummy device instantiation */ - omap_init_cpufreq(); - return 0; } diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index 178e22c146b7..b3870220612e 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c @@ -287,7 +287,7 @@ int __init omap4_pm_init(void) /* Overwrite the default cpu_do_idle() */ arm_pm_idle = omap_default_idle; - if (cpu_is_omap44xx()) + if (cpu_is_omap44xx() || soc_is_omap54xx()) omap4_idle_init(); err2: diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h index babb5db5a3a4..e2ad14e77064 100644 --- a/arch/arm/mach-omap2/prcm43xx.h +++ b/arch/arm/mach-omap2/prcm43xx.h @@ -92,6 +92,7 @@ #define AM43XX_CM_PER_MAILBOX0_CLKCTRL_OFFSET 0x04b8 #define AM43XX_CM_PER_MMC0_CLKCTRL_OFFSET 0x04c0 #define AM43XX_CM_PER_MMC1_CLKCTRL_OFFSET 0x04c8 +#define AM43XX_CM_PER_RNG_CLKCTRL_OFFSET 0x04e0 #define AM43XX_CM_PER_SPI0_CLKCTRL_OFFSET 0x0500 #define AM43XX_CM_PER_SPI1_CLKCTRL_OFFSET 0x0508 #define AM43XX_CM_PER_SPINLOCK_CLKCTRL_OFFSET 0x0528 @@ -133,6 +134,7 @@ #define AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET 0x0050 #define AM43XX_CM_PER_SHA0_CLKCTRL_OFFSET 0x0058 #define AM43XX_CM_PER_AES0_CLKCTRL_OFFSET 0x0028 +#define AM43XX_CM_PER_DES_CLKCTRL_OFFSET 0x0030 #define AM43XX_CM_PER_TIMER8_CLKCTRL_OFFSET 0x0560 #define AM43XX_CM_PER_TIMER9_CLKCTRL_OFFSET 0x0568 #define AM43XX_CM_PER_TIMER10_CLKCTRL_OFFSET 0x0570 diff --git a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h deleted file mode 100644 index 1ee58c281a31..000000000000 --- a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * SDRC register values for the Hynix H8MBX00U0MER-0EM - * - * Copyright (C) 2009 Texas Instruments, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM -#define __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM - -#include "sdrc.h" - -/* Hynix H8MBX00U0MER-0EM */ -static struct omap_sdrc_params h8mbx00u0mer0em_sdrc_params[] = { - [0] = { - .rate = 200000000, - .actim_ctrla = 0xa2e1b4c6, - .actim_ctrlb = 0x0002131c, - .rfr_ctrl = 0x0005e601, - .mr = 0x00000032, - }, - [1] = { - .rate = 166000000, - .actim_ctrla = 0x629db4c6, - .actim_ctrlb = 0x00012214, - .rfr_ctrl = 0x0004dc01, - .mr = 0x00000032, - }, - [2] = { - .rate = 100000000, - .actim_ctrla = 0x51912284, - .actim_ctrlb = 0x0002120e, - .rfr_ctrl = 0x0002d101, - .mr = 0x00000022, - }, - [3] = { - .rate = 83000000, - .actim_ctrla = 0x31512283, - .actim_ctrlb = 0x0001220a, - .rfr_ctrl = 0x00025501, - .mr = 0x00000022, - }, - [4] = { - .rate = 0 - }, -}; - -#endif diff --git a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h deleted file mode 100644 index 85cccc004c06..000000000000 --- a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * SDRC register values for the Micron MT46H32M32LF-6 - * - * Copyright (C) 2008 Texas Instruments, Inc. - * Copyright (C) 2008-2009 Nokia Corporation - * - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF -#define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF - -#include "sdrc.h" - -/* Micron MT46H32M32LF-6 */ -/* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */ -static struct omap_sdrc_params mt46h32m32lf6_sdrc_params[] = { - [0] = { - .rate = 166000000, - .actim_ctrla = 0x9a9db4c6, - .actim_ctrlb = 0x00011217, - .rfr_ctrl = 0x0004dc01, - .mr = 0x00000032, - }, - [1] = { - .rate = 165941176, - .actim_ctrla = 0x9a9db4c6, - .actim_ctrlb = 0x00011217, - .rfr_ctrl = 0x0004dc01, - .mr = 0x00000032, - }, - [2] = { - .rate = 83000000, - .actim_ctrla = 0x51512283, - .actim_ctrlb = 0x0001120c, - .rfr_ctrl = 0x00025501, - .mr = 0x00000032, - }, - [3] = { - .rate = 82970588, - .actim_ctrla = 0x51512283, - .actim_ctrlb = 0x0001120c, - .rfr_ctrl = 0x00025501, - .mr = 0x00000032, - }, - [4] = { - .rate = 0 - }, -}; - -#endif diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c deleted file mode 100644 index 0fa7ffa9b5ed..000000000000 --- a/arch/arm/mach-omap2/sdram-nokia.c +++ /dev/null @@ -1,299 +0,0 @@ -/* - * SDRC register values for Nokia boards - * - * Copyright (C) 2008, 2010-2011 Nokia Corporation - * - * Lauri Leukkunen <lauri.leukkunen@nokia.com> - * - * Original code by Juha Yrjola <juha.yrjola@solidboot.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/io.h> - -#include "common.h" -#include "sdram-nokia.h" -#include "sdrc.h" - -/* In picoseconds, except for tREF (ns), tXP, tCKE, tWTR (clks) */ -struct sdram_timings { - u32 casl; - u32 tDAL; - u32 tDPL; - u32 tRRD; - u32 tRCD; - u32 tRP; - u32 tRAS; - u32 tRC; - u32 tRFC; - u32 tXSR; - - u32 tREF; /* in ns */ - - u32 tXP; - u32 tCKE; - u32 tWTR; -}; - -static const struct sdram_timings nokia_97dot6mhz_timings[] = { - { - .casl = 3, - .tDAL = 30725, - .tDPL = 15362, - .tRRD = 10241, - .tRCD = 20483, - .tRP = 15362, - .tRAS = 40967, - .tRC = 56330, - .tRFC = 138266, - .tXSR = 204839, - - .tREF = 7798, - - .tXP = 2, - .tCKE = 4, - .tWTR = 2, - }, -}; - -static const struct sdram_timings nokia_166mhz_timings[] = { - { - .casl = 3, - .tDAL = 33000, - .tDPL = 15000, - .tRRD = 12000, - .tRCD = 22500, - .tRP = 18000, - .tRAS = 42000, - .tRC = 66000, - .tRFC = 138000, - .tXSR = 200000, - - .tREF = 7800, - - .tXP = 2, - .tCKE = 2, - .tWTR = 2 - }, -}; - -static const struct sdram_timings nokia_195dot2mhz_timings[] = { - { - .casl = 3, - .tDAL = 30725, - .tDPL = 15362, - .tRRD = 10241, - .tRCD = 20483, - .tRP = 15362, - .tRAS = 40967, - .tRC = 56330, - .tRFC = 138266, - .tXSR = 204839, - - .tREF = 7752, - - .tXP = 2, - .tCKE = 4, - .tWTR = 2, - }, -}; - -static const struct sdram_timings nokia_200mhz_timings[] = { - { - .casl = 3, - .tDAL = 30000, - .tDPL = 15000, - .tRRD = 10000, - .tRCD = 20000, - .tRP = 15000, - .tRAS = 40000, - .tRC = 55000, - .tRFC = 140000, - .tXSR = 200000, - - .tREF = 7800, - - .tXP = 2, - .tCKE = 4, - .tWTR = 2 - }, -}; - -static const struct { - long rate; - struct sdram_timings const *data; -} nokia_timings[] = { - { 83000000, nokia_166mhz_timings }, - { 97600000, nokia_97dot6mhz_timings }, - { 100000000, nokia_200mhz_timings }, - { 166000000, nokia_166mhz_timings }, - { 195200000, nokia_195dot2mhz_timings }, - { 200000000, nokia_200mhz_timings }, -}; -static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1]; - -static unsigned long sdrc_get_fclk_period(long rate) -{ - /* In picoseconds */ - return 1000000000 / rate; -} - -static unsigned int sdrc_ps_to_ticks(unsigned int time_ps, long rate) -{ - unsigned long tick_ps; - - /* Calculate in picosecs to yield more exact results */ - tick_ps = sdrc_get_fclk_period(rate); - - return (time_ps + tick_ps - 1) / tick_ps; -} -#undef DEBUG -#ifdef DEBUG -static int set_sdrc_timing_regval(u32 *regval, int st_bit, int end_bit, - int ticks, long rate, const char *name) -#else -static int set_sdrc_timing_regval(u32 *regval, int st_bit, int end_bit, - int ticks) -#endif -{ - int mask, nr_bits; - - nr_bits = end_bit - st_bit + 1; - if (ticks >= 1 << nr_bits) - return -1; - mask = (1 << nr_bits) - 1; - *regval &= ~(mask << st_bit); - *regval |= ticks << st_bit; -#ifdef DEBUG - printk(KERN_INFO "SDRC %s: %i ticks %i ns\n", name, ticks, - (unsigned int)sdrc_get_fclk_period(rate) * ticks / - 1000); -#endif - - return 0; -} - -#ifdef DEBUG -#define SDRC_SET_ONE(reg, st, end, field, rate) \ - if (set_sdrc_timing_regval((reg), (st), (end), \ - memory_timings->field, (rate), #field) < 0) \ - err = -1; -#else -#define SDRC_SET_ONE(reg, st, end, field, rate) \ - if (set_sdrc_timing_regval((reg), (st), (end), \ - memory_timings->field) < 0) \ - err = -1; -#endif - -#ifdef DEBUG -static int set_sdrc_timing_regval_ps(u32 *regval, int st_bit, int end_bit, - int time, long rate, const char *name) -#else -static int set_sdrc_timing_regval_ps(u32 *regval, int st_bit, int end_bit, - int time, long rate) -#endif -{ - int ticks, ret; - ret = 0; - - if (time == 0) - ticks = 0; - else - ticks = sdrc_ps_to_ticks(time, rate); - -#ifdef DEBUG - ret = set_sdrc_timing_regval(regval, st_bit, end_bit, ticks, - rate, name); -#else - ret = set_sdrc_timing_regval(regval, st_bit, end_bit, ticks); -#endif - - return ret; -} - -#ifdef DEBUG -#define SDRC_SET_ONE_PS(reg, st, end, field, rate) \ - if (set_sdrc_timing_regval_ps((reg), (st), (end), \ - memory_timings->field, \ - (rate), #field) < 0) \ - err = -1; - -#else -#define SDRC_SET_ONE_PS(reg, st, end, field, rate) \ - if (set_sdrc_timing_regval_ps((reg), (st), (end), \ - memory_timings->field, (rate)) < 0) \ - err = -1; -#endif - -static int sdrc_timings(int id, long rate, - const struct sdram_timings *memory_timings) -{ - u32 ticks_per_ms; - u32 rfr, l; - u32 actim_ctrla = 0, actim_ctrlb = 0; - u32 rfr_ctrl; - int err = 0; - long l3_rate = rate / 1000; - - SDRC_SET_ONE_PS(&actim_ctrla, 0, 4, tDAL, l3_rate); - SDRC_SET_ONE_PS(&actim_ctrla, 6, 8, tDPL, l3_rate); - SDRC_SET_ONE_PS(&actim_ctrla, 9, 11, tRRD, l3_rate); - SDRC_SET_ONE_PS(&actim_ctrla, 12, 14, tRCD, l3_rate); - SDRC_SET_ONE_PS(&actim_ctrla, 15, 17, tRP, l3_rate); - SDRC_SET_ONE_PS(&actim_ctrla, 18, 21, tRAS, l3_rate); - SDRC_SET_ONE_PS(&actim_ctrla, 22, 26, tRC, l3_rate); - SDRC_SET_ONE_PS(&actim_ctrla, 27, 31, tRFC, l3_rate); - - SDRC_SET_ONE_PS(&actim_ctrlb, 0, 7, tXSR, l3_rate); - - SDRC_SET_ONE(&actim_ctrlb, 8, 10, tXP, l3_rate); - SDRC_SET_ONE(&actim_ctrlb, 12, 14, tCKE, l3_rate); - SDRC_SET_ONE(&actim_ctrlb, 16, 17, tWTR, l3_rate); - - ticks_per_ms = l3_rate; - rfr = memory_timings[0].tREF * ticks_per_ms / 1000000; - if (rfr > 65535 + 50) - rfr = 65535; - else - rfr -= 50; - -#ifdef DEBUG - printk(KERN_INFO "SDRC tREF: %i ticks\n", rfr); -#endif - - l = rfr << 8; - rfr_ctrl = l | 0x1; /* autorefresh, reload counter with 1xARCV */ - - nokia_sdrc_params[id].rate = rate; - nokia_sdrc_params[id].actim_ctrla = actim_ctrla; - nokia_sdrc_params[id].actim_ctrlb = actim_ctrlb; - nokia_sdrc_params[id].rfr_ctrl = rfr_ctrl; - nokia_sdrc_params[id].mr = 0x32; - - nokia_sdrc_params[id + 1].rate = 0; - - return err; -} - -struct omap_sdrc_params *nokia_get_sdram_timings(void) -{ - int err = 0; - int i; - - for (i = 0; i < ARRAY_SIZE(nokia_timings); i++) { - err |= sdrc_timings(i, nokia_timings[i].rate, - nokia_timings[i].data); - if (err) - pr_err("%s: error with rate %ld: %d\n", __func__, - nokia_timings[i].rate, err); - } - - return err ? NULL : nokia_sdrc_params; -} - diff --git a/arch/arm/mach-omap2/sdram-nokia.h b/arch/arm/mach-omap2/sdram-nokia.h deleted file mode 100644 index ee63da5f8df0..000000000000 --- a/arch/arm/mach-omap2/sdram-nokia.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * SDRC register values for Nokia boards - * - * Copyright (C) 2010 Nokia - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -struct omap_sdrc_params *nokia_get_sdram_timings(void); - diff --git a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h deleted file mode 100644 index 003f7bf4e2e3..000000000000 --- a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * SDRC register values for the Numonyx M65KXXXXAM - * - * Copyright (C) 2009 Integration Software and Electronic Engineering. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM -#define __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM - -#include "sdrc.h" - -/* Numonyx M65KXXXXAM */ -static struct omap_sdrc_params m65kxxxxam_sdrc_params[] = { - [0] = { - .rate = 200000000, - .actim_ctrla = 0xe321d4c6, - .actim_ctrlb = 0x00022328, - .rfr_ctrl = 0x0005e601, - .mr = 0x00000032, - }, - [1] = { - .rate = 166000000, - .actim_ctrla = 0xba9dc485, - .actim_ctrlb = 0x00022321, - .rfr_ctrl = 0x0004dc01, - .mr = 0x00000032, - }, - [2] = { - .rate = 133000000, - .actim_ctrla = 0x9a19b485, - .actim_ctrlb = 0x0002231b, - .rfr_ctrl = 0x0003de01, - .mr = 0x00000032, - }, - [3] = { - .rate = 83000000, - .actim_ctrla = 0x594ca242, - .actim_ctrlb = 0x00022310, - .rfr_ctrl = 0x00025501, - .mr = 0x00000032, - }, - [4] = { - .rate = 0 - }, -}; - -#endif diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h deleted file mode 100644 index 8dc3de5ebb5b..000000000000 --- a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * SDRC register values for the Qimonda HYB18M512160AF-6 - * - * Copyright (C) 2008-2009 Texas Instruments, Inc. - * Copyright (C) 2008-2009 Nokia Corporation - * - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 -#define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 - -#include "sdrc.h" - -/* Qimonda HYB18M512160AF-6 */ -static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = { - [0] = { - .rate = 166000000, - .actim_ctrla = 0x629db4c6, - .actim_ctrlb = 0x00012214, - .rfr_ctrl = 0x0004dc01, - .mr = 0x00000032, - }, - [1] = { - .rate = 165941176, - .actim_ctrla = 0x629db4c6, - .actim_ctrlb = 0x00012214, - .rfr_ctrl = 0x0004dc01, - .mr = 0x00000032, - }, - [2] = { - .rate = 83000000, - .actim_ctrla = 0x31512283, - .actim_ctrlb = 0x0001220a, - .rfr_ctrl = 0x00025501, - .mr = 0x00000022, - }, - [3] = { - .rate = 82970588, - .actim_ctrla = 0x31512283, - .actim_ctrlb = 0x0001220a, - .rfr_ctrl = 0x00025501, - .mr = 0x00000022, - }, - [4] = { - .rate = 0 - }, -}; - -#endif diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c deleted file mode 100644 index 8e072de89fed..000000000000 --- a/arch/arm/mach-omap2/serial.c +++ /dev/null @@ -1,332 +0,0 @@ -/* - * arch/arm/mach-omap2/serial.c - * - * OMAP2 serial support. - * - * Copyright (C) 2005-2008 Nokia Corporation - * Author: Paul Mundt <paul.mundt@nokia.com> - * - * Major rework for PM support by Kevin Hilman - * - * Based off of arch/arm/mach-omap/omap1/serial.c - * - * Copyright (C) 2009 Texas Instruments - * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/slab.h> -#include <linux/pm_runtime.h> -#include <linux/console.h> -#include <linux/omap-dma.h> -#include <linux/platform_data/serial-omap.h> - -#include "common.h" -#include "omap_hwmod.h" -#include "omap_device.h" -#include "omap-pm.h" -#include "soc.h" -#include "prm2xxx_3xxx.h" -#include "pm.h" -#include "cm2xxx_3xxx.h" -#include "prm-regbits-34xx.h" -#include "control.h" -#include "mux.h" -#include "serial.h" - -/* - * NOTE: By default the serial auto_suspend timeout is disabled as it causes - * lost characters over the serial ports. This means that the UART clocks will - * stay on until power/autosuspend_delay is set for the uart from sysfs. - * This also causes that any deeper omap sleep states are blocked. - */ -#define DEFAULT_AUTOSUSPEND_DELAY -1 - -#define MAX_UART_HWMOD_NAME_LEN 16 - -struct omap_uart_state { - int num; - - struct list_head node; - struct omap_hwmod *oh; - struct omap_device_pad default_omap_uart_pads[2]; -}; - -static LIST_HEAD(uart_list); -static u8 num_uarts; -static u8 console_uart_id = -1; -static u8 uart_debug; - -#define DEFAULT_RXDMA_POLLRATE 1 /* RX DMA polling rate (us) */ -#define DEFAULT_RXDMA_BUFSIZE 4096 /* RX DMA buffer size */ -#define DEFAULT_RXDMA_TIMEOUT (3 * HZ)/* RX DMA timeout (jiffies) */ - -static struct omap_uart_port_info omap_serial_default_info[] __initdata = { - { - .dma_enabled = false, - .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE, - .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE, - .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT, - .autosuspend_timeout = DEFAULT_AUTOSUSPEND_DELAY, - }, -}; - -#ifdef CONFIG_PM -static void omap_uart_enable_wakeup(struct device *dev, bool enable) -{ - struct platform_device *pdev = to_platform_device(dev); - struct omap_device *od = to_omap_device(pdev); - - if (!od) - return; - - if (enable) - omap_hwmod_enable_wakeup(od->hwmods[0]); - else - omap_hwmod_disable_wakeup(od->hwmods[0]); -} - -#else -static void omap_uart_enable_wakeup(struct device *dev, bool enable) -{} -#endif /* CONFIG_PM */ - -#ifdef CONFIG_OMAP_MUX - -#define OMAP_UART_DEFAULT_PAD_NAME_LEN 28 -static char rx_pad_name[OMAP_UART_DEFAULT_PAD_NAME_LEN], - tx_pad_name[OMAP_UART_DEFAULT_PAD_NAME_LEN] __initdata; - -static void __init -omap_serial_fill_uart_tx_rx_pads(struct omap_board_data *bdata, - struct omap_uart_state *uart) -{ - uart->default_omap_uart_pads[0].name = rx_pad_name; - uart->default_omap_uart_pads[0].flags = OMAP_DEVICE_PAD_REMUX | - OMAP_DEVICE_PAD_WAKEUP; - uart->default_omap_uart_pads[0].enable = OMAP_PIN_INPUT | - OMAP_MUX_MODE0; - uart->default_omap_uart_pads[0].idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0; - uart->default_omap_uart_pads[1].name = tx_pad_name; - uart->default_omap_uart_pads[1].enable = OMAP_PIN_OUTPUT | - OMAP_MUX_MODE0; - bdata->pads = uart->default_omap_uart_pads; - bdata->pads_cnt = ARRAY_SIZE(uart->default_omap_uart_pads); -} - -static void __init omap_serial_check_wakeup(struct omap_board_data *bdata, - struct omap_uart_state *uart) -{ - struct omap_mux_partition *tx_partition = NULL, *rx_partition = NULL; - struct omap_mux *rx_mux = NULL, *tx_mux = NULL; - char *rx_fmt, *tx_fmt; - int uart_nr = bdata->id + 1; - - if (bdata->id != 2) { - rx_fmt = "uart%d_rx.uart%d_rx"; - tx_fmt = "uart%d_tx.uart%d_tx"; - } else { - rx_fmt = "uart%d_rx_irrx.uart%d_rx_irrx"; - tx_fmt = "uart%d_tx_irtx.uart%d_tx_irtx"; - } - - snprintf(rx_pad_name, OMAP_UART_DEFAULT_PAD_NAME_LEN, rx_fmt, - uart_nr, uart_nr); - snprintf(tx_pad_name, OMAP_UART_DEFAULT_PAD_NAME_LEN, tx_fmt, - uart_nr, uart_nr); - - if (omap_mux_get_by_name(rx_pad_name, &rx_partition, &rx_mux) >= 0 && - omap_mux_get_by_name - (tx_pad_name, &tx_partition, &tx_mux) >= 0) { - u16 tx_mode, rx_mode; - - tx_mode = omap_mux_read(tx_partition, tx_mux->reg_offset); - rx_mode = omap_mux_read(rx_partition, rx_mux->reg_offset); - - /* - * Check if uart is used in default tx/rx mode i.e. in mux mode0 - * if yes then configure rx pin for wake up capability - */ - if (OMAP_MODE_UART(rx_mode) && OMAP_MODE_UART(tx_mode)) - omap_serial_fill_uart_tx_rx_pads(bdata, uart); - } -} -#else -static void __init omap_serial_check_wakeup(struct omap_board_data *bdata, - struct omap_uart_state *uart) -{ -} -#endif - -static char *cmdline_find_option(char *str) -{ - extern char *saved_command_line; - - return strstr(saved_command_line, str); -} - -static int __init omap_serial_early_init(void) -{ - if (of_have_populated_dt()) - return -ENODEV; - - do { - char oh_name[MAX_UART_HWMOD_NAME_LEN]; - struct omap_hwmod *oh; - struct omap_uart_state *uart; - char uart_name[MAX_UART_HWMOD_NAME_LEN]; - - snprintf(oh_name, MAX_UART_HWMOD_NAME_LEN, - "uart%d", num_uarts + 1); - oh = omap_hwmod_lookup(oh_name); - if (!oh) - break; - - uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL); - if (WARN_ON(!uart)) - return -ENODEV; - - uart->oh = oh; - uart->num = num_uarts++; - list_add_tail(&uart->node, &uart_list); - snprintf(uart_name, MAX_UART_HWMOD_NAME_LEN, - "%s%d", OMAP_SERIAL_NAME, uart->num); - - if (cmdline_find_option(uart_name)) { - console_uart_id = uart->num; - - if (console_loglevel >= CONSOLE_LOGLEVEL_DEBUG) { - uart_debug = true; - pr_info("%s used as console in debug mode: uart%d clocks will not be gated", - uart_name, uart->num); - } - } - } while (1); - - return 0; -} -omap_postcore_initcall(omap_serial_early_init); - -/** - * omap_serial_init_port() - initialize single serial port - * @bdata: port specific board data pointer - * @info: platform specific data pointer - * - * This function initialies serial driver for given port only. - * Platforms can call this function instead of omap_serial_init() - * if they don't plan to use all available UARTs as serial ports. - * - * Don't mix calls to omap_serial_init_port() and omap_serial_init(), - * use only one of the two. - */ -void __init omap_serial_init_port(struct omap_board_data *bdata, - struct omap_uart_port_info *info) -{ - struct omap_uart_state *uart; - struct omap_hwmod *oh; - struct platform_device *pdev; - void *pdata = NULL; - u32 pdata_size = 0; - char *name; - struct omap_uart_port_info omap_up; - - if (WARN_ON(!bdata)) - return; - if (WARN_ON(bdata->id < 0)) - return; - if (WARN_ON(bdata->id >= num_uarts)) - return; - - list_for_each_entry(uart, &uart_list, node) - if (bdata->id == uart->num) - break; - if (!info) - info = omap_serial_default_info; - - oh = uart->oh; - name = OMAP_SERIAL_DRIVER_NAME; - - omap_up.dma_enabled = info->dma_enabled; - omap_up.uartclk = OMAP24XX_BASE_BAUD * 16; - omap_up.flags = UPF_BOOT_AUTOCONF; - omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count; - omap_up.enable_wakeup = omap_uart_enable_wakeup; - omap_up.dma_rx_buf_size = info->dma_rx_buf_size; - omap_up.dma_rx_timeout = info->dma_rx_timeout; - omap_up.dma_rx_poll_rate = info->dma_rx_poll_rate; - omap_up.autosuspend_timeout = info->autosuspend_timeout; - - pdata = &omap_up; - pdata_size = sizeof(struct omap_uart_port_info); - - if (WARN_ON(!oh)) - return; - - pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size); - if (IS_ERR(pdev)) { - WARN(1, "Could not build omap_device for %s: %s.\n", name, - oh->name); - return; - } - - oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); - - if (console_uart_id == bdata->id) { - omap_device_enable(pdev); - pm_runtime_set_active(&pdev->dev); - } - - oh->dev_attr = uart; - - if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) - && !uart_debug) - device_init_wakeup(&pdev->dev, true); -} - -/** - * omap_serial_board_init() - initialize all supported serial ports - * @info: platform specific data pointer - * - * Initializes all available UARTs as serial ports. Platforms - * can call this function when they want to have default behaviour - * for serial ports (e.g initialize them all as serial ports). - */ -void __init omap_serial_board_init(struct omap_uart_port_info *info) -{ - struct omap_uart_state *uart; - struct omap_board_data bdata; - - list_for_each_entry(uart, &uart_list, node) { - bdata.id = uart->num; - bdata.flags = 0; - bdata.pads = NULL; - bdata.pads_cnt = 0; - - omap_serial_check_wakeup(&bdata, uart); - - if (!info) - omap_serial_init_port(&bdata, NULL); - else - omap_serial_init_port(&bdata, &info[uart->num]); - } -} - -/** - * omap_serial_init() - initialize all supported serial ports - * - * Initializes all available UARTs. - * Platforms can call this function when they want to have default behaviour - * for serial ports (e.g initialize them all as serial ports). - */ -void __init omap_serial_init(void) -{ - omap_serial_board_init(NULL); -} diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c deleted file mode 100644 index a72738eab009..000000000000 --- a/arch/arm/mach-omap2/twl-common.c +++ /dev/null @@ -1,564 +0,0 @@ -/* - * twl-common.c - * - * Copyright (C) 2011 Texas Instruments, Inc.. - * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA - * 02110-1301 USA - * - */ - -#include <linux/i2c.h> -#include <linux/i2c/twl.h> -#include <linux/gpio.h> -#include <linux/string.h> -#include <linux/phy/phy.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/fixed.h> - -#include "soc.h" -#include "twl-common.h" -#include "pm.h" -#include "voltage.h" -#include "mux.h" - -static struct i2c_board_info __initdata pmic_i2c_board_info = { - .addr = 0x48, - .flags = I2C_CLIENT_WAKE, -}; - -#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) -static int twl_set_voltage(void *data, int target_uV) -{ - struct voltagedomain *voltdm = (struct voltagedomain *)data; - return voltdm_scale(voltdm, target_uV); -} - -static int twl_get_voltage(void *data) -{ - struct voltagedomain *voltdm = (struct voltagedomain *)data; - return voltdm_get_voltage(voltdm); -} -#endif - -void __init omap_pmic_init(int bus, u32 clkrate, - const char *pmic_type, int pmic_irq, - struct twl4030_platform_data *pmic_data) -{ - omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); - strlcpy(pmic_i2c_board_info.type, pmic_type, - sizeof(pmic_i2c_board_info.type)); - pmic_i2c_board_info.irq = pmic_irq; - pmic_i2c_board_info.platform_data = pmic_data; - - omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); -} - -#ifdef CONFIG_ARCH_OMAP4 -void __init omap4_pmic_init(const char *pmic_type, - struct twl4030_platform_data *pmic_data, - struct i2c_board_info *devices, int nr_devices) -{ - /* PMIC part*/ - unsigned int irq; - - omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); - omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT); - irq = omap4_xlate_irq(7 + OMAP44XX_IRQ_GIC_START); - omap_pmic_init(1, 400, pmic_type, irq, pmic_data); - - /* Register additional devices on i2c1 bus if needed */ - if (devices) - i2c_register_board_info(1, devices, nr_devices); -} -#endif - -void __init omap_pmic_late_init(void) -{ - /* Init the OMAP TWL parameters (if PMIC has been registerd) */ - if (!pmic_i2c_board_info.irq) - return; - - omap3_twl_init(); - omap4_twl_init(); -} - -#if defined(CONFIG_ARCH_OMAP3) -static struct twl4030_usb_data omap3_usb_pdata = { - .usb_mode = T2_USB_MODE_ULPI, -}; - -static int omap3_batt_table[] = { -/* 0 C */ -30800, 29500, 28300, 27100, -26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, -17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, -11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, -8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, -5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, -4040, 3910, 3790, 3670, 3550 -}; - -static struct twl4030_bci_platform_data omap3_bci_pdata = { - .battery_tmp_tbl = omap3_batt_table, - .tblsize = ARRAY_SIZE(omap3_batt_table), -}; - -static struct twl4030_madc_platform_data omap3_madc_pdata = { - .irq_line = 1, -}; - -static struct twl4030_codec_data omap3_codec; - -static struct twl4030_audio_data omap3_audio_pdata = { - .audio_mclk = 26000000, - .codec = &omap3_codec, -}; - -static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), -}; - -static struct regulator_init_data omap3_vdac_idata = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies), - .consumer_supplies = omap3_vdda_dac_supplies, -}; - -static struct regulator_consumer_supply omap3_vpll2_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"), -}; - -static struct regulator_init_data omap3_vpll2_idata = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies), - .consumer_supplies = omap3_vpll2_supplies, -}; - -static struct regulator_consumer_supply omap3_vdd1_supply[] = { - REGULATOR_SUPPLY("vcc", "cpu0"), -}; - -static struct regulator_consumer_supply omap3_vdd2_supply[] = { - REGULATOR_SUPPLY("vcc", "l3_main.0"), -}; - -static struct regulator_init_data omap3_vdd1 = { - .constraints = { - .name = "vdd_mpu_iva", - .min_uV = 600000, - .max_uV = 1450000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3_vdd1_supply), - .consumer_supplies = omap3_vdd1_supply, -}; - -static struct regulator_init_data omap3_vdd2 = { - .constraints = { - .name = "vdd_core", - .min_uV = 600000, - .max_uV = 1450000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3_vdd2_supply), - .consumer_supplies = omap3_vdd2_supply, -}; - -static struct twl_regulator_driver_data omap3_vdd1_drvdata = { - .get_voltage = twl_get_voltage, - .set_voltage = twl_set_voltage, -}; - -static struct twl_regulator_driver_data omap3_vdd2_drvdata = { - .get_voltage = twl_get_voltage, - .set_voltage = twl_set_voltage, -}; - -void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, - u32 pdata_flags, u32 regulators_flags) -{ - if (!pmic_data->vdd1) { - omap3_vdd1.driver_data = &omap3_vdd1_drvdata; - omap3_vdd1_drvdata.data = voltdm_lookup("mpu_iva"); - pmic_data->vdd1 = &omap3_vdd1; - } - if (!pmic_data->vdd2) { - omap3_vdd2.driver_data = &omap3_vdd2_drvdata; - omap3_vdd2_drvdata.data = voltdm_lookup("core"); - pmic_data->vdd2 = &omap3_vdd2; - } - - /* Common platform data configurations */ - if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) - pmic_data->usb = &omap3_usb_pdata; - - if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) - pmic_data->bci = &omap3_bci_pdata; - - if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) - pmic_data->madc = &omap3_madc_pdata; - - if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio) - pmic_data->audio = &omap3_audio_pdata; - - /* Common regulator configurations */ - if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) - pmic_data->vdac = &omap3_vdac_idata; - - if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) - pmic_data->vpll2 = &omap3_vpll2_idata; -} -#endif /* CONFIG_ARCH_OMAP3 */ - -#if defined(CONFIG_ARCH_OMAP4) -static struct twl4030_usb_data omap4_usb_pdata = { -}; - -static struct regulator_consumer_supply omap4_vdda_hdmi_dac_supplies[] = { - REGULATOR_SUPPLY("vdda_hdmi_dac", "omapdss_hdmi"), -}; - -static struct regulator_init_data omap4_vdac_idata = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap4_vdda_hdmi_dac_supplies), - .consumer_supplies = omap4_vdda_hdmi_dac_supplies, - .supply_regulator = "V2V1", -}; - -static struct regulator_init_data omap4_vaux2_idata = { - .constraints = { - .min_uV = 1200000, - .max_uV = 2800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data omap4_vaux3_idata = { - .constraints = { - .min_uV = 1000000, - .max_uV = 3000000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_consumer_supply omap4_vmmc_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -}; - -/* VMMC1 for MMC1 card */ -static struct regulator_init_data omap4_vmmc_idata = { - .constraints = { - .min_uV = 1200000, - .max_uV = 3000000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply), - .consumer_supplies = omap4_vmmc_supply, -}; - -static struct regulator_init_data omap4_vpp_idata = { - .constraints = { - .min_uV = 1800000, - .max_uV = 2500000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data omap4_vana_idata = { - .constraints = { - .min_uV = 2100000, - .max_uV = 2100000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_consumer_supply omap4_vcxio_supply[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.1"), -}; - -static struct regulator_init_data omap4_vcxio_idata = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - .always_on = true, - }, - .num_consumer_supplies = ARRAY_SIZE(omap4_vcxio_supply), - .consumer_supplies = omap4_vcxio_supply, - .supply_regulator = "V2V1", -}; - -static struct regulator_init_data omap4_vusb_idata = { - .constraints = { - .min_uV = 3300000, - .max_uV = 3300000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_init_data omap4_clk32kg_idata = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -static struct regulator_consumer_supply omap4_vdd1_supply[] = { - REGULATOR_SUPPLY("vcc", "cpu0"), -}; - -static struct regulator_consumer_supply omap4_vdd2_supply[] = { - REGULATOR_SUPPLY("vcc", "iva.0"), -}; - -static struct regulator_consumer_supply omap4_vdd3_supply[] = { - REGULATOR_SUPPLY("vcc", "l3_main.0"), -}; - -static struct regulator_init_data omap4_vdd1 = { - .constraints = { - .name = "vdd_mpu", - .min_uV = 500000, - .max_uV = 1500000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .num_consumer_supplies = ARRAY_SIZE(omap4_vdd1_supply), - .consumer_supplies = omap4_vdd1_supply, -}; - -static struct regulator_init_data omap4_vdd2 = { - .constraints = { - .name = "vdd_iva", - .min_uV = 500000, - .max_uV = 1500000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .num_consumer_supplies = ARRAY_SIZE(omap4_vdd2_supply), - .consumer_supplies = omap4_vdd2_supply, -}; - -static struct regulator_init_data omap4_vdd3 = { - .constraints = { - .name = "vdd_core", - .min_uV = 500000, - .max_uV = 1500000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - }, - .num_consumer_supplies = ARRAY_SIZE(omap4_vdd3_supply), - .consumer_supplies = omap4_vdd3_supply, -}; - - -static struct twl_regulator_driver_data omap4_vdd1_drvdata = { - .get_voltage = twl_get_voltage, - .set_voltage = twl_set_voltage, -}; - -static struct twl_regulator_driver_data omap4_vdd2_drvdata = { - .get_voltage = twl_get_voltage, - .set_voltage = twl_set_voltage, -}; - -static struct twl_regulator_driver_data omap4_vdd3_drvdata = { - .get_voltage = twl_get_voltage, - .set_voltage = twl_set_voltage, -}; - -static struct regulator_consumer_supply omap4_v1v8_supply[] = { - REGULATOR_SUPPLY("vio", "1-004b"), -}; - -static struct regulator_init_data omap4_v1v8_idata = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - .always_on = true, - }, - .num_consumer_supplies = ARRAY_SIZE(omap4_v1v8_supply), - .consumer_supplies = omap4_v1v8_supply, -}; - -static struct regulator_consumer_supply omap4_v2v1_supply[] = { - REGULATOR_SUPPLY("v2v1", "1-004b"), -}; - -static struct regulator_init_data omap4_v2v1_idata = { - .constraints = { - .min_uV = 2100000, - .max_uV = 2100000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap4_v2v1_supply), - .consumer_supplies = omap4_v2v1_supply, -}; - -void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, - u32 pdata_flags, u32 regulators_flags) -{ - if (!pmic_data->vdd1) { - omap4_vdd1.driver_data = &omap4_vdd1_drvdata; - omap4_vdd1_drvdata.data = voltdm_lookup("mpu"); - pmic_data->vdd1 = &omap4_vdd1; - } - - if (!pmic_data->vdd2) { - omap4_vdd2.driver_data = &omap4_vdd2_drvdata; - omap4_vdd2_drvdata.data = voltdm_lookup("iva"); - pmic_data->vdd2 = &omap4_vdd2; - } - - if (!pmic_data->vdd3) { - omap4_vdd3.driver_data = &omap4_vdd3_drvdata; - omap4_vdd3_drvdata.data = voltdm_lookup("core"); - pmic_data->vdd3 = &omap4_vdd3; - } - - /* Common platform data configurations */ - if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) - pmic_data->usb = &omap4_usb_pdata; - - /* Common regulator configurations */ - if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) - pmic_data->vdac = &omap4_vdac_idata; - - if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2) - pmic_data->vaux2 = &omap4_vaux2_idata; - - if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3) - pmic_data->vaux3 = &omap4_vaux3_idata; - - if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc) - pmic_data->vmmc = &omap4_vmmc_idata; - - if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp) - pmic_data->vpp = &omap4_vpp_idata; - - if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana) - pmic_data->vana = &omap4_vana_idata; - - if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio) - pmic_data->vcxio = &omap4_vcxio_idata; - - if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb) - pmic_data->vusb = &omap4_vusb_idata; - - if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG && - !pmic_data->clk32kg) - pmic_data->clk32kg = &omap4_clk32kg_idata; - - if (regulators_flags & TWL_COMMON_REGULATOR_V1V8 && !pmic_data->v1v8) - pmic_data->v1v8 = &omap4_v1v8_idata; - - if (regulators_flags & TWL_COMMON_REGULATOR_V2V1 && !pmic_data->v2v1) - pmic_data->v2v1 = &omap4_v2v1_idata; -} -#endif /* CONFIG_ARCH_OMAP4 */ - -#if IS_ENABLED(CONFIG_SND_OMAP_SOC_OMAP_TWL4030) -#include <linux/platform_data/omap-twl4030.h> - -/* Commonly used configuration */ -static struct omap_tw4030_pdata omap_twl4030_audio_data; - -static struct platform_device audio_device = { - .name = "omap-twl4030", - .id = -1, -}; - -void omap_twl4030_audio_init(char *card_name, - struct omap_tw4030_pdata *pdata) -{ - if (!pdata) - pdata = &omap_twl4030_audio_data; - - pdata->card_name = card_name; - - audio_device.dev.platform_data = pdata; - platform_device_register(&audio_device); -} - -#else /* SOC_OMAP_TWL4030 */ -void omap_twl4030_audio_init(char *card_name, - struct omap_tw4030_pdata *pdata) -{ - return; -} -#endif /* SOC_OMAP_TWL4030 */ diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h deleted file mode 100644 index 24b65d081b69..000000000000 --- a/arch/arm/mach-omap2/twl-common.h +++ /dev/null @@ -1,66 +0,0 @@ -#ifndef __OMAP_PMIC_COMMON__ -#define __OMAP_PMIC_COMMON__ - -#include "common.h" - -#define TWL_COMMON_PDATA_USB (1 << 0) -#define TWL_COMMON_PDATA_BCI (1 << 1) -#define TWL_COMMON_PDATA_MADC (1 << 2) -#define TWL_COMMON_PDATA_AUDIO (1 << 3) - -/* Common LDO regulators for TWL4030/TWL6030 */ -#define TWL_COMMON_REGULATOR_VDAC (1 << 0) -#define TWL_COMMON_REGULATOR_VAUX1 (1 << 1) -#define TWL_COMMON_REGULATOR_VAUX2 (1 << 2) -#define TWL_COMMON_REGULATOR_VAUX3 (1 << 3) - -/* TWL6030 LDO regulators */ -#define TWL_COMMON_REGULATOR_VMMC (1 << 4) -#define TWL_COMMON_REGULATOR_VPP (1 << 5) -#define TWL_COMMON_REGULATOR_VUSIM (1 << 6) -#define TWL_COMMON_REGULATOR_VANA (1 << 7) -#define TWL_COMMON_REGULATOR_VCXIO (1 << 8) -#define TWL_COMMON_REGULATOR_VUSB (1 << 9) -#define TWL_COMMON_REGULATOR_CLK32KG (1 << 10) -#define TWL_COMMON_REGULATOR_V1V8 (1 << 11) -#define TWL_COMMON_REGULATOR_V2V1 (1 << 12) - -/* TWL4030 LDO regulators */ -#define TWL_COMMON_REGULATOR_VPLL1 (1 << 4) -#define TWL_COMMON_REGULATOR_VPLL2 (1 << 5) - - -struct twl4030_platform_data; -struct twl6040_platform_data; -struct omap_tw4030_pdata; -struct i2c_board_info; - -void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, - struct twl4030_platform_data *pmic_data); -void omap_pmic_late_init(void); - -static inline void omap2_pmic_init(const char *pmic_type, - struct twl4030_platform_data *pmic_data) -{ - omap_pmic_init(2, 2600, pmic_type, 7 + OMAP_INTC_START, pmic_data); -} - -static inline void omap3_pmic_init(const char *pmic_type, - struct twl4030_platform_data *pmic_data) -{ - omap_pmic_init(1, 2600, pmic_type, 7 + OMAP_INTC_START, pmic_data); -} - -void omap4_pmic_init(const char *pmic_type, - struct twl4030_platform_data *pmic_data, - struct i2c_board_info *devices, int nr_devices); - -void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, - u32 pdata_flags, u32 regulators_flags); - -void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, - u32 pdata_flags, u32 regulators_flags); - -void omap_twl4030_audio_init(char *card_name, struct omap_tw4030_pdata *pdata); - -#endif /* __OMAP_PMIC_COMMON__ */ diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c deleted file mode 100644 index 745367c0c2bb..000000000000 --- a/arch/arm/mach-omap2/usb-host.c +++ /dev/null @@ -1,496 +0,0 @@ -/* - * usb-host.c - OMAP USB Host - * - * This file will contain the board specific details for the - * Synopsys EHCI/OHCI host controller on OMAP3430 and onwards - * - * Copyright (C) 2007-2011 Texas Instruments - * Author: Vikram Pandita <vikram.pandita@ti.com> - * Author: Keshava Munegowda <keshava_mgowda@ti.com> - * - * Generalization by: - * Felipe Balbi <balbi@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/slab.h> -#include <linux/dma-mapping.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/fixed.h> -#include <linux/string.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/usb/phy.h> -#include <linux/usb/usb_phy_generic.h> - -#include "soc.h" -#include "omap_device.h" -#include "mux.h" -#include "usb.h" - -#ifdef CONFIG_MFD_OMAP_USB_HOST - -#define OMAP_USBHS_DEVICE "usbhs_omap" -#define OMAP_USBTLL_DEVICE "usbhs_tll" -#define USBHS_UHH_HWMODNAME "usb_host_hs" -#define USBHS_TLL_HWMODNAME "usb_tll_hs" - -/* MUX settings for EHCI pins */ -/* - * setup_ehci_io_mux - initialize IO pad mux for USBHOST - */ -static void __init setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) -{ - switch (port_mode[0]) { - case OMAP_EHCI_PORT_MODE_PHY: - omap_mux_init_signal("hsusb1_stp", OMAP_PIN_OUTPUT); - omap_mux_init_signal("hsusb1_clk", OMAP_PIN_OUTPUT); - omap_mux_init_signal("hsusb1_dir", OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_nxt", OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_data0", OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_data1", OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_data2", OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_data3", OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_data4", OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_data5", OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_data6", OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_data7", OMAP_PIN_INPUT_PULLDOWN); - break; - case OMAP_EHCI_PORT_MODE_TLL: - omap_mux_init_signal("hsusb1_tll_stp", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("hsusb1_tll_clk", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_tll_dir", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_tll_nxt", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_tll_data0", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_tll_data1", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_tll_data2", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_tll_data3", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_tll_data4", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_tll_data5", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_tll_data6", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb1_tll_data7", - OMAP_PIN_INPUT_PULLDOWN); - break; - case OMAP_USBHS_PORT_MODE_UNUSED: - /* FALLTHROUGH */ - default: - break; - } - - switch (port_mode[1]) { - case OMAP_EHCI_PORT_MODE_PHY: - omap_mux_init_signal("hsusb2_stp", OMAP_PIN_OUTPUT); - omap_mux_init_signal("hsusb2_clk", OMAP_PIN_OUTPUT); - omap_mux_init_signal("hsusb2_dir", OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_nxt", OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_data0", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_data1", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_data2", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_data3", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_data4", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_data5", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_data6", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_data7", - OMAP_PIN_INPUT_PULLDOWN); - break; - case OMAP_EHCI_PORT_MODE_TLL: - omap_mux_init_signal("hsusb2_tll_stp", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("hsusb2_tll_clk", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_tll_dir", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_tll_nxt", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_tll_data0", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_tll_data1", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_tll_data2", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_tll_data3", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_tll_data4", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_tll_data5", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_tll_data6", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb2_tll_data7", - OMAP_PIN_INPUT_PULLDOWN); - break; - case OMAP_USBHS_PORT_MODE_UNUSED: - /* FALLTHROUGH */ - default: - break; - } - - switch (port_mode[2]) { - case OMAP_EHCI_PORT_MODE_PHY: - printk(KERN_WARNING "Port3 can't be used in PHY mode\n"); - break; - case OMAP_EHCI_PORT_MODE_TLL: - omap_mux_init_signal("hsusb3_tll_stp", - OMAP_PIN_INPUT_PULLUP); - omap_mux_init_signal("hsusb3_tll_clk", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb3_tll_dir", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb3_tll_nxt", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb3_tll_data0", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb3_tll_data1", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb3_tll_data2", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb3_tll_data3", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb3_tll_data4", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb3_tll_data5", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb3_tll_data6", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("hsusb3_tll_data7", - OMAP_PIN_INPUT_PULLDOWN); - break; - case OMAP_USBHS_PORT_MODE_UNUSED: - /* FALLTHROUGH */ - default: - break; - } - - return; -} - -static void __init setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) -{ - switch (port_mode[0]) { - case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: - case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: - omap_mux_init_signal("mm1_rxdp", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("mm1_rxdm", - OMAP_PIN_INPUT_PULLDOWN); - /* FALLTHROUGH */ - case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: - case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: - omap_mux_init_signal("mm1_rxrcv", - OMAP_PIN_INPUT_PULLDOWN); - /* FALLTHROUGH */ - case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: - omap_mux_init_signal("mm1_txen_n", OMAP_PIN_OUTPUT); - /* FALLTHROUGH */ - case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: - omap_mux_init_signal("mm1_txse0", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("mm1_txdat", - OMAP_PIN_INPUT_PULLDOWN); - break; - case OMAP_USBHS_PORT_MODE_UNUSED: - /* FALLTHROUGH */ - default: - break; - } - switch (port_mode[1]) { - case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: - case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: - omap_mux_init_signal("mm2_rxdp", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("mm2_rxdm", - OMAP_PIN_INPUT_PULLDOWN); - /* FALLTHROUGH */ - case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: - case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: - omap_mux_init_signal("mm2_rxrcv", - OMAP_PIN_INPUT_PULLDOWN); - /* FALLTHROUGH */ - case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: - omap_mux_init_signal("mm2_txen_n", OMAP_PIN_OUTPUT); - /* FALLTHROUGH */ - case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: - omap_mux_init_signal("mm2_txse0", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("mm2_txdat", - OMAP_PIN_INPUT_PULLDOWN); - break; - case OMAP_USBHS_PORT_MODE_UNUSED: - /* FALLTHROUGH */ - default: - break; - } - switch (port_mode[2]) { - case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: - case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: - omap_mux_init_signal("mm3_rxdp", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("mm3_rxdm", - OMAP_PIN_INPUT_PULLDOWN); - /* FALLTHROUGH */ - case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: - case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: - omap_mux_init_signal("mm3_rxrcv", - OMAP_PIN_INPUT_PULLDOWN); - /* FALLTHROUGH */ - case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: - omap_mux_init_signal("mm3_txen_n", OMAP_PIN_OUTPUT); - /* FALLTHROUGH */ - case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: - case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: - omap_mux_init_signal("mm3_txse0", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("mm3_txdat", - OMAP_PIN_INPUT_PULLDOWN); - break; - case OMAP_USBHS_PORT_MODE_UNUSED: - /* FALLTHROUGH */ - default: - break; - } -} - -void __init usbhs_init(struct usbhs_omap_platform_data *pdata) -{ - struct omap_hwmod *uhh_hwm, *tll_hwm; - struct platform_device *pdev; - int bus_id = -1; - - if (cpu_is_omap34xx()) { - setup_ehci_io_mux(pdata->port_mode); - setup_ohci_io_mux(pdata->port_mode); - - if (omap_rev() <= OMAP3430_REV_ES2_1) - pdata->single_ulpi_bypass = true; - - } - - uhh_hwm = omap_hwmod_lookup(USBHS_UHH_HWMODNAME); - if (!uhh_hwm) { - pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME); - return; - } - - tll_hwm = omap_hwmod_lookup(USBHS_TLL_HWMODNAME); - if (!tll_hwm) { - pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME); - return; - } - - pdev = omap_device_build(OMAP_USBTLL_DEVICE, bus_id, tll_hwm, - pdata, sizeof(*pdata)); - if (IS_ERR(pdev)) { - pr_err("Could not build hwmod device %s\n", - USBHS_TLL_HWMODNAME); - return; - } - - pdev = omap_device_build(OMAP_USBHS_DEVICE, bus_id, uhh_hwm, - pdata, sizeof(*pdata)); - if (IS_ERR(pdev)) { - pr_err("Could not build hwmod devices %s\n", - USBHS_UHH_HWMODNAME); - return; - } -} - -#else - -void __init usbhs_init(struct usbhs_omap_platform_data *pdata) -{ -} - -#endif - -/* Template for PHY regulators */ -static struct fixed_voltage_config hsusb_reg_config = { - /* .supply_name filled later */ - .microvolts = 3300000, - .gpio = -1, /* updated later */ - .startup_delay = 70000, /* 70msec */ - .enable_high = 1, /* updated later */ - .enabled_at_boot = 0, /* keep in RESET */ - /* .init_data filled later */ -}; - -static const char *nop_name = "usb_phy_generic"; /* NOP PHY driver */ -static const char *reg_name = "reg-fixed-voltage"; /* Regulator driver */ - -/** - * usbhs_add_regulator - Add a gpio based fixed voltage regulator device - * @name: name for the regulator - * @dev_id: device id of the device this regulator supplies power to - * @dev_supply: supply name that the device expects - * @gpio: GPIO number - * @polarity: 1 - Active high, 0 - Active low - */ -static int usbhs_add_regulator(char *name, char *dev_id, char *dev_supply, - int gpio, int polarity) -{ - struct regulator_consumer_supply *supplies; - struct regulator_init_data *reg_data; - struct fixed_voltage_config *config; - struct platform_device *pdev; - struct platform_device_info pdevinfo; - int ret = -ENOMEM; - - supplies = kzalloc(sizeof(*supplies), GFP_KERNEL); - if (!supplies) - return -ENOMEM; - - supplies->supply = dev_supply; - supplies->dev_name = dev_id; - - reg_data = kzalloc(sizeof(*reg_data), GFP_KERNEL); - if (!reg_data) - goto err_data; - - reg_data->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS; - reg_data->consumer_supplies = supplies; - reg_data->num_consumer_supplies = 1; - - config = kmemdup(&hsusb_reg_config, sizeof(hsusb_reg_config), - GFP_KERNEL); - if (!config) - goto err_config; - - config->supply_name = kstrdup(name, GFP_KERNEL); - if (!config->supply_name) - goto err_supplyname; - - config->gpio = gpio; - config->enable_high = polarity; - config->init_data = reg_data; - - /* create a regulator device */ - memset(&pdevinfo, 0, sizeof(pdevinfo)); - pdevinfo.name = reg_name; - pdevinfo.id = PLATFORM_DEVID_AUTO; - pdevinfo.data = config; - pdevinfo.size_data = sizeof(*config); - - pdev = platform_device_register_full(&pdevinfo); - if (IS_ERR(pdev)) { - ret = PTR_ERR(pdev); - pr_err("%s: Failed registering regulator %s for %s : %d\n", - __func__, name, dev_id, ret); - goto err_register; - } - - return 0; - -err_register: - kfree(config->supply_name); -err_supplyname: - kfree(config); -err_config: - kfree(reg_data); -err_data: - kfree(supplies); - return ret; -} - -#define MAX_STR 20 - -int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys) -{ - char rail_name[MAX_STR]; - int i; - struct platform_device *pdev; - char *phy_id; - struct platform_device_info pdevinfo; - struct usb_phy_generic_platform_data nop_pdata; - - for (i = 0; i < num_phys; i++) { - - if (!phy->port) { - pr_err("%s: Invalid port 0. Must start from 1\n", - __func__); - continue; - } - - /* do we need a NOP PHY device ? */ - if (!gpio_is_valid(phy->reset_gpio) && - !gpio_is_valid(phy->vcc_gpio)) - continue; - - phy_id = kmalloc(MAX_STR, GFP_KERNEL); - if (!phy_id) { - pr_err("%s: kmalloc() failed\n", __func__); - return -ENOMEM; - } - - /* set platform data */ - memset(&nop_pdata, 0, sizeof(nop_pdata)); - if (gpio_is_valid(phy->vcc_gpio)) - nop_pdata.needs_vcc = true; - nop_pdata.gpio_reset = phy->reset_gpio; - nop_pdata.type = USB_PHY_TYPE_USB2; - - /* create a NOP PHY device */ - memset(&pdevinfo, 0, sizeof(pdevinfo)); - pdevinfo.name = nop_name; - pdevinfo.id = phy->port; - pdevinfo.data = &nop_pdata; - pdevinfo.size_data = - sizeof(struct usb_phy_generic_platform_data); - scnprintf(phy_id, MAX_STR, "usb_phy_generic.%d", - phy->port); - pdev = platform_device_register_full(&pdevinfo); - if (IS_ERR(pdev)) { - pr_err("%s: Failed to register device %s : %ld\n", - __func__, phy_id, PTR_ERR(pdev)); - kfree(phy_id); - continue; - } - - usb_bind_phy("ehci-omap.0", phy->port - 1, phy_id); - - /* Do we need VCC regulator ? */ - if (gpio_is_valid(phy->vcc_gpio)) { - scnprintf(rail_name, MAX_STR, "hsusb%d_vcc", phy->port); - usbhs_add_regulator(rail_name, phy_id, "vcc", - phy->vcc_gpio, phy->vcc_polarity); - } - - phy++; - } - - return 0; -} diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c deleted file mode 100644 index e4562b2b973b..000000000000 --- a/arch/arm/mach-omap2/usb-musb.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/usb-musb.c - * - * This file will contain the board specific details for the - * MENTOR USB OTG controller on OMAP3430 - * - * Copyright (C) 2007-2008 Texas Instruments - * Copyright (C) 2008 Nokia Corporation - * Author: Vikram Pandita - * - * Generalization by: - * Felipe Balbi <felipe.balbi@nokia.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/clk.h> -#include <linux/dma-mapping.h> -#include <linux/io.h> -#include <linux/usb/musb.h> - -#include "omap_device.h" -#include "soc.h" -#include "mux.h" -#include "usb.h" - -static struct musb_hdrc_config musb_config = { - .multipoint = 1, - .dyn_fifo = 1, - .num_eps = 16, - .ram_bits = 12, -}; - -static struct musb_hdrc_platform_data musb_plat = { - .mode = MUSB_OTG, - - /* .clock is set dynamically */ - .config = &musb_config, - - /* REVISIT charge pump on TWL4030 can supply up to - * 100 mA ... but this value is board-specific, like - * "mode", and should be passed to usb_musb_init(). - */ - .power = 50, /* up to 100 mA */ -}; - -static u64 musb_dmamask = DMA_BIT_MASK(32); - -static struct omap_musb_board_data musb_default_board_data = { - .interface_type = MUSB_INTERFACE_ULPI, - .mode = MUSB_OTG, - .power = 100, -}; - -void __init usb_musb_init(struct omap_musb_board_data *musb_board_data) -{ - struct omap_hwmod *oh; - struct platform_device *pdev; - struct device *dev; - int bus_id = -1; - const char *oh_name, *name; - struct omap_musb_board_data *board_data; - - if (musb_board_data) - board_data = musb_board_data; - else - board_data = &musb_default_board_data; - - /* - * REVISIT: This line can be removed once all the platforms using - * musb_core.c have been converted to use use clkdev. - */ - musb_plat.clock = "ick"; - musb_plat.board_data = board_data; - musb_plat.power = board_data->power >> 1; - musb_plat.mode = board_data->mode; - musb_plat.extvbus = board_data->extvbus; - - oh_name = "usb_otg_hs"; - name = "musb-omap2430"; - - oh = omap_hwmod_lookup(oh_name); - if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", - __func__, oh_name)) - return; - - pdev = omap_device_build(name, bus_id, oh, &musb_plat, - sizeof(musb_plat)); - if (IS_ERR(pdev)) { - pr_err("Could not build omap_device for %s %s\n", - name, oh_name); - return; - } - - dev = &pdev->dev; - get_device(dev); - dev->dma_mask = &musb_dmamask; - dev->coherent_dma_mask = musb_dmamask; - put_device(dev); -} diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index e554d9e66a1c..c2a6fbd7f8a9 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c @@ -22,8 +22,6 @@ #include "gpmc.h" -#include "mux.h" - static u8 async_cs, sync_cs; static unsigned refclk_psec; @@ -226,25 +224,6 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data, } tusb_device.dev.platform_data = data; - /* REVISIT let the driver know what DMA channels work */ - if (!dmachan) - tusb_device.dev.dma_mask = NULL; - else { - /* assume OMAP 2420 ES2.0 and later */ - if (dmachan & (1 << 0)) - omap_mux_init_signal("sys_ndmareq0", 0); - if (dmachan & (1 << 1)) - omap_mux_init_signal("sys_ndmareq1", 0); - if (dmachan & (1 << 2)) - omap_mux_init_signal("sys_ndmareq2", 0); - if (dmachan & (1 << 3)) - omap_mux_init_signal("sys_ndmareq3", 0); - if (dmachan & (1 << 4)) - omap_mux_init_signal("sys_ndmareq4", 0); - if (dmachan & (1 << 5)) - omap_mux_init_signal("sys_ndmareq5", 0); - } - /* so far so good ... register the device */ status = platform_device_register(&tusb_device); if (status < 0) { diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig index 89bb0fc796bd..633442ad4e4c 100644 --- a/arch/arm/mach-orion5x/Kconfig +++ b/arch/arm/mach-orion5x/Kconfig @@ -84,13 +84,6 @@ config MACH_LINKSTATION_PRO Buffalo Linkstation Pro/Live platform. Both v1 and v2 devices are supported. -config MACH_LINKSTATION_LSCHL - bool "Buffalo Linkstation Live v3 (LS-CHL)" - select I2C_BOARDINFO if I2C - help - Say 'Y' here if you want your kernel to support the - Buffalo Linkstation Live v3 (LS-CHL) platform. - config MACH_LINKSTATION_MINI bool "Buffalo Linkstation Mini (Flattened Device Tree)" select ARCH_ORION5X_DT diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile index 4b2502b4ca0d..ae91872eeee4 100644 --- a/arch/arm/mach-orion5x/Makefile +++ b/arch/arm/mach-orion5x/Makefile @@ -18,7 +18,6 @@ obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o -obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o obj-$(CONFIG_MACH_D2NET_DT) += board-d2net.o diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c deleted file mode 100644 index dfdaa8a498a4..000000000000 --- a/arch/arm/mach-orion5x/ls-chl-setup.c +++ /dev/null @@ -1,331 +0,0 @@ -/* - * arch/arm/mach-orion5x/ls-chl-setup.c - * - * Maintainer: Ash Hughes <ashley.hughes@blueyonder.co.uk> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/mtd/physmap.h> -#include <linux/mv643xx_eth.h> -#include <linux/leds.h> -#include <linux/gpio_keys.h> -#include <linux/gpio-fan.h> -#include <linux/input.h> -#include <linux/i2c.h> -#include <linux/ata_platform.h> -#include <linux/gpio.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include "common.h" -#include "mpp.h" -#include "orion5x.h" - -/***************************************************************************** - * Linkstation LS-CHL Info - ****************************************************************************/ - -/* - * 256K NOR flash Device bus boot chip select - */ - -#define LSCHL_NOR_BOOT_BASE 0xf4000000 -#define LSCHL_NOR_BOOT_SIZE SZ_256K - -/***************************************************************************** - * 256KB NOR Flash on BOOT Device - ****************************************************************************/ - -static struct physmap_flash_data lschl_nor_flash_data = { - .width = 1, -}; - -static struct resource lschl_nor_flash_resource = { - .flags = IORESOURCE_MEM, - .start = LSCHL_NOR_BOOT_BASE, - .end = LSCHL_NOR_BOOT_BASE + LSCHL_NOR_BOOT_SIZE - 1, -}; - -static struct platform_device lschl_nor_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &lschl_nor_flash_data, - }, - .num_resources = 1, - .resource = &lschl_nor_flash_resource, -}; - -/***************************************************************************** - * Ethernet - ****************************************************************************/ - -static struct mv643xx_eth_platform_data lschl_eth_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(8), -}; - -/***************************************************************************** - * RTC 5C372a on I2C bus - ****************************************************************************/ - -static struct i2c_board_info __initdata lschl_i2c_rtc = { - I2C_BOARD_INFO("rs5c372a", 0x32), -}; - -/***************************************************************************** - * LEDs attached to GPIO - ****************************************************************************/ - -#define LSCHL_GPIO_LED_ALARM 2 -#define LSCHL_GPIO_LED_INFO 3 -#define LSCHL_GPIO_LED_FUNC 17 -#define LSCHL_GPIO_LED_PWR 0 - -static struct gpio_led lschl_led_pins[] = { - { - .name = "alarm:red", - .gpio = LSCHL_GPIO_LED_ALARM, - .active_low = 1, - }, { - .name = "info:amber", - .gpio = LSCHL_GPIO_LED_INFO, - .active_low = 1, - }, { - .name = "func:blue:top", - .gpio = LSCHL_GPIO_LED_FUNC, - .active_low = 1, - }, { - .name = "power:blue:bottom", - .gpio = LSCHL_GPIO_LED_PWR, - }, -}; - -static struct gpio_led_platform_data lschl_led_data = { - .leds = lschl_led_pins, - .num_leds = ARRAY_SIZE(lschl_led_pins), -}; - -static struct platform_device lschl_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &lschl_led_data, - }, -}; - -/***************************************************************************** - * SATA - ****************************************************************************/ -static struct mv_sata_platform_data lschl_sata_data = { - .n_ports = 2, -}; - -/***************************************************************************** - * LS-CHL specific power off method: reboot - ****************************************************************************/ -/* - * On the LS-CHL, the shutdown process is following: - * - Userland monitors key events until the power switch goes to off position - * - The board reboots - * - U-boot starts and goes into an idle mode waiting for the user - * to move the switch to ON position - * - */ - -static void lschl_power_off(void) -{ - orion5x_restart(REBOOT_HARD, NULL); -} - -/***************************************************************************** - * General Setup - ****************************************************************************/ -#define LSCHL_GPIO_USB_POWER 9 -#define LSCHL_GPIO_AUTO_POWER 17 -#define LSCHL_GPIO_POWER 18 - -/**************************************************************************** - * GPIO Attached Keys - ****************************************************************************/ -#define LSCHL_GPIO_KEY_FUNC 15 -#define LSCHL_GPIO_KEY_POWER 8 -#define LSCHL_GPIO_KEY_AUTOPOWER 10 -#define LSCHL_SW_POWER 0x00 -#define LSCHL_SW_AUTOPOWER 0x01 -#define LSCHL_SW_FUNC 0x02 - -static struct gpio_keys_button lschl_buttons[] = { - { - .type = EV_SW, - .code = LSCHL_SW_POWER, - .gpio = LSCHL_GPIO_KEY_POWER, - .desc = "Power-on Switch", - .active_low = 1, - }, { - .type = EV_SW, - .code = LSCHL_SW_AUTOPOWER, - .gpio = LSCHL_GPIO_KEY_AUTOPOWER, - .desc = "Power-auto Switch", - .active_low = 1, - }, { - .type = EV_SW, - .code = LSCHL_SW_FUNC, - .gpio = LSCHL_GPIO_KEY_FUNC, - .desc = "Function Switch", - .active_low = 1, - }, -}; - -static struct gpio_keys_platform_data lschl_button_data = { - .buttons = lschl_buttons, - .nbuttons = ARRAY_SIZE(lschl_buttons), -}; - -static struct platform_device lschl_button_device = { - .name = "gpio-keys", - .id = -1, - .num_resources = 0, - .dev = { - .platform_data = &lschl_button_data, - }, -}; - -#define LSCHL_GPIO_HDD_POWER 1 - -/**************************************************************************** - * GPIO Fan - ****************************************************************************/ - -#define LSCHL_GPIO_FAN_LOW 16 -#define LSCHL_GPIO_FAN_HIGH 14 -#define LSCHL_GPIO_FAN_LOCK 6 - -static struct gpio_fan_alarm lschl_alarm = { - .gpio = LSCHL_GPIO_FAN_LOCK, -}; - -static struct gpio_fan_speed lschl_speeds[] = { - { - .rpm = 0, - .ctrl_val = 3, - }, { - .rpm = 1500, - .ctrl_val = 2, - }, { - .rpm = 3250, - .ctrl_val = 1, - }, { - .rpm = 5000, - .ctrl_val = 0, - }, -}; - -static int lschl_gpio_list[] = { - LSCHL_GPIO_FAN_HIGH, LSCHL_GPIO_FAN_LOW, -}; - -static struct gpio_fan_platform_data lschl_fan_data = { - .num_ctrl = ARRAY_SIZE(lschl_gpio_list), - .ctrl = lschl_gpio_list, - .alarm = &lschl_alarm, - .num_speed = ARRAY_SIZE(lschl_speeds), - .speed = lschl_speeds, -}; - -static struct platform_device lschl_fan_device = { - .name = "gpio-fan", - .id = -1, - .num_resources = 0, - .dev = { - .platform_data = &lschl_fan_data, - }, -}; - -/**************************************************************************** - * GPIO Data - ****************************************************************************/ - -static unsigned int lschl_mpp_modes[] __initdata = { - MPP0_GPIO, /* LED POWER */ - MPP1_GPIO, /* HDD POWER */ - MPP2_GPIO, /* LED ALARM */ - MPP3_GPIO, /* LED INFO */ - MPP4_UNUSED, - MPP5_UNUSED, - MPP6_GPIO, /* FAN LOCK */ - MPP7_GPIO, /* SW INIT */ - MPP8_GPIO, /* SW POWER */ - MPP9_GPIO, /* USB POWER */ - MPP10_GPIO, /* SW AUTO POWER */ - MPP11_UNUSED, - MPP12_UNUSED, - MPP13_UNUSED, - MPP14_GPIO, /* FAN HIGH */ - MPP15_GPIO, /* SW FUNC */ - MPP16_GPIO, /* FAN LOW */ - MPP17_GPIO, /* LED FUNC */ - MPP18_UNUSED, - MPP19_UNUSED, - 0, -}; - -static void __init lschl_init(void) -{ - /* - * Setup basic Orion functions. Needs to be called early. - */ - orion5x_init(); - - orion5x_mpp_conf(lschl_mpp_modes); - - /* - * Configure peripherals. - */ - orion5x_ehci0_init(); - orion5x_ehci1_init(); - orion5x_eth_init(&lschl_eth_data); - orion5x_i2c_init(); - orion5x_sata_init(&lschl_sata_data); - orion5x_uart0_init(); - orion5x_xor_init(); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, - ORION_MBUS_DEVBUS_BOOT_ATTR, - LSCHL_NOR_BOOT_BASE, - LSCHL_NOR_BOOT_SIZE); - platform_device_register(&lschl_nor_flash); - - platform_device_register(&lschl_leds); - - platform_device_register(&lschl_button_device); - - platform_device_register(&lschl_fan_device); - - i2c_register_board_info(0, &lschl_i2c_rtc, 1); - - /* usb power on */ - gpio_set_value(LSCHL_GPIO_USB_POWER, 1); - - /* register power-off method */ - pm_power_off = lschl_power_off; - - pr_info("%s: finished\n", __func__); -} - -MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)") - /* Maintainer: Ash Hughes <ashley.hughes@blueyonder.co.uk> */ - .atag_offset = 0x100, - .nr_irqs = ORION5X_NR_IRQS, - .init_machine = lschl_init, - .map_io = orion5x_map_io, - .init_early = orion5x_init_early, - .init_irq = orion5x_init_irq, - .init_time = orion5x_timer_init, - .fixup = tag_fixup_mem32, - .restart = orion5x_restart, -MACHINE_END diff --git a/arch/arm/mach-oxnas/Kconfig b/arch/arm/mach-oxnas/Kconfig index 29100beb2e7f..8fa4557e27a9 100644 --- a/arch/arm/mach-oxnas/Kconfig +++ b/arch/arm/mach-oxnas/Kconfig @@ -1,9 +1,16 @@ menuconfig ARCH_OXNAS bool "Oxford Semiconductor OXNAS Family SoCs" select ARCH_HAS_RESET_CONTROLLER + select COMMON_CLK_OXNAS select GPIOLIB + select MFD_SYSCON + select OXNAS_RPS_TIMER + select PINCTRL_OXNAS + select RESET_CONTROLLER + select RESET_OXNAS + select VERSATILE_FPGA_IRQ select PINCTRL - depends on ARCH_MULTI_V5 + depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 help Support for OxNas SoC family developed by Oxford Semiconductor. @@ -11,16 +18,21 @@ if ARCH_OXNAS config MACH_OX810SE bool "Support OX810SE Based Products" - select ARCH_HAS_RESET_CONTROLLER - select COMMON_CLK_OXNAS + depends on ARCH_MULTI_V5 select CPU_ARM926T - select MFD_SYSCON - select OXNAS_RPS_TIMER - select PINCTRL_OXNAS - select RESET_CONTROLLER - select RESET_OXNAS - select VERSATILE_FPGA_IRQ help Include Support for the Oxford Semiconductor OX810SE SoC Based Products. +config MACH_OX820 + bool "Support OX820 Based Products" + depends on ARCH_MULTI_V6 + select ARM_GIC + select DMA_CACHE_RWFO if SMP + select CPU_V6K + select HAVE_SMP + select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD if SMP + help + Include Support for the Oxford Semiconductor OX820 SoC Based Products. + endif diff --git a/arch/arm/mach-oxnas/Makefile b/arch/arm/mach-oxnas/Makefile new file mode 100644 index 000000000000..b625906a9970 --- /dev/null +++ b/arch/arm/mach-oxnas/Makefile @@ -0,0 +1,2 @@ +obj-$(CONFIG_SMP) += platsmp.o headsmp.o +obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-oxnas/headsmp.S b/arch/arm/mach-oxnas/headsmp.S new file mode 100644 index 000000000000..25fd4f82ab3a --- /dev/null +++ b/arch/arm/mach-oxnas/headsmp.S @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com> + * Copyright (c) 2003 ARM Limited + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/linkage.h> +#include <linux/init.h> + + __INIT + +/* + * OX820 specific entry point for secondary CPUs. + */ +ENTRY(ox820_secondary_startup) + mov r4, #0 + /* invalidate both caches and branch target cache */ + mcr p15, 0, r4, c7, c7, 0 + /* + * we've been released from the holding pen: secondary_stack + * should now contain the SVC stack for this core + */ + b secondary_startup diff --git a/arch/arm/mach-oxnas/hotplug.c b/arch/arm/mach-oxnas/hotplug.c new file mode 100644 index 000000000000..854f29b8cba6 --- /dev/null +++ b/arch/arm/mach-oxnas/hotplug.c @@ -0,0 +1,109 @@ +/* + * Copyright (C) 2002 ARM Ltd. + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/smp.h> + +#include <asm/cp15.h> +#include <asm/smp_plat.h> + +static inline void cpu_enter_lowpower(void) +{ + unsigned int v; + + asm volatile( + " mcr p15, 0, %1, c7, c5, 0\n" + " mcr p15, 0, %1, c7, c10, 4\n" + /* + * Turn off coherency + */ + " mrc p15, 0, %0, c1, c0, 1\n" + " bic %0, %0, #0x20\n" + " mcr p15, 0, %0, c1, c0, 1\n" + " mrc p15, 0, %0, c1, c0, 0\n" + " bic %0, %0, %2\n" + " mcr p15, 0, %0, c1, c0, 0\n" + : "=&r" (v) + : "r" (0), "Ir" (CR_C) + : "cc"); +} + +static inline void cpu_leave_lowpower(void) +{ + unsigned int v; + + asm volatile( "mrc p15, 0, %0, c1, c0, 0\n" + " orr %0, %0, %1\n" + " mcr p15, 0, %0, c1, c0, 0\n" + " mrc p15, 0, %0, c1, c0, 1\n" + " orr %0, %0, #0x20\n" + " mcr p15, 0, %0, c1, c0, 1\n" + : "=&r" (v) + : "Ir" (CR_C) + : "cc"); +} + +static inline void platform_do_lowpower(unsigned int cpu, int *spurious) +{ + /* + * there is no power-control hardware on this platform, so all + * we can do is put the core into WFI; this is safe as the calling + * code will have already disabled interrupts + */ + for (;;) { + /* + * here's the WFI + */ + asm(".word 0xe320f003\n" + : + : + : "memory", "cc"); + + if (pen_release == cpu_logical_map(cpu)) { + /* + * OK, proper wakeup, we're done + */ + break; + } + + /* + * Getting here, means that we have come out of WFI without + * having been woken up - this shouldn't happen + * + * Just note it happening - when we're woken, we can report + * its occurrence. + */ + (*spurious)++; + } +} + +/* + * platform-specific code to shutdown a CPU + * + * Called with IRQs disabled + */ +void ox820_cpu_die(unsigned int cpu) +{ + int spurious = 0; + + /* + * we're ready for shutdown now, so do it + */ + cpu_enter_lowpower(); + platform_do_lowpower(cpu, &spurious); + + /* + * bring this CPU back into the world of cache + * coherency, and then restore interrupts + */ + cpu_leave_lowpower(); + + if (spurious) + pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious); +} diff --git a/arch/arm/mach-oxnas/platsmp.c b/arch/arm/mach-oxnas/platsmp.c new file mode 100644 index 000000000000..442cc8a2f7dc --- /dev/null +++ b/arch/arm/mach-oxnas/platsmp.c @@ -0,0 +1,102 @@ +/* + * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com> + * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com> + * Copyright (C) 2002 ARM Ltd. + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/io.h> +#include <linux/delay.h> +#include <linux/of.h> +#include <linux/of_address.h> + +#include <asm/cacheflush.h> +#include <asm/cp15.h> +#include <asm/smp_plat.h> +#include <asm/smp_scu.h> + +extern void ox820_secondary_startup(void); +extern void ox820_cpu_die(unsigned int cpu); + +static void __iomem *cpu_ctrl; +static void __iomem *gic_cpu_ctrl; + +#define HOLDINGPEN_CPU_OFFSET 0xc8 +#define HOLDINGPEN_LOCATION_OFFSET 0xc4 + +#define GIC_NCPU_OFFSET(cpu) (0x100 + (cpu)*0x100) +#define GIC_CPU_CTRL 0x00 +#define GIC_CPU_CTRL_ENABLE 1 + +int __init ox820_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + /* + * Write the address of secondary startup into the + * system-wide flags register. The BootMonitor waits + * until it receives a soft interrupt, and then the + * secondary CPU branches to this address. + */ + writel(virt_to_phys(ox820_secondary_startup), + cpu_ctrl + HOLDINGPEN_LOCATION_OFFSET); + + writel(cpu, cpu_ctrl + HOLDINGPEN_CPU_OFFSET); + + /* + * Enable GIC cpu interface in CPU Interface Control Register + */ + writel(GIC_CPU_CTRL_ENABLE, + gic_cpu_ctrl + GIC_NCPU_OFFSET(cpu) + GIC_CPU_CTRL); + + /* + * Send the secondary CPU a soft interrupt, thereby causing + * the boot monitor to read the system wide flags register, + * and branch to the address found there. + */ + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); + + return 0; +} + +static void __init ox820_smp_prepare_cpus(unsigned int max_cpus) +{ + struct device_node *np; + void __iomem *scu_base; + + np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-scu"); + scu_base = of_iomap(np, 0); + of_node_put(np); + if (!scu_base) + return; + + /* Remap CPU Interrupt Interface Registers */ + np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-gic"); + gic_cpu_ctrl = of_iomap(np, 1); + of_node_put(np); + if (!gic_cpu_ctrl) + goto unmap_scu; + + np = of_find_compatible_node(NULL, NULL, "oxsemi,ox820-sys-ctrl"); + cpu_ctrl = of_iomap(np, 0); + of_node_put(np); + if (!cpu_ctrl) + goto unmap_scu; + + scu_enable(scu_base); + flush_cache_all(); + +unmap_scu: + iounmap(scu_base); +} + +static const struct smp_operations ox820_smp_ops __initconst = { + .smp_prepare_cpus = ox820_smp_prepare_cpus, + .smp_boot_secondary = ox820_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_die = ox820_cpu_die, +#endif +}; + +CPU_METHOD_OF_DECLARE(ox820_smp, "oxsemi,ox820-smp", &ox820_smp_ops); diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 10bfdb169366..183cd3446f25 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -35,7 +35,6 @@ #include <linux/mtd/sharpsl.h> #include <linux/input/matrix_keypad.h> #include <linux/gpio_keys.h> -#include <linux/module.h> #include <linux/memblock.h> #include <video/w100fb.h> diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index 03354c21e1f2..811a7317f3ea 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c @@ -23,6 +23,7 @@ #include <linux/gpio.h> #include <linux/mfd/da903x.h> #include <linux/regulator/machine.h> +#include <linux/regulator/fixed.h> #include <linux/spi/spi.h> #include <linux/spi/tdo24m.h> #include <linux/spi/libertas_spi.h> @@ -34,8 +35,6 @@ #include <linux/i2c/pxa-i2c.h> #include <linux/regulator/userspace-consumer.h> -#include <media/soc_camera.h> - #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -958,8 +957,6 @@ static inline void em_x270_init_gpio_keys(void) {} /* Quick Capture Interface and sensor setup */ #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) -static struct regulator *em_x270_camera_ldo; - static int em_x270_sensor_init(void) { int ret; @@ -969,81 +966,53 @@ static int em_x270_sensor_init(void) return ret; gpio_direction_output(cam_reset, 0); - - em_x270_camera_ldo = regulator_get(NULL, "vcc cam"); - if (em_x270_camera_ldo == NULL) { - gpio_free(cam_reset); - return -ENODEV; - } - - ret = regulator_enable(em_x270_camera_ldo); - if (ret) { - regulator_put(em_x270_camera_ldo); - gpio_free(cam_reset); - return ret; - } - gpio_set_value(cam_reset, 1); return 0; } -struct pxacamera_platform_data em_x270_camera_platform_data = { - .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | - PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, - .mclk_10khz = 2600, +static struct regulator_consumer_supply camera_dummy_supplies[] = { + REGULATOR_SUPPLY("vdd", "0-005d"), }; -static int em_x270_sensor_power(struct device *dev, int on) -{ - int ret; - int is_on = regulator_is_enabled(em_x270_camera_ldo); - - if (on == is_on) - return 0; - - gpio_set_value(cam_reset, !on); - - if (on) - ret = regulator_enable(em_x270_camera_ldo); - else - ret = regulator_disable(em_x270_camera_ldo); - - if (ret) - return ret; - - gpio_set_value(cam_reset, on); - - return 0; -} - -static struct i2c_board_info em_x270_i2c_cam_info[] = { - { - I2C_BOARD_INFO("mt9m111", 0x48), +static struct regulator_init_data camera_dummy_initdata = { + .consumer_supplies = camera_dummy_supplies, + .num_consumer_supplies = ARRAY_SIZE(camera_dummy_supplies), + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, }; -static struct soc_camera_link iclink = { - .bus_id = 0, - .power = em_x270_sensor_power, - .board_info = &em_x270_i2c_cam_info[0], - .i2c_adapter_id = 0, +static struct fixed_voltage_config camera_dummy_config = { + .supply_name = "camera_vdd", + .input_supply = "vcc cam", + .microvolts = 2800000, + .gpio = -1, + .enable_high = 0, + .init_data = &camera_dummy_initdata, }; -static struct platform_device em_x270_camera = { - .name = "soc-camera-pdrv", - .id = -1, +static struct platform_device camera_supply_dummy_device = { + .name = "reg-fixed-voltage", + .id = 1, .dev = { - .platform_data = &iclink, + .platform_data = &camera_dummy_config, }, }; +struct pxacamera_platform_data em_x270_camera_platform_data = { + .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | + PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, + .mclk_10khz = 2600, + .sensor_i2c_adapter_id = 0, + .sensor_i2c_address = 0x5d, +}; + static void __init em_x270_init_camera(void) { - if (em_x270_sensor_init() == 0) { + if (em_x270_sensor_init() == 0) pxa_set_camera_info(&em_x270_camera_platform_data); - platform_device_register(&em_x270_camera); - } + platform_device_register(&camera_supply_dummy_device); } #else static inline void em_x270_init_camera(void) {} diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index 34ad0a89d4a9..0b8300e6fca3 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c @@ -17,14 +17,14 @@ #include <linux/delay.h> #include <linux/pwm.h> #include <linux/pwm_backlight.h> +#include <linux/regulator/machine.h> +#include <linux/regulator/fixed.h> #include <linux/input.h> #include <linux/gpio.h> #include <linux/gpio_keys.h> #include <linux/leds-lp3944.h> #include <linux/i2c/pxa-i2c.h> -#include <media/soc_camera.h> - #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -723,6 +723,42 @@ static struct platform_device a780_gpio_keys = { }; /* camera */ +static struct regulator_consumer_supply camera_dummy_supplies[] = { + REGULATOR_SUPPLY("vdd", "0-005d"), +}; + +static struct regulator_init_data camera_dummy_initdata = { + .consumer_supplies = camera_dummy_supplies, + .num_consumer_supplies = ARRAY_SIZE(camera_dummy_supplies), + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, +}; + +static struct fixed_voltage_config camera_dummy_config = { + .supply_name = "camera_vdd", + .microvolts = 2800000, + .gpio = GPIO50_nCAM_EN, + .enable_high = 0, + .init_data = &camera_dummy_initdata, +}; + +static struct platform_device camera_supply_dummy_device = { + .name = "reg-fixed-voltage", + .id = 1, + .dev = { + .platform_data = &camera_dummy_config, + }, +}; +static int a780_camera_reset(struct device *dev) +{ + gpio_set_value(GPIO19_GEN1_CAM_RST, 0); + msleep(10); + gpio_set_value(GPIO19_GEN1_CAM_RST, 1); + + return 0; +} + static int a780_camera_init(void) { int err; @@ -731,73 +767,36 @@ static int a780_camera_init(void) * GPIO50_nCAM_EN is active low * GPIO19_GEN1_CAM_RST is active on rising edge */ - err = gpio_request(GPIO50_nCAM_EN, "nCAM_EN"); - if (err) { - pr_err("%s: Failed to request nCAM_EN\n", __func__); - goto fail; - } - err = gpio_request(GPIO19_GEN1_CAM_RST, "CAM_RST"); if (err) { pr_err("%s: Failed to request CAM_RST\n", __func__); - goto fail_gpio_cam_rst; + return err; } - gpio_direction_output(GPIO50_nCAM_EN, 1); gpio_direction_output(GPIO19_GEN1_CAM_RST, 0); - - return 0; - -fail_gpio_cam_rst: - gpio_free(GPIO50_nCAM_EN); -fail: - return err; -} - -static int a780_camera_power(struct device *dev, int on) -{ - gpio_set_value(GPIO50_nCAM_EN, !on); - return 0; -} - -static int a780_camera_reset(struct device *dev) -{ - gpio_set_value(GPIO19_GEN1_CAM_RST, 0); - msleep(10); - gpio_set_value(GPIO19_GEN1_CAM_RST, 1); + a780_camera_reset(NULL); return 0; } struct pxacamera_platform_data a780_pxacamera_platform_data = { .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | - PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, + PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN | + PXA_CAMERA_PCP, .mclk_10khz = 5000, + .sensor_i2c_adapter_id = 0, + .sensor_i2c_address = 0x5d, }; -static struct i2c_board_info a780_camera_i2c_board_info = { - I2C_BOARD_INFO("mt9m111", 0x5d), -}; - -static struct soc_camera_link a780_iclink = { - .bus_id = 0, - .flags = SOCAM_SENSOR_INVERT_PCLK, - .i2c_adapter_id = 0, - .board_info = &a780_camera_i2c_board_info, - .power = a780_camera_power, - .reset = a780_camera_reset, -}; - -static struct platform_device a780_camera = { - .name = "soc-camera-pdrv", - .id = 0, - .dev = { - .platform_data = &a780_iclink, +static struct i2c_board_info a780_i2c_board_info[] = { + { + I2C_BOARD_INFO("mt9m111", 0x5d), }, }; static struct platform_device *a780_devices[] __initdata = { &a780_gpio_keys, + &camera_supply_dummy_device, }; static void __init a780_init(void) @@ -811,19 +810,19 @@ static void __init a780_init(void) pxa_set_stuart_info(NULL); pxa_set_i2c_info(NULL); + i2c_register_board_info(0, ARRAY_AND_SIZE(a780_i2c_board_info)); pxa_set_fb_info(NULL, &ezx_fb_info_1); pxa_set_keypad_info(&a780_keypad_platform_data); - if (a780_camera_init() == 0) { + if (a780_camera_init() == 0) pxa_set_camera_info(&a780_pxacamera_platform_data); - platform_device_register(&a780_camera); - } pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup)); platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); platform_add_devices(ARRAY_AND_SIZE(a780_devices)); + regulator_has_full_constraints(); } MACHINE_START(EZX_A780, "Motorola EZX A780") @@ -1001,6 +1000,15 @@ static struct platform_device a910_gpio_keys = { }; /* camera */ +static int a910_camera_reset(struct device *dev) +{ + gpio_set_value(GPIO28_GEN2_CAM_RST, 0); + msleep(10); + gpio_set_value(GPIO28_GEN2_CAM_RST, 1); + + return 0; +} + static int a910_camera_init(void) { int err; @@ -1009,68 +1017,25 @@ static int a910_camera_init(void) * GPIO50_nCAM_EN is active low * GPIO28_GEN2_CAM_RST is active on rising edge */ - err = gpio_request(GPIO50_nCAM_EN, "nCAM_EN"); - if (err) { - pr_err("%s: Failed to request nCAM_EN\n", __func__); - goto fail; - } - err = gpio_request(GPIO28_GEN2_CAM_RST, "CAM_RST"); if (err) { pr_err("%s: Failed to request CAM_RST\n", __func__); - goto fail_gpio_cam_rst; + return err; } - gpio_direction_output(GPIO50_nCAM_EN, 1); gpio_direction_output(GPIO28_GEN2_CAM_RST, 0); - - return 0; - -fail_gpio_cam_rst: - gpio_free(GPIO50_nCAM_EN); -fail: - return err; -} - -static int a910_camera_power(struct device *dev, int on) -{ - gpio_set_value(GPIO50_nCAM_EN, !on); - return 0; -} - -static int a910_camera_reset(struct device *dev) -{ - gpio_set_value(GPIO28_GEN2_CAM_RST, 0); - msleep(10); - gpio_set_value(GPIO28_GEN2_CAM_RST, 1); + a910_camera_reset(NULL); return 0; } struct pxacamera_platform_data a910_pxacamera_platform_data = { .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | - PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, + PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN | + PXA_CAMERA_PCP, .mclk_10khz = 5000, -}; - -static struct i2c_board_info a910_camera_i2c_board_info = { - I2C_BOARD_INFO("mt9m111", 0x5d), -}; - -static struct soc_camera_link a910_iclink = { - .bus_id = 0, - .i2c_adapter_id = 0, - .board_info = &a910_camera_i2c_board_info, - .power = a910_camera_power, - .reset = a910_camera_reset, -}; - -static struct platform_device a910_camera = { - .name = "soc-camera-pdrv", - .id = 0, - .dev = { - .platform_data = &a910_iclink, - }, + .sensor_i2c_adapter_id = 0, + .sensor_i2c_address = 0x5d, }; /* leds-lp3944 */ @@ -1122,10 +1087,14 @@ static struct i2c_board_info __initdata a910_i2c_board_info[] = { I2C_BOARD_INFO("lp3944", 0x60), .platform_data = &a910_lp3944_leds, }, + { + I2C_BOARD_INFO("mt9m111", 0x5d), + }, }; static struct platform_device *a910_devices[] __initdata = { &a910_gpio_keys, + &camera_supply_dummy_device, }; static void __init a910_init(void) @@ -1145,14 +1114,13 @@ static void __init a910_init(void) pxa_set_keypad_info(&a910_keypad_platform_data); - if (a910_camera_init() == 0) { + if (a910_camera_init() == 0) pxa_set_camera_info(&a910_pxacamera_platform_data); - platform_device_register(&a910_camera); - } pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup)); platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); platform_add_devices(ARRAY_AND_SIZE(a910_devices)); + regulator_has_full_constraints(); } MACHINE_START(EZX_A910, "Motorola EZX A910") diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index ec510ecf8370..cb73a9723d0e 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -43,21 +43,6 @@ void clear_reset_status(unsigned int mask) } } -unsigned long get_clock_tick_rate(void) -{ - unsigned long clock_tick_rate; - - if (cpu_is_pxa25x()) - clock_tick_rate = 3686400; - else if (machine_is_mainstone()) - clock_tick_rate = 3249600; - else - clock_tick_rate = 3250000; - - return clock_tick_rate; -} -EXPORT_SYMBOL(get_clock_tick_rate); - /* * For non device-tree builds, keep legacy timer init */ @@ -69,8 +54,7 @@ void __init pxa_timer_init(void) pxa27x_clocks_init(); if (cpu_is_pxa3xx()) pxa3xx_clocks_init(); - pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000), - get_clock_tick_rate()); + pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000)); } /* diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index 8d63c211b22f..55064124ca4e 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h @@ -303,8 +303,6 @@ */ extern unsigned int get_memclk_frequency_10khz(void); -/* return the clock tick rate of the OS timer */ -extern unsigned long get_clock_tick_rate(void); #endif #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index 38a96a193dc4..8a5d0491e73c 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -57,7 +57,6 @@ #include <linux/platform_data/media/camera-pxa.h> #include <mach/audio.h> #include <mach/smemc.h> -#include <media/soc_camera.h> #include "mioa701.h" @@ -627,6 +626,8 @@ struct pxacamera_platform_data mioa701_pxacamera_platform_data = { .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, .mclk_10khz = 5000, + .sensor_i2c_adapter_id = 0, + .sensor_i2c_address = 0x5d, }; static struct i2c_board_info __initdata mioa701_pi2c_devices[] = { @@ -643,12 +644,6 @@ static struct i2c_board_info mioa701_i2c_devices[] = { }, }; -static struct soc_camera_link iclink = { - .bus_id = 0, /* Match id in pxa27x_device_camera in device.c */ - .board_info = &mioa701_i2c_devices[0], - .i2c_adapter_id = 0, -}; - struct i2c_pxa_platform_data i2c_pdata = { .fast_mode = 1, }; @@ -684,7 +679,6 @@ MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL) MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL) MIO_SIMPLE_DEV(wm9713_acodec, "wm9713-codec", NULL); MIO_SIMPLE_DEV(gpio_vbus, "gpio-vbus", &gpio_vbus_data); -MIO_SIMPLE_DEV(mioa701_camera, "soc-camera-pdrv",&iclink); static struct platform_device *devices[] __initdata = { &mioa701_gpio_keys, @@ -696,7 +690,6 @@ static struct platform_device *devices[] __initdata = { &power_dev, &docg3, &gpio_vbus, - &mioa701_camera, &mioa701_board, }; @@ -761,6 +754,7 @@ static void __init mioa701_machine_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); gsm_init(); + i2c_register_board_info(0, ARRAY_AND_SIZE(mioa701_i2c_devices)); i2c_register_board_info(1, ARRAY_AND_SIZE(mioa701_pi2c_devices)); pxa_set_i2c_info(&i2c_pdata); pxa27x_set_i2c_power_info(NULL); @@ -769,6 +763,7 @@ static void __init mioa701_machine_init(void) regulator_register_always_on(0, "fixed-5.0V", fixed_5v0_consumers, ARRAY_SIZE(fixed_5v0_consumers), 5000000); + regulator_has_full_constraints(); } static void mioa701_machine_exit(void) diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 12b94357fbc1..c725baf119e1 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -156,7 +156,7 @@ static int __init __init pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent) { pxa_dt_irq_init(pxa25x_set_wake); - set_handle_irq(ichp_handle_irq); + set_handle_irq(icip_handle_irq); return 0; } diff --git a/arch/arm/mach-pxa/pxa_cplds_irqs.c b/arch/arm/mach-pxa/pxa_cplds_irqs.c index e362f865fcd2..941508585e34 100644 --- a/arch/arm/mach-pxa/pxa_cplds_irqs.c +++ b/arch/arm/mach-pxa/pxa_cplds_irqs.c @@ -120,13 +120,9 @@ static int cplds_probe(struct platform_device *pdev) if (!fpga) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (res) { - fpga->irq = (unsigned int)res->start; - irqflags = res->flags; - } - if (!fpga->irq) - return -ENODEV; + fpga->irq = platform_get_irq(pdev, 0); + if (fpga->irq <= 0) + return fpga->irq; base_irq = platform_get_irq(pdev, 1); if (base_irq < 0) @@ -142,6 +138,7 @@ static int cplds_probe(struct platform_device *pdev) writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); writel(0, fpga->base + FPGA_IRQ_SET_CLR); + irqflags = irq_get_trigger_type(fpga->irq); ret = devm_request_irq(&pdev->dev, fpga->irq, cplds_irq_handler, irqflags, dev_name(&pdev->dev), fpga); if (ret == -ENOSYS) diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 2c150bfc0cd5..67d66c702574 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -31,7 +31,6 @@ #include <linux/input/matrix_keypad.h> #include <linux/regulator/machine.h> #include <linux/io.h> -#include <linux/module.h> #include <linux/reboot.h> #include <linux/memblock.h> diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 3e09beddb6e8..2eb00691b07d 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -378,7 +378,7 @@ void __init sa1100_map_io(void) void __init sa1100_timer_init(void) { - pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x90000000), 3686400); + pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x90000000)); } static struct resource irq_resource = diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h index d944fd7e464f..52b8f6d25bef 100644 --- a/arch/arm/mach-sa1100/include/mach/hardware.h +++ b/arch/arm/mach-sa1100/include/mach/hardware.h @@ -43,10 +43,6 @@ # define __REG(x) (*((volatile unsigned long __iomem *)io_p2v(x))) # define __PREG(x) (io_v2p((unsigned long)&(x))) -static inline unsigned long get_clock_tick_rate(void) -{ - return 3686400; -} #else # define __REG(x) io_p2v(x) diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 09817bae4558..f0b5e7dfa6d0 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -32,15 +32,15 @@ config ARCH_RMOBILE menuconfig ARCH_RENESAS bool "Renesas ARM SoCs" depends on ARCH_MULTI_V7 && MMU + select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE select ARCH_SHMOBILE select ARCH_SHMOBILE_MULTI + select ARM_GIC + select GPIOLIB select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP - select ARM_GIC - select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE select NO_IOPORT_MAP select PINCTRL - select GPIOLIB select ZONE_DMA if ARM_LPAE if ARCH_RENESAS @@ -60,6 +60,7 @@ config ARCH_R7S72100 config ARCH_R8A73A4 bool "R-Mobile APE6 (R8A73A40)" select ARCH_RMOBILE + select ARM_ERRATA_798181 if SMP select RENESAS_IRQC config ARCH_R8A7740 @@ -67,6 +68,15 @@ config ARCH_R8A7740 select ARCH_RMOBILE select RENESAS_INTC_IRQPIN +config ARCH_R8A7743 + bool "RZ/G1M (R8A77430)" + select ARCH_RCAR_GEN2 + select ARM_ERRATA_798181 if SMP + +config ARCH_R8A7745 + bool "RZ/G1E (R8A77450)" + select ARCH_RCAR_GEN2 + config ARCH_R8A7778 bool "R-Car M1A (R8A77781)" select ARCH_RCAR_GEN1 @@ -78,20 +88,24 @@ config ARCH_R8A7779 config ARCH_R8A7790 bool "R-Car H2 (R8A77900)" select ARCH_RCAR_GEN2 + select ARM_ERRATA_798181 if SMP select I2C config ARCH_R8A7791 bool "R-Car M2-W (R8A77910)" select ARCH_RCAR_GEN2 + select ARM_ERRATA_798181 if SMP select I2C config ARCH_R8A7792 bool "R-Car V2H (R8A77920)" select ARCH_RCAR_GEN2 + select ARM_ERRATA_798181 if SMP config ARCH_R8A7793 bool "R-Car M2-N (R8A7793)" select ARCH_RCAR_GEN2 + select ARM_ERRATA_798181 if SMP select I2C config ARCH_R8A7794 diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 3fc48b02eb4f..64611a1b4276 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -13,9 +13,6 @@ obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o -obj-$(CONFIG_ARCH_R8A7792) += setup-r8a7792.o -obj-$(CONFIG_ARCH_R8A7793) += setup-r8a7793.o -obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o diff --git a/arch/arm/mach-shmobile/setup-r8a7792.c b/arch/arm/mach-shmobile/setup-r8a7792.c deleted file mode 100644 index a0910395da09..000000000000 --- a/arch/arm/mach-shmobile/setup-r8a7792.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * r8a7792 processor support - * - * Copyright (C) 2014 Renesas Electronics Corporation - * Copyright (C) 2016 Cogent Embedded, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/of_platform.h> - -#include <asm/mach/arch.h> - -#include "common.h" -#include "rcar-gen2.h" - -static const char * const r8a7792_boards_compat_dt[] __initconst = { - "renesas,r8a7792", - NULL, -}; - -DT_MACHINE_START(R8A7792_DT, "Generic R8A7792 (Flattened Device Tree)") - .init_early = shmobile_init_delay, - .init_late = shmobile_init_late, - .init_time = rcar_gen2_timer_init, - .reserve = rcar_gen2_reserve, - .dt_compat = r8a7792_boards_compat_dt, -MACHINE_END diff --git a/arch/arm/mach-shmobile/setup-r8a7793.c b/arch/arm/mach-shmobile/setup-r8a7793.c deleted file mode 100644 index 5fce87f7f254..000000000000 --- a/arch/arm/mach-shmobile/setup-r8a7793.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * r8a7793 processor support - * - * Copyright (C) 2015 Ulrich Hecht - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/init.h> -#include <asm/mach/arch.h> - -#include "common.h" -#include "rcar-gen2.h" - -static const char * const r8a7793_boards_compat_dt[] __initconst = { - "renesas,r8a7793", - NULL, -}; - -DT_MACHINE_START(R8A7793_DT, "Generic R8A7793 (Flattened Device Tree)") - .init_early = shmobile_init_delay, - .init_time = rcar_gen2_timer_init, - .init_late = shmobile_init_late, - .reserve = rcar_gen2_reserve, - .dt_compat = r8a7793_boards_compat_dt, -MACHINE_END diff --git a/arch/arm/mach-shmobile/setup-r8a7794.c b/arch/arm/mach-shmobile/setup-r8a7794.c deleted file mode 100644 index d2b093033132..000000000000 --- a/arch/arm/mach-shmobile/setup-r8a7794.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * r8a7794 processor support - * - * Copyright (C) 2014 Renesas Electronics Corporation - * Copyright (C) 2014 Ulrich Hecht - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/of_platform.h> -#include "common.h" -#include "rcar-gen2.h" -#include <asm/mach/arch.h> - -static const char * const r8a7794_boards_compat_dt[] __initconst = { - "renesas,r8a7794", - NULL, -}; - -DT_MACHINE_START(R8A7794_DT, "Generic R8A7794 (Flattened Device Tree)") - .init_early = shmobile_init_delay, - .init_late = shmobile_init_late, - .init_time = rcar_gen2_timer_init, - .reserve = rcar_gen2_reserve, - .dt_compat = r8a7794_boards_compat_dt, -MACHINE_END diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index afb9fdcd3d90..14c1f0ed2ecb 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <linux/clk-provider.h> #include <linux/clk/renesas.h> #include <linux/clocksource.h> #include <linux/device.h> @@ -24,6 +25,7 @@ #include <linux/memblock.h> #include <linux/of.h> #include <linux/of_fdt.h> +#include <linux/of_platform.h> #include <asm/mach/arch.h> #include "common.h" #include "rcar-gen2.h" @@ -130,7 +132,15 @@ void __init rcar_gen2_timer_init(void) iounmap(base); #endif /* CONFIG_ARM_ARCH_TIMER */ - rcar_gen2_clocks_init(mode); + if (IS_ENABLED(CONFIG_ARCH_R8A7790) || + IS_ENABLED(CONFIG_ARCH_R8A7791) || + IS_ENABLED(CONFIG_ARCH_R8A7792) || + IS_ENABLED(CONFIG_ARCH_R8A7793) || + IS_ENABLED(CONFIG_ARCH_R8A7794)) + rcar_gen2_clocks_init(mode); + else + of_clk_init(NULL); + clocksource_probe(); } @@ -203,3 +213,36 @@ void __init rcar_gen2_reserve(void) } #endif } + +static const char * const rcar_gen2_boards_compat_dt[] __initconst = { + /* + * R8A7790 and R8A7791 can't be handled here as long as they need SMP + * initialization fallback. + */ + "renesas,r8a7792", + "renesas,r8a7793", + "renesas,r8a7794", + NULL, +}; + +DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)") + .init_early = shmobile_init_delay, + .init_late = shmobile_init_late, + .init_time = rcar_gen2_timer_init, + .reserve = rcar_gen2_reserve, + .dt_compat = rcar_gen2_boards_compat_dt, +MACHINE_END + +static const char * const rz_g1_boards_compat_dt[] __initconst = { + "renesas,r8a7743", + "renesas,r8a7745", + NULL, +}; + +DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)") + .init_early = shmobile_init_delay, + .init_late = shmobile_init_late, + .init_time = rcar_gen2_timer_init, + .reserve = rcar_gen2_reserve, + .dt_compat = rz_g1_boards_compat_dt, +MACHINE_END diff --git a/arch/arm/mach-stm32/board-dt.c b/arch/arm/mach-stm32/board-dt.c index ceee47735eec..c354222a4158 100644 --- a/arch/arm/mach-stm32/board-dt.c +++ b/arch/arm/mach-stm32/board-dt.c @@ -11,6 +11,7 @@ static const char *const stm32_compat[] __initconst = { "st,stm32f429", "st,stm32f469", + "st,stm32f746", NULL }; diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c index 8b8d0724f6c6..98e29dee91e8 100644 --- a/arch/arm/mach-vexpress/platsmp.c +++ b/arch/arm/mach-vexpress/platsmp.c @@ -26,19 +26,37 @@ bool __init vexpress_smp_init_ops(void) { #ifdef CONFIG_MCPM + int cpu; + struct device_node *cpu_node, *cci_node; + /* - * The best way to detect a multi-cluster configuration at the moment - * is to look for the presence of a CCI in the system. + * The best way to detect a multi-cluster configuration + * is to detect if the kernel can take over CCI ports + * control. Loop over possible CPUs and check if CCI + * port control is available. * Override the default vexpress_smp_ops if so. */ - struct device_node *node; - node = of_find_compatible_node(NULL, NULL, "arm,cci-400"); - if (node && of_device_is_available(node)) { - mcpm_smp_set_ops(); - return true; + for_each_possible_cpu(cpu) { + bool available; + + cpu_node = of_get_cpu_node(cpu, NULL); + if (WARN(!cpu_node, "Missing cpu device node!")) + return false; + + cci_node = of_parse_phandle(cpu_node, "cci-control-port", 0); + available = cci_node && of_device_is_available(cci_node); + of_node_put(cci_node); + of_node_put(cpu_node); + + if (!available) + return false; } -#endif + + mcpm_smp_set_ops(); + return true; +#else return false; +#endif } static const struct of_device_id vexpress_smp_dt_scu_match[] __initconst = { diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index d055db32ffcb..3e27bffb352d 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -63,32 +63,6 @@ config OMAP_RESET_CLOCKS probably do not want this option enabled until your device drivers work properly. -config OMAP_MUX - bool "OMAP multiplexing support" - depends on ARCH_OMAP - default y - help - Pin multiplexing support for OMAP boards. If your bootloader - sets the multiplexing correctly, say N. Otherwise, or if unsure, - say Y. - -config OMAP_MUX_DEBUG - bool "Multiplexing debug output" - depends on OMAP_MUX - help - Makes the multiplexing functions print out a lot of debug info. - This is useful if you want to find out the correct values of the - multiplexing registers. - -config OMAP_MUX_WARNINGS - bool "Warn about pins the bootloader didn't set up" - depends on OMAP_MUX - default y - help - Choose Y here to warn whenever driver initialization logic needs - to change the pin multiplexing setup. When there are no warnings - printed, it's safe to deselect OMAP_MUX for your product. - config OMAP_MPU_TIMER bool "Use mpu timer" depends on ARCH_OMAP1 diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 97a50e8883f9..47e186729d44 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -11,6 +11,3 @@ obj-y := sram.o dma.o counter_32k.o obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o -i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o -obj-y += $(i2c-omap-m) $(i2c-omap-y) - diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c deleted file mode 100644 index 58213d9714cd..000000000000 --- a/arch/arm/plat-omap/i2c.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * linux/arch/arm/plat-omap/i2c.c - * - * Helper module for board specific I2C bus registration - * - * Copyright (C) 2007 Nokia Corporation. - * - * Contact: Jarkko Nikula <jhnikula@gmail.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA - * 02110-1301 USA - * - */ - -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/i2c.h> -#include <linux/i2c-omap.h> -#include <linux/slab.h> -#include <linux/err.h> -#include <linux/clk.h> - -#include <plat/i2c.h> - -#define OMAP_I2C_MAX_CONTROLLERS 4 -static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS]; - -#define OMAP_I2C_CMDLINE_SETUP (BIT(31)) - -/** - * omap_i2c_bus_setup - Process command line options for the I2C bus speed - * @str: String of options - * - * This function allow to override the default I2C bus speed for given I2C - * bus with a command line option. - * - * Format: i2c_bus=bus_id,clkrate (in kHz) - * - * Returns 1 on success, 0 otherwise. - */ -static int __init omap_i2c_bus_setup(char *str) -{ - int ints[3]; - - get_options(str, 3, ints); - if (ints[0] < 2 || ints[1] < 1 || - ints[1] > OMAP_I2C_MAX_CONTROLLERS) - return 0; - i2c_pdata[ints[1] - 1].clkrate = ints[2]; - i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP; - - return 1; -} -__setup("i2c_bus=", omap_i2c_bus_setup); - -/* - * Register busses defined in command line but that are not registered with - * omap_register_i2c_bus from board initialization code. - */ -int __init omap_register_i2c_bus_cmdline(void) -{ - int i, err = 0; - - for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++) - if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) { - i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; - err = omap_i2c_add_bus(&i2c_pdata[i], i + 1); - if (err) - goto out; - } - -out: - return err; -} - -/** - * omap_register_i2c_bus - register I2C bus with device descriptors - * @bus_id: bus id counting from number 1 - * @clkrate: clock rate of the bus in kHz - * @info: pointer into I2C device descriptor table or NULL - * @len: number of descriptors in the table - * - * Returns 0 on success or an error code. - */ -int __init omap_register_i2c_bus(int bus_id, u32 clkrate, - struct i2c_board_info const *info, - unsigned len) -{ - int err; - - BUG_ON(bus_id < 1 || bus_id > OMAP_I2C_MAX_CONTROLLERS); - - if (info) { - err = i2c_register_board_info(bus_id, info, len); - if (err) - return err; - } - - if (!i2c_pdata[bus_id - 1].clkrate) - i2c_pdata[bus_id - 1].clkrate = clkrate; - - i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; - - return omap_i2c_add_bus(&i2c_pdata[bus_id - 1], bus_id); -} diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c index f74069386c13..26a531ebb6e9 100644 --- a/arch/arm/plat-orion/gpio.c +++ b/arch/arm/plat-orion/gpio.c @@ -478,13 +478,13 @@ static void orion_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) (data_in ^ in_pol) & msk ? "hi" : "lo", in_pol & msk ? "lo" : "hi"); if (!((edg_msk | lvl_msk) & msk)) { - seq_printf(s, " disabled\n"); + seq_puts(s, " disabled\n"); continue; } if (edg_msk & msk) - seq_printf(s, " edge "); + seq_puts(s, " edge "); if (lvl_msk & msk) - seq_printf(s, " level"); + seq_puts(s, " level"); seq_printf(s, " (%s)\n", cause & msk ? "pending" : "clear "); } } diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 30398dbc940a..969ef880d234 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -915,7 +915,7 @@ config RANDOMIZE_BASE config RANDOMIZE_MODULE_REGION_FULL bool "Randomize the module region independently from the core kernel" - depends on RANDOMIZE_BASE + depends on RANDOMIZE_BASE && !DYNAMIC_FTRACE default y help Randomizes the location of the module region without considering the diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile index ab51aed6b6c1..3635b8662724 100644 --- a/arch/arm64/Makefile +++ b/arch/arm64/Makefile @@ -15,7 +15,7 @@ CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET) GZFLAGS :=-9 ifneq ($(CONFIG_RELOCATABLE),) -LDFLAGS_vmlinux += -pie -Bsymbolic +LDFLAGS_vmlinux += -pie -shared -Bsymbolic endif ifeq ($(CONFIG_ARM64_ERRATUM_843419),y) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 758d74fedfad..a27c3245ba21 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -94,7 +94,7 @@ struct arm64_cpu_capabilities { u16 capability; int def_scope; /* default scope */ bool (*matches)(const struct arm64_cpu_capabilities *caps, int scope); - void (*enable)(void *); /* Called on all active CPUs */ + int (*enable)(void *); /* Called on all active CPUs */ union { struct { /* To be used for erratum handling only */ u32 midr_model; diff --git a/arch/arm64/include/asm/exec.h b/arch/arm64/include/asm/exec.h index db0563c23482..f7865dd9d868 100644 --- a/arch/arm64/include/asm/exec.h +++ b/arch/arm64/include/asm/exec.h @@ -18,6 +18,9 @@ #ifndef __ASM_EXEC_H #define __ASM_EXEC_H +#include <linux/sched.h> + extern unsigned long arch_align_stack(unsigned long sp); +void uao_thread_switch(struct task_struct *next); #endif /* __ASM_EXEC_H */ diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h index fd9d5fd788f5..f5ea0ba70f07 100644 --- a/arch/arm64/include/asm/kvm_emulate.h +++ b/arch/arm64/include/asm/kvm_emulate.h @@ -178,11 +178,6 @@ static inline bool kvm_vcpu_dabt_isvalid(const struct kvm_vcpu *vcpu) return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_ISV); } -static inline bool kvm_vcpu_dabt_iswrite(const struct kvm_vcpu *vcpu) -{ - return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_WNR); -} - static inline bool kvm_vcpu_dabt_issext(const struct kvm_vcpu *vcpu) { return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SSE); @@ -203,6 +198,12 @@ static inline bool kvm_vcpu_dabt_iss1tw(const struct kvm_vcpu *vcpu) return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_S1PTW); } +static inline bool kvm_vcpu_dabt_iswrite(const struct kvm_vcpu *vcpu) +{ + return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_WNR) || + kvm_vcpu_dabt_iss1tw(vcpu); /* AF/DBM update */ +} + static inline bool kvm_vcpu_dabt_is_cm(const struct kvm_vcpu *vcpu) { return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_CM); diff --git a/arch/arm64/include/asm/module.h b/arch/arm64/include/asm/module.h index e12af6754634..06ff7fd9e81f 100644 --- a/arch/arm64/include/asm/module.h +++ b/arch/arm64/include/asm/module.h @@ -17,6 +17,7 @@ #define __ASM_MODULE_H #include <asm-generic/module.h> +#include <asm/memory.h> #define MODULE_ARCH_VERMAGIC "aarch64" @@ -32,6 +33,10 @@ u64 module_emit_plt_entry(struct module *mod, const Elf64_Rela *rela, Elf64_Sym *sym); #ifdef CONFIG_RANDOMIZE_BASE +#ifdef CONFIG_MODVERSIONS +#define ARCH_RELOCATES_KCRCTAB +#define reloc_start (kimage_vaddr - KIMAGE_VADDR) +#endif extern u64 module_alloc_base; #else #define module_alloc_base ((u64)_etext - MODULES_VSIZE) diff --git a/arch/arm64/include/asm/percpu.h b/arch/arm64/include/asm/percpu.h index 2fee2f59288c..5394c8405e66 100644 --- a/arch/arm64/include/asm/percpu.h +++ b/arch/arm64/include/asm/percpu.h @@ -44,48 +44,44 @@ static inline unsigned long __percpu_##op(void *ptr, \ \ switch (size) { \ case 1: \ - do { \ - asm ("//__per_cpu_" #op "_1\n" \ - "ldxrb %w[ret], %[ptr]\n" \ + asm ("//__per_cpu_" #op "_1\n" \ + "1: ldxrb %w[ret], %[ptr]\n" \ #asm_op " %w[ret], %w[ret], %w[val]\n" \ - "stxrb %w[loop], %w[ret], %[ptr]\n" \ - : [loop] "=&r" (loop), [ret] "=&r" (ret), \ - [ptr] "+Q"(*(u8 *)ptr) \ - : [val] "Ir" (val)); \ - } while (loop); \ + " stxrb %w[loop], %w[ret], %[ptr]\n" \ + " cbnz %w[loop], 1b" \ + : [loop] "=&r" (loop), [ret] "=&r" (ret), \ + [ptr] "+Q"(*(u8 *)ptr) \ + : [val] "Ir" (val)); \ break; \ case 2: \ - do { \ - asm ("//__per_cpu_" #op "_2\n" \ - "ldxrh %w[ret], %[ptr]\n" \ + asm ("//__per_cpu_" #op "_2\n" \ + "1: ldxrh %w[ret], %[ptr]\n" \ #asm_op " %w[ret], %w[ret], %w[val]\n" \ - "stxrh %w[loop], %w[ret], %[ptr]\n" \ - : [loop] "=&r" (loop), [ret] "=&r" (ret), \ - [ptr] "+Q"(*(u16 *)ptr) \ - : [val] "Ir" (val)); \ - } while (loop); \ + " stxrh %w[loop], %w[ret], %[ptr]\n" \ + " cbnz %w[loop], 1b" \ + : [loop] "=&r" (loop), [ret] "=&r" (ret), \ + [ptr] "+Q"(*(u16 *)ptr) \ + : [val] "Ir" (val)); \ break; \ case 4: \ - do { \ - asm ("//__per_cpu_" #op "_4\n" \ - "ldxr %w[ret], %[ptr]\n" \ + asm ("//__per_cpu_" #op "_4\n" \ + "1: ldxr %w[ret], %[ptr]\n" \ #asm_op " %w[ret], %w[ret], %w[val]\n" \ - "stxr %w[loop], %w[ret], %[ptr]\n" \ - : [loop] "=&r" (loop), [ret] "=&r" (ret), \ - [ptr] "+Q"(*(u32 *)ptr) \ - : [val] "Ir" (val)); \ - } while (loop); \ + " stxr %w[loop], %w[ret], %[ptr]\n" \ + " cbnz %w[loop], 1b" \ + : [loop] "=&r" (loop), [ret] "=&r" (ret), \ + [ptr] "+Q"(*(u32 *)ptr) \ + : [val] "Ir" (val)); \ break; \ case 8: \ - do { \ - asm ("//__per_cpu_" #op "_8\n" \ - "ldxr %[ret], %[ptr]\n" \ + asm ("//__per_cpu_" #op "_8\n" \ + "1: ldxr %[ret], %[ptr]\n" \ #asm_op " %[ret], %[ret], %[val]\n" \ - "stxr %w[loop], %[ret], %[ptr]\n" \ - : [loop] "=&r" (loop), [ret] "=&r" (ret), \ - [ptr] "+Q"(*(u64 *)ptr) \ - : [val] "Ir" (val)); \ - } while (loop); \ + " stxr %w[loop], %[ret], %[ptr]\n" \ + " cbnz %w[loop], 1b" \ + : [loop] "=&r" (loop), [ret] "=&r" (ret), \ + [ptr] "+Q"(*(u64 *)ptr) \ + : [val] "Ir" (val)); \ break; \ default: \ BUILD_BUG(); \ @@ -150,44 +146,40 @@ static inline unsigned long __percpu_xchg(void *ptr, unsigned long val, switch (size) { case 1: - do { - asm ("//__percpu_xchg_1\n" - "ldxrb %w[ret], %[ptr]\n" - "stxrb %w[loop], %w[val], %[ptr]\n" - : [loop] "=&r"(loop), [ret] "=&r"(ret), - [ptr] "+Q"(*(u8 *)ptr) - : [val] "r" (val)); - } while (loop); + asm ("//__percpu_xchg_1\n" + "1: ldxrb %w[ret], %[ptr]\n" + " stxrb %w[loop], %w[val], %[ptr]\n" + " cbnz %w[loop], 1b" + : [loop] "=&r"(loop), [ret] "=&r"(ret), + [ptr] "+Q"(*(u8 *)ptr) + : [val] "r" (val)); break; case 2: - do { - asm ("//__percpu_xchg_2\n" - "ldxrh %w[ret], %[ptr]\n" - "stxrh %w[loop], %w[val], %[ptr]\n" - : [loop] "=&r"(loop), [ret] "=&r"(ret), - [ptr] "+Q"(*(u16 *)ptr) - : [val] "r" (val)); - } while (loop); + asm ("//__percpu_xchg_2\n" + "1: ldxrh %w[ret], %[ptr]\n" + " stxrh %w[loop], %w[val], %[ptr]\n" + " cbnz %w[loop], 1b" + : [loop] "=&r"(loop), [ret] "=&r"(ret), + [ptr] "+Q"(*(u16 *)ptr) + : [val] "r" (val)); break; case 4: - do { - asm ("//__percpu_xchg_4\n" - "ldxr %w[ret], %[ptr]\n" - "stxr %w[loop], %w[val], %[ptr]\n" - : [loop] "=&r"(loop), [ret] "=&r"(ret), - [ptr] "+Q"(*(u32 *)ptr) - : [val] "r" (val)); - } while (loop); + asm ("//__percpu_xchg_4\n" + "1: ldxr %w[ret], %[ptr]\n" + " stxr %w[loop], %w[val], %[ptr]\n" + " cbnz %w[loop], 1b" + : [loop] "=&r"(loop), [ret] "=&r"(ret), + [ptr] "+Q"(*(u32 *)ptr) + : [val] "r" (val)); break; case 8: - do { - asm ("//__percpu_xchg_8\n" - "ldxr %[ret], %[ptr]\n" - "stxr %w[loop], %[val], %[ptr]\n" - : [loop] "=&r"(loop), [ret] "=&r"(ret), - [ptr] "+Q"(*(u64 *)ptr) - : [val] "r" (val)); - } while (loop); + asm ("//__percpu_xchg_8\n" + "1: ldxr %[ret], %[ptr]\n" + " stxr %w[loop], %[val], %[ptr]\n" + " cbnz %w[loop], 1b" + : [loop] "=&r"(loop), [ret] "=&r"(ret), + [ptr] "+Q"(*(u64 *)ptr) + : [val] "r" (val)); break; default: BUILD_BUG(); diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index df2e53d3a969..60e34824e18c 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -188,8 +188,8 @@ static inline void spin_lock_prefetch(const void *ptr) #endif -void cpu_enable_pan(void *__unused); -void cpu_enable_uao(void *__unused); -void cpu_enable_cache_maint_trap(void *__unused); +int cpu_enable_pan(void *__unused); +int cpu_enable_uao(void *__unused); +int cpu_enable_cache_maint_trap(void *__unused); #endif /* __ASM_PROCESSOR_H */ diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index e8d46e8e6079..6c80b3699cb8 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -286,7 +286,7 @@ asm( #define write_sysreg_s(v, r) do { \ u64 __val = (u64)v; \ - asm volatile("msr_s " __stringify(r) ", %0" : : "rZ" (__val)); \ + asm volatile("msr_s " __stringify(r) ", %x0" : : "rZ" (__val)); \ } while (0) static inline void config_sctlr_el1(u32 clear, u32 set) diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h index bcaf6fba1b65..55d0adbf6509 100644 --- a/arch/arm64/include/asm/uaccess.h +++ b/arch/arm64/include/asm/uaccess.h @@ -21,6 +21,7 @@ /* * User space memory access functions */ +#include <linux/bitops.h> #include <linux/kasan-checks.h> #include <linux/string.h> #include <linux/thread_info.h> @@ -102,6 +103,13 @@ static inline void set_fs(mm_segment_t fs) flag; \ }) +/* + * When dealing with data aborts or instruction traps we may end up with + * a tagged userland pointer. Clear the tag to get a sane pointer to pass + * on to access_ok(), for instance. + */ +#define untagged_addr(addr) sign_extend64(addr, 55) + #define access_ok(type, addr, size) __range_ok(addr, size) #define user_addr_max get_fs diff --git a/arch/arm64/kernel/armv8_deprecated.c b/arch/arm64/kernel/armv8_deprecated.c index 42ffdb54e162..b0988bb1bf64 100644 --- a/arch/arm64/kernel/armv8_deprecated.c +++ b/arch/arm64/kernel/armv8_deprecated.c @@ -280,35 +280,43 @@ static void __init register_insn_emulation_sysctl(struct ctl_table *table) /* * Error-checking SWP macros implemented using ldxr{b}/stxr{b} */ -#define __user_swpX_asm(data, addr, res, temp, B) \ + +/* Arbitrary constant to ensure forward-progress of the LL/SC loop */ +#define __SWP_LL_SC_LOOPS 4 + +#define __user_swpX_asm(data, addr, res, temp, temp2, B) \ __asm__ __volatile__( \ + " mov %w3, %w7\n" \ ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN, \ CONFIG_ARM64_PAN) \ - "0: ldxr"B" %w2, [%3]\n" \ - "1: stxr"B" %w0, %w1, [%3]\n" \ + "0: ldxr"B" %w2, [%4]\n" \ + "1: stxr"B" %w0, %w1, [%4]\n" \ " cbz %w0, 2f\n" \ - " mov %w0, %w4\n" \ + " sub %w3, %w3, #1\n" \ + " cbnz %w3, 0b\n" \ + " mov %w0, %w5\n" \ " b 3f\n" \ "2:\n" \ " mov %w1, %w2\n" \ "3:\n" \ " .pushsection .fixup,\"ax\"\n" \ " .align 2\n" \ - "4: mov %w0, %w5\n" \ + "4: mov %w0, %w6\n" \ " b 3b\n" \ " .popsection" \ _ASM_EXTABLE(0b, 4b) \ _ASM_EXTABLE(1b, 4b) \ ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, \ CONFIG_ARM64_PAN) \ - : "=&r" (res), "+r" (data), "=&r" (temp) \ - : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT) \ + : "=&r" (res), "+r" (data), "=&r" (temp), "=&r" (temp2) \ + : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT), \ + "i" (__SWP_LL_SC_LOOPS) \ : "memory") -#define __user_swp_asm(data, addr, res, temp) \ - __user_swpX_asm(data, addr, res, temp, "") -#define __user_swpb_asm(data, addr, res, temp) \ - __user_swpX_asm(data, addr, res, temp, "b") +#define __user_swp_asm(data, addr, res, temp, temp2) \ + __user_swpX_asm(data, addr, res, temp, temp2, "") +#define __user_swpb_asm(data, addr, res, temp, temp2) \ + __user_swpX_asm(data, addr, res, temp, temp2, "b") /* * Bit 22 of the instruction encoding distinguishes between @@ -328,12 +336,12 @@ static int emulate_swpX(unsigned int address, unsigned int *data, } while (1) { - unsigned long temp; + unsigned long temp, temp2; if (type == TYPE_SWPB) - __user_swpb_asm(*data, address, res, temp); + __user_swpb_asm(*data, address, res, temp, temp2); else - __user_swp_asm(*data, address, res, temp); + __user_swp_asm(*data, address, res, temp, temp2); if (likely(res != -EAGAIN) || signal_pending(current)) break; diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 0150394f4cab..b75e917aac46 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -39,10 +39,11 @@ has_mismatched_cache_line_size(const struct arm64_cpu_capabilities *entry, (arm64_ftr_reg_ctrel0.sys_val & arm64_ftr_reg_ctrel0.strict_mask); } -static void cpu_enable_trap_ctr_access(void *__unused) +static int cpu_enable_trap_ctr_access(void *__unused) { /* Clear SCTLR_EL1.UCT */ config_sctlr_el1(SCTLR_EL1_UCT, 0); + return 0; } #define MIDR_RANGE(model, min, max) \ diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index d577f263cc4a..c02504ea304b 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -19,7 +19,9 @@ #define pr_fmt(fmt) "CPU features: " fmt #include <linux/bsearch.h> +#include <linux/cpumask.h> #include <linux/sort.h> +#include <linux/stop_machine.h> #include <linux/types.h> #include <asm/cpu.h> #include <asm/cpufeature.h> @@ -941,7 +943,13 @@ void __init enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps) { for (; caps->matches; caps++) if (caps->enable && cpus_have_cap(caps->capability)) - on_each_cpu(caps->enable, NULL, true); + /* + * Use stop_machine() as it schedules the work allowing + * us to modify PSTATE, instead of on_each_cpu() which + * uses an IPI, giving us a PSTATE that disappears when + * we return. + */ + stop_machine(caps->enable, NULL, cpu_online_mask); } /* diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 427f6d3f084c..332e33193ccf 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -586,8 +586,9 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems b.lt 4f // Skip if no PMU present mrs x0, pmcr_el0 // Disable debug access traps ubfx x0, x0, #11, #5 // to EL2 and allow access to - msr mdcr_el2, x0 // all PMU counters from EL1 4: + csel x0, xzr, x0, lt // all PMU counters from EL1 + msr mdcr_el2, x0 // (if they exist) /* Stage-2 translation */ msr vttbr_el2, xzr diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 27b2f1387df4..01753cd7d3f0 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -49,6 +49,7 @@ #include <asm/alternative.h> #include <asm/compat.h> #include <asm/cacheflush.h> +#include <asm/exec.h> #include <asm/fpsimd.h> #include <asm/mmu_context.h> #include <asm/processor.h> @@ -186,10 +187,19 @@ void __show_regs(struct pt_regs *regs) printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n", regs->pc, lr, regs->pstate); printk("sp : %016llx\n", sp); - for (i = top_reg; i >= 0; i--) { + + i = top_reg; + + while (i >= 0) { printk("x%-2d: %016llx ", i, regs->regs[i]); - if (i % 2 == 0) - printk("\n"); + i--; + + if (i % 2 == 0) { + pr_cont("x%-2d: %016llx ", i, regs->regs[i]); + i--; + } + + pr_cont("\n"); } printk("\n"); } @@ -301,7 +311,7 @@ static void tls_thread_switch(struct task_struct *next) } /* Restore the UAO state depending on next's addr_limit */ -static void uao_thread_switch(struct task_struct *next) +void uao_thread_switch(struct task_struct *next) { if (IS_ENABLED(CONFIG_ARM64_UAO)) { if (task_thread_info(next)->addr_limit == KERNEL_DS) diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S index b8799e7c79de..1bec41b5fda3 100644 --- a/arch/arm64/kernel/sleep.S +++ b/arch/arm64/kernel/sleep.S @@ -135,7 +135,7 @@ ENTRY(_cpu_resume) #ifdef CONFIG_KASAN mov x0, sp - bl kasan_unpoison_remaining_stack + bl kasan_unpoison_task_stack_below #endif ldp x19, x20, [x29, #16] diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index d3f151cfd4a1..8507703dabe4 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -544,6 +544,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) return; } bootcpu_valid = true; + early_map_cpu_to_node(0, acpi_numa_get_nid(0, hwid)); return; } diff --git a/arch/arm64/kernel/suspend.c b/arch/arm64/kernel/suspend.c index ad734142070d..bb0cd787a9d3 100644 --- a/arch/arm64/kernel/suspend.c +++ b/arch/arm64/kernel/suspend.c @@ -1,8 +1,11 @@ #include <linux/ftrace.h> #include <linux/percpu.h> #include <linux/slab.h> +#include <asm/alternative.h> #include <asm/cacheflush.h> +#include <asm/cpufeature.h> #include <asm/debug-monitors.h> +#include <asm/exec.h> #include <asm/pgtable.h> #include <asm/memory.h> #include <asm/mmu_context.h> @@ -50,6 +53,14 @@ void notrace __cpu_suspend_exit(void) set_my_cpu_offset(per_cpu_offset(cpu)); /* + * PSTATE was not saved over suspend/resume, re-enable any detected + * features that might not have been set correctly. + */ + asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, + CONFIG_ARM64_PAN)); + uao_thread_switch(current); + + /* * Restore HW breakpoint registers to sane values * before debug exceptions are possibly reenabled * through local_dbg_restore. diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 5ff020f8fb7f..c9986b3e0a96 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -428,24 +428,28 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs) force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0); } -void cpu_enable_cache_maint_trap(void *__unused) +int cpu_enable_cache_maint_trap(void *__unused) { config_sctlr_el1(SCTLR_EL1_UCI, 0); + return 0; } #define __user_cache_maint(insn, address, res) \ - asm volatile ( \ - "1: " insn ", %1\n" \ - " mov %w0, #0\n" \ - "2:\n" \ - " .pushsection .fixup,\"ax\"\n" \ - " .align 2\n" \ - "3: mov %w0, %w2\n" \ - " b 2b\n" \ - " .popsection\n" \ - _ASM_EXTABLE(1b, 3b) \ - : "=r" (res) \ - : "r" (address), "i" (-EFAULT) ) + if (untagged_addr(address) >= user_addr_max()) \ + res = -EFAULT; \ + else \ + asm volatile ( \ + "1: " insn ", %1\n" \ + " mov %w0, #0\n" \ + "2:\n" \ + " .pushsection .fixup,\"ax\"\n" \ + " .align 2\n" \ + "3: mov %w0, %w2\n" \ + " b 2b\n" \ + " .popsection\n" \ + _ASM_EXTABLE(1b, 3b) \ + : "=r" (res) \ + : "r" (address), "i" (-EFAULT) ) static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs) { diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index 53d9159662fe..0f8788374815 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -29,7 +29,9 @@ #include <linux/sched.h> #include <linux/highmem.h> #include <linux/perf_event.h> +#include <linux/preempt.h> +#include <asm/bug.h> #include <asm/cpufeature.h> #include <asm/exception.h> #include <asm/debug-monitors.h> @@ -670,9 +672,17 @@ asmlinkage int __exception do_debug_exception(unsigned long addr, NOKPROBE_SYMBOL(do_debug_exception); #ifdef CONFIG_ARM64_PAN -void cpu_enable_pan(void *__unused) +int cpu_enable_pan(void *__unused) { + /* + * We modify PSTATE. This won't work from irq context as the PSTATE + * is discarded once we return from the exception. + */ + WARN_ON_ONCE(in_interrupt()); + config_sctlr_el1(SCTLR_EL1_SPAN, 0); + asm(SET_PSTATE_PAN(1)); + return 0; } #endif /* CONFIG_ARM64_PAN */ @@ -683,8 +693,9 @@ void cpu_enable_pan(void *__unused) * We need to enable the feature at runtime (instead of adding it to * PSR_MODE_EL1h) as the feature may not be implemented by the cpu. */ -void cpu_enable_uao(void *__unused) +int cpu_enable_uao(void *__unused) { asm(SET_PSTATE_UAO(1)); + return 0; } #endif /* CONFIG_ARM64_UAO */ diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 21c489bdeb4e..212c4d1e2f26 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -421,35 +421,35 @@ void __init mem_init(void) pr_notice("Virtual kernel memory layout:\n"); #ifdef CONFIG_KASAN - pr_cont(" kasan : 0x%16lx - 0x%16lx (%6ld GB)\n", + pr_notice(" kasan : 0x%16lx - 0x%16lx (%6ld GB)\n", MLG(KASAN_SHADOW_START, KASAN_SHADOW_END)); #endif - pr_cont(" modules : 0x%16lx - 0x%16lx (%6ld MB)\n", + pr_notice(" modules : 0x%16lx - 0x%16lx (%6ld MB)\n", MLM(MODULES_VADDR, MODULES_END)); - pr_cont(" vmalloc : 0x%16lx - 0x%16lx (%6ld GB)\n", + pr_notice(" vmalloc : 0x%16lx - 0x%16lx (%6ld GB)\n", MLG(VMALLOC_START, VMALLOC_END)); - pr_cont(" .text : 0x%p" " - 0x%p" " (%6ld KB)\n", + pr_notice(" .text : 0x%p" " - 0x%p" " (%6ld KB)\n", MLK_ROUNDUP(_text, _etext)); - pr_cont(" .rodata : 0x%p" " - 0x%p" " (%6ld KB)\n", + pr_notice(" .rodata : 0x%p" " - 0x%p" " (%6ld KB)\n", MLK_ROUNDUP(__start_rodata, __init_begin)); - pr_cont(" .init : 0x%p" " - 0x%p" " (%6ld KB)\n", + pr_notice(" .init : 0x%p" " - 0x%p" " (%6ld KB)\n", MLK_ROUNDUP(__init_begin, __init_end)); - pr_cont(" .data : 0x%p" " - 0x%p" " (%6ld KB)\n", + pr_notice(" .data : 0x%p" " - 0x%p" " (%6ld KB)\n", MLK_ROUNDUP(_sdata, _edata)); - pr_cont(" .bss : 0x%p" " - 0x%p" " (%6ld KB)\n", + pr_notice(" .bss : 0x%p" " - 0x%p" " (%6ld KB)\n", MLK_ROUNDUP(__bss_start, __bss_stop)); - pr_cont(" fixed : 0x%16lx - 0x%16lx (%6ld KB)\n", + pr_notice(" fixed : 0x%16lx - 0x%16lx (%6ld KB)\n", MLK(FIXADDR_START, FIXADDR_TOP)); - pr_cont(" PCI I/O : 0x%16lx - 0x%16lx (%6ld MB)\n", + pr_notice(" PCI I/O : 0x%16lx - 0x%16lx (%6ld MB)\n", MLM(PCI_IO_START, PCI_IO_END)); #ifdef CONFIG_SPARSEMEM_VMEMMAP - pr_cont(" vmemmap : 0x%16lx - 0x%16lx (%6ld GB maximum)\n", + pr_notice(" vmemmap : 0x%16lx - 0x%16lx (%6ld GB maximum)\n", MLG(VMEMMAP_START, VMEMMAP_START + VMEMMAP_SIZE)); - pr_cont(" 0x%16lx - 0x%16lx (%6ld MB actual)\n", + pr_notice(" 0x%16lx - 0x%16lx (%6ld MB actual)\n", MLM((unsigned long)phys_to_page(memblock_start_of_DRAM()), (unsigned long)virt_to_page(high_memory))); #endif - pr_cont(" memory : 0x%16lx - 0x%16lx (%6ld MB)\n", + pr_notice(" memory : 0x%16lx - 0x%16lx (%6ld MB)\n", MLM(__phys_to_virt(memblock_start_of_DRAM()), (unsigned long)high_memory)); diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c index 8b8fe671b1a6..8d79286ee4e8 100644 --- a/arch/blackfin/kernel/ptrace.c +++ b/arch/blackfin/kernel/ptrace.c @@ -271,7 +271,7 @@ long arch_ptrace(struct task_struct *child, long request, case BFIN_MEM_ACCESS_CORE: case BFIN_MEM_ACCESS_CORE_ONLY: copied = access_process_vm(child, addr, &tmp, - to_copy, 0); + to_copy, FOLL_FORCE); if (copied) break; @@ -324,7 +324,8 @@ long arch_ptrace(struct task_struct *child, long request, case BFIN_MEM_ACCESS_CORE: case BFIN_MEM_ACCESS_CORE_ONLY: copied = access_process_vm(child, addr, &data, - to_copy, 1); + to_copy, + FOLL_FORCE | FOLL_WRITE); break; case BFIN_MEM_ACCESS_DMA: if (safe_dma_memcpy(paddr, &data, to_copy)) diff --git a/arch/cris/arch-v32/drivers/cryptocop.c b/arch/cris/arch-v32/drivers/cryptocop.c index b5698c876fcc..099e170a93ee 100644 --- a/arch/cris/arch-v32/drivers/cryptocop.c +++ b/arch/cris/arch-v32/drivers/cryptocop.c @@ -2722,7 +2722,6 @@ static int cryptocop_ioctl_process(struct inode *inode, struct file *filp, unsig err = get_user_pages((unsigned long int)(oper.indata + prev_ix), noinpages, 0, /* read access only for in data */ - 0, /* no force */ inpages, NULL); @@ -2736,8 +2735,7 @@ static int cryptocop_ioctl_process(struct inode *inode, struct file *filp, unsig if (oper.do_cipher){ err = get_user_pages((unsigned long int)oper.cipher_outdata, nooutpages, - 1, /* write access for out data */ - 0, /* no force */ + FOLL_WRITE, /* write access for out data */ outpages, NULL); up_read(¤t->mm->mmap_sem); diff --git a/arch/cris/arch-v32/kernel/ptrace.c b/arch/cris/arch-v32/kernel/ptrace.c index f085229cf870..f0df654ac6fc 100644 --- a/arch/cris/arch-v32/kernel/ptrace.c +++ b/arch/cris/arch-v32/kernel/ptrace.c @@ -147,7 +147,7 @@ long arch_ptrace(struct task_struct *child, long request, /* The trampoline page is globally mapped, no page table to traverse.*/ tmp = *(unsigned long*)addr; } else { - copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); + copied = access_process_vm(child, addr, &tmp, sizeof(tmp), FOLL_FORCE); if (copied != sizeof(tmp)) break; @@ -279,7 +279,7 @@ static int insn_size(struct task_struct *child, unsigned long pc) int opsize = 0; /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */ - copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0); + copied = access_process_vm(child, pc, &opcode, sizeof(opcode), FOLL_FORCE); if (copied != sizeof(opcode)) return 0; diff --git a/arch/ia64/kernel/err_inject.c b/arch/ia64/kernel/err_inject.c index 09f845793d12..5ed0ea92c5bf 100644 --- a/arch/ia64/kernel/err_inject.c +++ b/arch/ia64/kernel/err_inject.c @@ -142,7 +142,7 @@ store_virtual_to_phys(struct device *dev, struct device_attribute *attr, u64 virt_addr=simple_strtoull(buf, NULL, 16); int ret; - ret = get_user_pages(virt_addr, 1, VM_READ, 0, NULL, NULL); + ret = get_user_pages(virt_addr, 1, FOLL_WRITE, NULL, NULL); if (ret<=0) { #ifdef ERR_INJ_DEBUG printk("Virtual address %lx is not existing.\n",virt_addr); diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c index 6f54d511cc50..31aa8c0f68e1 100644 --- a/arch/ia64/kernel/ptrace.c +++ b/arch/ia64/kernel/ptrace.c @@ -453,7 +453,7 @@ ia64_peek (struct task_struct *child, struct switch_stack *child_stack, return 0; } } - copied = access_process_vm(child, addr, &ret, sizeof(ret), 0); + copied = access_process_vm(child, addr, &ret, sizeof(ret), FOLL_FORCE); if (copied != sizeof(ret)) return -EIO; *val = ret; @@ -489,7 +489,8 @@ ia64_poke (struct task_struct *child, struct switch_stack *child_stack, *ia64_rse_skip_regs(krbs, regnum) = val; } } - } else if (access_process_vm(child, addr, &val, sizeof(val), 1) + } else if (access_process_vm(child, addr, &val, sizeof(val), + FOLL_FORCE | FOLL_WRITE) != sizeof(val)) return -EIO; return 0; @@ -543,7 +544,8 @@ ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw, ret = ia64_peek(child, sw, user_rbs_end, addr, &val); if (ret < 0) return ret; - if (access_process_vm(child, addr, &val, sizeof(val), 1) + if (access_process_vm(child, addr, &val, sizeof(val), + FOLL_FORCE | FOLL_WRITE) != sizeof(val)) return -EIO; } @@ -559,7 +561,8 @@ ia64_sync_kernel_rbs (struct task_struct *child, struct switch_stack *sw, /* now copy word for word from user rbs to kernel rbs: */ for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) { - if (access_process_vm(child, addr, &val, sizeof(val), 0) + if (access_process_vm(child, addr, &val, sizeof(val), + FOLL_FORCE) != sizeof(val)) return -EIO; @@ -1156,7 +1159,8 @@ arch_ptrace (struct task_struct *child, long request, case PTRACE_PEEKTEXT: case PTRACE_PEEKDATA: /* read word at location addr */ - if (access_process_vm(child, addr, &data, sizeof(data), 0) + if (access_process_vm(child, addr, &data, sizeof(data), + FOLL_FORCE) != sizeof(data)) return -EIO; /* ensure return value is not mistaken for error code */ diff --git a/arch/m32r/kernel/ptrace.c b/arch/m32r/kernel/ptrace.c index 51f5e9aa4901..c145605a981f 100644 --- a/arch/m32r/kernel/ptrace.c +++ b/arch/m32r/kernel/ptrace.c @@ -493,7 +493,8 @@ unregister_all_debug_traps(struct task_struct *child) int i; for (i = 0; i < p->nr_trap; i++) - access_process_vm(child, p->addr[i], &p->insn[i], sizeof(p->insn[i]), 1); + access_process_vm(child, p->addr[i], &p->insn[i], sizeof(p->insn[i]), + FOLL_FORCE | FOLL_WRITE); p->nr_trap = 0; } @@ -537,7 +538,8 @@ embed_debug_trap(struct task_struct *child, unsigned long next_pc) unsigned long next_insn, code; unsigned long addr = next_pc & ~3; - if (access_process_vm(child, addr, &next_insn, sizeof(next_insn), 0) + if (access_process_vm(child, addr, &next_insn, sizeof(next_insn), + FOLL_FORCE) != sizeof(next_insn)) { return -1; /* error */ } @@ -546,7 +548,8 @@ embed_debug_trap(struct task_struct *child, unsigned long next_pc) if (register_debug_trap(child, next_pc, next_insn, &code)) { return -1; /* error */ } - if (access_process_vm(child, addr, &code, sizeof(code), 1) + if (access_process_vm(child, addr, &code, sizeof(code), + FOLL_FORCE | FOLL_WRITE) != sizeof(code)) { return -1; /* error */ } @@ -562,7 +565,8 @@ withdraw_debug_trap(struct pt_regs *regs) addr = (regs->bpc - 2) & ~3; regs->bpc -= 2; if (unregister_debug_trap(current, addr, &code)) { - access_process_vm(current, addr, &code, sizeof(code), 1); + access_process_vm(current, addr, &code, sizeof(code), + FOLL_FORCE | FOLL_WRITE); invalidate_cache(); } } @@ -589,7 +593,8 @@ void user_enable_single_step(struct task_struct *child) /* Compute next pc. */ pc = get_stack_long(child, PT_BPC); - if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0) + if (access_process_vm(child, pc&~3, &insn, sizeof(insn), + FOLL_FORCE) != sizeof(insn)) return; diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index 283b5a1967d1..7e71a4e0281b 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -70,7 +70,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, break; copied = access_process_vm(child, (u64)addrOthers, &tmp, - sizeof(tmp), 0); + sizeof(tmp), FOLL_FORCE); if (copied != sizeof(tmp)) break; ret = put_user(tmp, (u32 __user *) (unsigned long) data); @@ -179,7 +179,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, break; ret = 0; if (access_process_vm(child, (u64)addrOthers, &data, - sizeof(data), 1) == sizeof(data)) + sizeof(data), + FOLL_FORCE | FOLL_WRITE) == sizeof(data)) break; ret = -EIO; break; diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c index ce961495b5e1..622037d851a3 100644 --- a/arch/mips/kvm/mips.c +++ b/arch/mips/kvm/mips.c @@ -14,6 +14,7 @@ #include <linux/err.h> #include <linux/kdebug.h> #include <linux/module.h> +#include <linux/uaccess.h> #include <linux/vmalloc.h> #include <linux/fs.h> #include <linux/bootmem.h> diff --git a/arch/mips/mm/gup.c b/arch/mips/mm/gup.c index 42d124fb6474..d8c3c159289a 100644 --- a/arch/mips/mm/gup.c +++ b/arch/mips/mm/gup.c @@ -287,7 +287,7 @@ slow_irqon: pages += nr; ret = get_user_pages_unlocked(start, (end - start) >> PAGE_SHIFT, - write, 0, pages); + pages, write ? FOLL_WRITE : 0); /* Have to be a bit careful with return values */ if (nr > 0) { diff --git a/arch/powerpc/boot/main.c b/arch/powerpc/boot/main.c index f7a184b6c35b..57d42d129033 100644 --- a/arch/powerpc/boot/main.c +++ b/arch/powerpc/boot/main.c @@ -32,9 +32,16 @@ static struct addr_range prep_kernel(void) void *addr = 0; struct elf_info ei; long len; + int uncompressed_image = 0; - partial_decompress(vmlinuz_addr, vmlinuz_size, + len = partial_decompress(vmlinuz_addr, vmlinuz_size, elfheader, sizeof(elfheader), 0); + /* assume uncompressed data if -1 is returned */ + if (len == -1) { + uncompressed_image = 1; + memcpy(elfheader, vmlinuz_addr, sizeof(elfheader)); + printf("No valid compressed data found, assume uncompressed data\n\r"); + } if (!parse_elf64(elfheader, &ei) && !parse_elf32(elfheader, &ei)) fatal("Error: not a valid PPC32 or PPC64 ELF file!\n\r"); @@ -67,6 +74,13 @@ static struct addr_range prep_kernel(void) "device tree\n\r"); } + if (uncompressed_image) { + memcpy(addr, vmlinuz_addr + ei.elfoffset, ei.loadsize); + printf("0x%lx bytes of uncompressed data copied\n\r", + ei.loadsize); + goto out; + } + /* Finally, decompress the kernel */ printf("Decompressing (0x%p <- 0x%p:0x%p)...\n\r", addr, vmlinuz_addr, vmlinuz_addr+vmlinuz_size); @@ -82,7 +96,7 @@ static struct addr_range prep_kernel(void) len, ei.loadsize); printf("Done! Decompressed 0x%lx bytes\n\r", len); - +out: flush_cache(addr, ei.loadsize); return (struct addr_range){addr, ei.memsize}; diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h index cf12c580f6b2..e8cdfec8d512 100644 --- a/arch/powerpc/include/asm/unistd.h +++ b/arch/powerpc/include/asm/unistd.h @@ -16,6 +16,10 @@ #define __NR__exit __NR_exit +#define __IGNORE_pkey_mprotect +#define __IGNORE_pkey_alloc +#define __IGNORE_pkey_free + #ifndef __ASSEMBLY__ #include <linux/types.h> diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c index f52b7db327c8..010b7b310237 100644 --- a/arch/powerpc/kernel/ptrace32.c +++ b/arch/powerpc/kernel/ptrace32.c @@ -74,7 +74,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, break; copied = access_process_vm(child, (u64)addrOthers, &tmp, - sizeof(tmp), 0); + sizeof(tmp), FOLL_FORCE); if (copied != sizeof(tmp)) break; ret = put_user(tmp, (u32 __user *)data); @@ -179,7 +179,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, break; ret = 0; if (access_process_vm(child, (u64)addrOthers, &tmp, - sizeof(tmp), 1) == sizeof(tmp)) + sizeof(tmp), + FOLL_FORCE | FOLL_WRITE) == sizeof(tmp)) break; ret = -EIO; break; diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_fault.c index bb0354222b11..362954f98029 100644 --- a/arch/powerpc/mm/copro_fault.c +++ b/arch/powerpc/mm/copro_fault.c @@ -106,6 +106,8 @@ int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb) switch (REGION_ID(ea)) { case USER_REGION_ID: pr_devel("%s: 0x%llx -- USER_REGION_ID\n", __func__, ea); + if (mm == NULL) + return 1; psize = get_slice_psize(mm, ea); ssize = user_segment_size(ea); vsid = get_vsid(mm->context.id, ea, ssize); diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index 75b9cd6150cc..a51c188b81f3 100644 --- a/arch/powerpc/mm/numa.c +++ b/arch/powerpc/mm/numa.c @@ -845,7 +845,7 @@ void __init dump_numa_cpu_topology(void) return; for_each_online_node(node) { - printk(KERN_DEBUG "Node %d CPUs:", node); + pr_info("Node %d CPUs:", node); count = 0; /* @@ -856,52 +856,18 @@ void __init dump_numa_cpu_topology(void) if (cpumask_test_cpu(cpu, node_to_cpumask_map[node])) { if (count == 0) - printk(" %u", cpu); + pr_cont(" %u", cpu); ++count; } else { if (count > 1) - printk("-%u", cpu - 1); + pr_cont("-%u", cpu - 1); count = 0; } } if (count > 1) - printk("-%u", nr_cpu_ids - 1); - printk("\n"); - } -} - -static void __init dump_numa_memory_topology(void) -{ - unsigned int node; - unsigned int count; - - if (min_common_depth == -1 || !numa_enabled) - return; - - for_each_online_node(node) { - unsigned long i; - - printk(KERN_DEBUG "Node %d Memory:", node); - - count = 0; - - for (i = 0; i < memblock_end_of_DRAM(); - i += (1 << SECTION_SIZE_BITS)) { - if (early_pfn_to_nid(i >> PAGE_SHIFT) == node) { - if (count == 0) - printk(" 0x%lx", i); - ++count; - } else { - if (count > 0) - printk("-0x%lx", i); - count = 0; - } - } - - if (count > 0) - printk("-0x%lx", i); - printk("\n"); + pr_cont("-%u", nr_cpu_ids - 1); + pr_cont("\n"); } } @@ -947,8 +913,6 @@ void __init initmem_init(void) if (parse_numa_properties()) setup_nonnuma(); - else - dump_numa_memory_topology(); memblock_dump_all(); diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c index 1cab8a177d0e..7a27eebab28a 100644 --- a/arch/s390/kvm/intercept.c +++ b/arch/s390/kvm/intercept.c @@ -119,8 +119,13 @@ static int handle_validity(struct kvm_vcpu *vcpu) vcpu->stat.exit_validity++; trace_kvm_s390_intercept_validity(vcpu, viwhy); - WARN_ONCE(true, "kvm: unhandled validity intercept 0x%x\n", viwhy); - return -EOPNOTSUPP; + KVM_EVENT(3, "validity intercept 0x%x for pid %u (kvm 0x%pK)", viwhy, + current->pid, vcpu->kvm); + + /* do not warn on invalid runtime instrumentation mode */ + WARN_ONCE(viwhy != 0x44, "kvm: unhandled validity intercept 0x%x\n", + viwhy); + return -EINVAL; } static int handle_instruction(struct kvm_vcpu *vcpu) diff --git a/arch/s390/mm/gup.c b/arch/s390/mm/gup.c index adb0c34bf431..18d4107e10ee 100644 --- a/arch/s390/mm/gup.c +++ b/arch/s390/mm/gup.c @@ -266,7 +266,8 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write, /* Try to get the remaining pages with get_user_pages */ start += nr << PAGE_SHIFT; pages += nr; - ret = get_user_pages_unlocked(start, nr_pages - nr, write, 0, pages); + ret = get_user_pages_unlocked(start, nr_pages - nr, pages, + write ? FOLL_WRITE : 0); /* Have to be a bit careful with return values */ if (nr > 0) ret = (ret < 0) ? nr : ret + nr; diff --git a/arch/score/kernel/ptrace.c b/arch/score/kernel/ptrace.c index 55836188b217..4f7314d5f334 100644 --- a/arch/score/kernel/ptrace.c +++ b/arch/score/kernel/ptrace.c @@ -131,7 +131,7 @@ read_tsk_long(struct task_struct *child, { int copied; - copied = access_process_vm(child, addr, res, sizeof(*res), 0); + copied = access_process_vm(child, addr, res, sizeof(*res), FOLL_FORCE); return copied != sizeof(*res) ? -EIO : 0; } @@ -142,7 +142,7 @@ read_tsk_short(struct task_struct *child, { int copied; - copied = access_process_vm(child, addr, res, sizeof(*res), 0); + copied = access_process_vm(child, addr, res, sizeof(*res), FOLL_FORCE); return copied != sizeof(*res) ? -EIO : 0; } @@ -153,7 +153,8 @@ write_tsk_short(struct task_struct *child, { int copied; - copied = access_process_vm(child, addr, &val, sizeof(val), 1); + copied = access_process_vm(child, addr, &val, sizeof(val), + FOLL_FORCE | FOLL_WRITE); return copied != sizeof(val) ? -EIO : 0; } @@ -164,7 +165,8 @@ write_tsk_long(struct task_struct *child, { int copied; - copied = access_process_vm(child, addr, &val, sizeof(val), 1); + copied = access_process_vm(child, addr, &val, sizeof(val), + FOLL_FORCE | FOLL_WRITE); return copied != sizeof(val) ? -EIO : 0; } diff --git a/arch/sh/Makefile b/arch/sh/Makefile index 00476662ac2c..336f33a419d9 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -31,7 +31,7 @@ isa-y := $(isa-y)-up endif cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,) -cflags-$(CONFIG_CPU_J2) := $(call cc-option,-mj2,) +cflags-$(CONFIG_CPU_J2) += $(call cc-option,-mj2,) cflags-$(CONFIG_CPU_SH2A) += $(call cc-option,-m2a,) \ $(call cc-option,-m2a-nofpu,) \ $(call cc-option,-m4-nofpu,) diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index e9c2c42031fe..4e21949593cf 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig @@ -22,6 +22,16 @@ config SH_DEVICE_TREE have sufficient driver coverage to use this option; do not select it if you are using original SuperH hardware. +config SH_JCORE_SOC + bool "J-Core SoC" + depends on SH_DEVICE_TREE && (CPU_SH2 || CPU_J2) + select CLKSRC_JCORE_PIT + select JCORE_AIC + default y if CPU_J2 + help + Select this option to include drivers core components of the + J-Core SoC, including interrupt controllers and timers. + config SH_SOLUTION_ENGINE bool "SolutionEngine" select SOLUTION_ENGINE diff --git a/arch/sh/configs/j2_defconfig b/arch/sh/configs/j2_defconfig index 94d1eca52f72..2eb81ebe3888 100644 --- a/arch/sh/configs/j2_defconfig +++ b/arch/sh/configs/j2_defconfig @@ -8,6 +8,7 @@ CONFIG_MEMORY_START=0x10000000 CONFIG_MEMORY_SIZE=0x04000000 CONFIG_CPU_BIG_ENDIAN=y CONFIG_SH_DEVICE_TREE=y +CONFIG_SH_JCORE_SOC=y CONFIG_HZ_100=y CONFIG_CMDLINE_OVERWRITE=y CONFIG_CMDLINE="console=ttyUL0 earlycon" @@ -20,6 +21,7 @@ CONFIG_INET=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_NETDEVICES=y +CONFIG_SERIAL_EARLYCON=y CONFIG_SERIAL_UARTLITE=y CONFIG_SERIAL_UARTLITE_CONSOLE=y CONFIG_I2C=y diff --git a/arch/sh/mm/gup.c b/arch/sh/mm/gup.c index 40fa6c8adc43..063c298ba56c 100644 --- a/arch/sh/mm/gup.c +++ b/arch/sh/mm/gup.c @@ -258,7 +258,8 @@ slow_irqon: pages += nr; ret = get_user_pages_unlocked(start, - (end - start) >> PAGE_SHIFT, write, 0, pages); + (end - start) >> PAGE_SHIFT, pages, + write ? FOLL_WRITE : 0); /* Have to be a bit careful with return values */ if (nr > 0) { diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c index 9ddc4928a089..ac082dd8c67d 100644 --- a/arch/sparc/kernel/ptrace_64.c +++ b/arch/sparc/kernel/ptrace_64.c @@ -127,7 +127,8 @@ static int get_from_target(struct task_struct *target, unsigned long uaddr, if (copy_from_user(kbuf, (void __user *) uaddr, len)) return -EFAULT; } else { - int len2 = access_process_vm(target, uaddr, kbuf, len, 0); + int len2 = access_process_vm(target, uaddr, kbuf, len, + FOLL_FORCE); if (len2 != len) return -EFAULT; } @@ -141,7 +142,8 @@ static int set_to_target(struct task_struct *target, unsigned long uaddr, if (copy_to_user((void __user *) uaddr, kbuf, len)) return -EFAULT; } else { - int len2 = access_process_vm(target, uaddr, kbuf, len, 1); + int len2 = access_process_vm(target, uaddr, kbuf, len, + FOLL_FORCE | FOLL_WRITE); if (len2 != len) return -EFAULT; } @@ -505,7 +507,8 @@ static int genregs32_get(struct task_struct *target, if (access_process_vm(target, (unsigned long) ®_window[pos], - k, sizeof(*k), 0) + k, sizeof(*k), + FOLL_FORCE) != sizeof(*k)) return -EFAULT; k++; @@ -531,12 +534,14 @@ static int genregs32_get(struct task_struct *target, if (access_process_vm(target, (unsigned long) ®_window[pos], - ®, sizeof(reg), 0) + ®, sizeof(reg), + FOLL_FORCE) != sizeof(reg)) return -EFAULT; if (access_process_vm(target, (unsigned long) u, - ®, sizeof(reg), 1) + ®, sizeof(reg), + FOLL_FORCE | FOLL_WRITE) != sizeof(reg)) return -EFAULT; pos++; @@ -615,7 +620,8 @@ static int genregs32_set(struct task_struct *target, (unsigned long) ®_window[pos], (void *) k, - sizeof(*k), 1) + sizeof(*k), + FOLL_FORCE | FOLL_WRITE) != sizeof(*k)) return -EFAULT; k++; @@ -642,13 +648,15 @@ static int genregs32_set(struct task_struct *target, if (access_process_vm(target, (unsigned long) u, - ®, sizeof(reg), 0) + ®, sizeof(reg), + FOLL_FORCE) != sizeof(reg)) return -EFAULT; if (access_process_vm(target, (unsigned long) ®_window[pos], - ®, sizeof(reg), 1) + ®, sizeof(reg), + FOLL_FORCE | FOLL_WRITE) != sizeof(reg)) return -EFAULT; pos++; diff --git a/arch/sparc/mm/gup.c b/arch/sparc/mm/gup.c index 4e06750a5d29..cd0e32bbcb1d 100644 --- a/arch/sparc/mm/gup.c +++ b/arch/sparc/mm/gup.c @@ -238,7 +238,8 @@ slow: pages += nr; ret = get_user_pages_unlocked(start, - (end - start) >> PAGE_SHIFT, write, 0, pages); + (end - start) >> PAGE_SHIFT, pages, + write ? FOLL_WRITE : 0); /* Have to be a bit careful with return values */ if (nr > 0) { diff --git a/arch/x86/entry/syscalls/syscall_32.tbl b/arch/x86/entry/syscalls/syscall_32.tbl index ff6ef7b30822..2b3618542544 100644 --- a/arch/x86/entry/syscalls/syscall_32.tbl +++ b/arch/x86/entry/syscalls/syscall_32.tbl @@ -389,5 +389,3 @@ 380 i386 pkey_mprotect sys_pkey_mprotect 381 i386 pkey_alloc sys_pkey_alloc 382 i386 pkey_free sys_pkey_free -#383 i386 pkey_get sys_pkey_get -#384 i386 pkey_set sys_pkey_set diff --git a/arch/x86/entry/syscalls/syscall_64.tbl b/arch/x86/entry/syscalls/syscall_64.tbl index 2f024d02511d..e93ef0b38db8 100644 --- a/arch/x86/entry/syscalls/syscall_64.tbl +++ b/arch/x86/entry/syscalls/syscall_64.tbl @@ -338,8 +338,6 @@ 329 common pkey_mprotect sys_pkey_mprotect 330 common pkey_alloc sys_pkey_alloc 331 common pkey_free sys_pkey_free -#332 common pkey_get sys_pkey_get -#333 common pkey_set sys_pkey_set # # x32-specific system call numbers start at 512 to avoid cache impact diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index a3a9eb84b5cf..eab0915f5995 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -3898,6 +3898,7 @@ __init int intel_pmu_init(void) break; case INTEL_FAM6_XEON_PHI_KNL: + case INTEL_FAM6_XEON_PHI_KNM: memcpy(hw_cache_event_ids, slm_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, @@ -3912,7 +3913,7 @@ __init int intel_pmu_init(void) x86_pmu.flags |= PMU_FL_HAS_RSP_1; x86_pmu.flags |= PMU_FL_NO_HT_SHARING; - pr_cont("Knights Landing events, "); + pr_cont("Knights Landing/Mill events, "); break; case INTEL_FAM6_SKYLAKE_MOBILE: diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c index fc6cf21c535e..81b321ace8e0 100644 --- a/arch/x86/events/intel/lbr.c +++ b/arch/x86/events/intel/lbr.c @@ -458,8 +458,8 @@ void intel_pmu_lbr_del(struct perf_event *event) if (!x86_pmu.lbr_nr) return; - if (branch_user_callstack(cpuc->br_sel) && event->ctx && - event->ctx->task_ctx_data) { + if (branch_user_callstack(cpuc->br_sel) && + event->ctx->task_ctx_data) { task_ctx = event->ctx->task_ctx_data; task_ctx->lbr_callstack_users--; } diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c index b0f0e835a770..0a535cea8ff3 100644 --- a/arch/x86/events/intel/rapl.c +++ b/arch/x86/events/intel/rapl.c @@ -763,6 +763,7 @@ static const struct x86_cpu_id rapl_cpu_match[] __initconst = { X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_XEON_D, hsw_rapl_init), X86_RAPL_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNL, knl_rapl_init), + X86_RAPL_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNM, knl_rapl_init), X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_MOBILE, skl_rapl_init), X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_DESKTOP, skl_rapl_init), diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index d9844cc74486..efca2685d876 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -1349,6 +1349,7 @@ static const struct x86_cpu_id intel_uncore_match[] __initconst = { X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_X, bdx_uncore_init), X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_XEON_D, bdx_uncore_init), X86_UNCORE_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNL, knl_uncore_init), + X86_UNCORE_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNM, knl_uncore_init), X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_DESKTOP,skl_uncore_init), X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_MOBILE, skl_uncore_init), X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_X, skx_uncore_init), diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 1188bc849ee3..a39629206864 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -194,6 +194,8 @@ #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */ #define X86_FEATURE_INTEL_PT ( 7*32+15) /* Intel Processor Trace */ +#define X86_FEATURE_AVX512_4VNNIW (7*32+16) /* AVX-512 Neural Network Instructions */ +#define X86_FEATURE_AVX512_4FMAPS (7*32+17) /* AVX-512 Multiply Accumulation Single precision */ /* Virtualization flags: Linux defined, word 8 */ #define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */ diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h index 9ae5ab80a497..34a46dc076d3 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -64,5 +64,6 @@ /* Xeon Phi */ #define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */ +#define INTEL_FAM6_XEON_PHI_KNM 0x85 /* Knights Mill */ #endif /* _ASM_X86_INTEL_FAMILY_H */ diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 56f4c6676b29..78f3760ca1f2 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -88,7 +88,6 @@ #define MSR_IA32_RTIT_CTL 0x00000570 #define MSR_IA32_RTIT_STATUS 0x00000571 -#define MSR_IA32_RTIT_STATUS 0x00000571 #define MSR_IA32_RTIT_ADDR0_A 0x00000580 #define MSR_IA32_RTIT_ADDR0_B 0x00000581 #define MSR_IA32_RTIT_ADDR1_A 0x00000582 diff --git a/arch/x86/include/asm/rwsem.h b/arch/x86/include/asm/rwsem.h index 3d33a719f5c1..a34e0d4b957d 100644 --- a/arch/x86/include/asm/rwsem.h +++ b/arch/x86/include/asm/rwsem.h @@ -103,8 +103,10 @@ static inline bool __down_read_trylock(struct rw_semaphore *sem) ({ \ long tmp; \ struct rw_semaphore* ret; \ + register void *__sp asm(_ASM_SP); \ + \ asm volatile("# beginning down_write\n\t" \ - LOCK_PREFIX " xadd %1,(%3)\n\t" \ + LOCK_PREFIX " xadd %1,(%4)\n\t" \ /* adds 0xffff0001, returns the old value */ \ " test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t" \ /* was the active mask 0 before? */\ @@ -112,7 +114,7 @@ static inline bool __down_read_trylock(struct rw_semaphore *sem) " call " slow_path "\n" \ "1:\n" \ "# ending down_write" \ - : "+m" (sem->count), "=d" (tmp), "=a" (ret) \ + : "+m" (sem->count), "=d" (tmp), "=a" (ret), "+r" (__sp) \ : "a" (sem), "1" (RWSEM_ACTIVE_WRITE_BIAS) \ : "memory", "cc"); \ ret; \ diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h index 2aaca53c0974..ad6f5eb07a95 100644 --- a/arch/x86/include/asm/thread_info.h +++ b/arch/x86/include/asm/thread_info.h @@ -52,6 +52,15 @@ struct task_struct; #include <asm/cpufeature.h> #include <linux/atomic.h> +struct thread_info { + unsigned long flags; /* low level flags */ +}; + +#define INIT_THREAD_INFO(tsk) \ +{ \ + .flags = 0, \ +} + #define init_stack (init_thread_union.stack) #else /* !__ASSEMBLY__ */ diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index 8cb57df9398d..1db8dc490b66 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -32,6 +32,8 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c) static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_INTEL_PT, CR_EBX,25, 0x00000007, 0 }, + { X86_FEATURE_AVX512_4VNNIW, CR_EDX, 2, 0x00000007, 0 }, + { X86_FEATURE_AVX512_4FMAPS, CR_EDX, 3, 0x00000007, 0 }, { X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006, 0 }, { X86_FEATURE_EPB, CR_ECX, 3, 0x00000006, 0 }, { X86_FEATURE_HW_PSTATE, CR_EDX, 7, 0x80000007, 0 }, diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index 81160578b91a..5130985b758b 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -27,6 +27,7 @@ #include <asm/div64.h> #include <asm/x86_init.h> #include <asm/hypervisor.h> +#include <asm/timer.h> #include <asm/apic.h> #define CPUID_VMWARE_INFO_LEAF 0x40000000 @@ -94,6 +95,10 @@ static void __init vmware_platform_setup(void) } else { pr_warn("Failed to get TSC freq from the hypervisor\n"); } + +#ifdef CONFIG_X86_IO_APIC + no_timer_check = 1; +#endif } /* diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index b85fe5f91c3f..90e8dde3ec26 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c @@ -350,7 +350,7 @@ int __init sanitize_e820_map(struct e820entry *biosmap, int max_nr_map, * continue building up new bios map based on this * information */ - if (current_type != last_type) { + if (current_type != last_type || current_type == E820_PRAM) { if (last_type != 0) { new_bios[new_bios_entry].size = change_point[chgidx]->addr - last_addr; diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c index 124aa5c593f8..095ef7ddd6ae 100644 --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -74,6 +74,8 @@ void fpu__xstate_clear_all_cpu_caps(void) setup_clear_cpu_cap(X86_FEATURE_MPX); setup_clear_cpu_cap(X86_FEATURE_XGETBV1); setup_clear_cpu_cap(X86_FEATURE_PKU); + setup_clear_cpu_cap(X86_FEATURE_AVX512_4VNNIW); + setup_clear_cpu_cap(X86_FEATURE_AVX512_4FMAPS); } /* diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c index 28cee019209c..d9d8d16b69db 100644 --- a/arch/x86/kernel/kprobes/core.c +++ b/arch/x86/kernel/kprobes/core.c @@ -50,6 +50,7 @@ #include <linux/kallsyms.h> #include <linux/ftrace.h> #include <linux/frame.h> +#include <linux/kasan.h> #include <asm/text-patching.h> #include <asm/cacheflush.h> @@ -1057,9 +1058,10 @@ int setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs) * tailcall optimization. So, to be absolutely safe * we also save and restore enough stack bytes to cover * the argument area. + * Use __memcpy() to avoid KASAN stack out-of-bounds reports as we copy + * raw stack chunk with redzones: */ - memcpy(kcb->jprobes_stack, (kprobe_opcode_t *)addr, - MIN_STACK_SIZE(addr)); + __memcpy(kcb->jprobes_stack, (kprobe_opcode_t *)addr, MIN_STACK_SIZE(addr)); regs->flags &= ~X86_EFLAGS_IF; trace_hardirqs_off(); regs->ip = (unsigned long)(jp->entry); @@ -1080,6 +1082,9 @@ void jprobe_return(void) { struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); + /* Unpoison stack redzones in the frames we are going to jump over. */ + kasan_unpoison_stack_above_sp_to(kcb->jprobe_saved_sp); + asm volatile ( #ifdef CONFIG_X86_64 " xchg %%rbx,%%rsp \n" @@ -1118,7 +1123,7 @@ int longjmp_break_handler(struct kprobe *p, struct pt_regs *regs) /* It's OK to start function graph tracing again */ unpause_graph_tracing(); *regs = kcb->jprobe_saved_regs; - memcpy(saved_sp, kcb->jprobes_stack, MIN_STACK_SIZE(saved_sp)); + __memcpy(saved_sp, kcb->jprobes_stack, MIN_STACK_SIZE(saved_sp)); preempt_enable_no_resched(); return 1; } diff --git a/arch/x86/kernel/signal_compat.c b/arch/x86/kernel/signal_compat.c index 40df33753bae..ec1f756f9dc9 100644 --- a/arch/x86/kernel/signal_compat.c +++ b/arch/x86/kernel/signal_compat.c @@ -105,9 +105,6 @@ void sigaction_compat_abi(struct k_sigaction *act, struct k_sigaction *oact) /* Don't let flags to be set from userspace */ act->sa.sa_flags &= ~(SA_IA32_ABI | SA_X32_ABI); - if (user_64bit_mode(current_pt_regs())) - return; - if (in_ia32_syscall()) act->sa.sa_flags |= SA_IA32_ABI; if (in_x32_syscall()) diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c index 68f8cc222f25..c00cb64bc0a1 100644 --- a/arch/x86/kernel/smp.c +++ b/arch/x86/kernel/smp.c @@ -261,8 +261,10 @@ static inline void __smp_reschedule_interrupt(void) __visible void smp_reschedule_interrupt(struct pt_regs *regs) { + irq_enter(); ack_APIC_irq(); __smp_reschedule_interrupt(); + irq_exit(); /* * KVM uses this interrupt to force a cpu out of guest mode */ diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 951f093a96fe..42f5eb7b4f6c 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1409,15 +1409,17 @@ __init void prefill_possible_map(void) /* No boot processor was found in mptable or ACPI MADT */ if (!num_processors) { - int apicid = boot_cpu_physical_apicid; - int cpu = hard_smp_processor_id(); + if (boot_cpu_has(X86_FEATURE_APIC)) { + int apicid = boot_cpu_physical_apicid; + int cpu = hard_smp_processor_id(); - pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu); + pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu); - /* Make sure boot cpu is enumerated */ - if (apic->cpu_present_to_apicid(0) == BAD_APICID && - apic->apic_id_valid(apicid)) - generic_processor_info(apicid, boot_cpu_apic_version); + /* Make sure boot cpu is enumerated */ + if (apic->cpu_present_to_apicid(0) == BAD_APICID && + apic->apic_id_valid(apicid)) + generic_processor_info(apicid, boot_cpu_apic_version); + } if (!num_processors) num_processors = 1; diff --git a/arch/x86/kernel/step.c b/arch/x86/kernel/step.c index c9a073866ca7..a23ce84a3f6c 100644 --- a/arch/x86/kernel/step.c +++ b/arch/x86/kernel/step.c @@ -57,7 +57,8 @@ static int is_setting_trap_flag(struct task_struct *child, struct pt_regs *regs) unsigned char opcode[15]; unsigned long addr = convert_ip_to_linear(child, regs); - copied = access_process_vm(child, addr, opcode, sizeof(opcode), 0); + copied = access_process_vm(child, addr, opcode, sizeof(opcode), + FOLL_FORCE); for (i = 0; i < copied; i++) { switch (opcode[i]) { /* popf and iret */ diff --git a/arch/x86/kvm/ioapic.c b/arch/x86/kvm/ioapic.c index c7220ba94aa7..1a22de70f7f7 100644 --- a/arch/x86/kvm/ioapic.c +++ b/arch/x86/kvm/ioapic.c @@ -594,7 +594,7 @@ static void kvm_ioapic_reset(struct kvm_ioapic *ioapic) ioapic->irr = 0; ioapic->irr_delivered = 0; ioapic->id = 0; - memset(ioapic->irq_eoi, 0x00, IOAPIC_NUM_PINS); + memset(ioapic->irq_eoi, 0x00, sizeof(ioapic->irq_eoi)); rtc_irq_eoi_tracking_reset(ioapic); } diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 6c633de84dd7..e375235d81c9 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -5733,13 +5733,13 @@ static int kvmclock_cpu_online(unsigned int cpu) static void kvm_timer_init(void) { - int cpu; - max_tsc_khz = tsc_khz; if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) { #ifdef CONFIG_CPU_FREQ struct cpufreq_policy policy; + int cpu; + memset(&policy, 0, sizeof(policy)); cpu = get_cpu(); cpufreq_get_policy(&policy, cpu); diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c index b8b6a60b32cf..0d4fb3ebbbac 100644 --- a/arch/x86/mm/gup.c +++ b/arch/x86/mm/gup.c @@ -435,7 +435,7 @@ slow_irqon: ret = get_user_pages_unlocked(start, (end - start) >> PAGE_SHIFT, - write, 0, pages); + pages, write ? FOLL_WRITE : 0); /* Have to be a bit careful with return values */ if (nr > 0) { diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c index 80476878eb4c..e4f800999b32 100644 --- a/arch/x86/mm/mpx.c +++ b/arch/x86/mm/mpx.c @@ -544,10 +544,9 @@ static int mpx_resolve_fault(long __user *addr, int write) { long gup_ret; int nr_pages = 1; - int force = 0; - gup_ret = get_user_pages((unsigned long)addr, nr_pages, write, - force, NULL, NULL); + gup_ret = get_user_pages((unsigned long)addr, nr_pages, + write ? FOLL_WRITE : 0, NULL, NULL); /* * get_user_pages() returns number of pages gotten. * 0 means we failed to fault in and get anything, diff --git a/arch/x86/platform/uv/bios_uv.c b/arch/x86/platform/uv/bios_uv.c index b4d5e95fe4df..4a6a5a26c582 100644 --- a/arch/x86/platform/uv/bios_uv.c +++ b/arch/x86/platform/uv/bios_uv.c @@ -40,7 +40,15 @@ s64 uv_bios_call(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, u64 a4, u64 a5) */ return BIOS_STATUS_UNIMPLEMENTED; - ret = efi_call_virt_pointer(tab, function, (u64)which, a1, a2, a3, a4, a5); + /* + * If EFI_OLD_MEMMAP is set, we need to fall back to using our old EFI + * callback method, which uses efi_call() directly, with the kernel page tables: + */ + if (unlikely(test_bit(EFI_OLD_MEMMAP, &efi.flags))) + ret = efi_call((void *)__va(tab->function), (u64)which, a1, a2, a3, a4, a5); + else + ret = efi_call_virt_pointer(tab, function, (u64)which, a1, a2, a3, a4, a5); + return ret; } EXPORT_SYMBOL_GPL(uv_bios_call); diff --git a/arch/x86/um/ptrace_32.c b/arch/x86/um/ptrace_32.c index 5766ead6fdb9..60a5a5a85505 100644 --- a/arch/x86/um/ptrace_32.c +++ b/arch/x86/um/ptrace_32.c @@ -36,7 +36,8 @@ int is_syscall(unsigned long addr) * slow, but that doesn't matter, since it will be called only * in case of singlestepping, if copy_from_user failed. */ - n = access_process_vm(current, addr, &instr, sizeof(instr), 0); + n = access_process_vm(current, addr, &instr, sizeof(instr), + FOLL_FORCE); if (n != sizeof(instr)) { printk(KERN_ERR "is_syscall : failed to read " "instruction from 0x%lx\n", addr); diff --git a/arch/x86/um/ptrace_64.c b/arch/x86/um/ptrace_64.c index 0b5c184dd5b3..e30202b1716e 100644 --- a/arch/x86/um/ptrace_64.c +++ b/arch/x86/um/ptrace_64.c @@ -212,7 +212,8 @@ int is_syscall(unsigned long addr) * slow, but that doesn't matter, since it will be called only * in case of singlestepping, if copy_from_user failed. */ - n = access_process_vm(current, addr, &instr, sizeof(instr), 0); + n = access_process_vm(current, addr, &instr, sizeof(instr), + FOLL_FORCE); if (n != sizeof(instr)) { printk("is_syscall : failed to read instruction from " "0x%lx\n", addr); diff --git a/block/badblocks.c b/block/badblocks.c index 7be53cb1cc3c..6610e282a03e 100644 --- a/block/badblocks.c +++ b/block/badblocks.c @@ -354,7 +354,8 @@ int badblocks_clear(struct badblocks *bb, sector_t s, int sectors) * current range. Earlier ranges could also overlap, * but only this one can overlap the end of the range. */ - if (BB_OFFSET(p[lo]) + BB_LEN(p[lo]) > target) { + if ((BB_OFFSET(p[lo]) + BB_LEN(p[lo]) > target) && + (BB_OFFSET(p[lo]) < target)) { /* Partial overlap, leave the tail of this range */ int ack = BB_ACK(p[lo]); sector_t a = BB_OFFSET(p[lo]); @@ -377,7 +378,8 @@ int badblocks_clear(struct badblocks *bb, sector_t s, int sectors) lo--; } while (lo >= 0 && - BB_OFFSET(p[lo]) + BB_LEN(p[lo]) > s) { + (BB_OFFSET(p[lo]) + BB_LEN(p[lo]) > s) && + (BB_OFFSET(p[lo]) < target)) { /* This range does overlap */ if (BB_OFFSET(p[lo]) < s) { /* Keep the early parts of this range. */ diff --git a/drivers/Makefile b/drivers/Makefile index f0afdfb3c7df..194d20bee7dc 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -21,7 +21,7 @@ obj-y += video/ obj-y += idle/ # IPMI must come before ACPI in order to provide IPMI opregion support -obj-$(CONFIG_IPMI_HANDLER) += char/ipmi/ +obj-y += char/ipmi/ obj-$(CONFIG_ACPI) += acpi/ obj-$(CONFIG_SFI) += sfi/ diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c index abb71628ab61..7b274ff4632c 100644 --- a/drivers/block/rbd.c +++ b/drivers/block/rbd.c @@ -415,15 +415,15 @@ struct rbd_device { }; /* - * Flag bits for rbd_dev->flags. If atomicity is required, - * rbd_dev->lock is used to protect access. - * - * Currently, only the "removing" flag (which is coupled with the - * "open_count" field) requires atomic access. + * Flag bits for rbd_dev->flags: + * - REMOVING (which is coupled with rbd_dev->open_count) is protected + * by rbd_dev->lock + * - BLACKLISTED is protected by rbd_dev->lock_rwsem */ enum rbd_dev_flags { RBD_DEV_FLAG_EXISTS, /* mapped snapshot has not been deleted */ RBD_DEV_FLAG_REMOVING, /* this mapping is being removed */ + RBD_DEV_FLAG_BLACKLISTED, /* our ceph_client is blacklisted */ }; static DEFINE_MUTEX(client_mutex); /* Serialize client creation */ @@ -3926,6 +3926,7 @@ static void rbd_reregister_watch(struct work_struct *work) struct rbd_device *rbd_dev = container_of(to_delayed_work(work), struct rbd_device, watch_dwork); bool was_lock_owner = false; + bool need_to_wake = false; int ret; dout("%s rbd_dev %p\n", __func__, rbd_dev); @@ -3935,19 +3936,27 @@ static void rbd_reregister_watch(struct work_struct *work) was_lock_owner = rbd_release_lock(rbd_dev); mutex_lock(&rbd_dev->watch_mutex); - if (rbd_dev->watch_state != RBD_WATCH_STATE_ERROR) - goto fail_unlock; + if (rbd_dev->watch_state != RBD_WATCH_STATE_ERROR) { + mutex_unlock(&rbd_dev->watch_mutex); + goto out; + } ret = __rbd_register_watch(rbd_dev); if (ret) { rbd_warn(rbd_dev, "failed to reregister watch: %d", ret); - if (ret != -EBLACKLISTED) + if (ret == -EBLACKLISTED || ret == -ENOENT) { + set_bit(RBD_DEV_FLAG_BLACKLISTED, &rbd_dev->flags); + need_to_wake = true; + } else { queue_delayed_work(rbd_dev->task_wq, &rbd_dev->watch_dwork, RBD_RETRY_DELAY); - goto fail_unlock; + } + mutex_unlock(&rbd_dev->watch_mutex); + goto out; } + need_to_wake = true; rbd_dev->watch_state = RBD_WATCH_STATE_REGISTERED; rbd_dev->watch_cookie = rbd_dev->watch_handle->linger_id; mutex_unlock(&rbd_dev->watch_mutex); @@ -3963,13 +3972,10 @@ static void rbd_reregister_watch(struct work_struct *work) ret); } +out: up_write(&rbd_dev->lock_rwsem); - wake_requests(rbd_dev, true); - return; - -fail_unlock: - mutex_unlock(&rbd_dev->watch_mutex); - up_write(&rbd_dev->lock_rwsem); + if (need_to_wake) + wake_requests(rbd_dev, true); } /* @@ -4074,7 +4080,9 @@ static void rbd_wait_state_locked(struct rbd_device *rbd_dev) up_read(&rbd_dev->lock_rwsem); schedule(); down_read(&rbd_dev->lock_rwsem); - } while (rbd_dev->lock_state != RBD_LOCK_STATE_LOCKED); + } while (rbd_dev->lock_state != RBD_LOCK_STATE_LOCKED && + !test_bit(RBD_DEV_FLAG_BLACKLISTED, &rbd_dev->flags)); + finish_wait(&rbd_dev->lock_waitq, &wait); } @@ -4166,8 +4174,16 @@ static void rbd_queue_workfn(struct work_struct *work) if (must_be_locked) { down_read(&rbd_dev->lock_rwsem); - if (rbd_dev->lock_state != RBD_LOCK_STATE_LOCKED) + if (rbd_dev->lock_state != RBD_LOCK_STATE_LOCKED && + !test_bit(RBD_DEV_FLAG_BLACKLISTED, &rbd_dev->flags)) rbd_wait_state_locked(rbd_dev); + + WARN_ON((rbd_dev->lock_state == RBD_LOCK_STATE_LOCKED) ^ + !test_bit(RBD_DEV_FLAG_BLACKLISTED, &rbd_dev->flags)); + if (test_bit(RBD_DEV_FLAG_BLACKLISTED, &rbd_dev->flags)) { + result = -EBLACKLISTED; + goto err_unlock; + } } img_request = rbd_img_request_create(rbd_dev, offset, length, op_type, diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c index 890082315054..231633328dfa 100644 --- a/drivers/bus/arm-cci.c +++ b/drivers/bus/arm-cci.c @@ -2190,6 +2190,9 @@ static int cci_probe_ports(struct device_node *np) if (!of_match_node(arm_cci_ctrl_if_matches, cp)) continue; + if (!of_device_is_available(cp)) + continue; + i = nb_ace + nb_ace_lite; if (i >= nb_cci_ports) @@ -2232,6 +2235,13 @@ static int cci_probe_ports(struct device_node *np) ports[i].dn = cp; } + /* + * If there is no CCI port that is under kernel control + * return early and report probe status. + */ + if (!nb_ace && !nb_ace_lite) + return -ENODEV; + /* initialize a stashed array of ACE ports to speed-up look-up */ cci_ace_init_ports(); diff --git a/drivers/char/ipmi/Kconfig b/drivers/char/ipmi/Kconfig index 5a9350b1069a..7f816655cbbf 100644 --- a/drivers/char/ipmi/Kconfig +++ b/drivers/char/ipmi/Kconfig @@ -76,3 +76,11 @@ config IPMI_POWEROFF the IPMI management controller is capable of this. endif # IPMI_HANDLER + +config ASPEED_BT_IPMI_BMC + depends on ARCH_ASPEED + tristate "BT IPMI bmc driver" + help + Provides a driver for the BT (Block Transfer) IPMI interface + found on Aspeed SOCs (AST2400 and AST2500). The driver + implements the BMC side of the BT interface. diff --git a/drivers/char/ipmi/Makefile b/drivers/char/ipmi/Makefile index f3ffde1f5f1f..0d98cd91def1 100644 --- a/drivers/char/ipmi/Makefile +++ b/drivers/char/ipmi/Makefile @@ -11,3 +11,4 @@ obj-$(CONFIG_IPMI_SSIF) += ipmi_ssif.o obj-$(CONFIG_IPMI_POWERNV) += ipmi_powernv.o obj-$(CONFIG_IPMI_WATCHDOG) += ipmi_watchdog.o obj-$(CONFIG_IPMI_POWEROFF) += ipmi_poweroff.o +obj-$(CONFIG_ASPEED_BT_IPMI_BMC) += bt-bmc.o diff --git a/drivers/char/ipmi/bt-bmc.c b/drivers/char/ipmi/bt-bmc.c new file mode 100644 index 000000000000..b49e61320952 --- /dev/null +++ b/drivers/char/ipmi/bt-bmc.c @@ -0,0 +1,505 @@ +/* + * Copyright (c) 2015-2016, IBM Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <linux/atomic.h> +#include <linux/bt-bmc.h> +#include <linux/errno.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/miscdevice.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/poll.h> +#include <linux/sched.h> +#include <linux/timer.h> + +/* + * This is a BMC device used to communicate to the host + */ +#define DEVICE_NAME "ipmi-bt-host" + +#define BT_IO_BASE 0xe4 +#define BT_IRQ 10 + +#define BT_CR0 0x0 +#define BT_CR0_IO_BASE 16 +#define BT_CR0_IRQ 12 +#define BT_CR0_EN_CLR_SLV_RDP 0x8 +#define BT_CR0_EN_CLR_SLV_WRP 0x4 +#define BT_CR0_ENABLE_IBT 0x1 +#define BT_CR1 0x4 +#define BT_CR1_IRQ_H2B 0x01 +#define BT_CR1_IRQ_HBUSY 0x40 +#define BT_CR2 0x8 +#define BT_CR2_IRQ_H2B 0x01 +#define BT_CR2_IRQ_HBUSY 0x40 +#define BT_CR3 0xc +#define BT_CTRL 0x10 +#define BT_CTRL_B_BUSY 0x80 +#define BT_CTRL_H_BUSY 0x40 +#define BT_CTRL_OEM0 0x20 +#define BT_CTRL_SMS_ATN 0x10 +#define BT_CTRL_B2H_ATN 0x08 +#define BT_CTRL_H2B_ATN 0x04 +#define BT_CTRL_CLR_RD_PTR 0x02 +#define BT_CTRL_CLR_WR_PTR 0x01 +#define BT_BMC2HOST 0x14 +#define BT_INTMASK 0x18 +#define BT_INTMASK_B2H_IRQEN 0x01 +#define BT_INTMASK_B2H_IRQ 0x02 +#define BT_INTMASK_BMC_HWRST 0x80 + +#define BT_BMC_BUFFER_SIZE 256 + +struct bt_bmc { + struct device dev; + struct miscdevice miscdev; + void __iomem *base; + int irq; + wait_queue_head_t queue; + struct timer_list poll_timer; + struct mutex mutex; +}; + +static atomic_t open_count = ATOMIC_INIT(0); + +static u8 bt_inb(struct bt_bmc *bt_bmc, int reg) +{ + return ioread8(bt_bmc->base + reg); +} + +static void bt_outb(struct bt_bmc *bt_bmc, u8 data, int reg) +{ + iowrite8(data, bt_bmc->base + reg); +} + +static void clr_rd_ptr(struct bt_bmc *bt_bmc) +{ + bt_outb(bt_bmc, BT_CTRL_CLR_RD_PTR, BT_CTRL); +} + +static void clr_wr_ptr(struct bt_bmc *bt_bmc) +{ + bt_outb(bt_bmc, BT_CTRL_CLR_WR_PTR, BT_CTRL); +} + +static void clr_h2b_atn(struct bt_bmc *bt_bmc) +{ + bt_outb(bt_bmc, BT_CTRL_H2B_ATN, BT_CTRL); +} + +static void set_b_busy(struct bt_bmc *bt_bmc) +{ + if (!(bt_inb(bt_bmc, BT_CTRL) & BT_CTRL_B_BUSY)) + bt_outb(bt_bmc, BT_CTRL_B_BUSY, BT_CTRL); +} + +static void clr_b_busy(struct bt_bmc *bt_bmc) +{ + if (bt_inb(bt_bmc, BT_CTRL) & BT_CTRL_B_BUSY) + bt_outb(bt_bmc, BT_CTRL_B_BUSY, BT_CTRL); +} + +static void set_b2h_atn(struct bt_bmc *bt_bmc) +{ + bt_outb(bt_bmc, BT_CTRL_B2H_ATN, BT_CTRL); +} + +static u8 bt_read(struct bt_bmc *bt_bmc) +{ + return bt_inb(bt_bmc, BT_BMC2HOST); +} + +static ssize_t bt_readn(struct bt_bmc *bt_bmc, u8 *buf, size_t n) +{ + int i; + + for (i = 0; i < n; i++) + buf[i] = bt_read(bt_bmc); + return n; +} + +static void bt_write(struct bt_bmc *bt_bmc, u8 c) +{ + bt_outb(bt_bmc, c, BT_BMC2HOST); +} + +static ssize_t bt_writen(struct bt_bmc *bt_bmc, u8 *buf, size_t n) +{ + int i; + + for (i = 0; i < n; i++) + bt_write(bt_bmc, buf[i]); + return n; +} + +static void set_sms_atn(struct bt_bmc *bt_bmc) +{ + bt_outb(bt_bmc, BT_CTRL_SMS_ATN, BT_CTRL); +} + +static struct bt_bmc *file_bt_bmc(struct file *file) +{ + return container_of(file->private_data, struct bt_bmc, miscdev); +} + +static int bt_bmc_open(struct inode *inode, struct file *file) +{ + struct bt_bmc *bt_bmc = file_bt_bmc(file); + + if (atomic_inc_return(&open_count) == 1) { + clr_b_busy(bt_bmc); + return 0; + } + + atomic_dec(&open_count); + return -EBUSY; +} + +/* + * The BT (Block Transfer) interface means that entire messages are + * buffered by the host before a notification is sent to the BMC that + * there is data to be read. The first byte is the length and the + * message data follows. The read operation just tries to capture the + * whole before returning it to userspace. + * + * BT Message format : + * + * Byte 1 Byte 2 Byte 3 Byte 4 Byte 5:N + * Length NetFn/LUN Seq Cmd Data + * + */ +static ssize_t bt_bmc_read(struct file *file, char __user *buf, + size_t count, loff_t *ppos) +{ + struct bt_bmc *bt_bmc = file_bt_bmc(file); + u8 len; + int len_byte = 1; + u8 kbuffer[BT_BMC_BUFFER_SIZE]; + ssize_t ret = 0; + ssize_t nread; + + if (!access_ok(VERIFY_WRITE, buf, count)) + return -EFAULT; + + WARN_ON(*ppos); + + if (wait_event_interruptible(bt_bmc->queue, + bt_inb(bt_bmc, BT_CTRL) & BT_CTRL_H2B_ATN)) + return -ERESTARTSYS; + + mutex_lock(&bt_bmc->mutex); + + if (unlikely(!(bt_inb(bt_bmc, BT_CTRL) & BT_CTRL_H2B_ATN))) { + ret = -EIO; + goto out_unlock; + } + + set_b_busy(bt_bmc); + clr_h2b_atn(bt_bmc); + clr_rd_ptr(bt_bmc); + + /* + * The BT frames start with the message length, which does not + * include the length byte. + */ + kbuffer[0] = bt_read(bt_bmc); + len = kbuffer[0]; + + /* We pass the length back to userspace as well */ + if (len + 1 > count) + len = count - 1; + + while (len) { + nread = min_t(ssize_t, len, sizeof(kbuffer) - len_byte); + + bt_readn(bt_bmc, kbuffer + len_byte, nread); + + if (copy_to_user(buf, kbuffer, nread + len_byte)) { + ret = -EFAULT; + break; + } + len -= nread; + buf += nread + len_byte; + ret += nread + len_byte; + len_byte = 0; + } + + clr_b_busy(bt_bmc); + +out_unlock: + mutex_unlock(&bt_bmc->mutex); + return ret; +} + +/* + * BT Message response format : + * + * Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6:N + * Length NetFn/LUN Seq Cmd Code Data + */ +static ssize_t bt_bmc_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + struct bt_bmc *bt_bmc = file_bt_bmc(file); + u8 kbuffer[BT_BMC_BUFFER_SIZE]; + ssize_t ret = 0; + ssize_t nwritten; + + /* + * send a minimum response size + */ + if (count < 5) + return -EINVAL; + + if (!access_ok(VERIFY_READ, buf, count)) + return -EFAULT; + + WARN_ON(*ppos); + + /* + * There's no interrupt for clearing bmc busy so we have to + * poll + */ + if (wait_event_interruptible(bt_bmc->queue, + !(bt_inb(bt_bmc, BT_CTRL) & + (BT_CTRL_H_BUSY | BT_CTRL_B2H_ATN)))) + return -ERESTARTSYS; + + mutex_lock(&bt_bmc->mutex); + + if (unlikely(bt_inb(bt_bmc, BT_CTRL) & + (BT_CTRL_H_BUSY | BT_CTRL_B2H_ATN))) { + ret = -EIO; + goto out_unlock; + } + + clr_wr_ptr(bt_bmc); + + while (count) { + nwritten = min_t(ssize_t, count, sizeof(kbuffer)); + if (copy_from_user(&kbuffer, buf, nwritten)) { + ret = -EFAULT; + break; + } + + bt_writen(bt_bmc, kbuffer, nwritten); + + count -= nwritten; + buf += nwritten; + ret += nwritten; + } + + set_b2h_atn(bt_bmc); + +out_unlock: + mutex_unlock(&bt_bmc->mutex); + return ret; +} + +static long bt_bmc_ioctl(struct file *file, unsigned int cmd, + unsigned long param) +{ + struct bt_bmc *bt_bmc = file_bt_bmc(file); + + switch (cmd) { + case BT_BMC_IOCTL_SMS_ATN: + set_sms_atn(bt_bmc); + return 0; + } + return -EINVAL; +} + +static int bt_bmc_release(struct inode *inode, struct file *file) +{ + struct bt_bmc *bt_bmc = file_bt_bmc(file); + + atomic_dec(&open_count); + set_b_busy(bt_bmc); + return 0; +} + +static unsigned int bt_bmc_poll(struct file *file, poll_table *wait) +{ + struct bt_bmc *bt_bmc = file_bt_bmc(file); + unsigned int mask = 0; + u8 ctrl; + + poll_wait(file, &bt_bmc->queue, wait); + + ctrl = bt_inb(bt_bmc, BT_CTRL); + + if (ctrl & BT_CTRL_H2B_ATN) + mask |= POLLIN; + + if (!(ctrl & (BT_CTRL_H_BUSY | BT_CTRL_B2H_ATN))) + mask |= POLLOUT; + + return mask; +} + +static const struct file_operations bt_bmc_fops = { + .owner = THIS_MODULE, + .open = bt_bmc_open, + .read = bt_bmc_read, + .write = bt_bmc_write, + .release = bt_bmc_release, + .poll = bt_bmc_poll, + .unlocked_ioctl = bt_bmc_ioctl, +}; + +static void poll_timer(unsigned long data) +{ + struct bt_bmc *bt_bmc = (void *)data; + + bt_bmc->poll_timer.expires += msecs_to_jiffies(500); + wake_up(&bt_bmc->queue); + add_timer(&bt_bmc->poll_timer); +} + +static irqreturn_t bt_bmc_irq(int irq, void *arg) +{ + struct bt_bmc *bt_bmc = arg; + u32 reg; + + reg = ioread32(bt_bmc->base + BT_CR2); + reg &= BT_CR2_IRQ_H2B | BT_CR2_IRQ_HBUSY; + if (!reg) + return IRQ_NONE; + + /* ack pending IRQs */ + iowrite32(reg, bt_bmc->base + BT_CR2); + + wake_up(&bt_bmc->queue); + return IRQ_HANDLED; +} + +static int bt_bmc_config_irq(struct bt_bmc *bt_bmc, + struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + u32 reg; + int rc; + + bt_bmc->irq = platform_get_irq(pdev, 0); + if (!bt_bmc->irq) + return -ENODEV; + + rc = devm_request_irq(dev, bt_bmc->irq, bt_bmc_irq, IRQF_SHARED, + DEVICE_NAME, bt_bmc); + if (rc < 0) { + dev_warn(dev, "Unable to request IRQ %d\n", bt_bmc->irq); + bt_bmc->irq = 0; + return rc; + } + + /* + * Configure IRQs on the bmc clearing the H2B and HBUSY bits; + * H2B will be asserted when the bmc has data for us; HBUSY + * will be cleared (along with B2H) when we can write the next + * message to the BT buffer + */ + reg = ioread32(bt_bmc->base + BT_CR1); + reg |= BT_CR1_IRQ_H2B | BT_CR1_IRQ_HBUSY; + iowrite32(reg, bt_bmc->base + BT_CR1); + + return 0; +} + +static int bt_bmc_probe(struct platform_device *pdev) +{ + struct bt_bmc *bt_bmc; + struct device *dev; + struct resource *res; + int rc; + + if (!pdev || !pdev->dev.of_node) + return -ENODEV; + + dev = &pdev->dev; + dev_info(dev, "Found bt bmc device\n"); + + bt_bmc = devm_kzalloc(dev, sizeof(*bt_bmc), GFP_KERNEL); + if (!bt_bmc) + return -ENOMEM; + + dev_set_drvdata(&pdev->dev, bt_bmc); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + bt_bmc->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(bt_bmc->base)) + return PTR_ERR(bt_bmc->base); + + mutex_init(&bt_bmc->mutex); + init_waitqueue_head(&bt_bmc->queue); + + bt_bmc->miscdev.minor = MISC_DYNAMIC_MINOR, + bt_bmc->miscdev.name = DEVICE_NAME, + bt_bmc->miscdev.fops = &bt_bmc_fops, + bt_bmc->miscdev.parent = dev; + rc = misc_register(&bt_bmc->miscdev); + if (rc) { + dev_err(dev, "Unable to register misc device\n"); + return rc; + } + + bt_bmc_config_irq(bt_bmc, pdev); + + if (bt_bmc->irq) { + dev_info(dev, "Using IRQ %d\n", bt_bmc->irq); + } else { + dev_info(dev, "No IRQ; using timer\n"); + setup_timer(&bt_bmc->poll_timer, poll_timer, + (unsigned long)bt_bmc); + bt_bmc->poll_timer.expires = jiffies + msecs_to_jiffies(10); + add_timer(&bt_bmc->poll_timer); + } + + iowrite32((BT_IO_BASE << BT_CR0_IO_BASE) | + (BT_IRQ << BT_CR0_IRQ) | + BT_CR0_EN_CLR_SLV_RDP | + BT_CR0_EN_CLR_SLV_WRP | + BT_CR0_ENABLE_IBT, + bt_bmc->base + BT_CR0); + + clr_b_busy(bt_bmc); + + return 0; +} + +static int bt_bmc_remove(struct platform_device *pdev) +{ + struct bt_bmc *bt_bmc = dev_get_drvdata(&pdev->dev); + + misc_deregister(&bt_bmc->miscdev); + if (!bt_bmc->irq) + del_timer_sync(&bt_bmc->poll_timer); + return 0; +} + +static const struct of_device_id bt_bmc_match[] = { + { .compatible = "aspeed,ast2400-bt-bmc" }, + { }, +}; + +static struct platform_driver bt_bmc_driver = { + .driver = { + .name = DEVICE_NAME, + .of_match_table = bt_bmc_match, + }, + .probe = bt_bmc_probe, + .remove = bt_bmc_remove, +}; + +module_platform_driver(bt_bmc_driver); + +MODULE_DEVICE_TABLE(of, bt_bmc_match); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Alistair Popple <alistair@popple.id.au>"); +MODULE_DESCRIPTION("Linux device interface to the BT interface"); diff --git a/drivers/char/ipmi/ipmi_msghandler.c b/drivers/char/ipmi/ipmi_msghandler.c index d8619998cfb5..fcdd886819f5 100644 --- a/drivers/char/ipmi/ipmi_msghandler.c +++ b/drivers/char/ipmi/ipmi_msghandler.c @@ -2891,11 +2891,11 @@ int ipmi_register_smi(const struct ipmi_smi_handlers *handlers, intf->curr_channel = IPMI_MAX_CHANNELS; } + rv = ipmi_bmc_register(intf, i); + if (rv == 0) rv = add_proc_entries(intf, i); - rv = ipmi_bmc_register(intf, i); - out: if (rv) { if (intf->proc_dir) @@ -2982,8 +2982,6 @@ int ipmi_unregister_smi(ipmi_smi_t intf) int intf_num = intf->intf_num; ipmi_user_t user; - ipmi_bmc_unregister(intf); - mutex_lock(&smi_watchers_mutex); mutex_lock(&ipmi_interfaces_mutex); intf->intf_num = -1; @@ -3007,6 +3005,7 @@ int ipmi_unregister_smi(ipmi_smi_t intf) mutex_unlock(&ipmi_interfaces_mutex); remove_proc_entries(intf); + ipmi_bmc_unregister(intf); /* * Call all the watcher interfaces to tell them that diff --git a/drivers/clk/pxa/clk-pxa25x.c b/drivers/clk/pxa/clk-pxa25x.c index a98b98e2a9e4..56b0a6027e38 100644 --- a/drivers/clk/pxa/clk-pxa25x.c +++ b/drivers/clk/pxa/clk-pxa25x.c @@ -230,7 +230,7 @@ static struct dummy_clk dummy_clks[] __initdata = { DUMMY_CLK("GPIO11_CLK", NULL, "osc_3_6864mhz"), DUMMY_CLK("GPIO12_CLK", NULL, "osc_32_768khz"), DUMMY_CLK(NULL, "sa1100-rtc", "osc_32_768khz"), - DUMMY_CLK("OSTIMER0", NULL, "osc_32_768khz"), + DUMMY_CLK("OSTIMER0", NULL, "osc_3_6864mhz"), DUMMY_CLK("UARTCLK", "pxa2xx-ir", "STUART"), }; diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 245190839359..e2c6e43cf8ca 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -417,6 +417,16 @@ config SYS_SUPPORTS_SH_TMU config SYS_SUPPORTS_EM_STI bool +config CLKSRC_JCORE_PIT + bool "J-Core PIT timer driver" if COMPILE_TEST + depends on OF + depends on GENERIC_CLOCKEVENTS + depends on HAS_IOMEM + select CLKSRC_MMIO + help + This enables build of clocksource and clockevent driver for + the integrated PIT in the J-Core synthesizable, open source SoC. + config SH_TIMER_CMT bool "Renesas CMT timer driver" if COMPILE_TEST depends on GENERIC_CLOCKEVENTS diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index fd9d6df0bbc0..cf87f407f1ad 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -5,6 +5,7 @@ obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += cs5535-clockevt.o +obj-$(CONFIG_CLKSRC_JCORE_PIT) += jcore-pit.o obj-$(CONFIG_SH_TIMER_CMT) += sh_cmt.o obj-$(CONFIG_SH_TIMER_MTU2) += sh_mtu2.o obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o diff --git a/drivers/clocksource/jcore-pit.c b/drivers/clocksource/jcore-pit.c new file mode 100644 index 000000000000..54e1665aa03c --- /dev/null +++ b/drivers/clocksource/jcore-pit.c @@ -0,0 +1,249 @@ +/* + * J-Core SoC PIT/clocksource driver + * + * Copyright (C) 2015-2016 Smart Energy Instruments, Inc. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/interrupt.h> +#include <linux/clockchips.h> +#include <linux/clocksource.h> +#include <linux/sched_clock.h> +#include <linux/cpu.h> +#include <linux/cpuhotplug.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> + +#define PIT_IRQ_SHIFT 12 +#define PIT_PRIO_SHIFT 20 +#define PIT_ENABLE_SHIFT 26 +#define PIT_PRIO_MASK 0xf + +#define REG_PITEN 0x00 +#define REG_THROT 0x10 +#define REG_COUNT 0x14 +#define REG_BUSPD 0x18 +#define REG_SECHI 0x20 +#define REG_SECLO 0x24 +#define REG_NSEC 0x28 + +struct jcore_pit { + struct clock_event_device ced; + void __iomem *base; + unsigned long periodic_delta; + u32 enable_val; +}; + +static void __iomem *jcore_pit_base; +static struct jcore_pit __percpu *jcore_pit_percpu; + +static notrace u64 jcore_sched_clock_read(void) +{ + u32 seclo, nsec, seclo0; + __iomem void *base = jcore_pit_base; + + seclo = readl(base + REG_SECLO); + do { + seclo0 = seclo; + nsec = readl(base + REG_NSEC); + seclo = readl(base + REG_SECLO); + } while (seclo0 != seclo); + + return seclo * NSEC_PER_SEC + nsec; +} + +static cycle_t jcore_clocksource_read(struct clocksource *cs) +{ + return jcore_sched_clock_read(); +} + +static int jcore_pit_disable(struct jcore_pit *pit) +{ + writel(0, pit->base + REG_PITEN); + return 0; +} + +static int jcore_pit_set(unsigned long delta, struct jcore_pit *pit) +{ + jcore_pit_disable(pit); + writel(delta, pit->base + REG_THROT); + writel(pit->enable_val, pit->base + REG_PITEN); + return 0; +} + +static int jcore_pit_set_state_shutdown(struct clock_event_device *ced) +{ + struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced); + + return jcore_pit_disable(pit); +} + +static int jcore_pit_set_state_oneshot(struct clock_event_device *ced) +{ + struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced); + + return jcore_pit_disable(pit); +} + +static int jcore_pit_set_state_periodic(struct clock_event_device *ced) +{ + struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced); + + return jcore_pit_set(pit->periodic_delta, pit); +} + +static int jcore_pit_set_next_event(unsigned long delta, + struct clock_event_device *ced) +{ + struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced); + + return jcore_pit_set(delta, pit); +} + +static int jcore_pit_local_init(unsigned cpu) +{ + struct jcore_pit *pit = this_cpu_ptr(jcore_pit_percpu); + unsigned buspd, freq; + + pr_info("Local J-Core PIT init on cpu %u\n", cpu); + + buspd = readl(pit->base + REG_BUSPD); + freq = DIV_ROUND_CLOSEST(NSEC_PER_SEC, buspd); + pit->periodic_delta = DIV_ROUND_CLOSEST(NSEC_PER_SEC, HZ * buspd); + + clockevents_config_and_register(&pit->ced, freq, 1, ULONG_MAX); + + return 0; +} + +static irqreturn_t jcore_timer_interrupt(int irq, void *dev_id) +{ + struct jcore_pit *pit = this_cpu_ptr(dev_id); + + if (clockevent_state_oneshot(&pit->ced)) + jcore_pit_disable(pit); + + pit->ced.event_handler(&pit->ced); + + return IRQ_HANDLED; +} + +static int __init jcore_pit_init(struct device_node *node) +{ + int err; + unsigned pit_irq, cpu; + unsigned long hwirq; + u32 irqprio, enable_val; + + jcore_pit_base = of_iomap(node, 0); + if (!jcore_pit_base) { + pr_err("Error: Cannot map base address for J-Core PIT\n"); + return -ENXIO; + } + + pit_irq = irq_of_parse_and_map(node, 0); + if (!pit_irq) { + pr_err("Error: J-Core PIT has no IRQ\n"); + return -ENXIO; + } + + pr_info("Initializing J-Core PIT at %p IRQ %d\n", + jcore_pit_base, pit_irq); + + err = clocksource_mmio_init(jcore_pit_base, "jcore_pit_cs", + NSEC_PER_SEC, 400, 32, + jcore_clocksource_read); + if (err) { + pr_err("Error registering clocksource device: %d\n", err); + return err; + } + + sched_clock_register(jcore_sched_clock_read, 32, NSEC_PER_SEC); + + jcore_pit_percpu = alloc_percpu(struct jcore_pit); + if (!jcore_pit_percpu) { + pr_err("Failed to allocate memory for clock event device\n"); + return -ENOMEM; + } + + err = request_irq(pit_irq, jcore_timer_interrupt, + IRQF_TIMER | IRQF_PERCPU, + "jcore_pit", jcore_pit_percpu); + if (err) { + pr_err("pit irq request failed: %d\n", err); + free_percpu(jcore_pit_percpu); + return err; + } + + /* + * The J-Core PIT is not hard-wired to a particular IRQ, but + * integrated with the interrupt controller such that the IRQ it + * generates is programmable, as follows: + * + * The bit layout of the PIT enable register is: + * + * .....e..ppppiiiiiiii............ + * + * where the .'s indicate unrelated/unused bits, e is enable, + * p is priority, and i is hard irq number. + * + * For the PIT included in AIC1 (obsolete but still in use), + * any hard irq (trap number) can be programmed via the 8 + * iiiiiiii bits, and a priority (0-15) is programmable + * separately in the pppp bits. + * + * For the PIT included in AIC2 (current), the programming + * interface is equivalent modulo interrupt mapping. This is + * why a different compatible tag was not used. However only + * traps 64-127 (the ones actually intended to be used for + * interrupts, rather than syscalls/exceptions/etc.) can be + * programmed (the high 2 bits of i are ignored) and the + * priority pppp is <<2'd and or'd onto the irq number. This + * choice seems to have been made on the hardware engineering + * side under an assumption that preserving old AIC1 priority + * mappings was important. Future models will likely ignore + * the pppp field. + */ + hwirq = irq_get_irq_data(pit_irq)->hwirq; + irqprio = (hwirq >> 2) & PIT_PRIO_MASK; + enable_val = (1U << PIT_ENABLE_SHIFT) + | (hwirq << PIT_IRQ_SHIFT) + | (irqprio << PIT_PRIO_SHIFT); + + for_each_present_cpu(cpu) { + struct jcore_pit *pit = per_cpu_ptr(jcore_pit_percpu, cpu); + + pit->base = of_iomap(node, cpu); + if (!pit->base) { + pr_err("Unable to map PIT for cpu %u\n", cpu); + continue; + } + + pit->ced.name = "jcore_pit"; + pit->ced.features = CLOCK_EVT_FEAT_PERIODIC + | CLOCK_EVT_FEAT_ONESHOT + | CLOCK_EVT_FEAT_PERCPU; + pit->ced.cpumask = cpumask_of(cpu); + pit->ced.rating = 400; + pit->ced.irq = pit_irq; + pit->ced.set_state_shutdown = jcore_pit_set_state_shutdown; + pit->ced.set_state_periodic = jcore_pit_set_state_periodic; + pit->ced.set_state_oneshot = jcore_pit_set_state_oneshot; + pit->ced.set_next_event = jcore_pit_set_next_event; + + pit->enable_val = enable_val; + } + + cpuhp_setup_state(CPUHP_AP_JCORE_TIMER_STARTING, + "AP_JCORE_TIMER_STARTING", + jcore_pit_local_init, NULL); + + return 0; +} + +CLOCKSOURCE_OF_DECLARE(jcore_pit, "jcore,pit", jcore_pit_init); diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c index 3e1cb512f3ce..9cae38eebec2 100644 --- a/drivers/clocksource/pxa_timer.c +++ b/drivers/clocksource/pxa_timer.c @@ -220,17 +220,16 @@ CLOCKSOURCE_OF_DECLARE(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init); /* * Legacy timer init for non device-tree boards. */ -void __init pxa_timer_nodt_init(int irq, void __iomem *base, - unsigned long clock_tick_rate) +void __init pxa_timer_nodt_init(int irq, void __iomem *base) { struct clk *clk; timer_base = base; clk = clk_get(NULL, "OSTIMER0"); - if (clk && !IS_ERR(clk)) + if (clk && !IS_ERR(clk)) { clk_prepare_enable(clk); - else + pxa_timer_common_init(irq, clk_get_rate(clk)); + } else { pr_crit("%s: unable to get clk\n", __func__); - - pxa_timer_common_init(irq, clock_tick_rate); + } } diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c index c184eb84101e..4f87f3e76d83 100644 --- a/drivers/clocksource/timer-sun5i.c +++ b/drivers/clocksource/timer-sun5i.c @@ -152,6 +152,13 @@ static irqreturn_t sun5i_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } +static cycle_t sun5i_clksrc_read(struct clocksource *clksrc) +{ + struct sun5i_timer_clksrc *cs = to_sun5i_timer_clksrc(clksrc); + + return ~readl(cs->timer.base + TIMER_CNTVAL_LO_REG(1)); +} + static int sun5i_rate_cb_clksrc(struct notifier_block *nb, unsigned long event, void *data) { @@ -210,8 +217,13 @@ static int __init sun5i_setup_clocksource(struct device_node *node, writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD, base + TIMER_CTL_REG(1)); - ret = clocksource_mmio_init(base + TIMER_CNTVAL_LO_REG(1), node->name, - rate, 340, 32, clocksource_mmio_readl_down); + cs->clksrc.name = node->name; + cs->clksrc.rating = 340; + cs->clksrc.read = sun5i_clksrc_read; + cs->clksrc.mask = CLOCKSOURCE_MASK(32); + cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; + + ret = clocksource_register_hz(&cs->clksrc, rate); if (ret) { pr_err("Couldn't register clock source.\n"); goto err_remove_notifier; diff --git a/drivers/firewire/nosy.c b/drivers/firewire/nosy.c index 631c977b0da5..180f0a96528c 100644 --- a/drivers/firewire/nosy.c +++ b/drivers/firewire/nosy.c @@ -566,6 +566,11 @@ add_card(struct pci_dev *dev, const struct pci_device_id *unused) lynx->registers = ioremap_nocache(pci_resource_start(dev, 0), PCILYNX_MAX_REGISTER); + if (lynx->registers == NULL) { + dev_err(&dev->dev, "Failed to map registers\n"); + ret = -ENOMEM; + goto fail_deallocate_lynx; + } lynx->rcv_start_pcl = pci_alloc_consistent(lynx->pci_device, sizeof(struct pcl), &lynx->rcv_start_pcl_bus); @@ -578,7 +583,7 @@ add_card(struct pci_dev *dev, const struct pci_device_id *unused) lynx->rcv_buffer == NULL) { dev_err(&dev->dev, "Failed to allocate receive buffer\n"); ret = -ENOMEM; - goto fail_deallocate; + goto fail_deallocate_buffers; } lynx->rcv_start_pcl->next = cpu_to_le32(lynx->rcv_pcl_bus); lynx->rcv_pcl->next = cpu_to_le32(PCL_NEXT_INVALID); @@ -641,7 +646,7 @@ add_card(struct pci_dev *dev, const struct pci_device_id *unused) dev_err(&dev->dev, "Failed to allocate shared interrupt %d\n", dev->irq); ret = -EIO; - goto fail_deallocate; + goto fail_deallocate_buffers; } lynx->misc.parent = &dev->dev; @@ -668,7 +673,7 @@ fail_free_irq: reg_write(lynx, PCI_INT_ENABLE, 0); free_irq(lynx->pci_device->irq, lynx); -fail_deallocate: +fail_deallocate_buffers: if (lynx->rcv_start_pcl) pci_free_consistent(lynx->pci_device, sizeof(struct pcl), lynx->rcv_start_pcl, lynx->rcv_start_pcl_bus); @@ -679,6 +684,8 @@ fail_deallocate: pci_free_consistent(lynx->pci_device, PAGE_SIZE, lynx->rcv_buffer, lynx->rcv_buffer_bus); iounmap(lynx->registers); + +fail_deallocate_lynx: kfree(lynx); fail_disable: diff --git a/drivers/firmware/efi/libstub/Makefile b/drivers/firmware/efi/libstub/Makefile index c06945160a41..5e23e2d305e7 100644 --- a/drivers/firmware/efi/libstub/Makefile +++ b/drivers/firmware/efi/libstub/Makefile @@ -11,7 +11,7 @@ cflags-$(CONFIG_X86) += -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 \ -mno-mmx -mno-sse cflags-$(CONFIG_ARM64) := $(subst -pg,,$(KBUILD_CFLAGS)) -cflags-$(CONFIG_ARM) := $(subst -pg,,$(KBUILD_CFLAGS)) \ +cflags-$(CONFIG_ARM) := $(subst -pg,,$(KBUILD_CFLAGS)) -g0 \ -fno-builtin -fpic -mno-single-pic-base cflags-$(CONFIG_EFI_ARMSTUB) += -I$(srctree)/scripts/dtc/libfdt @@ -79,5 +79,6 @@ quiet_cmd_stubcopy = STUBCPY $@ # decompressor. So move our .data to .data.efistub, which is preserved # explicitly by the decompressor linker script. # -STUBCOPY_FLAGS-$(CONFIG_ARM) += --rename-section .data=.data.efistub +STUBCOPY_FLAGS-$(CONFIG_ARM) += --rename-section .data=.data.efistub \ + -R ___ksymtab+sort -R ___kcrctab+sort STUBCOPY_RELOC-$(CONFIG_ARM) := R_ARM_ABS diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c index 2e3a0543760d..e3281d4e3e41 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c @@ -765,7 +765,7 @@ amdgpu_connector_lvds_detect(struct drm_connector *connector, bool force) return ret; } -static void amdgpu_connector_destroy(struct drm_connector *connector) +static void amdgpu_connector_unregister(struct drm_connector *connector) { struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector); @@ -773,6 +773,12 @@ static void amdgpu_connector_destroy(struct drm_connector *connector) drm_dp_aux_unregister(&amdgpu_connector->ddc_bus->aux); amdgpu_connector->ddc_bus->has_aux = false; } +} + +static void amdgpu_connector_destroy(struct drm_connector *connector) +{ + struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector); + amdgpu_connector_free_edid(connector); kfree(amdgpu_connector->con_priv); drm_connector_unregister(connector); @@ -826,6 +832,7 @@ static const struct drm_connector_funcs amdgpu_connector_lvds_funcs = { .dpms = drm_helper_connector_dpms, .detect = amdgpu_connector_lvds_detect, .fill_modes = drm_helper_probe_single_connector_modes, + .early_unregister = amdgpu_connector_unregister, .destroy = amdgpu_connector_destroy, .set_property = amdgpu_connector_set_lcd_property, }; @@ -936,6 +943,7 @@ static const struct drm_connector_funcs amdgpu_connector_vga_funcs = { .dpms = drm_helper_connector_dpms, .detect = amdgpu_connector_vga_detect, .fill_modes = drm_helper_probe_single_connector_modes, + .early_unregister = amdgpu_connector_unregister, .destroy = amdgpu_connector_destroy, .set_property = amdgpu_connector_set_property, }; @@ -1203,6 +1211,7 @@ static const struct drm_connector_funcs amdgpu_connector_dvi_funcs = { .detect = amdgpu_connector_dvi_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = amdgpu_connector_set_property, + .early_unregister = amdgpu_connector_unregister, .destroy = amdgpu_connector_destroy, .force = amdgpu_connector_dvi_force, }; @@ -1493,6 +1502,7 @@ static const struct drm_connector_funcs amdgpu_connector_dp_funcs = { .detect = amdgpu_connector_dp_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = amdgpu_connector_set_property, + .early_unregister = amdgpu_connector_unregister, .destroy = amdgpu_connector_destroy, .force = amdgpu_connector_dvi_force, }; @@ -1502,6 +1512,7 @@ static const struct drm_connector_funcs amdgpu_connector_edp_funcs = { .detect = amdgpu_connector_dp_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = amdgpu_connector_set_lcd_property, + .early_unregister = amdgpu_connector_unregister, .destroy = amdgpu_connector_destroy, .force = amdgpu_connector_dvi_force, }; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index e203e5561107..a5e2fcbef0f0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -43,6 +43,9 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev, struct amdgpu_ctx *ctx) ctx->rings[i].sequence = 1; ctx->rings[i].fences = &ctx->fences[amdgpu_sched_jobs * i]; } + + ctx->reset_counter = atomic_read(&adev->gpu_reset_counter); + /* create context entity for each ring */ for (i = 0; i < adev->num_rings; i++) { struct amdgpu_ring *ring = adev->rings[i]; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 7dbe85d67d26..b4f4a9239069 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -1408,16 +1408,6 @@ static int amdgpu_late_init(struct amdgpu_device *adev) for (i = 0; i < adev->num_ip_blocks; i++) { if (!adev->ip_block_status[i].valid) continue; - if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_UVD || - adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_VCE) - continue; - /* enable clockgating to save power */ - r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev, - AMD_CG_STATE_GATE); - if (r) { - DRM_ERROR("set_clockgating_state(gate) of IP block <%s> failed %d\n", adev->ip_blocks[i].funcs->name, r); - return r; - } if (adev->ip_blocks[i].funcs->late_init) { r = adev->ip_blocks[i].funcs->late_init((void *)adev); if (r) { @@ -1426,6 +1416,18 @@ static int amdgpu_late_init(struct amdgpu_device *adev) } adev->ip_block_status[i].late_initialized = true; } + /* skip CG for VCE/UVD, it's handled specially */ + if (adev->ip_blocks[i].type != AMD_IP_BLOCK_TYPE_UVD && + adev->ip_blocks[i].type != AMD_IP_BLOCK_TYPE_VCE) { + /* enable clockgating to save power */ + r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev, + AMD_CG_STATE_GATE); + if (r) { + DRM_ERROR("set_clockgating_state(gate) of IP block <%s> failed %d\n", + adev->ip_blocks[i].funcs->name, r); + return r; + } + } } return 0; @@ -1435,6 +1437,30 @@ static int amdgpu_fini(struct amdgpu_device *adev) { int i, r; + /* need to disable SMC first */ + for (i = 0; i < adev->num_ip_blocks; i++) { + if (!adev->ip_block_status[i].hw) + continue; + if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_SMC) { + /* ungate blocks before hw fini so that we can shutdown the blocks safely */ + r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev, + AMD_CG_STATE_UNGATE); + if (r) { + DRM_ERROR("set_clockgating_state(ungate) of IP block <%s> failed %d\n", + adev->ip_blocks[i].funcs->name, r); + return r; + } + r = adev->ip_blocks[i].funcs->hw_fini((void *)adev); + /* XXX handle errors */ + if (r) { + DRM_DEBUG("hw_fini of IP block <%s> failed %d\n", + adev->ip_blocks[i].funcs->name, r); + } + adev->ip_block_status[i].hw = false; + break; + } + } + for (i = adev->num_ip_blocks - 1; i >= 0; i--) { if (!adev->ip_block_status[i].hw) continue; @@ -2073,7 +2099,8 @@ static bool amdgpu_check_soft_reset(struct amdgpu_device *adev) if (!adev->ip_block_status[i].valid) continue; if (adev->ip_blocks[i].funcs->check_soft_reset) - adev->ip_blocks[i].funcs->check_soft_reset(adev); + adev->ip_block_status[i].hang = + adev->ip_blocks[i].funcs->check_soft_reset(adev); if (adev->ip_block_status[i].hang) { DRM_INFO("IP block:%d is hang!\n", i); asic_hang = true; @@ -2102,12 +2129,20 @@ static int amdgpu_pre_soft_reset(struct amdgpu_device *adev) static bool amdgpu_need_full_reset(struct amdgpu_device *adev) { - if (adev->ip_block_status[AMD_IP_BLOCK_TYPE_GMC].hang || - adev->ip_block_status[AMD_IP_BLOCK_TYPE_SMC].hang || - adev->ip_block_status[AMD_IP_BLOCK_TYPE_ACP].hang || - adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang) { - DRM_INFO("Some block need full reset!\n"); - return true; + int i; + + for (i = 0; i < adev->num_ip_blocks; i++) { + if (!adev->ip_block_status[i].valid) + continue; + if ((adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) || + (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_SMC) || + (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_ACP) || + (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_DCE)) { + if (adev->ip_block_status[i].hang) { + DRM_INFO("Some block need full reset!\n"); + return true; + } + } } return false; } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c index fe36caf1b7d7..14f57d9915e3 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c @@ -113,24 +113,26 @@ void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev, printk("\n"); } + u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev) { struct drm_device *dev = adev->ddev; struct drm_crtc *crtc; struct amdgpu_crtc *amdgpu_crtc; - u32 line_time_us, vblank_lines; + u32 vblank_in_pixels; u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */ if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) { list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { amdgpu_crtc = to_amdgpu_crtc(crtc); if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { - line_time_us = (amdgpu_crtc->hw_mode.crtc_htotal * 1000) / - amdgpu_crtc->hw_mode.clock; - vblank_lines = amdgpu_crtc->hw_mode.crtc_vblank_end - + vblank_in_pixels = + amdgpu_crtc->hw_mode.crtc_htotal * + (amdgpu_crtc->hw_mode.crtc_vblank_end - amdgpu_crtc->hw_mode.crtc_vdisplay + - (amdgpu_crtc->v_border * 2); - vblank_time_us = vblank_lines * line_time_us; + (amdgpu_crtc->v_border * 2)); + + vblank_time_us = vblank_in_pixels * 1000 / amdgpu_crtc->hw_mode.clock; break; } } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c index e1fa8731d1e2..3cb5e903cd62 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c @@ -345,8 +345,8 @@ static int amdgpu_debugfs_ring_init(struct amdgpu_device *adev, ent = debugfs_create_file(name, S_IFREG | S_IRUGO, root, ring, &amdgpu_debugfs_ring_fops); - if (IS_ERR(ent)) - return PTR_ERR(ent); + if (!ent) + return -ENOMEM; i_size_write(ent->d_inode, ring->ring_size + 12); ring->ent = ent; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 887483b8b818..dcaf691f56b5 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -555,10 +555,13 @@ struct amdgpu_ttm_tt { int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages) { struct amdgpu_ttm_tt *gtt = (void *)ttm; - int write = !(gtt->userflags & AMDGPU_GEM_USERPTR_READONLY); + unsigned int flags = 0; unsigned pinned = 0; int r; + if (!(gtt->userflags & AMDGPU_GEM_USERPTR_READONLY)) + flags |= FOLL_WRITE; + if (gtt->userflags & AMDGPU_GEM_USERPTR_ANONONLY) { /* check that we only use anonymous memory to prevent problems with writeback */ @@ -581,7 +584,7 @@ int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages) list_add(&guptask.list, >t->guptasks); spin_unlock(>t->guptasklock); - r = get_user_pages(userptr, num_pages, write, 0, p, NULL); + r = get_user_pages(userptr, num_pages, flags, p, NULL); spin_lock(>t->guptasklock); list_del(&guptask.list); diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c index f80a0834e889..3c082e143730 100644 --- a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c @@ -1514,14 +1514,16 @@ static int cz_dpm_set_powergating_state(void *handle, return 0; } -/* borrowed from KV, need future unify */ static int cz_dpm_get_temperature(struct amdgpu_device *adev) { int actual_temp = 0; - uint32_t temp = RREG32_SMC(0xC0300E0C); + uint32_t val = RREG32_SMC(ixTHM_TCON_CUR_TMP); + uint32_t temp = REG_GET_FIELD(val, THM_TCON_CUR_TMP, CUR_TEMP); - if (temp) + if (REG_GET_FIELD(val, THM_TCON_CUR_TMP, CUR_TEMP_RANGE_SEL)) actual_temp = 1000 * ((temp / 8) - 49); + else + actual_temp = 1000 * (temp / 8); return actual_temp; } diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c index 613ebb7ed50f..4108c686aa7c 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c @@ -3188,16 +3188,11 @@ static int dce_v10_0_wait_for_idle(void *handle) return 0; } -static int dce_v10_0_check_soft_reset(void *handle) +static bool dce_v10_0_check_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (dce_v10_0_is_display_hung(adev)) - adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang = true; - else - adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang = false; - - return 0; + return dce_v10_0_is_display_hung(adev); } static int dce_v10_0_soft_reset(void *handle) @@ -3205,9 +3200,6 @@ static int dce_v10_0_soft_reset(void *handle) u32 srbm_soft_reset = 0, tmp; struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang) - return 0; - if (dce_v10_0_is_display_hung(adev)) srbm_soft_reset |= SRBM_SOFT_RESET__SOFT_RESET_DC_MASK; diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 6c6ff57b1c95..ee6a48a09214 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -4087,14 +4087,21 @@ static int gfx_v8_0_rlc_load_microcode(struct amdgpu_device *adev) static int gfx_v8_0_rlc_resume(struct amdgpu_device *adev) { int r; + u32 tmp; gfx_v8_0_rlc_stop(adev); /* disable CG */ - WREG32(mmRLC_CGCG_CGLS_CTRL, 0); + tmp = RREG32(mmRLC_CGCG_CGLS_CTRL); + tmp &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | + RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); + WREG32(mmRLC_CGCG_CGLS_CTRL, tmp); if (adev->asic_type == CHIP_POLARIS11 || - adev->asic_type == CHIP_POLARIS10) - WREG32(mmRLC_CGCG_CGLS_CTRL_3D, 0); + adev->asic_type == CHIP_POLARIS10) { + tmp = RREG32(mmRLC_CGCG_CGLS_CTRL_3D); + tmp &= ~0x3; + WREG32(mmRLC_CGCG_CGLS_CTRL_3D, tmp); + } /* disable PG */ WREG32(mmRLC_PG_CNTL, 0); @@ -5137,7 +5144,7 @@ static int gfx_v8_0_wait_for_idle(void *handle) return -ETIMEDOUT; } -static int gfx_v8_0_check_soft_reset(void *handle) +static bool gfx_v8_0_check_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 grbm_soft_reset = 0, srbm_soft_reset = 0; @@ -5189,16 +5196,14 @@ static int gfx_v8_0_check_soft_reset(void *handle) SRBM_SOFT_RESET, SOFT_RESET_SEM, 1); if (grbm_soft_reset || srbm_soft_reset) { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_GFX].hang = true; adev->gfx.grbm_soft_reset = grbm_soft_reset; adev->gfx.srbm_soft_reset = srbm_soft_reset; + return true; } else { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_GFX].hang = false; adev->gfx.grbm_soft_reset = 0; adev->gfx.srbm_soft_reset = 0; + return false; } - - return 0; } static void gfx_v8_0_inactive_hqd(struct amdgpu_device *adev, @@ -5226,7 +5231,8 @@ static int gfx_v8_0_pre_soft_reset(void *handle) struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 grbm_soft_reset = 0, srbm_soft_reset = 0; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_GFX].hang) + if ((!adev->gfx.grbm_soft_reset) && + (!adev->gfx.srbm_soft_reset)) return 0; grbm_soft_reset = adev->gfx.grbm_soft_reset; @@ -5264,7 +5270,8 @@ static int gfx_v8_0_soft_reset(void *handle) u32 grbm_soft_reset = 0, srbm_soft_reset = 0; u32 tmp; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_GFX].hang) + if ((!adev->gfx.grbm_soft_reset) && + (!adev->gfx.srbm_soft_reset)) return 0; grbm_soft_reset = adev->gfx.grbm_soft_reset; @@ -5334,7 +5341,8 @@ static int gfx_v8_0_post_soft_reset(void *handle) struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 grbm_soft_reset = 0, srbm_soft_reset = 0; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_GFX].hang) + if ((!adev->gfx.grbm_soft_reset) && + (!adev->gfx.srbm_soft_reset)) return 0; grbm_soft_reset = adev->gfx.grbm_soft_reset; diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c index 1b319f5bc696..c22ef140a542 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c @@ -1099,7 +1099,7 @@ static int gmc_v8_0_wait_for_idle(void *handle) } -static int gmc_v8_0_check_soft_reset(void *handle) +static bool gmc_v8_0_check_soft_reset(void *handle) { u32 srbm_soft_reset = 0; struct amdgpu_device *adev = (struct amdgpu_device *)handle; @@ -1116,20 +1116,19 @@ static int gmc_v8_0_check_soft_reset(void *handle) SRBM_SOFT_RESET, SOFT_RESET_MC, 1); } if (srbm_soft_reset) { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_GMC].hang = true; adev->mc.srbm_soft_reset = srbm_soft_reset; + return true; } else { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_GMC].hang = false; adev->mc.srbm_soft_reset = 0; + return false; } - return 0; } static int gmc_v8_0_pre_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_GMC].hang) + if (!adev->mc.srbm_soft_reset) return 0; gmc_v8_0_mc_stop(adev, &adev->mc.save); @@ -1145,7 +1144,7 @@ static int gmc_v8_0_soft_reset(void *handle) struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 srbm_soft_reset; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_GMC].hang) + if (!adev->mc.srbm_soft_reset) return 0; srbm_soft_reset = adev->mc.srbm_soft_reset; @@ -1175,7 +1174,7 @@ static int gmc_v8_0_post_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_GMC].hang) + if (!adev->mc.srbm_soft_reset) return 0; gmc_v8_0_mc_resume(adev, &adev->mc.save); diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c index f325fd86430b..a9d10941fb53 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c @@ -1268,7 +1268,7 @@ static int sdma_v3_0_wait_for_idle(void *handle) return -ETIMEDOUT; } -static int sdma_v3_0_check_soft_reset(void *handle) +static bool sdma_v3_0_check_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 srbm_soft_reset = 0; @@ -1281,14 +1281,12 @@ static int sdma_v3_0_check_soft_reset(void *handle) } if (srbm_soft_reset) { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_SDMA].hang = true; adev->sdma.srbm_soft_reset = srbm_soft_reset; + return true; } else { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_SDMA].hang = false; adev->sdma.srbm_soft_reset = 0; + return false; } - - return 0; } static int sdma_v3_0_pre_soft_reset(void *handle) @@ -1296,7 +1294,7 @@ static int sdma_v3_0_pre_soft_reset(void *handle) struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 srbm_soft_reset = 0; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_SDMA].hang) + if (!adev->sdma.srbm_soft_reset) return 0; srbm_soft_reset = adev->sdma.srbm_soft_reset; @@ -1315,7 +1313,7 @@ static int sdma_v3_0_post_soft_reset(void *handle) struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 srbm_soft_reset = 0; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_SDMA].hang) + if (!adev->sdma.srbm_soft_reset) return 0; srbm_soft_reset = adev->sdma.srbm_soft_reset; @@ -1335,7 +1333,7 @@ static int sdma_v3_0_soft_reset(void *handle) u32 srbm_soft_reset = 0; u32 tmp; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_SDMA].hang) + if (!adev->sdma.srbm_soft_reset) return 0; srbm_soft_reset = adev->sdma.srbm_soft_reset; diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c index 8bd08925b370..3de7bca5854b 100644 --- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c @@ -3499,6 +3499,12 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev, max_sclk = 75000; max_mclk = 80000; } + /* Limit clocks for some HD8600 parts */ + if (adev->pdev->device == 0x6660 && + adev->pdev->revision == 0x83) { + max_sclk = 75000; + max_mclk = 80000; + } if (rps->vce_active) { rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c index d127d59f953a..b4ea229bb449 100644 --- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c @@ -373,7 +373,7 @@ static int tonga_ih_wait_for_idle(void *handle) return -ETIMEDOUT; } -static int tonga_ih_check_soft_reset(void *handle) +static bool tonga_ih_check_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 srbm_soft_reset = 0; @@ -384,21 +384,19 @@ static int tonga_ih_check_soft_reset(void *handle) SOFT_RESET_IH, 1); if (srbm_soft_reset) { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_IH].hang = true; adev->irq.srbm_soft_reset = srbm_soft_reset; + return true; } else { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_IH].hang = false; adev->irq.srbm_soft_reset = 0; + return false; } - - return 0; } static int tonga_ih_pre_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_IH].hang) + if (!adev->irq.srbm_soft_reset) return 0; return tonga_ih_hw_fini(adev); @@ -408,7 +406,7 @@ static int tonga_ih_post_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_IH].hang) + if (!adev->irq.srbm_soft_reset) return 0; return tonga_ih_hw_init(adev); @@ -419,7 +417,7 @@ static int tonga_ih_soft_reset(void *handle) struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 srbm_soft_reset; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_IH].hang) + if (!adev->irq.srbm_soft_reset) return 0; srbm_soft_reset = adev->irq.srbm_soft_reset; diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c index e0fd9f21ed95..ab3df6d75656 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c @@ -770,7 +770,7 @@ static int uvd_v6_0_wait_for_idle(void *handle) } #define AMDGPU_UVD_STATUS_BUSY_MASK 0xfd -static int uvd_v6_0_check_soft_reset(void *handle) +static bool uvd_v6_0_check_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 srbm_soft_reset = 0; @@ -782,19 +782,19 @@ static int uvd_v6_0_check_soft_reset(void *handle) srbm_soft_reset = REG_SET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, SOFT_RESET_UVD, 1); if (srbm_soft_reset) { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_UVD].hang = true; adev->uvd.srbm_soft_reset = srbm_soft_reset; + return true; } else { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_UVD].hang = false; adev->uvd.srbm_soft_reset = 0; + return false; } - return 0; } + static int uvd_v6_0_pre_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_UVD].hang) + if (!adev->uvd.srbm_soft_reset) return 0; uvd_v6_0_stop(adev); @@ -806,7 +806,7 @@ static int uvd_v6_0_soft_reset(void *handle) struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 srbm_soft_reset; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_UVD].hang) + if (!adev->uvd.srbm_soft_reset) return 0; srbm_soft_reset = adev->uvd.srbm_soft_reset; @@ -836,7 +836,7 @@ static int uvd_v6_0_post_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_UVD].hang) + if (!adev->uvd.srbm_soft_reset) return 0; mdelay(5); diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c index 3f6db4ec0102..8533269ec160 100644 --- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c @@ -561,7 +561,7 @@ static int vce_v3_0_wait_for_idle(void *handle) #define AMDGPU_VCE_STATUS_BUSY_MASK (VCE_STATUS_VCPU_REPORT_AUTO_BUSY_MASK | \ VCE_STATUS_VCPU_REPORT_RB0_BUSY_MASK) -static int vce_v3_0_check_soft_reset(void *handle) +static bool vce_v3_0_check_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 srbm_soft_reset = 0; @@ -591,16 +591,15 @@ static int vce_v3_0_check_soft_reset(void *handle) srbm_soft_reset = REG_SET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, SOFT_RESET_VCE1, 1); } WREG32_FIELD(GRBM_GFX_INDEX, INSTANCE_INDEX, 0); + mutex_unlock(&adev->grbm_idx_mutex); if (srbm_soft_reset) { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_VCE].hang = true; adev->vce.srbm_soft_reset = srbm_soft_reset; + return true; } else { - adev->ip_block_status[AMD_IP_BLOCK_TYPE_VCE].hang = false; adev->vce.srbm_soft_reset = 0; + return false; } - mutex_unlock(&adev->grbm_idx_mutex); - return 0; } static int vce_v3_0_soft_reset(void *handle) @@ -608,7 +607,7 @@ static int vce_v3_0_soft_reset(void *handle) struct amdgpu_device *adev = (struct amdgpu_device *)handle; u32 srbm_soft_reset; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_VCE].hang) + if (!adev->vce.srbm_soft_reset) return 0; srbm_soft_reset = adev->vce.srbm_soft_reset; @@ -638,7 +637,7 @@ static int vce_v3_0_pre_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_VCE].hang) + if (!adev->vce.srbm_soft_reset) return 0; mdelay(5); @@ -651,7 +650,7 @@ static int vce_v3_0_post_soft_reset(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; - if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_VCE].hang) + if (!adev->vce.srbm_soft_reset) return 0; mdelay(5); diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h index c934b78c9e2f..bec8125bceb0 100644 --- a/drivers/gpu/drm/amd/include/amd_shared.h +++ b/drivers/gpu/drm/amd/include/amd_shared.h @@ -165,7 +165,7 @@ struct amd_ip_funcs { /* poll for idle */ int (*wait_for_idle)(void *handle); /* check soft reset the IP block */ - int (*check_soft_reset)(void *handle); + bool (*check_soft_reset)(void *handle); /* pre soft reset the IP block */ int (*pre_soft_reset)(void *handle); /* soft reset the IP block */ diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c b/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c index 92b117843875..8cee4e0f9fde 100644 --- a/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c +++ b/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c @@ -49,6 +49,7 @@ static const pem_event_action * const uninitialize_event[] = { uninitialize_display_phy_access_tasks, disable_gfx_voltage_island_power_gating_tasks, disable_gfx_clock_gating_tasks, + uninitialize_thermal_controller_tasks, set_boot_state_tasks, adjust_power_state_tasks, disable_dynamic_state_management_tasks, diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c index 7e4fcbbbe086..960424913496 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c @@ -1785,6 +1785,21 @@ static int cz_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_c return 0; } +static int cz_thermal_get_temperature(struct pp_hwmgr *hwmgr) +{ + int actual_temp = 0; + uint32_t val = cgs_read_ind_register(hwmgr->device, + CGS_IND_REG__SMC, ixTHM_TCON_CUR_TMP); + uint32_t temp = PHM_GET_FIELD(val, THM_TCON_CUR_TMP, CUR_TEMP); + + if (PHM_GET_FIELD(val, THM_TCON_CUR_TMP, CUR_TEMP_RANGE_SEL)) + actual_temp = ((temp / 8) - 49) * PP_TEMPERATURE_UNITS_PER_CENTIGRADES; + else + actual_temp = (temp / 8) * PP_TEMPERATURE_UNITS_PER_CENTIGRADES; + + return actual_temp; +} + static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value) { struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend); @@ -1881,6 +1896,9 @@ static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value) case AMDGPU_PP_SENSOR_VCE_POWER: *value = cz_hwmgr->vce_power_gated ? 0 : 1; return 0; + case AMDGPU_PP_SENSOR_GPU_TEMP: + *value = cz_thermal_get_temperature(hwmgr); + return 0; default: return -EINVAL; } diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index 508245d49d33..609996c84ad5 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c @@ -1030,20 +1030,19 @@ static int smu7_disable_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); /* disable SCLK dpm */ - if (!data->sclk_dpm_key_disabled) - PP_ASSERT_WITH_CODE( - (smum_send_msg_to_smc(hwmgr->smumgr, - PPSMC_MSG_DPM_Disable) == 0), - "Failed to disable SCLK DPM!", - return -EINVAL); + if (!data->sclk_dpm_key_disabled) { + PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr), + "Trying to disable SCLK DPM when DPM is disabled", + return 0); + smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_DPM_Disable); + } /* disable MCLK dpm */ if (!data->mclk_dpm_key_disabled) { - PP_ASSERT_WITH_CODE( - (smum_send_msg_to_smc(hwmgr->smumgr, - PPSMC_MSG_MCLKDPM_Disable) == 0), - "Failed to disable MCLK DPM!", - return -EINVAL); + PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr), + "Trying to disable MCLK DPM when DPM is disabled", + return 0); + smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_MCLKDPM_Disable); } return 0; @@ -1069,10 +1068,13 @@ static int smu7_stop_dpm(struct pp_hwmgr *hwmgr) return -EINVAL); } - if (smu7_disable_sclk_mclk_dpm(hwmgr)) { - printk(KERN_ERR "Failed to disable Sclk DPM and Mclk DPM!"); - return -EINVAL; - } + smu7_disable_sclk_mclk_dpm(hwmgr); + + PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr), + "Trying to disable voltage DPM when DPM is disabled", + return 0); + + smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_Voltage_Cntl_Disable); return 0; } @@ -1226,7 +1228,7 @@ int smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr) PP_ASSERT_WITH_CODE((0 == tmp_result), "Failed to enable VR hot GPIO interrupt!", result = tmp_result); - smum_send_msg_to_smc(hwmgr->smumgr, (PPSMC_Msg)PPSMC_HasDisplay); + smum_send_msg_to_smc(hwmgr->smumgr, (PPSMC_Msg)PPSMC_NoDisplay); tmp_result = smu7_enable_sclk_control(hwmgr); PP_ASSERT_WITH_CODE((0 == tmp_result), @@ -1306,6 +1308,12 @@ int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr) PP_ASSERT_WITH_CODE((tmp_result == 0), "Failed to disable thermal auto throttle!", result = tmp_result); + if (1 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, FEATURE_STATUS, AVS_ON)) { + PP_ASSERT_WITH_CODE((0 == smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_DisableAvfs)), + "Failed to disable AVFS!", + return -EINVAL); + } + tmp_result = smu7_stop_dpm(hwmgr); PP_ASSERT_WITH_CODE((tmp_result == 0), "Failed to stop DPM!", result = tmp_result); @@ -1452,8 +1460,10 @@ static int smu7_get_evv_voltages(struct pp_hwmgr *hwmgr) struct phm_ppt_v1_clock_voltage_dependency_table *sclk_table = NULL; - if (table_info != NULL) - sclk_table = table_info->vdd_dep_on_sclk; + if (table_info == NULL) + return -EINVAL; + + sclk_table = table_info->vdd_dep_on_sclk; for (i = 0; i < SMU7_MAX_LEAKAGE_COUNT; i++) { vv_id = ATOM_VIRTUAL_VOLTAGE_ID0 + i; @@ -3802,13 +3812,15 @@ static inline bool smu7_are_power_levels_equal(const struct smu7_performance_lev int smu7_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pstate1, const struct pp_hw_power_state *pstate2, bool *equal) { - const struct smu7_power_state *psa = cast_const_phw_smu7_power_state(pstate1); - const struct smu7_power_state *psb = cast_const_phw_smu7_power_state(pstate2); + const struct smu7_power_state *psa; + const struct smu7_power_state *psb; int i; if (pstate1 == NULL || pstate2 == NULL || equal == NULL) return -EINVAL; + psa = cast_const_phw_smu7_power_state(pstate1); + psb = cast_const_phw_smu7_power_state(pstate2); /* If the two states don't even have the same number of performance levels they cannot be the same state. */ if (psa->performance_level_count != psb->performance_level_count) { *equal = false; @@ -4324,6 +4336,7 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = { .set_mclk_od = smu7_set_mclk_od, .get_clock_by_type = smu7_get_clock_by_type, .read_sensor = smu7_read_sensor, + .dynamic_state_management_disable = smu7_disable_dpm_tasks, }; uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock, diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c index eda802bc63c8..8c889caba420 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c @@ -2458,7 +2458,7 @@ static int iceland_set_mc_special_registers(struct pp_hwmgr *hwmgr, PP_ASSERT_WITH_CODE((j <= SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE), "Invalid VramInfo table.", return -EINVAL); - if (!data->is_memory_gddr5) { + if (!data->is_memory_gddr5 && j < SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE) { table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD; table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD; for (k = 0; k < table->num_entries; k++) { diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c index 2f58e9e2a59c..a51f8cbcfe26 100644 --- a/drivers/gpu/drm/armada/armada_crtc.c +++ b/drivers/gpu/drm/armada/armada_crtc.c @@ -332,17 +332,19 @@ static void armada_drm_crtc_dpms(struct drm_crtc *crtc, int dpms) { struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); - if (dcrtc->dpms != dpms) { - dcrtc->dpms = dpms; - if (!IS_ERR(dcrtc->clk) && !dpms_blanked(dpms)) - WARN_ON(clk_prepare_enable(dcrtc->clk)); - armada_drm_crtc_update(dcrtc); - if (!IS_ERR(dcrtc->clk) && dpms_blanked(dpms)) - clk_disable_unprepare(dcrtc->clk); + if (dpms_blanked(dcrtc->dpms) != dpms_blanked(dpms)) { if (dpms_blanked(dpms)) armada_drm_vblank_off(dcrtc); - else + else if (!IS_ERR(dcrtc->clk)) + WARN_ON(clk_prepare_enable(dcrtc->clk)); + dcrtc->dpms = dpms; + armada_drm_crtc_update(dcrtc); + if (!dpms_blanked(dpms)) drm_crtc_vblank_on(&dcrtc->crtc); + else if (!IS_ERR(dcrtc->clk)) + clk_disable_unprepare(dcrtc->clk); + } else if (dcrtc->dpms != dpms) { + dcrtc->dpms = dpms; } } diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c index 1df2d33d0b40..ffb2ab389d1d 100644 --- a/drivers/gpu/drm/drm_info.c +++ b/drivers/gpu/drm/drm_info.c @@ -54,9 +54,6 @@ int drm_name_info(struct seq_file *m, void *data) mutex_lock(&dev->master_mutex); master = dev->master; - if (!master) - goto out_unlock; - seq_printf(m, "%s", dev->driver->name); if (dev->dev) seq_printf(m, " dev=%s", dev_name(dev->dev)); @@ -65,7 +62,6 @@ int drm_name_info(struct seq_file *m, void *data) if (dev->unique) seq_printf(m, " unique=%s", dev->unique); seq_printf(m, "\n"); -out_unlock: mutex_unlock(&dev->master_mutex); return 0; diff --git a/drivers/gpu/drm/etnaviv/etnaviv_buffer.c b/drivers/gpu/drm/etnaviv/etnaviv_buffer.c index cb86c7e5495c..d9230132dfbc 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_buffer.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_buffer.c @@ -329,20 +329,34 @@ void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, unsigned int event, /* * Append a LINK to the submitted command buffer to return to * the ring buffer. return_target is the ring target address. - * We need three dwords: event, wait, link. + * We need at most 7 dwords in the return target: 2 cache flush + + * 2 semaphore stall + 1 event + 1 wait + 1 link. */ - return_dwords = 3; + return_dwords = 7; return_target = etnaviv_buffer_reserve(gpu, buffer, return_dwords); CMD_LINK(cmdbuf, return_dwords, return_target); /* - * Append event, wait and link pointing back to the wait - * command to the ring buffer. + * Append a cache flush, stall, event, wait and link pointing back to + * the wait command to the ring buffer. */ + if (gpu->exec_state == ETNA_PIPE_2D) { + CMD_LOAD_STATE(buffer, VIVS_GL_FLUSH_CACHE, + VIVS_GL_FLUSH_CACHE_PE2D); + } else { + CMD_LOAD_STATE(buffer, VIVS_GL_FLUSH_CACHE, + VIVS_GL_FLUSH_CACHE_DEPTH | + VIVS_GL_FLUSH_CACHE_COLOR); + CMD_LOAD_STATE(buffer, VIVS_TS_FLUSH_CACHE, + VIVS_TS_FLUSH_CACHE_FLUSH); + } + CMD_SEM(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE); + CMD_STALL(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE); CMD_LOAD_STATE(buffer, VIVS_GL_EVENT, VIVS_GL_EVENT_EVENT_ID(event) | VIVS_GL_EVENT_FROM_PE); CMD_WAIT(buffer); - CMD_LINK(buffer, 2, return_target + 8); + CMD_LINK(buffer, 2, etnaviv_iommu_get_cmdbuf_va(gpu, buffer) + + buffer->user_size - 4); if (drm_debug & DRM_UT_DRIVER) pr_info("stream link to 0x%08x @ 0x%08x %p\n", diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c b/drivers/gpu/drm/etnaviv/etnaviv_gem.c index 5ce3603e6eac..0370b842d9cc 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gem.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gem.c @@ -748,19 +748,22 @@ static struct page **etnaviv_gem_userptr_do_get_pages( int ret = 0, pinned, npages = etnaviv_obj->base.size >> PAGE_SHIFT; struct page **pvec; uintptr_t ptr; + unsigned int flags = 0; pvec = drm_malloc_ab(npages, sizeof(struct page *)); if (!pvec) return ERR_PTR(-ENOMEM); + if (!etnaviv_obj->userptr.ro) + flags |= FOLL_WRITE; + pinned = 0; ptr = etnaviv_obj->userptr.ptr; down_read(&mm->mmap_sem); while (pinned < npages) { ret = get_user_pages_remote(task, mm, ptr, npages - pinned, - !etnaviv_obj->userptr.ro, 0, - pvec + pinned, NULL); + flags, pvec + pinned, NULL); if (ret < 0) break; diff --git a/drivers/gpu/drm/etnaviv/etnaviv_mmu.c b/drivers/gpu/drm/etnaviv/etnaviv_mmu.c index d3796ed8d8c5..169ac96e8f08 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_mmu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_mmu.c @@ -330,7 +330,8 @@ u32 etnaviv_iommu_get_cmdbuf_va(struct etnaviv_gpu *gpu, return (u32)buf->vram_node.start; mutex_lock(&mmu->lock); - ret = etnaviv_iommu_find_iova(mmu, &buf->vram_node, buf->size); + ret = etnaviv_iommu_find_iova(mmu, &buf->vram_node, + buf->size + SZ_64K); if (ret < 0) { mutex_unlock(&mmu->lock); return 0; diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c index aa92decf4233..fbd13fabdf2d 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c @@ -488,7 +488,8 @@ static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev, goto err_free; } - ret = get_vaddr_frames(start, npages, true, true, g2d_userptr->vec); + ret = get_vaddr_frames(start, npages, FOLL_FORCE | FOLL_WRITE, + g2d_userptr->vec); if (ret != npages) { DRM_ERROR("failed to get user pages from userptr.\n"); if (ret < 0) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c index 3371635cd4d7..b2d5e188b1b8 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c @@ -51,6 +51,7 @@ static void fsl_dcu_drm_disable_crtc(struct drm_crtc *crtc) DCU_MODE_DCU_MODE(DCU_MODE_OFF)); regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE, DCU_UPDATE_MODE_READREG); + clk_disable_unprepare(fsl_dev->pix_clk); } static void fsl_dcu_drm_crtc_enable(struct drm_crtc *crtc) @@ -58,6 +59,7 @@ static void fsl_dcu_drm_crtc_enable(struct drm_crtc *crtc) struct drm_device *dev = crtc->dev; struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; + clk_prepare_enable(fsl_dev->pix_clk); regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE, DCU_MODE_DCU_MODE_MASK, DCU_MODE_DCU_MODE(DCU_MODE_NORMAL)); @@ -116,8 +118,6 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) DCU_THRESHOLD_LS_BF_VS(BF_VS_VAL) | DCU_THRESHOLD_OUT_BUF_HIGH(BUF_MAX_VAL) | DCU_THRESHOLD_OUT_BUF_LOW(BUF_MIN_VAL)); - regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE, - DCU_UPDATE_MODE_READREG); return; } diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c index 0884c45aefe8..e04efbed1a54 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c @@ -267,12 +267,8 @@ static int fsl_dcu_drm_pm_resume(struct device *dev) return ret; } - ret = clk_prepare_enable(fsl_dev->pix_clk); - if (ret < 0) { - dev_err(dev, "failed to enable pix clk\n"); - goto disable_dcu_clk; - } - + if (fsl_dev->tcon) + fsl_tcon_bypass_enable(fsl_dev->tcon); fsl_dcu_drm_init_planes(fsl_dev->drm); drm_atomic_helper_resume(fsl_dev->drm, fsl_dev->state); @@ -284,10 +280,6 @@ static int fsl_dcu_drm_pm_resume(struct device *dev) enable_irq(fsl_dev->irq); return 0; - -disable_dcu_clk: - clk_disable_unprepare(fsl_dev->clk); - return ret; } #endif @@ -401,18 +393,12 @@ static int fsl_dcu_drm_probe(struct platform_device *pdev) goto disable_clk; } - ret = clk_prepare_enable(fsl_dev->pix_clk); - if (ret < 0) { - dev_err(dev, "failed to enable pix clk\n"); - goto unregister_pix_clk; - } - fsl_dev->tcon = fsl_tcon_init(dev); drm = drm_dev_alloc(driver, dev); if (IS_ERR(drm)) { ret = PTR_ERR(drm); - goto disable_pix_clk; + goto unregister_pix_clk; } fsl_dev->dev = dev; @@ -433,8 +419,6 @@ static int fsl_dcu_drm_probe(struct platform_device *pdev) unref: drm_dev_unref(drm); -disable_pix_clk: - clk_disable_unprepare(fsl_dev->pix_clk); unregister_pix_clk: clk_unregister(fsl_dev->pix_clk); disable_clk: @@ -447,7 +431,6 @@ static int fsl_dcu_drm_remove(struct platform_device *pdev) struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev); clk_disable_unprepare(fsl_dev->clk); - clk_disable_unprepare(fsl_dev->pix_clk); clk_unregister(fsl_dev->pix_clk); drm_put_dev(fsl_dev->drm); diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c index a7e5486bd1e9..9e6f7d8112b3 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c @@ -211,11 +211,6 @@ void fsl_dcu_drm_init_planes(struct drm_device *dev) for (j = 1; j <= fsl_dev->soc->layer_regs; j++) regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(i, j), 0); } - regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE, - DCU_MODE_DCU_MODE_MASK, - DCU_MODE_DCU_MODE(DCU_MODE_OFF)); - regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE, - DCU_UPDATE_MODE_READREG); } struct drm_plane *fsl_dcu_drm_primary_create_plane(struct drm_device *dev) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c index 26edcc899712..e1dd75b18118 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c @@ -20,38 +20,6 @@ #include "fsl_dcu_drm_drv.h" #include "fsl_tcon.h" -static int -fsl_dcu_drm_encoder_atomic_check(struct drm_encoder *encoder, - struct drm_crtc_state *crtc_state, - struct drm_connector_state *conn_state) -{ - return 0; -} - -static void fsl_dcu_drm_encoder_disable(struct drm_encoder *encoder) -{ - struct drm_device *dev = encoder->dev; - struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; - - if (fsl_dev->tcon) - fsl_tcon_bypass_disable(fsl_dev->tcon); -} - -static void fsl_dcu_drm_encoder_enable(struct drm_encoder *encoder) -{ - struct drm_device *dev = encoder->dev; - struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; - - if (fsl_dev->tcon) - fsl_tcon_bypass_enable(fsl_dev->tcon); -} - -static const struct drm_encoder_helper_funcs encoder_helper_funcs = { - .atomic_check = fsl_dcu_drm_encoder_atomic_check, - .disable = fsl_dcu_drm_encoder_disable, - .enable = fsl_dcu_drm_encoder_enable, -}; - static void fsl_dcu_drm_encoder_destroy(struct drm_encoder *encoder) { drm_encoder_cleanup(encoder); @@ -68,13 +36,16 @@ int fsl_dcu_drm_encoder_create(struct fsl_dcu_drm_device *fsl_dev, int ret; encoder->possible_crtcs = 1; + + /* Use bypass mode for parallel RGB/LVDS encoder */ + if (fsl_dev->tcon) + fsl_tcon_bypass_enable(fsl_dev->tcon); + ret = drm_encoder_init(fsl_dev->drm, encoder, &encoder_funcs, DRM_MODE_ENCODER_LVDS, NULL); if (ret < 0) return ret; - drm_encoder_helper_add(encoder, &encoder_helper_funcs); - return 0; } diff --git a/drivers/gpu/drm/i915/i915_gem_userptr.c b/drivers/gpu/drm/i915/i915_gem_userptr.c index e537930c64b5..c6f780f5abc9 100644 --- a/drivers/gpu/drm/i915/i915_gem_userptr.c +++ b/drivers/gpu/drm/i915/i915_gem_userptr.c @@ -508,6 +508,10 @@ __i915_gem_userptr_get_pages_worker(struct work_struct *_work) pvec = drm_malloc_gfp(npages, sizeof(struct page *), GFP_TEMPORARY); if (pvec != NULL) { struct mm_struct *mm = obj->userptr.mm->mm; + unsigned int flags = 0; + + if (!obj->userptr.read_only) + flags |= FOLL_WRITE; ret = -EFAULT; if (atomic_inc_not_zero(&mm->mm_users)) { @@ -517,7 +521,7 @@ __i915_gem_userptr_get_pages_worker(struct work_struct *_work) (work->task, mm, obj->userptr.ptr + pinned * PAGE_SIZE, npages - pinned, - !obj->userptr.read_only, 0, + flags, pvec + pinned, NULL); if (ret < 0) break; diff --git a/drivers/gpu/drm/radeon/r600_dpm.c b/drivers/gpu/drm/radeon/r600_dpm.c index 6a4b020dd0b4..5a26eb4545aa 100644 --- a/drivers/gpu/drm/radeon/r600_dpm.c +++ b/drivers/gpu/drm/radeon/r600_dpm.c @@ -156,19 +156,20 @@ u32 r600_dpm_get_vblank_time(struct radeon_device *rdev) struct drm_device *dev = rdev->ddev; struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; - u32 line_time_us, vblank_lines; + u32 vblank_in_pixels; u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */ if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { radeon_crtc = to_radeon_crtc(crtc); if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { - line_time_us = (radeon_crtc->hw_mode.crtc_htotal * 1000) / - radeon_crtc->hw_mode.clock; - vblank_lines = radeon_crtc->hw_mode.crtc_vblank_end - - radeon_crtc->hw_mode.crtc_vdisplay + - (radeon_crtc->v_border * 2); - vblank_time_us = vblank_lines * line_time_us; + vblank_in_pixels = + radeon_crtc->hw_mode.crtc_htotal * + (radeon_crtc->hw_mode.crtc_vblank_end - + radeon_crtc->hw_mode.crtc_vdisplay + + (radeon_crtc->v_border * 2)); + + vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock; break; } } diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 50e96d2c593d..e18839d52e3e 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c @@ -927,6 +927,16 @@ radeon_lvds_detect(struct drm_connector *connector, bool force) return ret; } +static void radeon_connector_unregister(struct drm_connector *connector) +{ + struct radeon_connector *radeon_connector = to_radeon_connector(connector); + + if (radeon_connector->ddc_bus->has_aux) { + drm_dp_aux_unregister(&radeon_connector->ddc_bus->aux); + radeon_connector->ddc_bus->has_aux = false; + } +} + static void radeon_connector_destroy(struct drm_connector *connector) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); @@ -984,6 +994,7 @@ static const struct drm_connector_funcs radeon_lvds_connector_funcs = { .dpms = drm_helper_connector_dpms, .detect = radeon_lvds_detect, .fill_modes = drm_helper_probe_single_connector_modes, + .early_unregister = radeon_connector_unregister, .destroy = radeon_connector_destroy, .set_property = radeon_lvds_set_property, }; @@ -1111,6 +1122,7 @@ static const struct drm_connector_funcs radeon_vga_connector_funcs = { .dpms = drm_helper_connector_dpms, .detect = radeon_vga_detect, .fill_modes = drm_helper_probe_single_connector_modes, + .early_unregister = radeon_connector_unregister, .destroy = radeon_connector_destroy, .set_property = radeon_connector_set_property, }; @@ -1188,6 +1200,7 @@ static const struct drm_connector_funcs radeon_tv_connector_funcs = { .dpms = drm_helper_connector_dpms, .detect = radeon_tv_detect, .fill_modes = drm_helper_probe_single_connector_modes, + .early_unregister = radeon_connector_unregister, .destroy = radeon_connector_destroy, .set_property = radeon_connector_set_property, }; @@ -1519,6 +1532,7 @@ static const struct drm_connector_funcs radeon_dvi_connector_funcs = { .detect = radeon_dvi_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = radeon_connector_set_property, + .early_unregister = radeon_connector_unregister, .destroy = radeon_connector_destroy, .force = radeon_dvi_force, }; @@ -1832,6 +1846,7 @@ static const struct drm_connector_funcs radeon_dp_connector_funcs = { .detect = radeon_dp_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = radeon_connector_set_property, + .early_unregister = radeon_connector_unregister, .destroy = radeon_connector_destroy, .force = radeon_dvi_force, }; @@ -1841,6 +1856,7 @@ static const struct drm_connector_funcs radeon_edp_connector_funcs = { .detect = radeon_dp_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = radeon_lvds_set_property, + .early_unregister = radeon_connector_unregister, .destroy = radeon_connector_destroy, .force = radeon_dvi_force, }; @@ -1850,6 +1866,7 @@ static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = { .detect = radeon_dp_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = radeon_lvds_set_property, + .early_unregister = radeon_connector_unregister, .destroy = radeon_connector_destroy, .force = radeon_dvi_force, }; diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index b8ab30a7dd6d..cdb8cb568c15 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c @@ -1675,20 +1675,20 @@ int radeon_modeset_init(struct radeon_device *rdev) void radeon_modeset_fini(struct radeon_device *rdev) { - radeon_fbdev_fini(rdev); - kfree(rdev->mode_info.bios_hardcoded_edid); - - /* free i2c buses */ - radeon_i2c_fini(rdev); - if (rdev->mode_info.mode_config_initialized) { - radeon_afmt_fini(rdev); drm_kms_helper_poll_fini(rdev->ddev); radeon_hpd_fini(rdev); drm_crtc_force_disable_all(rdev->ddev); + radeon_fbdev_fini(rdev); + radeon_afmt_fini(rdev); drm_mode_config_cleanup(rdev->ddev); rdev->mode_info.mode_config_initialized = false; } + + kfree(rdev->mode_info.bios_hardcoded_edid); + + /* free i2c buses */ + radeon_i2c_fini(rdev); } static bool is_hdtv_mode(const struct drm_display_mode *mode) diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 91c8f4339566..00ea0002b539 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -96,9 +96,10 @@ * 2.45.0 - Allow setting shader registers using DMA/COPY packet3 on SI * 2.46.0 - Add PFP_SYNC_ME support on evergreen * 2.47.0 - Add UVD_NO_OP register support + * 2.48.0 - TA_CS_BC_BASE_ADDR allowed on SI */ #define KMS_DRIVER_MAJOR 2 -#define KMS_DRIVER_MINOR 47 +#define KMS_DRIVER_MINOR 48 #define KMS_DRIVER_PATCHLEVEL 0 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); int radeon_driver_unload_kms(struct drm_device *dev); diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c index 021aa005623f..29f7817af821 100644 --- a/drivers/gpu/drm/radeon/radeon_i2c.c +++ b/drivers/gpu/drm/radeon/radeon_i2c.c @@ -982,9 +982,8 @@ void radeon_i2c_destroy(struct radeon_i2c_chan *i2c) { if (!i2c) return; + WARN_ON(i2c->has_aux); i2c_del_adapter(&i2c->adapter); - if (i2c->has_aux) - drm_dp_aux_unregister(&i2c->aux); kfree(i2c); } diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 455268214b89..3de5e6e21662 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -566,7 +566,8 @@ static int radeon_ttm_tt_pin_userptr(struct ttm_tt *ttm) uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE; struct page **pages = ttm->pages + pinned; - r = get_user_pages(userptr, num_pages, write, 0, pages, NULL); + r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0, + pages, NULL); if (r < 0) goto release_pages; diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 7ee9aafbdf74..e402be8821c4 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -4431,6 +4431,7 @@ static bool si_vm_reg_valid(u32 reg) case SPI_CONFIG_CNTL: case SPI_CONFIG_CNTL_1: case TA_CNTL_AUX: + case TA_CS_BC_BASE_ADDR: return true; default: DRM_ERROR("Invalid register 0x%x in CS\n", reg); diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index eb220eecba78..65a911ddd509 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h @@ -1145,6 +1145,7 @@ #define SPI_LB_CU_MASK 0x9354 #define TA_CNTL_AUX 0x9508 +#define TA_CS_BC_BASE_ADDR 0x950C #define CC_RB_BACKEND_DISABLE 0x98F4 #define BACKEND_DISABLE(x) ((x) << 16) diff --git a/drivers/gpu/drm/via/via_dmablit.c b/drivers/gpu/drm/via/via_dmablit.c index 7e2a12c4fed2..1a3ad769f8c8 100644 --- a/drivers/gpu/drm/via/via_dmablit.c +++ b/drivers/gpu/drm/via/via_dmablit.c @@ -241,8 +241,8 @@ via_lock_all_dma_pages(drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer) down_read(¤t->mm->mmap_sem); ret = get_user_pages((unsigned long)xfer->mem_addr, vsg->num_pages, - (vsg->direction == DMA_FROM_DEVICE), - 0, vsg->pages, NULL); + (vsg->direction == DMA_FROM_DEVICE) ? FOLL_WRITE : 0, + vsg->pages, NULL); up_read(¤t->mm->mmap_sem); if (ret != vsg->num_pages) { diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index e8ae3dc476d1..18061a4bc2f2 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c @@ -241,15 +241,15 @@ static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val, void *ptr); MODULE_PARM_DESC(enable_fbdev, "Enable vmwgfx fbdev"); -module_param_named(enable_fbdev, enable_fbdev, int, 0600); +module_param_named(enable_fbdev, enable_fbdev, int, S_IRUSR | S_IWUSR); MODULE_PARM_DESC(force_dma_api, "Force using the DMA API for TTM pages"); -module_param_named(force_dma_api, vmw_force_iommu, int, 0600); +module_param_named(force_dma_api, vmw_force_iommu, int, S_IRUSR | S_IWUSR); MODULE_PARM_DESC(restrict_iommu, "Try to limit IOMMU usage for TTM pages"); -module_param_named(restrict_iommu, vmw_restrict_iommu, int, 0600); +module_param_named(restrict_iommu, vmw_restrict_iommu, int, S_IRUSR | S_IWUSR); MODULE_PARM_DESC(force_coherent, "Force coherent TTM pages"); -module_param_named(force_coherent, vmw_force_coherent, int, 0600); +module_param_named(force_coherent, vmw_force_coherent, int, S_IRUSR | S_IWUSR); MODULE_PARM_DESC(restrict_dma_mask, "Restrict DMA mask to 44 bits with IOMMU"); -module_param_named(restrict_dma_mask, vmw_restrict_dma_mask, int, 0600); +module_param_named(restrict_dma_mask, vmw_restrict_dma_mask, int, S_IRUSR | S_IWUSR); MODULE_PARM_DESC(assume_16bpp, "Assume 16-bpp when filtering modes"); module_param_named(assume_16bpp, vmw_assume_16bpp, int, 0600); diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h index 070d750af16d..1e59a486bba8 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h @@ -43,7 +43,7 @@ #define VMWGFX_DRIVER_DATE "20160210" #define VMWGFX_DRIVER_MAJOR 2 -#define VMWGFX_DRIVER_MINOR 10 +#define VMWGFX_DRIVER_MINOR 11 #define VMWGFX_DRIVER_PATCHLEVEL 0 #define VMWGFX_FILE_PAGE_OFFSET 0x00100000 #define VMWGFX_FIFO_STATIC_SIZE (1024*1024) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c index dc5beff2b4aa..c7b53d987f06 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c @@ -35,17 +35,37 @@ #define VMW_RES_HT_ORDER 12 /** + * enum vmw_resource_relocation_type - Relocation type for resources + * + * @vmw_res_rel_normal: Traditional relocation. The resource id in the + * command stream is replaced with the actual id after validation. + * @vmw_res_rel_nop: NOP relocation. The command is unconditionally replaced + * with a NOP. + * @vmw_res_rel_cond_nop: Conditional NOP relocation. If the resource id + * after validation is -1, the command is replaced with a NOP. Otherwise no + * action. + */ +enum vmw_resource_relocation_type { + vmw_res_rel_normal, + vmw_res_rel_nop, + vmw_res_rel_cond_nop, + vmw_res_rel_max +}; + +/** * struct vmw_resource_relocation - Relocation info for resources * * @head: List head for the software context's relocation list. * @res: Non-ref-counted pointer to the resource. - * @offset: Offset of 4 byte entries into the command buffer where the + * @offset: Offset of single byte entries into the command buffer where the * id that needs fixup is located. + * @rel_type: Type of relocation. */ struct vmw_resource_relocation { struct list_head head; const struct vmw_resource *res; - unsigned long offset; + u32 offset:29; + enum vmw_resource_relocation_type rel_type:3; }; /** @@ -109,7 +129,18 @@ static int vmw_bo_to_validate_list(struct vmw_sw_context *sw_context, struct vmw_dma_buffer *vbo, bool validate_as_mob, uint32_t *p_val_node); - +/** + * vmw_ptr_diff - Compute the offset from a to b in bytes + * + * @a: A starting pointer. + * @b: A pointer offset in the same address space. + * + * Returns: The offset in bytes between the two pointers. + */ +static size_t vmw_ptr_diff(void *a, void *b) +{ + return (unsigned long) b - (unsigned long) a; +} /** * vmw_resources_unreserve - unreserve resources previously reserved for @@ -409,11 +440,14 @@ static int vmw_resource_context_res_add(struct vmw_private *dev_priv, * @list: Pointer to head of relocation list. * @res: The resource. * @offset: Offset into the command buffer currently being parsed where the - * id that needs fixup is located. Granularity is 4 bytes. + * id that needs fixup is located. Granularity is one byte. + * @rel_type: Relocation type. */ static int vmw_resource_relocation_add(struct list_head *list, const struct vmw_resource *res, - unsigned long offset) + unsigned long offset, + enum vmw_resource_relocation_type + rel_type) { struct vmw_resource_relocation *rel; @@ -425,6 +459,7 @@ static int vmw_resource_relocation_add(struct list_head *list, rel->res = res; rel->offset = offset; + rel->rel_type = rel_type; list_add_tail(&rel->head, list); return 0; @@ -459,11 +494,24 @@ static void vmw_resource_relocations_apply(uint32_t *cb, { struct vmw_resource_relocation *rel; + /* Validate the struct vmw_resource_relocation member size */ + BUILD_BUG_ON(SVGA_CB_MAX_SIZE >= (1 << 29)); + BUILD_BUG_ON(vmw_res_rel_max >= (1 << 3)); + list_for_each_entry(rel, list, head) { - if (likely(rel->res != NULL)) - cb[rel->offset] = rel->res->id; - else - cb[rel->offset] = SVGA_3D_CMD_NOP; + u32 *addr = (u32 *)((unsigned long) cb + rel->offset); + switch (rel->rel_type) { + case vmw_res_rel_normal: + *addr = rel->res->id; + break; + case vmw_res_rel_nop: + *addr = SVGA_3D_CMD_NOP; + break; + default: + if (rel->res->id == -1) + *addr = SVGA_3D_CMD_NOP; + break; + } } } @@ -655,7 +703,9 @@ static int vmw_cmd_res_reloc_add(struct vmw_private *dev_priv, *p_val = NULL; ret = vmw_resource_relocation_add(&sw_context->res_relocations, res, - id_loc - sw_context->buf_start); + vmw_ptr_diff(sw_context->buf_start, + id_loc), + vmw_res_rel_normal); if (unlikely(ret != 0)) return ret; @@ -721,7 +771,8 @@ vmw_cmd_res_check(struct vmw_private *dev_priv, return vmw_resource_relocation_add (&sw_context->res_relocations, res, - id_loc - sw_context->buf_start); + vmw_ptr_diff(sw_context->buf_start, id_loc), + vmw_res_rel_normal); } ret = vmw_user_resource_lookup_handle(dev_priv, @@ -2143,10 +2194,10 @@ static int vmw_cmd_shader_define(struct vmw_private *dev_priv, return ret; return vmw_resource_relocation_add(&sw_context->res_relocations, - NULL, &cmd->header.id - - sw_context->buf_start); - - return 0; + NULL, + vmw_ptr_diff(sw_context->buf_start, + &cmd->header.id), + vmw_res_rel_nop); } /** @@ -2188,10 +2239,10 @@ static int vmw_cmd_shader_destroy(struct vmw_private *dev_priv, return ret; return vmw_resource_relocation_add(&sw_context->res_relocations, - NULL, &cmd->header.id - - sw_context->buf_start); - - return 0; + NULL, + vmw_ptr_diff(sw_context->buf_start, + &cmd->header.id), + vmw_res_rel_nop); } /** @@ -2848,8 +2899,7 @@ static int vmw_cmd_dx_cid_check(struct vmw_private *dev_priv, * @header: Pointer to the command header in the command stream. * * Check that the view exists, and if it was not created using this - * command batch, make sure it's validated (present in the device) so that - * the remove command will not confuse the device. + * command batch, conditionally make this command a NOP. */ static int vmw_cmd_dx_view_remove(struct vmw_private *dev_priv, struct vmw_sw_context *sw_context, @@ -2877,10 +2927,16 @@ static int vmw_cmd_dx_view_remove(struct vmw_private *dev_priv, return ret; /* - * Add view to the validate list iff it was not created using this - * command batch. + * If the view wasn't created during this command batch, it might + * have been removed due to a context swapout, so add a + * relocation to conditionally make this command a NOP to avoid + * device errors. */ - return vmw_view_res_val_add(sw_context, view); + return vmw_resource_relocation_add(&sw_context->res_relocations, + view, + vmw_ptr_diff(sw_context->buf_start, + &cmd->header.id), + vmw_res_rel_cond_nop); } /** @@ -3029,6 +3085,35 @@ static int vmw_cmd_dx_genmips(struct vmw_private *dev_priv, cmd->body.shaderResourceViewId); } +/** + * vmw_cmd_dx_transfer_from_buffer - + * Validate an SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER command + * + * @dev_priv: Pointer to a device private struct. + * @sw_context: The software context being used for this batch. + * @header: Pointer to the command header in the command stream. + */ +static int vmw_cmd_dx_transfer_from_buffer(struct vmw_private *dev_priv, + struct vmw_sw_context *sw_context, + SVGA3dCmdHeader *header) +{ + struct { + SVGA3dCmdHeader header; + SVGA3dCmdDXTransferFromBuffer body; + } *cmd = container_of(header, typeof(*cmd), header); + int ret; + + ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, + user_surface_converter, + &cmd->body.srcSid, NULL); + if (ret != 0) + return ret; + + return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, + user_surface_converter, + &cmd->body.destSid, NULL); +} + static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv, struct vmw_sw_context *sw_context, void *buf, uint32_t *size) @@ -3379,6 +3464,9 @@ static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = { &vmw_cmd_buffer_copy_check, true, false, true), VMW_CMD_DEF(SVGA_3D_CMD_DX_PRED_COPY_REGION, &vmw_cmd_pred_copy_check, true, false, true), + VMW_CMD_DEF(SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER, + &vmw_cmd_dx_transfer_from_buffer, + true, false, true), }; static int vmw_cmd_check(struct vmw_private *dev_priv, @@ -3848,14 +3936,14 @@ static void *vmw_execbuf_cmdbuf(struct vmw_private *dev_priv, int ret; *header = NULL; - if (!dev_priv->cman || kernel_commands) - return kernel_commands; - if (command_size > SVGA_CB_MAX_SIZE) { DRM_ERROR("Command buffer is too large.\n"); return ERR_PTR(-EINVAL); } + if (!dev_priv->cman || kernel_commands) + return kernel_commands; + /* If possible, add a little space for fencing. */ cmdbuf_size = command_size + 512; cmdbuf_size = min_t(size_t, cmdbuf_size, SVGA_CB_MAX_SIZE); @@ -4232,9 +4320,6 @@ void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv, ttm_bo_unref(&query_val.bo); ttm_bo_unref(&pinned_val.bo); vmw_dmabuf_unreference(&dev_priv->pinned_bo); - DRM_INFO("Dummy query bo pin count: %d\n", - dev_priv->dummy_query_bo->pin_count); - out_unlock: return; diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c index 6a328d507a28..52ca1c9d070e 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c @@ -574,10 +574,8 @@ static int vmw_user_dmabuf_synccpu_grab(struct vmw_user_dma_buffer *user_bo, bool nonblock = !!(flags & drm_vmw_synccpu_dontblock); long lret; - if (nonblock) - return reservation_object_test_signaled_rcu(bo->resv, true) ? 0 : -EBUSY; - - lret = reservation_object_wait_timeout_rcu(bo->resv, true, true, MAX_SCHEDULE_TIMEOUT); + lret = reservation_object_wait_timeout_rcu(bo->resv, true, true, + nonblock ? 0 : MAX_SCHEDULE_TIMEOUT); if (!lret) return -EBUSY; else if (lret < 0) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c index c2a721a8cef9..b445ce9b9757 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c @@ -324,7 +324,7 @@ static void vmw_hw_surface_destroy(struct vmw_resource *res) if (res->id != -1) { cmd = vmw_fifo_reserve(dev_priv, vmw_surface_destroy_size()); - if (unlikely(cmd == NULL)) { + if (unlikely(!cmd)) { DRM_ERROR("Failed reserving FIFO space for surface " "destruction.\n"); return; @@ -397,7 +397,7 @@ static int vmw_legacy_srf_create(struct vmw_resource *res) submit_size = vmw_surface_define_size(srf); cmd = vmw_fifo_reserve(dev_priv, submit_size); - if (unlikely(cmd == NULL)) { + if (unlikely(!cmd)) { DRM_ERROR("Failed reserving FIFO space for surface " "creation.\n"); ret = -ENOMEM; @@ -446,11 +446,10 @@ static int vmw_legacy_srf_dma(struct vmw_resource *res, uint8_t *cmd; struct vmw_private *dev_priv = res->dev_priv; - BUG_ON(val_buf->bo == NULL); - + BUG_ON(!val_buf->bo); submit_size = vmw_surface_dma_size(srf); cmd = vmw_fifo_reserve(dev_priv, submit_size); - if (unlikely(cmd == NULL)) { + if (unlikely(!cmd)) { DRM_ERROR("Failed reserving FIFO space for surface " "DMA.\n"); return -ENOMEM; @@ -538,7 +537,7 @@ static int vmw_legacy_srf_destroy(struct vmw_resource *res) submit_size = vmw_surface_destroy_size(); cmd = vmw_fifo_reserve(dev_priv, submit_size); - if (unlikely(cmd == NULL)) { + if (unlikely(!cmd)) { DRM_ERROR("Failed reserving FIFO space for surface " "eviction.\n"); return -ENOMEM; @@ -578,7 +577,7 @@ static int vmw_surface_init(struct vmw_private *dev_priv, int ret; struct vmw_resource *res = &srf->res; - BUG_ON(res_free == NULL); + BUG_ON(!res_free); if (!dev_priv->has_mob) vmw_fifo_resource_inc(dev_priv); ret = vmw_resource_init(dev_priv, res, true, res_free, @@ -700,7 +699,6 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, struct drm_vmw_surface_create_req *req = &arg->req; struct drm_vmw_surface_arg *rep = &arg->rep; struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; - struct drm_vmw_size __user *user_sizes; int ret; int i, j; uint32_t cur_bo_offset; @@ -748,7 +746,7 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, } user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL); - if (unlikely(user_srf == NULL)) { + if (unlikely(!user_srf)) { ret = -ENOMEM; goto out_no_user_srf; } @@ -763,29 +761,21 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, memcpy(srf->mip_levels, req->mip_levels, sizeof(srf->mip_levels)); srf->num_sizes = num_sizes; user_srf->size = size; - - srf->sizes = kmalloc(srf->num_sizes * sizeof(*srf->sizes), GFP_KERNEL); - if (unlikely(srf->sizes == NULL)) { - ret = -ENOMEM; + srf->sizes = memdup_user((struct drm_vmw_size __user *)(unsigned long) + req->size_addr, + sizeof(*srf->sizes) * srf->num_sizes); + if (IS_ERR(srf->sizes)) { + ret = PTR_ERR(srf->sizes); goto out_no_sizes; } - srf->offsets = kmalloc(srf->num_sizes * sizeof(*srf->offsets), - GFP_KERNEL); - if (unlikely(srf->offsets == NULL)) { + srf->offsets = kmalloc_array(srf->num_sizes, + sizeof(*srf->offsets), + GFP_KERNEL); + if (unlikely(!srf->offsets)) { ret = -ENOMEM; goto out_no_offsets; } - user_sizes = (struct drm_vmw_size __user *)(unsigned long) - req->size_addr; - - ret = copy_from_user(srf->sizes, user_sizes, - srf->num_sizes * sizeof(*srf->sizes)); - if (unlikely(ret != 0)) { - ret = -EFAULT; - goto out_no_copy; - } - srf->base_size = *srf->sizes; srf->autogen_filter = SVGA3D_TEX_FILTER_NONE; srf->multisample_count = 0; @@ -923,7 +913,7 @@ vmw_surface_handle_reference(struct vmw_private *dev_priv, ret = -EINVAL; base = ttm_base_object_lookup_for_ref(dev_priv->tdev, handle); - if (unlikely(base == NULL)) { + if (unlikely(!base)) { DRM_ERROR("Could not find surface to reference.\n"); goto out_no_lookup; } @@ -1069,7 +1059,7 @@ static int vmw_gb_surface_create(struct vmw_resource *res) cmd = vmw_fifo_reserve(dev_priv, submit_len); cmd2 = (typeof(cmd2))cmd; - if (unlikely(cmd == NULL)) { + if (unlikely(!cmd)) { DRM_ERROR("Failed reserving FIFO space for surface " "creation.\n"); ret = -ENOMEM; @@ -1135,7 +1125,7 @@ static int vmw_gb_surface_bind(struct vmw_resource *res, submit_size = sizeof(*cmd1) + (res->backup_dirty ? sizeof(*cmd2) : 0); cmd1 = vmw_fifo_reserve(dev_priv, submit_size); - if (unlikely(cmd1 == NULL)) { + if (unlikely(!cmd1)) { DRM_ERROR("Failed reserving FIFO space for surface " "binding.\n"); return -ENOMEM; @@ -1185,7 +1175,7 @@ static int vmw_gb_surface_unbind(struct vmw_resource *res, submit_size = sizeof(*cmd3) + (readback ? sizeof(*cmd1) : sizeof(*cmd2)); cmd = vmw_fifo_reserve(dev_priv, submit_size); - if (unlikely(cmd == NULL)) { + if (unlikely(!cmd)) { DRM_ERROR("Failed reserving FIFO space for surface " "unbinding.\n"); return -ENOMEM; @@ -1244,7 +1234,7 @@ static int vmw_gb_surface_destroy(struct vmw_resource *res) vmw_binding_res_list_scrub(&res->binding_head); cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd)); - if (unlikely(cmd == NULL)) { + if (unlikely(!cmd)) { DRM_ERROR("Failed reserving FIFO space for surface " "destruction.\n"); mutex_unlock(&dev_priv->binding_mutex); @@ -1410,7 +1400,7 @@ int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data, user_srf = container_of(base, struct vmw_user_surface, prime.base); srf = &user_srf->srf; - if (srf->res.backup == NULL) { + if (!srf->res.backup) { DRM_ERROR("Shared GB surface is missing a backup buffer.\n"); goto out_bad_resource; } @@ -1524,7 +1514,7 @@ int vmw_surface_gb_priv_define(struct drm_device *dev, } user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL); - if (unlikely(user_srf == NULL)) { + if (unlikely(!user_srf)) { ret = -ENOMEM; goto out_no_user_srf; } diff --git a/drivers/hid/hid-dr.c b/drivers/hid/hid-dr.c index 8fd4bf77f264..818ea7d93533 100644 --- a/drivers/hid/hid-dr.c +++ b/drivers/hid/hid-dr.c @@ -234,58 +234,6 @@ static __u8 pid0011_rdesc_fixed[] = { 0xC0 /* End Collection */ }; -static __u8 pid0006_rdesc_fixed[] = { - 0x05, 0x01, /* Usage Page (Generic Desktop) */ - 0x09, 0x04, /* Usage (Joystick) */ - 0xA1, 0x01, /* Collection (Application) */ - 0xA1, 0x02, /* Collection (Logical) */ - 0x75, 0x08, /* Report Size (8) */ - 0x95, 0x05, /* Report Count (5) */ - 0x15, 0x00, /* Logical Minimum (0) */ - 0x26, 0xFF, 0x00, /* Logical Maximum (255) */ - 0x35, 0x00, /* Physical Minimum (0) */ - 0x46, 0xFF, 0x00, /* Physical Maximum (255) */ - 0x09, 0x30, /* Usage (X) */ - 0x09, 0x33, /* Usage (Ry) */ - 0x09, 0x32, /* Usage (Z) */ - 0x09, 0x31, /* Usage (Y) */ - 0x09, 0x34, /* Usage (Ry) */ - 0x81, 0x02, /* Input (Variable) */ - 0x75, 0x04, /* Report Size (4) */ - 0x95, 0x01, /* Report Count (1) */ - 0x25, 0x07, /* Logical Maximum (7) */ - 0x46, 0x3B, 0x01, /* Physical Maximum (315) */ - 0x65, 0x14, /* Unit (Centimeter) */ - 0x09, 0x39, /* Usage (Hat switch) */ - 0x81, 0x42, /* Input (Variable) */ - 0x65, 0x00, /* Unit (None) */ - 0x75, 0x01, /* Report Size (1) */ - 0x95, 0x0C, /* Report Count (12) */ - 0x25, 0x01, /* Logical Maximum (1) */ - 0x45, 0x01, /* Physical Maximum (1) */ - 0x05, 0x09, /* Usage Page (Button) */ - 0x19, 0x01, /* Usage Minimum (0x01) */ - 0x29, 0x0C, /* Usage Maximum (0x0C) */ - 0x81, 0x02, /* Input (Variable) */ - 0x06, 0x00, 0xFF, /* Usage Page (Vendor Defined) */ - 0x75, 0x01, /* Report Size (1) */ - 0x95, 0x08, /* Report Count (8) */ - 0x25, 0x01, /* Logical Maximum (1) */ - 0x45, 0x01, /* Physical Maximum (1) */ - 0x09, 0x01, /* Usage (0x01) */ - 0x81, 0x02, /* Input (Variable) */ - 0xC0, /* End Collection */ - 0xA1, 0x02, /* Collection (Logical) */ - 0x75, 0x08, /* Report Size (8) */ - 0x95, 0x07, /* Report Count (7) */ - 0x46, 0xFF, 0x00, /* Physical Maximum (255) */ - 0x26, 0xFF, 0x00, /* Logical Maximum (255) */ - 0x09, 0x02, /* Usage (0x02) */ - 0x91, 0x02, /* Output (Variable) */ - 0xC0, /* End Collection */ - 0xC0 /* End Collection */ -}; - static __u8 *dr_report_fixup(struct hid_device *hdev, __u8 *rdesc, unsigned int *rsize) { @@ -296,16 +244,34 @@ static __u8 *dr_report_fixup(struct hid_device *hdev, __u8 *rdesc, *rsize = sizeof(pid0011_rdesc_fixed); } break; - case 0x0006: - if (*rsize == sizeof(pid0006_rdesc_fixed)) { - rdesc = pid0006_rdesc_fixed; - *rsize = sizeof(pid0006_rdesc_fixed); - } - break; } return rdesc; } +#define map_abs(c) hid_map_usage(hi, usage, bit, max, EV_ABS, (c)) +#define map_rel(c) hid_map_usage(hi, usage, bit, max, EV_REL, (c)) + +static int dr_input_mapping(struct hid_device *hdev, struct hid_input *hi, + struct hid_field *field, struct hid_usage *usage, + unsigned long **bit, int *max) +{ + switch (usage->hid) { + /* + * revert to the old hid-input behavior where axes + * can be randomly assigned when hid->usage is reused. + */ + case HID_GD_X: case HID_GD_Y: case HID_GD_Z: + case HID_GD_RX: case HID_GD_RY: case HID_GD_RZ: + if (field->flags & HID_MAIN_ITEM_RELATIVE) + map_rel(usage->hid & 0xf); + else + map_abs(usage->hid & 0xf); + return 1; + } + + return 0; +} + static int dr_probe(struct hid_device *hdev, const struct hid_device_id *id) { int ret; @@ -352,6 +318,7 @@ static struct hid_driver dr_driver = { .id_table = dr_devices, .report_fixup = dr_report_fixup, .probe = dr_probe, + .input_mapping = dr_input_mapping, }; module_hid_driver(dr_driver); diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h index cd59c79eebdd..6cfb5cacc253 100644 --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h @@ -64,6 +64,9 @@ #define USB_VENDOR_ID_AKAI 0x2011 #define USB_DEVICE_ID_AKAI_MPKMINI2 0x0715 +#define USB_VENDOR_ID_AKAI_09E8 0x09E8 +#define USB_DEVICE_ID_AKAI_09E8_MIDIMIX 0x0031 + #define USB_VENDOR_ID_ALCOR 0x058f #define USB_DEVICE_ID_ALCOR_USBRS232 0x9720 diff --git a/drivers/hid/hid-led.c b/drivers/hid/hid-led.c index d8d55f37b4f5..d3e1ab162f7c 100644 --- a/drivers/hid/hid-led.c +++ b/drivers/hid/hid-led.c @@ -100,6 +100,7 @@ struct hidled_device { const struct hidled_config *config; struct hid_device *hdev; struct hidled_rgb *rgb; + u8 *buf; struct mutex lock; }; @@ -118,13 +119,19 @@ static int hidled_send(struct hidled_device *ldev, __u8 *buf) mutex_lock(&ldev->lock); + /* + * buffer provided to hid_hw_raw_request must not be on the stack + * and must not be part of a data structure + */ + memcpy(ldev->buf, buf, ldev->config->report_size); + if (ldev->config->report_type == RAW_REQUEST) - ret = hid_hw_raw_request(ldev->hdev, buf[0], buf, + ret = hid_hw_raw_request(ldev->hdev, buf[0], ldev->buf, ldev->config->report_size, HID_FEATURE_REPORT, HID_REQ_SET_REPORT); else if (ldev->config->report_type == OUTPUT_REPORT) - ret = hid_hw_output_report(ldev->hdev, buf, + ret = hid_hw_output_report(ldev->hdev, ldev->buf, ldev->config->report_size); else ret = -EINVAL; @@ -147,17 +154,21 @@ static int hidled_recv(struct hidled_device *ldev, __u8 *buf) mutex_lock(&ldev->lock); - ret = hid_hw_raw_request(ldev->hdev, buf[0], buf, + memcpy(ldev->buf, buf, ldev->config->report_size); + + ret = hid_hw_raw_request(ldev->hdev, buf[0], ldev->buf, ldev->config->report_size, HID_FEATURE_REPORT, HID_REQ_SET_REPORT); if (ret < 0) goto err; - ret = hid_hw_raw_request(ldev->hdev, buf[0], buf, + ret = hid_hw_raw_request(ldev->hdev, buf[0], ldev->buf, ldev->config->report_size, HID_FEATURE_REPORT, HID_REQ_GET_REPORT); + + memcpy(buf, ldev->buf, ldev->config->report_size); err: mutex_unlock(&ldev->lock); @@ -447,6 +458,10 @@ static int hidled_probe(struct hid_device *hdev, const struct hid_device_id *id) if (!ldev) return -ENOMEM; + ldev->buf = devm_kmalloc(&hdev->dev, MAX_REPORT_SIZE, GFP_KERNEL); + if (!ldev->buf) + return -ENOMEM; + ret = hid_parse(hdev); if (ret) return ret; diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c index 0a0eca5da47d..354d49ea36dd 100644 --- a/drivers/hid/usbhid/hid-quirks.c +++ b/drivers/hid/usbhid/hid-quirks.c @@ -56,6 +56,7 @@ static const struct hid_blacklist { { USB_VENDOR_ID_AIREN, USB_DEVICE_ID_AIREN_SLIMPLUS, HID_QUIRK_NOGET }, { USB_VENDOR_ID_AKAI, USB_DEVICE_ID_AKAI_MPKMINI2, HID_QUIRK_NO_INIT_REPORTS }, + { USB_VENDOR_ID_AKAI_09E8, USB_DEVICE_ID_AKAI_09E8_MIDIMIX, HID_QUIRK_NO_INIT_REPORTS }, { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_UC100KM, HID_QUIRK_NOGET }, { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_CS124U, HID_QUIRK_NOGET }, { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_2PORTKVM, HID_QUIRK_NOGET }, diff --git a/drivers/hwmon/adm9240.c b/drivers/hwmon/adm9240.c index 98114cef1e43..2fe1828bd10b 100644 --- a/drivers/hwmon/adm9240.c +++ b/drivers/hwmon/adm9240.c @@ -194,10 +194,10 @@ static struct adm9240_data *adm9240_update_device(struct device *dev) * 0.5'C per two measurement cycles thus ignore possible * but unlikely aliasing error on lsb reading. --Grant */ - data->temp = ((i2c_smbus_read_byte_data(client, + data->temp = (i2c_smbus_read_byte_data(client, ADM9240_REG_TEMP) << 8) | i2c_smbus_read_byte_data(client, - ADM9240_REG_TEMP_CONF)) / 128; + ADM9240_REG_TEMP_CONF); for (i = 0; i < 2; i++) { /* read fans */ data->fan[i] = i2c_smbus_read_byte_data(client, @@ -263,7 +263,7 @@ static ssize_t show_temp(struct device *dev, struct device_attribute *dummy, char *buf) { struct adm9240_data *data = adm9240_update_device(dev); - return sprintf(buf, "%d\n", data->temp * 500); /* 9-bit value */ + return sprintf(buf, "%d\n", data->temp / 128 * 500); /* 9-bit value */ } static ssize_t show_max(struct device *dev, struct device_attribute *devattr, diff --git a/drivers/hwmon/max31790.c b/drivers/hwmon/max31790.c index bef84e085973..c1b9275978f9 100644 --- a/drivers/hwmon/max31790.c +++ b/drivers/hwmon/max31790.c @@ -268,11 +268,13 @@ static int max31790_read_pwm(struct device *dev, u32 attr, int channel, long *val) { struct max31790_data *data = max31790_update_device(dev); - u8 fan_config = data->fan_config[channel]; + u8 fan_config; if (IS_ERR(data)) return PTR_ERR(data); + fan_config = data->fan_config[channel]; + switch (attr) { case hwmon_pwm_input: *val = data->pwm[channel] >> 8; diff --git a/drivers/infiniband/core/umem.c b/drivers/infiniband/core/umem.c index c68746ce6624..224ad274ea0b 100644 --- a/drivers/infiniband/core/umem.c +++ b/drivers/infiniband/core/umem.c @@ -94,6 +94,7 @@ struct ib_umem *ib_umem_get(struct ib_ucontext *context, unsigned long addr, unsigned long dma_attrs = 0; struct scatterlist *sg, *sg_list_start; int need_release = 0; + unsigned int gup_flags = FOLL_WRITE; if (dmasync) dma_attrs |= DMA_ATTR_WRITE_BARRIER; @@ -183,6 +184,9 @@ struct ib_umem *ib_umem_get(struct ib_ucontext *context, unsigned long addr, if (ret) goto out; + if (!umem->writable) + gup_flags |= FOLL_FORCE; + need_release = 1; sg_list_start = umem->sg_head.sgl; @@ -190,7 +194,7 @@ struct ib_umem *ib_umem_get(struct ib_ucontext *context, unsigned long addr, ret = get_user_pages(cur_base, min_t(unsigned long, npages, PAGE_SIZE / sizeof (struct page *)), - 1, !umem->writable, page_list, vma_list); + gup_flags, page_list, vma_list); if (ret < 0) goto out; diff --git a/drivers/infiniband/core/umem_odp.c b/drivers/infiniband/core/umem_odp.c index 75077a018675..1f0fe3217f23 100644 --- a/drivers/infiniband/core/umem_odp.c +++ b/drivers/infiniband/core/umem_odp.c @@ -527,6 +527,7 @@ int ib_umem_odp_map_dma_pages(struct ib_umem *umem, u64 user_virt, u64 bcnt, u64 off; int j, k, ret = 0, start_idx, npages = 0; u64 base_virt_addr; + unsigned int flags = 0; if (access_mask == 0) return -EINVAL; @@ -556,6 +557,9 @@ int ib_umem_odp_map_dma_pages(struct ib_umem *umem, u64 user_virt, u64 bcnt, goto out_put_task; } + if (access_mask & ODP_WRITE_ALLOWED_BIT) + flags |= FOLL_WRITE; + start_idx = (user_virt - ib_umem_start(umem)) >> PAGE_SHIFT; k = start_idx; @@ -574,8 +578,7 @@ int ib_umem_odp_map_dma_pages(struct ib_umem *umem, u64 user_virt, u64 bcnt, */ npages = get_user_pages_remote(owning_process, owning_mm, user_virt, gup_num_pages, - access_mask & ODP_WRITE_ALLOWED_BIT, - 0, local_page_list, NULL); + flags, local_page_list, NULL); up_read(&owning_mm->mmap_sem); if (npages < 0) diff --git a/drivers/infiniband/hw/mthca/mthca_memfree.c b/drivers/infiniband/hw/mthca/mthca_memfree.c index 6c00d04b8b28..c6fe89d79248 100644 --- a/drivers/infiniband/hw/mthca/mthca_memfree.c +++ b/drivers/infiniband/hw/mthca/mthca_memfree.c @@ -472,7 +472,7 @@ int mthca_map_user_db(struct mthca_dev *dev, struct mthca_uar *uar, goto out; } - ret = get_user_pages(uaddr & PAGE_MASK, 1, 1, 0, pages, NULL); + ret = get_user_pages(uaddr & PAGE_MASK, 1, FOLL_WRITE, pages, NULL); if (ret < 0) goto out; diff --git a/drivers/infiniband/hw/qib/qib_user_pages.c b/drivers/infiniband/hw/qib/qib_user_pages.c index 2d2b94fd3633..75f08624ac05 100644 --- a/drivers/infiniband/hw/qib/qib_user_pages.c +++ b/drivers/infiniband/hw/qib/qib_user_pages.c @@ -67,7 +67,8 @@ static int __qib_get_user_pages(unsigned long start_page, size_t num_pages, for (got = 0; got < num_pages; got += ret) { ret = get_user_pages(start_page + got * PAGE_SIZE, - num_pages - got, 1, 1, + num_pages - got, + FOLL_WRITE | FOLL_FORCE, p + got, NULL); if (ret < 0) goto bail_release; diff --git a/drivers/infiniband/hw/usnic/usnic_uiom.c b/drivers/infiniband/hw/usnic/usnic_uiom.c index a0b6ebee4d8a..1ccee6ea5bc3 100644 --- a/drivers/infiniband/hw/usnic/usnic_uiom.c +++ b/drivers/infiniband/hw/usnic/usnic_uiom.c @@ -111,6 +111,7 @@ static int usnic_uiom_get_pages(unsigned long addr, size_t size, int writable, int i; int flags; dma_addr_t pa; + unsigned int gup_flags; if (!can_do_mlock()) return -EPERM; @@ -135,6 +136,8 @@ static int usnic_uiom_get_pages(unsigned long addr, size_t size, int writable, flags = IOMMU_READ | IOMMU_CACHE; flags |= (writable) ? IOMMU_WRITE : 0; + gup_flags = FOLL_WRITE; + gup_flags |= (writable) ? 0 : FOLL_FORCE; cur_base = addr & PAGE_MASK; ret = 0; @@ -142,7 +145,7 @@ static int usnic_uiom_get_pages(unsigned long addr, size_t size, int writable, ret = get_user_pages(cur_base, min_t(unsigned long, npages, PAGE_SIZE / sizeof(struct page *)), - 1, !writable, page_list, NULL); + gup_flags, page_list, NULL); if (ret < 0) goto out; diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 82b0b5daf3f5..bc0af3307bbf 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -158,8 +158,8 @@ config PIC32_EVIC select IRQ_DOMAIN config JCORE_AIC - bool "J-Core integrated AIC" - depends on OF && (SUPERH || COMPILE_TEST) + bool "J-Core integrated AIC" if COMPILE_TEST + depends on OF select IRQ_DOMAIN help Support for the J-Core integrated AIC. diff --git a/drivers/irqchip/irq-eznps.c b/drivers/irqchip/irq-eznps.c index efbf0e4304b7..2a7a38830a8d 100644 --- a/drivers/irqchip/irq-eznps.c +++ b/drivers/irqchip/irq-eznps.c @@ -85,7 +85,7 @@ static void nps400_irq_eoi_global(struct irq_data *irqd) nps_ack_gic(); } -static void nps400_irq_eoi(struct irq_data *irqd) +static void nps400_irq_ack(struct irq_data *irqd) { unsigned int __maybe_unused irq = irqd_to_hwirq(irqd); @@ -103,7 +103,7 @@ static struct irq_chip nps400_irq_chip_percpu = { .name = "NPS400 IC", .irq_mask = nps400_irq_mask, .irq_unmask = nps400_irq_unmask, - .irq_eoi = nps400_irq_eoi, + .irq_ack = nps400_irq_ack, }; static int nps400_irq_map(struct irq_domain *d, unsigned int virq, @@ -135,7 +135,7 @@ static const struct irq_domain_ops nps400_irq_ops = { static int __init nps400_of_init(struct device_node *node, struct device_node *parent) { - static struct irq_domain *nps400_root_domain; + struct irq_domain *nps400_root_domain; if (parent) { pr_err("DeviceTree incore ic not a root irq controller\n"); diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 003495d91f9c..c5dee300e8a3 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -1023,7 +1023,7 @@ static void its_free_tables(struct its_node *its) static int its_alloc_tables(struct its_node *its) { - u64 typer = readq_relaxed(its->base + GITS_TYPER); + u64 typer = gic_read_typer(its->base + GITS_TYPER); u32 ids = GITS_TYPER_DEVBITS(typer); u64 shr = GITS_BASER_InnerShareable; u64 cache = GITS_BASER_WaWb; @@ -1198,7 +1198,7 @@ static void its_cpu_init_collection(void) * We now have to bind each collection to its target * redistributor. */ - if (readq_relaxed(its->base + GITS_TYPER) & GITS_TYPER_PTA) { + if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { /* * This ITS wants the physical address of the * redistributor. @@ -1208,7 +1208,7 @@ static void its_cpu_init_collection(void) /* * This ITS wants a linear CPU number. */ - target = readq_relaxed(gic_data_rdist_rd_base() + GICR_TYPER); + target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); target = GICR_TYPER_CPU_NUMBER(target) << 16; } @@ -1691,7 +1691,7 @@ static int __init its_probe_one(struct resource *res, INIT_LIST_HEAD(&its->its_device_list); its->base = its_base; its->phys_base = res->start; - its->ite_size = ((readl_relaxed(its_base + GITS_TYPER) >> 4) & 0xf) + 1; + its->ite_size = ((gic_read_typer(its_base + GITS_TYPER) >> 4) & 0xf) + 1; its->numa_node = numa_node; its->cmd_base = kzalloc(ITS_CMD_QUEUE_SZ, GFP_KERNEL); @@ -1763,7 +1763,7 @@ out_unmap: static bool gic_rdists_supports_plpis(void) { - return !!(readl_relaxed(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); + return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); } int its_cpu_init(void) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 9b81bd8b929c..19d642eae096 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -153,7 +153,7 @@ static void gic_enable_redist(bool enable) return; /* No PM support in this redistributor */ } - while (count--) { + while (--count) { val = readl_relaxed(rbase + GICR_WAKER); if (enable ^ (bool)(val & GICR_WAKER_ChildrenAsleep)) break; diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 58e5b4e87056..d6c404b3584d 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -1279,7 +1279,7 @@ static bool gic_check_eoimode(struct device_node *node, void __iomem **base) */ *base += 0xf000; cpuif_res.start += 0xf000; - pr_warn("GIC: Adjusting CPU interface base to %pa", + pr_warn("GIC: Adjusting CPU interface base to %pa\n", &cpuif_res.start); } diff --git a/drivers/irqchip/irq-jcore-aic.c b/drivers/irqchip/irq-jcore-aic.c index 84b01dec277d..033bccb41455 100644 --- a/drivers/irqchip/irq-jcore-aic.c +++ b/drivers/irqchip/irq-jcore-aic.c @@ -25,12 +25,30 @@ static struct irq_chip jcore_aic; +/* + * The J-Core AIC1 and AIC2 are cpu-local interrupt controllers and do + * not distinguish or use distinct irq number ranges for per-cpu event + * interrupts (timer, IPI). Since information to determine whether a + * particular irq number should be treated as per-cpu is not available + * at mapping time, we use a wrapper handler function which chooses + * the right handler at runtime based on whether IRQF_PERCPU was used + * when requesting the irq. + */ + +static void handle_jcore_irq(struct irq_desc *desc) +{ + if (irqd_is_per_cpu(irq_desc_get_irq_data(desc))) + handle_percpu_irq(desc); + else + handle_simple_irq(desc); +} + static int jcore_aic_irqdomain_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) { struct irq_chip *aic = d->host_data; - irq_set_chip_and_handler(irq, aic, handle_simple_irq); + irq_set_chip_and_handler(irq, aic, handle_jcore_irq); return 0; } diff --git a/drivers/media/pci/ivtv/ivtv-udma.c b/drivers/media/pci/ivtv/ivtv-udma.c index 4769469fe842..2c9232ef7baa 100644 --- a/drivers/media/pci/ivtv/ivtv-udma.c +++ b/drivers/media/pci/ivtv/ivtv-udma.c @@ -124,8 +124,8 @@ int ivtv_udma_setup(struct ivtv *itv, unsigned long ivtv_dest_addr, } /* Get user pages for DMA Xfer */ - err = get_user_pages_unlocked(user_dma.uaddr, user_dma.page_count, 0, - 1, dma->map); + err = get_user_pages_unlocked(user_dma.uaddr, user_dma.page_count, + dma->map, FOLL_FORCE); if (user_dma.page_count != err) { IVTV_DEBUG_WARN("failed to map user pages, returned %d instead of %d\n", diff --git a/drivers/media/pci/ivtv/ivtv-yuv.c b/drivers/media/pci/ivtv/ivtv-yuv.c index b094054cda6e..f7299d3d8244 100644 --- a/drivers/media/pci/ivtv/ivtv-yuv.c +++ b/drivers/media/pci/ivtv/ivtv-yuv.c @@ -76,11 +76,12 @@ static int ivtv_yuv_prep_user_dma(struct ivtv *itv, struct ivtv_user_dma *dma, /* Get user pages for DMA Xfer */ y_pages = get_user_pages_unlocked(y_dma.uaddr, - y_dma.page_count, 0, 1, &dma->map[0]); + y_dma.page_count, &dma->map[0], FOLL_FORCE); uv_pages = 0; /* silence gcc. value is set and consumed only if: */ if (y_pages == y_dma.page_count) { uv_pages = get_user_pages_unlocked(uv_dma.uaddr, - uv_dma.page_count, 0, 1, &dma->map[y_pages]); + uv_dma.page_count, &dma->map[y_pages], + FOLL_FORCE); } if (y_pages != y_dma.page_count || uv_pages != uv_dma.page_count) { diff --git a/drivers/media/platform/omap/omap_vout.c b/drivers/media/platform/omap/omap_vout.c index e668dde6d857..a31b95cb3b09 100644 --- a/drivers/media/platform/omap/omap_vout.c +++ b/drivers/media/platform/omap/omap_vout.c @@ -214,7 +214,7 @@ static int omap_vout_get_userptr(struct videobuf_buffer *vb, u32 virtp, if (!vec) return -ENOMEM; - ret = get_vaddr_frames(virtp, 1, true, false, vec); + ret = get_vaddr_frames(virtp, 1, FOLL_WRITE, vec); if (ret != 1) { frame_vector_destroy(vec); return -EINVAL; diff --git a/drivers/media/v4l2-core/videobuf-dma-sg.c b/drivers/media/v4l2-core/videobuf-dma-sg.c index f300f060b3f3..1db0af6c7f94 100644 --- a/drivers/media/v4l2-core/videobuf-dma-sg.c +++ b/drivers/media/v4l2-core/videobuf-dma-sg.c @@ -156,6 +156,7 @@ static int videobuf_dma_init_user_locked(struct videobuf_dmabuf *dma, { unsigned long first, last; int err, rw = 0; + unsigned int flags = FOLL_FORCE; dma->direction = direction; switch (dma->direction) { @@ -178,12 +179,14 @@ static int videobuf_dma_init_user_locked(struct videobuf_dmabuf *dma, if (NULL == dma->pages) return -ENOMEM; + if (rw == READ) + flags |= FOLL_WRITE; + dprintk(1, "init user [0x%lx+0x%lx => %d pages]\n", data, size, dma->nr_pages); err = get_user_pages(data & PAGE_MASK, dma->nr_pages, - rw == READ, 1, /* force */ - dma->pages, NULL); + flags, dma->pages, NULL); if (err != dma->nr_pages) { dma->nr_pages = (err >= 0) ? err : 0; diff --git a/drivers/media/v4l2-core/videobuf2-memops.c b/drivers/media/v4l2-core/videobuf2-memops.c index 3c3b517f1d1c..1cd322e939c7 100644 --- a/drivers/media/v4l2-core/videobuf2-memops.c +++ b/drivers/media/v4l2-core/videobuf2-memops.c @@ -42,6 +42,10 @@ struct frame_vector *vb2_create_framevec(unsigned long start, unsigned long first, last; unsigned long nr; struct frame_vector *vec; + unsigned int flags = FOLL_FORCE; + + if (write) + flags |= FOLL_WRITE; first = start >> PAGE_SHIFT; last = (start + length - 1) >> PAGE_SHIFT; @@ -49,7 +53,7 @@ struct frame_vector *vb2_create_framevec(unsigned long start, vec = frame_vector_create(nr); if (!vec) return ERR_PTR(-ENOMEM); - ret = get_vaddr_frames(start & PAGE_MASK, nr, write, true, vec); + ret = get_vaddr_frames(start & PAGE_MASK, nr, flags, vec); if (ret < 0) goto out_destroy; /* We accept only complete set of PFNs */ diff --git a/drivers/memstick/host/rtsx_usb_ms.c b/drivers/memstick/host/rtsx_usb_ms.c index d34bc3530385..2e3cf012ef48 100644 --- a/drivers/memstick/host/rtsx_usb_ms.c +++ b/drivers/memstick/host/rtsx_usb_ms.c @@ -524,6 +524,7 @@ static void rtsx_usb_ms_handle_req(struct work_struct *work) int rc; if (!host->req) { + pm_runtime_get_sync(ms_dev(host)); do { rc = memstick_next_req(msh, &host->req); dev_dbg(ms_dev(host), "next req %d\n", rc); @@ -544,6 +545,7 @@ static void rtsx_usb_ms_handle_req(struct work_struct *work) host->req->error); } } while (!rc); + pm_runtime_put(ms_dev(host)); } } @@ -570,6 +572,7 @@ static int rtsx_usb_ms_set_param(struct memstick_host *msh, dev_dbg(ms_dev(host), "%s: param = %d, value = %d\n", __func__, param, value); + pm_runtime_get_sync(ms_dev(host)); mutex_lock(&ucr->dev_mutex); err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_MS_CARD); @@ -635,6 +638,7 @@ static int rtsx_usb_ms_set_param(struct memstick_host *msh, } out: mutex_unlock(&ucr->dev_mutex); + pm_runtime_put(ms_dev(host)); /* power-on delay */ if (param == MEMSTICK_POWER && value == MEMSTICK_POWER_ON) @@ -681,6 +685,7 @@ static int rtsx_usb_detect_ms_card(void *__host) int err; for (;;) { + pm_runtime_get_sync(ms_dev(host)); mutex_lock(&ucr->dev_mutex); /* Check pending MS card changes */ @@ -703,6 +708,7 @@ static int rtsx_usb_detect_ms_card(void *__host) } poll_again: + pm_runtime_put(ms_dev(host)); if (host->eject) break; diff --git a/drivers/misc/cxl/api.c b/drivers/misc/cxl/api.c index f3d34b941f85..af23d7dfe752 100644 --- a/drivers/misc/cxl/api.c +++ b/drivers/misc/cxl/api.c @@ -229,6 +229,14 @@ int cxl_start_context(struct cxl_context *ctx, u64 wed, if (ctx->status == STARTED) goto out; /* already started */ + /* + * Increment the mapped context count for adapter. This also checks + * if adapter_context_lock is taken. + */ + rc = cxl_adapter_context_get(ctx->afu->adapter); + if (rc) + goto out; + if (task) { ctx->pid = get_task_pid(task, PIDTYPE_PID); ctx->glpid = get_task_pid(task->group_leader, PIDTYPE_PID); @@ -240,6 +248,7 @@ int cxl_start_context(struct cxl_context *ctx, u64 wed, if ((rc = cxl_ops->attach_process(ctx, kernel, wed, 0))) { put_pid(ctx->pid); + cxl_adapter_context_put(ctx->afu->adapter); cxl_ctx_put(); goto out; } diff --git a/drivers/misc/cxl/context.c b/drivers/misc/cxl/context.c index c466ee2b0c97..5e506c19108a 100644 --- a/drivers/misc/cxl/context.c +++ b/drivers/misc/cxl/context.c @@ -238,6 +238,9 @@ int __detach_context(struct cxl_context *ctx) put_pid(ctx->glpid); cxl_ctx_put(); + + /* Decrease the attached context count on the adapter */ + cxl_adapter_context_put(ctx->afu->adapter); return 0; } diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h index 01d372aba131..a144073593fa 100644 --- a/drivers/misc/cxl/cxl.h +++ b/drivers/misc/cxl/cxl.h @@ -618,6 +618,14 @@ struct cxl { bool perst_select_user; bool perst_same_image; bool psl_timebase_synced; + + /* + * number of contexts mapped on to this card. Possible values are: + * >0: Number of contexts mapped and new one can be mapped. + * 0: No active contexts and new ones can be mapped. + * -1: No contexts mapped and new ones cannot be mapped. + */ + atomic_t contexts_num; }; int cxl_pci_alloc_one_irq(struct cxl *adapter); @@ -944,4 +952,20 @@ bool cxl_pci_is_vphb_device(struct pci_dev *dev); /* decode AFU error bits in the PSL register PSL_SERR_An */ void cxl_afu_decode_psl_serr(struct cxl_afu *afu, u64 serr); + +/* + * Increments the number of attached contexts on an adapter. + * In case an adapter_context_lock is taken the return -EBUSY. + */ +int cxl_adapter_context_get(struct cxl *adapter); + +/* Decrements the number of attached contexts on an adapter */ +void cxl_adapter_context_put(struct cxl *adapter); + +/* If no active contexts then prevents contexts from being attached */ +int cxl_adapter_context_lock(struct cxl *adapter); + +/* Unlock the contexts-lock if taken. Warn and force unlock otherwise */ +void cxl_adapter_context_unlock(struct cxl *adapter); + #endif diff --git a/drivers/misc/cxl/file.c b/drivers/misc/cxl/file.c index 5fb9894b157f..d0b421f49b39 100644 --- a/drivers/misc/cxl/file.c +++ b/drivers/misc/cxl/file.c @@ -205,11 +205,22 @@ static long afu_ioctl_start_work(struct cxl_context *ctx, ctx->pid = get_task_pid(current, PIDTYPE_PID); ctx->glpid = get_task_pid(current->group_leader, PIDTYPE_PID); + /* + * Increment the mapped context count for adapter. This also checks + * if adapter_context_lock is taken. + */ + rc = cxl_adapter_context_get(ctx->afu->adapter); + if (rc) { + afu_release_irqs(ctx, ctx); + goto out; + } + trace_cxl_attach(ctx, work.work_element_descriptor, work.num_interrupts, amr); if ((rc = cxl_ops->attach_process(ctx, false, work.work_element_descriptor, amr))) { afu_release_irqs(ctx, ctx); + cxl_adapter_context_put(ctx->afu->adapter); goto out; } diff --git a/drivers/misc/cxl/guest.c b/drivers/misc/cxl/guest.c index 9aa58a77a24d..3e102cd6ed91 100644 --- a/drivers/misc/cxl/guest.c +++ b/drivers/misc/cxl/guest.c @@ -1152,6 +1152,9 @@ struct cxl *cxl_guest_init_adapter(struct device_node *np, struct platform_devic if ((rc = cxl_sysfs_adapter_add(adapter))) goto err_put1; + /* release the context lock as the adapter is configured */ + cxl_adapter_context_unlock(adapter); + return adapter; err_put1: diff --git a/drivers/misc/cxl/main.c b/drivers/misc/cxl/main.c index d9be23b24aa3..62e0dfb5f15b 100644 --- a/drivers/misc/cxl/main.c +++ b/drivers/misc/cxl/main.c @@ -243,8 +243,10 @@ struct cxl *cxl_alloc_adapter(void) if (dev_set_name(&adapter->dev, "card%i", adapter->adapter_num)) goto err2; - return adapter; + /* start with context lock taken */ + atomic_set(&adapter->contexts_num, -1); + return adapter; err2: cxl_remove_adapter_nr(adapter); err1: @@ -286,6 +288,44 @@ int cxl_afu_select_best_mode(struct cxl_afu *afu) return 0; } +int cxl_adapter_context_get(struct cxl *adapter) +{ + int rc; + + rc = atomic_inc_unless_negative(&adapter->contexts_num); + return rc >= 0 ? 0 : -EBUSY; +} + +void cxl_adapter_context_put(struct cxl *adapter) +{ + atomic_dec_if_positive(&adapter->contexts_num); +} + +int cxl_adapter_context_lock(struct cxl *adapter) +{ + int rc; + /* no active contexts -> contexts_num == 0 */ + rc = atomic_cmpxchg(&adapter->contexts_num, 0, -1); + return rc ? -EBUSY : 0; +} + +void cxl_adapter_context_unlock(struct cxl *adapter) +{ + int val = atomic_cmpxchg(&adapter->contexts_num, -1, 0); + + /* + * contexts lock taken -> contexts_num == -1 + * If not true then show a warning and force reset the lock. + * This will happen when context_unlock was requested without + * doing a context_lock. + */ + if (val != -1) { + atomic_set(&adapter->contexts_num, 0); + WARN(1, "Adapter context unlocked with %d active contexts", + val); + } +} + static int __init init_cxl(void) { int rc = 0; diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c index 7afad8477ad5..e96be9ca4e60 100644 --- a/drivers/misc/cxl/pci.c +++ b/drivers/misc/cxl/pci.c @@ -1487,6 +1487,8 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev) if ((rc = cxl_native_register_psl_err_irq(adapter))) goto err; + /* Release the context lock as adapter is configured */ + cxl_adapter_context_unlock(adapter); return 0; err: diff --git a/drivers/misc/cxl/sysfs.c b/drivers/misc/cxl/sysfs.c index b043c20f158f..a8b6d6a635e9 100644 --- a/drivers/misc/cxl/sysfs.c +++ b/drivers/misc/cxl/sysfs.c @@ -75,12 +75,31 @@ static ssize_t reset_adapter_store(struct device *device, int val; rc = sscanf(buf, "%i", &val); - if ((rc != 1) || (val != 1)) + if ((rc != 1) || (val != 1 && val != -1)) return -EINVAL; - if ((rc = cxl_ops->adapter_reset(adapter))) - return rc; - return count; + /* + * See if we can lock the context mapping that's only allowed + * when there are no contexts attached to the adapter. Once + * taken this will also prevent any context from getting activated. + */ + if (val == 1) { + rc = cxl_adapter_context_lock(adapter); + if (rc) + goto out; + + rc = cxl_ops->adapter_reset(adapter); + /* In case reset failed release context lock */ + if (rc) + cxl_adapter_context_unlock(adapter); + + } else if (val == -1) { + /* Perform a forced adapter reset */ + rc = cxl_ops->adapter_reset(adapter); + } + +out: + return rc ? rc : count; } static ssize_t load_image_on_perst_show(struct device *device, diff --git a/drivers/misc/mic/scif/scif_rma.c b/drivers/misc/mic/scif/scif_rma.c index e0203b1a20fd..f806a4471eb9 100644 --- a/drivers/misc/mic/scif/scif_rma.c +++ b/drivers/misc/mic/scif/scif_rma.c @@ -1396,8 +1396,7 @@ retry: pinned_pages->nr_pages = get_user_pages( (u64)addr, nr_pages, - !!(prot & SCIF_PROT_WRITE), - 0, + (prot & SCIF_PROT_WRITE) ? FOLL_WRITE : 0, pinned_pages->pages, NULL); up_write(&mm->mmap_sem); diff --git a/drivers/misc/sgi-gru/grufault.c b/drivers/misc/sgi-gru/grufault.c index a2d97b9b17e3..6fb773dbcd0c 100644 --- a/drivers/misc/sgi-gru/grufault.c +++ b/drivers/misc/sgi-gru/grufault.c @@ -198,7 +198,7 @@ static int non_atomic_pte_lookup(struct vm_area_struct *vma, #else *pageshift = PAGE_SHIFT; #endif - if (get_user_pages(vaddr, 1, write, 0, &page, NULL) <= 0) + if (get_user_pages(vaddr, 1, write ? FOLL_WRITE : 0, &page, NULL) <= 0) return -EFAULT; *paddr = page_to_phys(page); put_page(page); diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c index c3335112e68c..709a872ed484 100644 --- a/drivers/mmc/card/block.c +++ b/drivers/mmc/card/block.c @@ -46,6 +46,7 @@ #include <asm/uaccess.h> #include "queue.h" +#include "block.h" MODULE_ALIAS("mmc:block"); #ifdef MODULE_PARAM_PREFIX @@ -1786,7 +1787,7 @@ static void mmc_blk_packed_hdr_wrq_prep(struct mmc_queue_req *mqrq, struct mmc_blk_data *md = mq->data; struct mmc_packed *packed = mqrq->packed; bool do_rel_wr, do_data_tag; - u32 *packed_cmd_hdr; + __le32 *packed_cmd_hdr; u8 hdr_blocks; u8 i = 1; diff --git a/drivers/mmc/card/queue.h b/drivers/mmc/card/queue.h index 3c15a75bae86..342f1e3f301e 100644 --- a/drivers/mmc/card/queue.h +++ b/drivers/mmc/card/queue.h @@ -31,7 +31,7 @@ enum mmc_packed_type { struct mmc_packed { struct list_head list; - u32 cmd_hdr[1024]; + __le32 cmd_hdr[1024]; unsigned int blocks; u8 nr_entries; u8 retries; diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 3486bc7fbb64..39fc5b2b96c5 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -1263,6 +1263,16 @@ static int mmc_select_hs400es(struct mmc_card *card) goto out_err; } + if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_2V) + err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120); + + if (err && card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_8V) + err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180); + + /* If fails try again during next card power cycle */ + if (err) + goto out_err; + err = mmc_select_bus_width(card); if (err < 0) goto out_err; @@ -1272,6 +1282,8 @@ static int mmc_select_hs400es(struct mmc_card *card) if (err) goto out_err; + mmc_set_clock(host, card->ext_csd.hs_max_dtr); + err = mmc_switch_status(card); if (err) goto out_err; diff --git a/drivers/mmc/host/rtsx_usb_sdmmc.c b/drivers/mmc/host/rtsx_usb_sdmmc.c index 4106295527b9..6e9c0f8fddb1 100644 --- a/drivers/mmc/host/rtsx_usb_sdmmc.c +++ b/drivers/mmc/host/rtsx_usb_sdmmc.c @@ -1138,11 +1138,6 @@ static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) dev_dbg(sdmmc_dev(host), "%s\n", __func__); mutex_lock(&ucr->dev_mutex); - if (rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD)) { - mutex_unlock(&ucr->dev_mutex); - return; - } - sd_set_power_mode(host, ios->power_mode); sd_set_bus_width(host, ios->bus_width); sd_set_timing(host, ios->timing, &host->ddr_mode); @@ -1314,6 +1309,7 @@ static void rtsx_usb_update_led(struct work_struct *work) container_of(work, struct rtsx_usb_sdmmc, led_work); struct rtsx_ucr *ucr = host->ucr; + pm_runtime_get_sync(sdmmc_dev(host)); mutex_lock(&ucr->dev_mutex); if (host->led.brightness == LED_OFF) @@ -1322,6 +1318,7 @@ static void rtsx_usb_update_led(struct work_struct *work) rtsx_usb_turn_on_led(ucr); mutex_unlock(&ucr->dev_mutex); + pm_runtime_put(sdmmc_dev(host)); } #endif diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 1f54fd8755c8..7123ef96ed18 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -346,7 +346,8 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg) struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); u32 data; - if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) { + if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE || + reg == SDHCI_INT_STATUS)) { if ((val & SDHCI_INT_CARD_INT) && !esdhc_is_usdhc(imx_data)) { /* * Clear and then set D3CD bit to avoid missing the @@ -555,6 +556,25 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) esdhc_clrset_le(host, 0xffff, val, reg); } +static u8 esdhc_readb_le(struct sdhci_host *host, int reg) +{ + u8 ret; + u32 val; + + switch (reg) { + case SDHCI_HOST_CONTROL: + val = readl(host->ioaddr + reg); + + ret = val & SDHCI_CTRL_LED; + ret |= (val >> 5) & SDHCI_CTRL_DMA_MASK; + ret |= (val & ESDHC_CTRL_4BITBUS); + ret |= (val & ESDHC_CTRL_8BITBUS) << 3; + return ret; + } + + return readb(host->ioaddr + reg); +} + static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -947,6 +967,7 @@ static void esdhc_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) static struct sdhci_ops sdhci_esdhc_ops = { .read_l = esdhc_readl_le, .read_w = esdhc_readw_le, + .read_b = esdhc_readb_le, .write_l = esdhc_writel_le, .write_w = esdhc_writew_le, .write_b = esdhc_writeb_le, diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index da8e40af6f85..410a55b1c25f 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -250,7 +250,7 @@ static void sdhci_arasan_hs400_enhanced_strobe(struct mmc_host *mmc, writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER); } -void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) +static void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) { u8 ctrl; struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -265,6 +265,28 @@ void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) } } +static int sdhci_arasan_voltage_switch(struct mmc_host *mmc, + struct mmc_ios *ios) +{ + switch (ios->signal_voltage) { + case MMC_SIGNAL_VOLTAGE_180: + /* + * Plese don't switch to 1V8 as arasan,5.1 doesn't + * actually refer to this setting to indicate the + * signal voltage and the state machine will be broken + * actually if we force to enable 1V8. That's something + * like broken quirk but we could work around here. + */ + return 0; + case MMC_SIGNAL_VOLTAGE_330: + case MMC_SIGNAL_VOLTAGE_120: + /* We don't support 3V3 and 1V2 */ + break; + } + + return -EINVAL; +} + static struct sdhci_ops sdhci_arasan_ops = { .set_clock = sdhci_arasan_set_clock, .get_max_clock = sdhci_pltfm_clk_get_max_clock, @@ -661,6 +683,8 @@ static int sdhci_arasan_probe(struct platform_device *pdev) host->mmc_host_ops.hs400_enhanced_strobe = sdhci_arasan_hs400_enhanced_strobe; + host->mmc_host_ops.start_signal_voltage_switch = + sdhci_arasan_voltage_switch; } ret = sdhci_add_host(host); diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c index 72a1f1f5180a..1d9e00a00e9f 100644 --- a/drivers/mmc/host/sdhci-pci-core.c +++ b/drivers/mmc/host/sdhci-pci-core.c @@ -32,6 +32,14 @@ #include "sdhci-pci.h" #include "sdhci-pci-o2micro.h" +static int sdhci_pci_enable_dma(struct sdhci_host *host); +static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width); +static void sdhci_pci_hw_reset(struct sdhci_host *host); +static int sdhci_pci_select_drive_strength(struct sdhci_host *host, + struct mmc_card *card, + unsigned int max_dtr, int host_drv, + int card_drv, int *drv_type); + /*****************************************************************************\ * * * Hardware specific quirk handling * @@ -390,6 +398,45 @@ static int byt_sd_probe_slot(struct sdhci_pci_slot *slot) return 0; } +#define SDHCI_INTEL_PWR_TIMEOUT_CNT 20 +#define SDHCI_INTEL_PWR_TIMEOUT_UDELAY 100 + +static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode, + unsigned short vdd) +{ + int cntr; + u8 reg; + + sdhci_set_power(host, mode, vdd); + + if (mode == MMC_POWER_OFF) + return; + + /* + * Bus power might not enable after D3 -> D0 transition due to the + * present state not yet having propagated. Retry for up to 2ms. + */ + for (cntr = 0; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT; cntr++) { + reg = sdhci_readb(host, SDHCI_POWER_CONTROL); + if (reg & SDHCI_POWER_ON) + break; + udelay(SDHCI_INTEL_PWR_TIMEOUT_UDELAY); + reg |= SDHCI_POWER_ON; + sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); + } +} + +static const struct sdhci_ops sdhci_intel_byt_ops = { + .set_clock = sdhci_set_clock, + .set_power = sdhci_intel_set_power, + .enable_dma = sdhci_pci_enable_dma, + .set_bus_width = sdhci_pci_set_bus_width, + .reset = sdhci_reset, + .set_uhs_signaling = sdhci_set_uhs_signaling, + .hw_reset = sdhci_pci_hw_reset, + .select_drive_strength = sdhci_pci_select_drive_strength, +}; + static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = { .allow_runtime_pm = true, .probe_slot = byt_emmc_probe_slot, @@ -397,6 +444,7 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = { .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 | SDHCI_QUIRK2_STOP_WITH_TC, + .ops = &sdhci_intel_byt_ops, }; static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { @@ -405,6 +453,7 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { SDHCI_QUIRK2_PRESET_VALUE_BROKEN, .allow_runtime_pm = true, .probe_slot = byt_sdio_probe_slot, + .ops = &sdhci_intel_byt_ops, }; static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { @@ -415,6 +464,7 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { .allow_runtime_pm = true, .own_cd_for_runtime_pm = true, .probe_slot = byt_sd_probe_slot, + .ops = &sdhci_intel_byt_ops, }; /* Define Host controllers for Intel Merrifield platform */ @@ -1648,7 +1698,9 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot( } host->hw_name = "PCI"; - host->ops = &sdhci_pci_ops; + host->ops = chip->fixes && chip->fixes->ops ? + chip->fixes->ops : + &sdhci_pci_ops; host->quirks = chip->quirks; host->quirks2 = chip->quirks2; diff --git a/drivers/mmc/host/sdhci-pci.h b/drivers/mmc/host/sdhci-pci.h index 9c7c08b93223..6bccf56bc5ff 100644 --- a/drivers/mmc/host/sdhci-pci.h +++ b/drivers/mmc/host/sdhci-pci.h @@ -65,6 +65,8 @@ struct sdhci_pci_fixes { int (*suspend) (struct sdhci_pci_chip *); int (*resume) (struct sdhci_pci_chip *); + + const struct sdhci_ops *ops; }; struct sdhci_pci_slot { diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c index dd1938d341f7..d0f5c05fbc19 100644 --- a/drivers/mmc/host/sdhci-pxav3.c +++ b/drivers/mmc/host/sdhci-pxav3.c @@ -315,7 +315,7 @@ static void pxav3_set_power(struct sdhci_host *host, unsigned char mode, struct mmc_host *mmc = host->mmc; u8 pwr = host->pwr; - sdhci_set_power(host, mode, vdd); + sdhci_set_power_noreg(host, mode, vdd); if (host->pwr == pwr) return; diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 48055666c655..71654b90227f 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -687,7 +687,7 @@ static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_command *cmd) * host->clock is in Hz. target_timeout is in us. * Hence, us = 1000000 * cycles / Hz. Round up. */ - val = 1000000 * data->timeout_clks; + val = 1000000ULL * data->timeout_clks; if (do_div(val, host->clock)) target_timeout++; target_timeout += val; @@ -1077,6 +1077,10 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) /* Initially, a command has no error */ cmd->error = 0; + if ((host->quirks2 & SDHCI_QUIRK2_STOP_WITH_TC) && + cmd->opcode == MMC_STOP_TRANSMISSION) + cmd->flags |= MMC_RSP_BUSY; + /* Wait max 10 ms */ timeout = 10; @@ -1390,8 +1394,8 @@ static void sdhci_set_power_reg(struct sdhci_host *host, unsigned char mode, sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); } -void sdhci_set_power(struct sdhci_host *host, unsigned char mode, - unsigned short vdd) +void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode, + unsigned short vdd) { u8 pwr = 0; @@ -1455,20 +1459,17 @@ void sdhci_set_power(struct sdhci_host *host, unsigned char mode, mdelay(10); } } -EXPORT_SYMBOL_GPL(sdhci_set_power); +EXPORT_SYMBOL_GPL(sdhci_set_power_noreg); -static void __sdhci_set_power(struct sdhci_host *host, unsigned char mode, - unsigned short vdd) +void sdhci_set_power(struct sdhci_host *host, unsigned char mode, + unsigned short vdd) { - struct mmc_host *mmc = host->mmc; - - if (host->ops->set_power) - host->ops->set_power(host, mode, vdd); - else if (!IS_ERR(mmc->supply.vmmc)) - sdhci_set_power_reg(host, mode, vdd); + if (IS_ERR(host->mmc->supply.vmmc)) + sdhci_set_power_noreg(host, mode, vdd); else - sdhci_set_power(host, mode, vdd); + sdhci_set_power_reg(host, mode, vdd); } +EXPORT_SYMBOL_GPL(sdhci_set_power); /*****************************************************************************\ * * @@ -1609,7 +1610,10 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) } } - __sdhci_set_power(host, ios->power_mode, ios->vdd); + if (host->ops->set_power) + host->ops->set_power(host, ios->power_mode, ios->vdd); + else + sdhci_set_power(host, ios->power_mode, ios->vdd); if (host->ops->platform_send_init_74_clocks) host->ops->platform_send_init_74_clocks(host, ios->power_mode); @@ -2409,7 +2413,7 @@ static void sdhci_timeout_data_timer(unsigned long data) * * \*****************************************************************************/ -static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask, u32 *mask) +static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) { if (!host->cmd) { /* @@ -2453,11 +2457,6 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask, u32 *mask) return; } - if ((host->quirks2 & SDHCI_QUIRK2_STOP_WITH_TC) && - !(host->cmd->flags & MMC_RSP_BUSY) && !host->data && - host->cmd->opcode == MMC_STOP_TRANSMISSION) - *mask &= ~SDHCI_INT_DATA_END; - if (intmask & SDHCI_INT_RESPONSE) sdhci_finish_command(host); } @@ -2680,8 +2679,7 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id) } if (intmask & SDHCI_INT_CMD_MASK) - sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK, - &intmask); + sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); if (intmask & SDHCI_INT_DATA_MASK) sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index c722cd23205c..766df17fb7eb 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -683,6 +683,8 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, void sdhci_set_clock(struct sdhci_host *host, unsigned int clock); void sdhci_set_power(struct sdhci_host *host, unsigned char mode, unsigned short vdd); +void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode, + unsigned short vdd); void sdhci_set_bus_width(struct sdhci_host *host, int width); void sdhci_reset(struct sdhci_host *host, u8 mask); void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing); diff --git a/drivers/mtd/ubi/eba.c b/drivers/mtd/ubi/eba.c index 95c4048a371e..388e46be6ad9 100644 --- a/drivers/mtd/ubi/eba.c +++ b/drivers/mtd/ubi/eba.c @@ -741,6 +741,7 @@ static int try_recover_peb(struct ubi_volume *vol, int pnum, int lnum, goto out_put; } + vid_hdr = ubi_get_vid_hdr(vidb); ubi_assert(vid_hdr->vol_type == UBI_VID_DYNAMIC); mutex_lock(&ubi->buf_mutex); diff --git a/drivers/mtd/ubi/fastmap.c b/drivers/mtd/ubi/fastmap.c index d6384d965788..2ff62157d3bb 100644 --- a/drivers/mtd/ubi/fastmap.c +++ b/drivers/mtd/ubi/fastmap.c @@ -287,7 +287,7 @@ static int update_vol(struct ubi_device *ubi, struct ubi_attach_info *ai, /* new_aeb is newer */ if (cmp_res & 1) { - victim = ubi_alloc_aeb(ai, aeb->ec, aeb->pnum); + victim = ubi_alloc_aeb(ai, aeb->pnum, aeb->ec); if (!victim) return -ENOMEM; diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c index 329381a28edf..79e679d12f3b 100644 --- a/drivers/nvme/host/core.c +++ b/drivers/nvme/host/core.c @@ -554,7 +554,7 @@ int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ c.identify.opcode = nvme_admin_identify; - c.identify.cns = cpu_to_le32(1); + c.identify.cns = cpu_to_le32(NVME_ID_CNS_CTRL); *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); if (!*id) @@ -572,7 +572,7 @@ static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *n struct nvme_command c = { }; c.identify.opcode = nvme_admin_identify; - c.identify.cns = cpu_to_le32(2); + c.identify.cns = cpu_to_le32(NVME_ID_CNS_NS_ACTIVE_LIST); c.identify.nsid = cpu_to_le32(nsid); return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000); } @@ -900,9 +900,9 @@ static int nvme_revalidate_ns(struct nvme_ns *ns, struct nvme_id_ns **id) return -ENODEV; } - if (ns->ctrl->vs >= NVME_VS(1, 1)) + if (ns->ctrl->vs >= NVME_VS(1, 1, 0)) memcpy(ns->eui, (*id)->eui64, sizeof(ns->eui)); - if (ns->ctrl->vs >= NVME_VS(1, 2)) + if (ns->ctrl->vs >= NVME_VS(1, 2, 0)) memcpy(ns->uuid, (*id)->nguid, sizeof(ns->uuid)); return 0; @@ -1086,6 +1086,8 @@ static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled) int ret; while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { + if (csts == ~0) + return -ENODEV; if ((csts & NVME_CSTS_RDY) == bit) break; @@ -1240,7 +1242,7 @@ int nvme_init_identify(struct nvme_ctrl *ctrl) } page_shift = NVME_CAP_MPSMIN(cap) + 12; - if (ctrl->vs >= NVME_VS(1, 1)) + if (ctrl->vs >= NVME_VS(1, 1, 0)) ctrl->subsystem = NVME_CAP_NSSRC(cap); ret = nvme_identify_ctrl(ctrl, &id); @@ -1840,7 +1842,7 @@ static void nvme_scan_work(struct work_struct *work) return; nn = le32_to_cpu(id->nn); - if (ctrl->vs >= NVME_VS(1, 1) && + if (ctrl->vs >= NVME_VS(1, 1, 0) && !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) { if (!nvme_scan_ns_list(ctrl, nn)) goto done; diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index 0fc99f0f2571..0248d0e21fee 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -99,6 +99,7 @@ struct nvme_dev { dma_addr_t cmb_dma_addr; u64 cmb_size; u32 cmbsz; + u32 cmbloc; struct nvme_ctrl ctrl; struct completion ioq_wait; }; @@ -893,7 +894,7 @@ static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved) "I/O %d QID %d timeout, reset controller\n", req->tag, nvmeq->qid); nvme_dev_disable(dev, false); - queue_work(nvme_workq, &dev->reset_work); + nvme_reset(dev); /* * Mark the request as handled, since the inline shutdown @@ -1214,7 +1215,7 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev) u64 cap = lo_hi_readq(dev->bar + NVME_REG_CAP); struct nvme_queue *nvmeq; - dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1) ? + dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1, 0) ? NVME_CAP_NSSRC(cap) : 0; if (dev->subsystem && @@ -1291,7 +1292,7 @@ static void nvme_watchdog_timer(unsigned long data) /* Skip controllers under certain specific conditions. */ if (nvme_should_reset(dev, csts)) { - if (queue_work(nvme_workq, &dev->reset_work)) + if (!nvme_reset(dev)) dev_warn(dev->dev, "Failed status: 0x%x, reset controller.\n", csts); @@ -1331,28 +1332,37 @@ static int nvme_create_io_queues(struct nvme_dev *dev) return ret >= 0 ? 0 : ret; } +static ssize_t nvme_cmb_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev)); + + return snprintf(buf, PAGE_SIZE, "cmbloc : x%08x\ncmbsz : x%08x\n", + ndev->cmbloc, ndev->cmbsz); +} +static DEVICE_ATTR(cmb, S_IRUGO, nvme_cmb_show, NULL); + static void __iomem *nvme_map_cmb(struct nvme_dev *dev) { u64 szu, size, offset; - u32 cmbloc; resource_size_t bar_size; struct pci_dev *pdev = to_pci_dev(dev->dev); void __iomem *cmb; dma_addr_t dma_addr; - if (!use_cmb_sqes) - return NULL; - dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ); if (!(NVME_CMB_SZ(dev->cmbsz))) return NULL; + dev->cmbloc = readl(dev->bar + NVME_REG_CMBLOC); - cmbloc = readl(dev->bar + NVME_REG_CMBLOC); + if (!use_cmb_sqes) + return NULL; szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz)); size = szu * NVME_CMB_SZ(dev->cmbsz); - offset = szu * NVME_CMB_OFST(cmbloc); - bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc)); + offset = szu * NVME_CMB_OFST(dev->cmbloc); + bar_size = pci_resource_len(pdev, NVME_CMB_BIR(dev->cmbloc)); if (offset > bar_size) return NULL; @@ -1365,7 +1375,7 @@ static void __iomem *nvme_map_cmb(struct nvme_dev *dev) if (size > bar_size - offset) size = bar_size - offset; - dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset; + dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(dev->cmbloc)) + offset; cmb = ioremap_wc(dma_addr, size); if (!cmb) return NULL; @@ -1511,9 +1521,9 @@ static int nvme_delete_queue(struct nvme_queue *nvmeq, u8 opcode) return 0; } -static void nvme_disable_io_queues(struct nvme_dev *dev) +static void nvme_disable_io_queues(struct nvme_dev *dev, int queues) { - int pass, queues = dev->online_queues - 1; + int pass; unsigned long timeout; u8 opcode = nvme_admin_delete_sq; @@ -1616,9 +1626,25 @@ static int nvme_pci_enable(struct nvme_dev *dev) dev->q_depth); } - if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2)) + /* + * CMBs can currently only exist on >=1.2 PCIe devices. We only + * populate sysfs if a CMB is implemented. Note that we add the + * CMB attribute to the nvme_ctrl kobj which removes the need to remove + * it on exit. Since nvme_dev_attrs_group has no name we can pass + * NULL as final argument to sysfs_add_file_to_group. + */ + + if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2, 0)) { dev->cmb = nvme_map_cmb(dev); + if (dev->cmbsz) { + if (sysfs_add_file_to_group(&dev->ctrl.device->kobj, + &dev_attr_cmb.attr, NULL)) + dev_warn(dev->dev, + "failed to add sysfs attribute for CMB\n"); + } + } + pci_enable_pcie_error_reporting(pdev); pci_save_state(pdev); return 0; @@ -1649,7 +1675,7 @@ static void nvme_pci_disable(struct nvme_dev *dev) static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) { - int i; + int i, queues; u32 csts = -1; del_timer_sync(&dev->watchdog_timer); @@ -1660,6 +1686,7 @@ static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) csts = readl(dev->bar + NVME_REG_CSTS); } + queues = dev->online_queues - 1; for (i = dev->queue_count - 1; i > 0; i--) nvme_suspend_queue(dev->queues[i]); @@ -1671,7 +1698,7 @@ static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) if (dev->queue_count) nvme_suspend_queue(dev->queues[0]); } else { - nvme_disable_io_queues(dev); + nvme_disable_io_queues(dev, queues); nvme_disable_admin_queue(dev, shutdown); } nvme_pci_disable(dev); @@ -1818,11 +1845,10 @@ static int nvme_reset(struct nvme_dev *dev) { if (!dev->ctrl.admin_q || blk_queue_dying(dev->ctrl.admin_q)) return -ENODEV; - + if (work_busy(&dev->reset_work)) + return -ENODEV; if (!queue_work(nvme_workq, &dev->reset_work)) return -EBUSY; - - flush_work(&dev->reset_work); return 0; } @@ -1846,7 +1872,12 @@ static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) static int nvme_pci_reset_ctrl(struct nvme_ctrl *ctrl) { - return nvme_reset(to_nvme_dev(ctrl)); + struct nvme_dev *dev = to_nvme_dev(ctrl); + int ret = nvme_reset(dev); + + if (!ret) + flush_work(&dev->reset_work); + return ret; } static const struct nvme_ctrl_ops nvme_pci_ctrl_ops = { @@ -1940,7 +1971,7 @@ static void nvme_reset_notify(struct pci_dev *pdev, bool prepare) if (prepare) nvme_dev_disable(dev, false); else - queue_work(nvme_workq, &dev->reset_work); + nvme_reset(dev); } static void nvme_shutdown(struct pci_dev *pdev) @@ -2009,7 +2040,7 @@ static int nvme_resume(struct device *dev) struct pci_dev *pdev = to_pci_dev(dev); struct nvme_dev *ndev = pci_get_drvdata(pdev); - queue_work(nvme_workq, &ndev->reset_work); + nvme_reset(ndev); return 0; } #endif @@ -2048,7 +2079,7 @@ static pci_ers_result_t nvme_slot_reset(struct pci_dev *pdev) dev_info(dev->ctrl.device, "restart after slot reset\n"); pci_restore_state(pdev); - queue_work(nvme_workq, &dev->reset_work); + nvme_reset(dev); return PCI_ERS_RESULT_RECOVERED; } diff --git a/drivers/nvme/host/scsi.c b/drivers/nvme/host/scsi.c index c2a0a1c7d05d..3eaa4d27801e 100644 --- a/drivers/nvme/host/scsi.c +++ b/drivers/nvme/host/scsi.c @@ -606,7 +606,7 @@ static int nvme_fill_device_id_eui64(struct nvme_ns *ns, struct sg_io_hdr *hdr, eui = id_ns->eui64; len = sizeof(id_ns->eui64); - if (ns->ctrl->vs >= NVME_VS(1, 2)) { + if (ns->ctrl->vs >= NVME_VS(1, 2, 0)) { if (bitmap_empty(eui, len * 8)) { eui = id_ns->nguid; len = sizeof(id_ns->nguid); @@ -679,7 +679,7 @@ static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr, { int res; - if (ns->ctrl->vs >= NVME_VS(1, 1)) { + if (ns->ctrl->vs >= NVME_VS(1, 1, 0)) { res = nvme_fill_device_id_eui64(ns, hdr, resp, alloc_len); if (res != -EOPNOTSUPP) return res; diff --git a/drivers/nvme/target/admin-cmd.c b/drivers/nvme/target/admin-cmd.c index 7ab9c9381b98..6fe4c48a21e4 100644 --- a/drivers/nvme/target/admin-cmd.c +++ b/drivers/nvme/target/admin-cmd.c @@ -199,7 +199,7 @@ static void nvmet_execute_identify_ctrl(struct nvmet_req *req) */ /* we support multiple ports and multiples hosts: */ - id->mic = (1 << 0) | (1 << 1); + id->cmic = (1 << 0) | (1 << 1); /* no limit on data transfer sizes for now */ id->mdts = 0; @@ -511,13 +511,13 @@ int nvmet_parse_admin_cmd(struct nvmet_req *req) case nvme_admin_identify: req->data_len = 4096; switch (le32_to_cpu(cmd->identify.cns)) { - case 0x00: + case NVME_ID_CNS_NS: req->execute = nvmet_execute_identify_ns; return 0; - case 0x01: + case NVME_ID_CNS_CTRL: req->execute = nvmet_execute_identify_ctrl; return 0; - case 0x02: + case NVME_ID_CNS_NS_ACTIVE_LIST: req->execute = nvmet_execute_identify_nslist; return 0; } diff --git a/drivers/nvme/target/core.c b/drivers/nvme/target/core.c index 6559d5afa7bf..b4cacb6f0258 100644 --- a/drivers/nvme/target/core.c +++ b/drivers/nvme/target/core.c @@ -882,7 +882,7 @@ struct nvmet_subsys *nvmet_subsys_alloc(const char *subsysnqn, if (!subsys) return NULL; - subsys->ver = (1 << 16) | (2 << 8) | 1; /* NVMe 1.2.1 */ + subsys->ver = NVME_VS(1, 2, 1); /* NVMe 1.2.1 */ switch (type) { case NVME_NQN_NVME: diff --git a/drivers/nvme/target/discovery.c b/drivers/nvme/target/discovery.c index 6f65646e89cf..12f39eea569f 100644 --- a/drivers/nvme/target/discovery.c +++ b/drivers/nvme/target/discovery.c @@ -54,7 +54,7 @@ static void nvmet_format_discovery_entry(struct nvmf_disc_rsp_page_hdr *hdr, /* we support only dynamic controllers */ e->cntlid = cpu_to_le16(NVME_CNTLID_DYNAMIC); e->asqsz = cpu_to_le16(NVMF_AQ_DEPTH); - e->nqntype = type; + e->subtype = type; memcpy(e->trsvcid, port->disc_addr.trsvcid, NVMF_TRSVCID_SIZE); memcpy(e->traddr, port->disc_addr.traddr, NVMF_TRADDR_SIZE); memcpy(e->tsas.common, port->disc_addr.tsas.common, NVMF_TSAS_SIZE); @@ -187,7 +187,7 @@ int nvmet_parse_discovery_cmd(struct nvmet_req *req) case nvme_admin_identify: req->data_len = 4096; switch (le32_to_cpu(cmd->identify.cns)) { - case 0x01: + case NVME_ID_CNS_CTRL: req->execute = nvmet_execute_identify_disc_ctrl; return 0; diff --git a/drivers/pci/host/pci-layerscape.c b/drivers/pci/host/pci-layerscape.c index 2cb7315e26d0..653707996342 100644 --- a/drivers/pci/host/pci-layerscape.c +++ b/drivers/pci/host/pci-layerscape.c @@ -247,6 +247,7 @@ static int __init ls_pcie_probe(struct platform_device *pdev) pp = &pcie->pp; pp->dev = dev; + pcie->drvdata = match->data; pp->ops = pcie->drvdata->ops; dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); @@ -256,7 +257,6 @@ static int __init ls_pcie_probe(struct platform_device *pdev) return PTR_ERR(pcie->pp.dbi_base); } - pcie->drvdata = match->data; pcie->lut = pcie->pp.dbi_base + pcie->drvdata->lut_offset; if (!ls_pcie_is_bridge(pcie)) diff --git a/drivers/pci/host/pcie-designware-plat.c b/drivers/pci/host/pcie-designware-plat.c index 537f58a664fa..8df6312ed300 100644 --- a/drivers/pci/host/pcie-designware-plat.c +++ b/drivers/pci/host/pcie-designware-plat.c @@ -3,7 +3,7 @@ * * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com) * - * Authors: Joao Pinto <jpinto@synopsys.com> + * Authors: Joao Pinto <jpmpinto@gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/drivers/perf/xgene_pmu.c b/drivers/perf/xgene_pmu.c index c2ac7646b99f..a8ac4bcef2c0 100644 --- a/drivers/perf/xgene_pmu.c +++ b/drivers/perf/xgene_pmu.c @@ -1011,7 +1011,7 @@ xgene_pmu_dev_ctx *acpi_get_pmu_hw_inf(struct xgene_pmu *xgene_pmu, rc = acpi_dev_get_resources(adev, &resource_list, acpi_pmu_dev_add_resource, &res); acpi_dev_free_resource_list(&resource_list); - if (rc < 0 || IS_ERR(&res)) { + if (rc < 0) { dev_err(dev, "PMU type %d: No resource address found\n", type); goto err; } diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c index e1ab864e1a7f..c8c72e8259d3 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c @@ -151,21 +151,21 @@ FUNC_GROUP_DECL(GPID0, F19, E21); #define GPID2_DESC SIG_DESC_SET(SCU8C, 9) -#define D20 26 +#define F20 26 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT0, SD2, SD2_DESC); SIG_EXPR_DECL(GPID2IN, GPID2, GPID2_DESC); SIG_EXPR_DECL(GPID2IN, GPID, GPID_DESC); SIG_EXPR_LIST_DECL_DUAL(GPID2IN, GPID2, GPID); -MS_PIN_DECL(D20, GPIOD2, SD2DAT0, GPID2IN); +MS_PIN_DECL(F20, GPIOD2, SD2DAT0, GPID2IN); -#define D21 27 +#define D20 27 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT1, SD2, SD2_DESC); SIG_EXPR_DECL(GPID2OUT, GPID2, GPID2_DESC); SIG_EXPR_DECL(GPID2OUT, GPID, GPID_DESC); SIG_EXPR_LIST_DECL_DUAL(GPID2OUT, GPID2, GPID); -MS_PIN_DECL(D21, GPIOD3, SD2DAT1, GPID2OUT); +MS_PIN_DECL(D20, GPIOD3, SD2DAT1, GPID2OUT); -FUNC_GROUP_DECL(GPID2, D20, D21); +FUNC_GROUP_DECL(GPID2, F20, D20); #define GPIE_DESC SIG_DESC_SET(HW_STRAP1, 21) #define GPIE0_DESC SIG_DESC_SET(SCU8C, 12) @@ -182,28 +182,88 @@ SIG_EXPR_LIST_DECL_SINGLE(NDCD3, NDCD3, SIG_DESC_SET(SCU80, 17)); SIG_EXPR_DECL(GPIE0OUT, GPIE0, GPIE0_DESC); SIG_EXPR_DECL(GPIE0OUT, GPIE, GPIE_DESC); SIG_EXPR_LIST_DECL_DUAL(GPIE0OUT, GPIE0, GPIE); -MS_PIN_DECL(C20, GPIE0, NDCD3, GPIE0OUT); +MS_PIN_DECL(C20, GPIOE1, NDCD3, GPIE0OUT); FUNC_GROUP_DECL(GPIE0, B20, C20); -#define SPI1_DESC SIG_DESC_SET(HW_STRAP1, 13) +#define SPI1_DESC { HW_STRAP1, GENMASK(13, 12), 1, 0 } +#define SPI1DEBUG_DESC { HW_STRAP1, GENMASK(13, 12), 2, 0 } +#define SPI1PASSTHRU_DESC { HW_STRAP1, GENMASK(13, 12), 3, 0 } + #define C18 64 -SIG_EXPR_LIST_DECL_SINGLE(SYSCS, SPI1, COND1, SPI1_DESC); +SIG_EXPR_DECL(SYSCS, SPI1DEBUG, COND1, SPI1DEBUG_DESC); +SIG_EXPR_DECL(SYSCS, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC); +SIG_EXPR_LIST_DECL_DUAL(SYSCS, SPI1DEBUG, SPI1PASSTHRU); SS_PIN_DECL(C18, GPIOI0, SYSCS); #define E15 65 -SIG_EXPR_LIST_DECL_SINGLE(SYSCK, SPI1, COND1, SPI1_DESC); +SIG_EXPR_DECL(SYSCK, SPI1DEBUG, COND1, SPI1DEBUG_DESC); +SIG_EXPR_DECL(SYSCK, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC); +SIG_EXPR_LIST_DECL_DUAL(SYSCK, SPI1DEBUG, SPI1PASSTHRU); SS_PIN_DECL(E15, GPIOI1, SYSCK); -#define A14 66 -SIG_EXPR_LIST_DECL_SINGLE(SYSMOSI, SPI1, COND1, SPI1_DESC); -SS_PIN_DECL(A14, GPIOI2, SYSMOSI); +#define B16 66 +SIG_EXPR_DECL(SYSMOSI, SPI1DEBUG, COND1, SPI1DEBUG_DESC); +SIG_EXPR_DECL(SYSMOSI, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC); +SIG_EXPR_LIST_DECL_DUAL(SYSMOSI, SPI1DEBUG, SPI1PASSTHRU); +SS_PIN_DECL(B16, GPIOI2, SYSMOSI); #define C16 67 -SIG_EXPR_LIST_DECL_SINGLE(SYSMISO, SPI1, COND1, SPI1_DESC); +SIG_EXPR_DECL(SYSMISO, SPI1DEBUG, COND1, SPI1DEBUG_DESC); +SIG_EXPR_DECL(SYSMISO, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC); +SIG_EXPR_LIST_DECL_DUAL(SYSMISO, SPI1DEBUG, SPI1PASSTHRU); SS_PIN_DECL(C16, GPIOI3, SYSMISO); -FUNC_GROUP_DECL(SPI1, C18, E15, A14, C16); +#define VB_DESC SIG_DESC_SET(HW_STRAP1, 5) + +#define B15 68 +SIG_EXPR_DECL(SPI1CS0, SPI1, COND1, SPI1_DESC); +SIG_EXPR_DECL(SPI1CS0, SPI1DEBUG, COND1, SPI1DEBUG_DESC); +SIG_EXPR_DECL(SPI1CS0, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC); +SIG_EXPR_LIST_DECL(SPI1CS0, SIG_EXPR_PTR(SPI1CS0, SPI1), + SIG_EXPR_PTR(SPI1CS0, SPI1DEBUG), + SIG_EXPR_PTR(SPI1CS0, SPI1PASSTHRU)); +SIG_EXPR_LIST_DECL_SINGLE(VBCS, VGABIOSROM, COND1, VB_DESC); +MS_PIN_DECL(B15, GPIOI4, SPI1CS0, VBCS); + +#define C15 69 +SIG_EXPR_DECL(SPI1CK, SPI1, COND1, SPI1_DESC); +SIG_EXPR_DECL(SPI1CK, SPI1DEBUG, COND1, SPI1DEBUG_DESC); +SIG_EXPR_DECL(SPI1CK, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC); +SIG_EXPR_LIST_DECL(SPI1CK, SIG_EXPR_PTR(SPI1CK, SPI1), + SIG_EXPR_PTR(SPI1CK, SPI1DEBUG), + SIG_EXPR_PTR(SPI1CK, SPI1PASSTHRU)); +SIG_EXPR_LIST_DECL_SINGLE(VBCK, VGABIOSROM, COND1, VB_DESC); +MS_PIN_DECL(C15, GPIOI5, SPI1CK, VBCK); + +#define A14 70 +SIG_EXPR_DECL(SPI1MOSI, SPI1, COND1, SPI1_DESC); +SIG_EXPR_DECL(SPI1MOSI, SPI1DEBUG, COND1, SPI1DEBUG_DESC); +SIG_EXPR_DECL(SPI1MOSI, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC); +SIG_EXPR_LIST_DECL(SPI1MOSI, SIG_EXPR_PTR(SPI1MOSI, SPI1), + SIG_EXPR_PTR(SPI1MOSI, SPI1DEBUG), + SIG_EXPR_PTR(SPI1MOSI, SPI1PASSTHRU)); +SIG_EXPR_LIST_DECL_SINGLE(VBMOSI, VGABIOSROM, COND1, VB_DESC); +MS_PIN_DECL(A14, GPIOI6, SPI1MOSI, VBMOSI); + +#define A15 71 +SIG_EXPR_DECL(SPI1MISO, SPI1, COND1, SPI1_DESC); +SIG_EXPR_DECL(SPI1MISO, SPI1DEBUG, COND1, SPI1DEBUG_DESC); +SIG_EXPR_DECL(SPI1MISO, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC); +SIG_EXPR_LIST_DECL(SPI1MISO, SIG_EXPR_PTR(SPI1MISO, SPI1), + SIG_EXPR_PTR(SPI1MISO, SPI1DEBUG), + SIG_EXPR_PTR(SPI1MISO, SPI1PASSTHRU)); +SIG_EXPR_LIST_DECL_SINGLE(VBMISO, VGABIOSROM, COND1, VB_DESC); +MS_PIN_DECL(A15, GPIOI7, SPI1MISO, VBMISO); + +FUNC_GROUP_DECL(SPI1, B15, C15, A14, A15); +FUNC_GROUP_DECL(SPI1DEBUG, C18, E15, B16, C16, B15, C15, A14, A15); +FUNC_GROUP_DECL(SPI1PASSTHRU, C18, E15, B16, C16, B15, C15, A14, A15); +FUNC_GROUP_DECL(VGABIOSROM, B15, C15, A14, A15); + +#define R2 72 +SIG_EXPR_LIST_DECL_SINGLE(SGPMCK, SGPM, SIG_DESC_SET(SCU84, 8)); +SS_PIN_DECL(R2, GPIOJ0, SGPMCK); #define L2 73 SIG_EXPR_LIST_DECL_SINGLE(SGPMLD, SGPM, SIG_DESC_SET(SCU84, 9)); @@ -580,6 +640,7 @@ static struct pinctrl_pin_desc aspeed_g5_pins[ASPEED_G5_NR_PINS] = { ASPEED_PINCTRL_PIN(A12), ASPEED_PINCTRL_PIN(A13), ASPEED_PINCTRL_PIN(A14), + ASPEED_PINCTRL_PIN(A15), ASPEED_PINCTRL_PIN(A2), ASPEED_PINCTRL_PIN(A3), ASPEED_PINCTRL_PIN(A4), @@ -592,6 +653,8 @@ static struct pinctrl_pin_desc aspeed_g5_pins[ASPEED_G5_NR_PINS] = { ASPEED_PINCTRL_PIN(B12), ASPEED_PINCTRL_PIN(B13), ASPEED_PINCTRL_PIN(B14), + ASPEED_PINCTRL_PIN(B15), + ASPEED_PINCTRL_PIN(B16), ASPEED_PINCTRL_PIN(B2), ASPEED_PINCTRL_PIN(B20), ASPEED_PINCTRL_PIN(B3), @@ -603,6 +666,7 @@ static struct pinctrl_pin_desc aspeed_g5_pins[ASPEED_G5_NR_PINS] = { ASPEED_PINCTRL_PIN(C12), ASPEED_PINCTRL_PIN(C13), ASPEED_PINCTRL_PIN(C14), + ASPEED_PINCTRL_PIN(C15), ASPEED_PINCTRL_PIN(C16), ASPEED_PINCTRL_PIN(C18), ASPEED_PINCTRL_PIN(C2), @@ -614,7 +678,6 @@ static struct pinctrl_pin_desc aspeed_g5_pins[ASPEED_G5_NR_PINS] = { ASPEED_PINCTRL_PIN(D10), ASPEED_PINCTRL_PIN(D2), ASPEED_PINCTRL_PIN(D20), - ASPEED_PINCTRL_PIN(D21), ASPEED_PINCTRL_PIN(D4), ASPEED_PINCTRL_PIN(D5), ASPEED_PINCTRL_PIN(D6), @@ -630,6 +693,7 @@ static struct pinctrl_pin_desc aspeed_g5_pins[ASPEED_G5_NR_PINS] = { ASPEED_PINCTRL_PIN(E7), ASPEED_PINCTRL_PIN(E9), ASPEED_PINCTRL_PIN(F19), + ASPEED_PINCTRL_PIN(F20), ASPEED_PINCTRL_PIN(F9), ASPEED_PINCTRL_PIN(H20), ASPEED_PINCTRL_PIN(L1), @@ -691,11 +755,14 @@ static const struct aspeed_pin_group aspeed_g5_groups[] = { ASPEED_PINCTRL_GROUP(RMII2), ASPEED_PINCTRL_GROUP(SD1), ASPEED_PINCTRL_GROUP(SPI1), + ASPEED_PINCTRL_GROUP(SPI1DEBUG), + ASPEED_PINCTRL_GROUP(SPI1PASSTHRU), ASPEED_PINCTRL_GROUP(TIMER4), ASPEED_PINCTRL_GROUP(TIMER5), ASPEED_PINCTRL_GROUP(TIMER6), ASPEED_PINCTRL_GROUP(TIMER7), ASPEED_PINCTRL_GROUP(TIMER8), + ASPEED_PINCTRL_GROUP(VGABIOSROM), }; static const struct aspeed_pin_function aspeed_g5_functions[] = { @@ -733,11 +800,14 @@ static const struct aspeed_pin_function aspeed_g5_functions[] = { ASPEED_PINCTRL_FUNC(RMII2), ASPEED_PINCTRL_FUNC(SD1), ASPEED_PINCTRL_FUNC(SPI1), + ASPEED_PINCTRL_FUNC(SPI1DEBUG), + ASPEED_PINCTRL_FUNC(SPI1PASSTHRU), ASPEED_PINCTRL_FUNC(TIMER4), ASPEED_PINCTRL_FUNC(TIMER5), ASPEED_PINCTRL_FUNC(TIMER6), ASPEED_PINCTRL_FUNC(TIMER7), ASPEED_PINCTRL_FUNC(TIMER8), + ASPEED_PINCTRL_FUNC(VGABIOSROM), }; static struct aspeed_pinctrl_data aspeed_g5_pinctrl_data = { diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c index 0391f9f13f3e..49aeba912531 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c @@ -166,13 +166,9 @@ static bool aspeed_sig_expr_set(const struct aspeed_sig_expr *expr, bool enable, struct regmap *map) { int i; - bool ret; - - ret = aspeed_sig_expr_eval(expr, enable, map); - if (ret) - return ret; for (i = 0; i < expr->ndescs; i++) { + bool ret; const struct aspeed_sig_desc *desc = &expr->descs[i]; u32 pattern = enable ? desc->enable : desc->disable; @@ -199,12 +195,18 @@ static bool aspeed_sig_expr_set(const struct aspeed_sig_expr *expr, static bool aspeed_sig_expr_enable(const struct aspeed_sig_expr *expr, struct regmap *map) { + if (aspeed_sig_expr_eval(expr, true, map)) + return true; + return aspeed_sig_expr_set(expr, true, map); } static bool aspeed_sig_expr_disable(const struct aspeed_sig_expr *expr, struct regmap *map) { + if (!aspeed_sig_expr_eval(expr, true, map)) + return true; + return aspeed_sig_expr_set(expr, false, map); } diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index d22a9fe2e6df..71bbeb9321ba 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -1808,6 +1808,8 @@ static int byt_pinctrl_probe(struct platform_device *pdev) return PTR_ERR(vg->pctl_dev); } + raw_spin_lock_init(&vg->lock); + ret = byt_gpio_probe(vg); if (ret) { pinctrl_unregister(vg->pctl_dev); @@ -1815,7 +1817,6 @@ static int byt_pinctrl_probe(struct platform_device *pdev) } platform_set_drvdata(pdev, vg); - raw_spin_lock_init(&vg->lock); pm_runtime_enable(&pdev->dev); return 0; diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 63387a40b973..01443762e570 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -19,6 +19,7 @@ #include <linux/pinctrl/pinconf.h> #include <linux/pinctrl/pinconf-generic.h> +#include "../core.h" #include "pinctrl-intel.h" /* Offset from regs */ @@ -1056,6 +1057,26 @@ int intel_pinctrl_remove(struct platform_device *pdev) EXPORT_SYMBOL_GPL(intel_pinctrl_remove); #ifdef CONFIG_PM_SLEEP +static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned pin) +{ + const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin); + + if (!pd || !intel_pad_usable(pctrl, pin)) + return false; + + /* + * Only restore the pin if it is actually in use by the kernel (or + * by userspace). It is possible that some pins are used by the + * BIOS during resume and those are not always locked down so leave + * them alone. + */ + if (pd->mux_owner || pd->gpio_owner || + gpiochip_line_is_irq(&pctrl->chip, pin)) + return true; + + return false; +} + int intel_pinctrl_suspend(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); @@ -1069,7 +1090,7 @@ int intel_pinctrl_suspend(struct device *dev) const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i]; u32 val; - if (!intel_pad_usable(pctrl, desc->number)) + if (!intel_pinctrl_should_save(pctrl, desc->number)) continue; val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG0)); @@ -1130,7 +1151,7 @@ int intel_pinctrl_resume(struct device *dev) void __iomem *padcfg; u32 val; - if (!intel_pad_usable(pctrl, desc->number)) + if (!intel_pinctrl_should_save(pctrl, desc->number)) continue; padcfg = intel_get_padcfg(pctrl, desc->number, PADCFG0); diff --git a/drivers/platform/goldfish/goldfish_pipe.c b/drivers/platform/goldfish/goldfish_pipe.c index 07462d79d040..1aba2c74160e 100644 --- a/drivers/platform/goldfish/goldfish_pipe.c +++ b/drivers/platform/goldfish/goldfish_pipe.c @@ -309,7 +309,8 @@ static ssize_t goldfish_pipe_read_write(struct file *filp, char __user *buffer, * much memory to the process. */ down_read(¤t->mm->mmap_sem); - ret = get_user_pages(address, 1, !is_write, 0, &page, NULL); + ret = get_user_pages(address, 1, is_write ? 0 : FOLL_WRITE, + &page, NULL); up_read(¤t->mm->mmap_sem); if (ret < 0) break; diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index 81b8dcca8891..b8a21d7b25d4 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -576,6 +576,7 @@ config ASUS_WMI config ASUS_NB_WMI tristate "Asus Notebook WMI Driver" depends on ASUS_WMI + depends on SERIO_I8042 || SERIO_I8042 = n ---help--- This is a driver for newer Asus notebooks. It adds extra features like wireless radio and bluetooth control, leds, hotkeys, backlight... diff --git a/drivers/platform/x86/ideapad-laptop.c b/drivers/platform/x86/ideapad-laptop.c index d1a091b93192..a2323941e677 100644 --- a/drivers/platform/x86/ideapad-laptop.c +++ b/drivers/platform/x86/ideapad-laptop.c @@ -933,6 +933,13 @@ static const struct dmi_system_id no_hw_rfkill_list[] = { DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo YOGA 900"), }, }, + { + .ident = "Lenovo YOGA 910-13IKB", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo YOGA 910-13IKB"), + }, + }, {} }; diff --git a/drivers/rapidio/devices/rio_mport_cdev.c b/drivers/rapidio/devices/rio_mport_cdev.c index 436dfe871d32..9013a585507e 100644 --- a/drivers/rapidio/devices/rio_mport_cdev.c +++ b/drivers/rapidio/devices/rio_mport_cdev.c @@ -892,7 +892,8 @@ rio_dma_transfer(struct file *filp, u32 transfer_mode, down_read(¤t->mm->mmap_sem); pinned = get_user_pages( (unsigned long)xfer->loc_addr & PAGE_MASK, - nr_pages, dir == DMA_FROM_DEVICE, 0, + nr_pages, + dir == DMA_FROM_DEVICE ? FOLL_WRITE : 0, page_list, NULL); up_read(¤t->mm->mmap_sem); diff --git a/drivers/s390/scsi/zfcp_dbf.c b/drivers/s390/scsi/zfcp_dbf.c index 637cf8973c9e..581001989937 100644 --- a/drivers/s390/scsi/zfcp_dbf.c +++ b/drivers/s390/scsi/zfcp_dbf.c @@ -384,7 +384,7 @@ void zfcp_dbf_san(char *tag, struct zfcp_dbf *dbf, /* if (len > rec_len): * dump data up to cap_len ignoring small duplicate in rec->payload */ - spin_lock_irqsave(&dbf->pay_lock, flags); + spin_lock(&dbf->pay_lock); memset(payload, 0, sizeof(*payload)); memcpy(payload->area, paytag, ZFCP_DBF_TAG_LEN); payload->fsf_req_id = req_id; diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c index a8762a3efeef..532474109624 100644 --- a/drivers/scsi/ipr.c +++ b/drivers/scsi/ipr.c @@ -2586,7 +2586,6 @@ static void ipr_process_error(struct ipr_cmnd *ipr_cmd) struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb; u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc); u32 fd_ioasc; - char *envp[] = { "ASYNC_ERR_LOG=1", NULL }; if (ioa_cfg->sis64) fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc); @@ -2607,8 +2606,8 @@ static void ipr_process_error(struct ipr_cmnd *ipr_cmd) } list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_report_q); + schedule_work(&ioa_cfg->work_q); hostrcb = ipr_get_free_hostrcb(ioa_cfg); - kobject_uevent_env(&ioa_cfg->host->shost_dev.kobj, KOBJ_CHANGE, envp); ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb); } diff --git a/drivers/scsi/scsi_dh.c b/drivers/scsi/scsi_dh.c index 54d446c9f56e..b8d3b97b217a 100644 --- a/drivers/scsi/scsi_dh.c +++ b/drivers/scsi/scsi_dh.c @@ -36,9 +36,9 @@ struct scsi_dh_blist { }; static const struct scsi_dh_blist scsi_dh_blist[] = { - {"DGC", "RAID", "clariion" }, - {"DGC", "DISK", "clariion" }, - {"DGC", "VRAID", "clariion" }, + {"DGC", "RAID", "emc" }, + {"DGC", "DISK", "emc" }, + {"DGC", "VRAID", "emc" }, {"COMPAQ", "MSA1000 VOLUME", "hp_sw" }, {"COMPAQ", "HSV110", "hp_sw" }, diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c index 212e98d940bc..6f7128f49c30 100644 --- a/drivers/scsi/scsi_scan.c +++ b/drivers/scsi/scsi_scan.c @@ -1307,7 +1307,6 @@ static void scsi_sequential_lun_scan(struct scsi_target *starget, static int scsi_report_lun_scan(struct scsi_target *starget, int bflags, enum scsi_scan_mode rescan) { - char devname[64]; unsigned char scsi_cmd[MAX_COMMAND_SIZE]; unsigned int length; u64 lun; @@ -1349,9 +1348,6 @@ static int scsi_report_lun_scan(struct scsi_target *starget, int bflags, } } - sprintf(devname, "host %d channel %d id %d", - shost->host_no, sdev->channel, sdev->id); - /* * Allocate enough to hold the header (the same size as one scsi_lun) * plus the number of luns we are requesting. 511 was the default @@ -1470,12 +1466,12 @@ retry: out_err: kfree(lun_data); out: - scsi_device_put(sdev); if (scsi_device_created(sdev)) /* * the sdev we used didn't appear in the report luns scan */ __scsi_remove_device(sdev); + scsi_device_put(sdev); return ret; } diff --git a/drivers/scsi/st.c b/drivers/scsi/st.c index 7af5226aa55b..618422ea3a41 100644 --- a/drivers/scsi/st.c +++ b/drivers/scsi/st.c @@ -4922,9 +4922,8 @@ static int sgl_map_user_pages(struct st_buffer *STbp, res = get_user_pages_unlocked( uaddr, nr_pages, - rw == READ, - 0, /* don't force */ - pages); + pages, + rw == READ ? FOLL_WRITE : 0); /* don't force */ /* Errors and no page mapped should return here */ if (res < nr_pages) diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c index c29040fdf9a7..1091b9f1dd07 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c @@ -423,8 +423,7 @@ create_pagelist(char __user *buf, size_t count, unsigned short type, actual_pages = get_user_pages(task, task->mm, (unsigned long)buf & ~(PAGE_SIZE - 1), num_pages, - (type == PAGELIST_READ) /*Write */ , - 0 /*Force */ , + (type == PAGELIST_READ) ? FOLL_WRITE : 0, pages, NULL /*vmas */); up_read(&task->mm->mmap_sem); diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c index e11c0e07471b..7b6cd4d80621 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c @@ -1477,8 +1477,7 @@ dump_phys_mem(void *virt_addr, uint32_t num_bytes) current->mm, /* mm */ (unsigned long)virt_addr, /* start */ num_pages, /* len */ - 0, /* write */ - 0, /* force */ + 0, /* gup_flags */ pages, /* pages (array of page pointers) */ NULL); /* vmas */ up_read(¤t->mm->mmap_sem); diff --git a/drivers/target/iscsi/iscsi_target.c b/drivers/target/iscsi/iscsi_target.c index 39b928c2849d..b7d747e92c7a 100644 --- a/drivers/target/iscsi/iscsi_target.c +++ b/drivers/target/iscsi/iscsi_target.c @@ -1804,6 +1804,10 @@ int iscsit_process_nop_out(struct iscsi_conn *conn, struct iscsi_cmd *cmd, * Otherwise, initiator is not expecting a NOPIN is response. * Just ignore for now. */ + + if (cmd) + iscsit_free_cmd(cmd, false); + return 0; } EXPORT_SYMBOL(iscsit_process_nop_out); @@ -2982,7 +2986,7 @@ iscsit_build_nopin_rsp(struct iscsi_cmd *cmd, struct iscsi_conn *conn, pr_debug("Built NOPIN %s Response ITT: 0x%08x, TTT: 0x%08x," " StatSN: 0x%08x, Length %u\n", (nopout_response) ? - "Solicitied" : "Unsolicitied", cmd->init_task_tag, + "Solicited" : "Unsolicited", cmd->init_task_tag, cmd->targ_xfer_tag, cmd->stat_sn, cmd->buf_ptr_size); } EXPORT_SYMBOL(iscsit_build_nopin_rsp); diff --git a/drivers/target/iscsi/iscsi_target_login.c b/drivers/target/iscsi/iscsi_target_login.c index adf419fa4291..15f79a2ca34a 100644 --- a/drivers/target/iscsi/iscsi_target_login.c +++ b/drivers/target/iscsi/iscsi_target_login.c @@ -434,7 +434,7 @@ static int iscsi_login_zero_tsih_s2( /* * Make MaxRecvDataSegmentLength PAGE_SIZE aligned for - * Immediate Data + Unsolicitied Data-OUT if necessary.. + * Immediate Data + Unsolicited Data-OUT if necessary.. */ param = iscsi_find_param_from_key("MaxRecvDataSegmentLength", conn->param_list); @@ -646,7 +646,7 @@ static void iscsi_post_login_start_timers(struct iscsi_conn *conn) { struct iscsi_session *sess = conn->sess; /* - * FIXME: Unsolicitied NopIN support for ISER + * FIXME: Unsolicited NopIN support for ISER */ if (conn->conn_transport->transport_type == ISCSI_INFINIBAND) return; diff --git a/drivers/target/target_core_transport.c b/drivers/target/target_core_transport.c index 6094a6beddde..7dfefd66df93 100644 --- a/drivers/target/target_core_transport.c +++ b/drivers/target/target_core_transport.c @@ -754,15 +754,7 @@ EXPORT_SYMBOL(target_complete_cmd); void target_complete_cmd_with_length(struct se_cmd *cmd, u8 scsi_status, int length) { - if (scsi_status != SAM_STAT_GOOD) { - return; - } - - /* - * Calculate new residual count based upon length of SCSI data - * transferred. - */ - if (length < cmd->data_length) { + if (scsi_status == SAM_STAT_GOOD && length < cmd->data_length) { if (cmd->se_cmd_flags & SCF_UNDERFLOW_BIT) { cmd->residual_count += cmd->data_length - length; } else { @@ -771,12 +763,6 @@ void target_complete_cmd_with_length(struct se_cmd *cmd, u8 scsi_status, int len } cmd->data_length = length; - } else if (length > cmd->data_length) { - cmd->se_cmd_flags |= SCF_OVERFLOW_BIT; - cmd->residual_count = length - cmd->data_length; - } else { - cmd->se_cmd_flags &= ~(SCF_OVERFLOW_BIT | SCF_UNDERFLOW_BIT); - cmd->residual_count = 0; } target_complete_cmd(cmd, scsi_status); @@ -1706,6 +1692,7 @@ void transport_generic_request_failure(struct se_cmd *cmd, case TCM_LOGICAL_BLOCK_GUARD_CHECK_FAILED: case TCM_LOGICAL_BLOCK_APP_TAG_CHECK_FAILED: case TCM_LOGICAL_BLOCK_REF_TAG_CHECK_FAILED: + case TCM_COPY_TARGET_DEVICE_NOT_REACHABLE: break; case TCM_OUT_OF_RESOURCES: sense_reason = TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE; @@ -2547,8 +2534,12 @@ int target_get_sess_cmd(struct se_cmd *se_cmd, bool ack_kref) * fabric acknowledgement that requires two target_put_sess_cmd() * invocations before se_cmd descriptor release. */ - if (ack_kref) - kref_get(&se_cmd->cmd_kref); + if (ack_kref) { + if (!kref_get_unless_zero(&se_cmd->cmd_kref)) + return -EINVAL; + + se_cmd->se_cmd_flags |= SCF_ACK_KREF; + } spin_lock_irqsave(&se_sess->sess_cmd_lock, flags); if (se_sess->sess_tearing_down) { @@ -2627,7 +2618,7 @@ EXPORT_SYMBOL(target_put_sess_cmd); */ void target_sess_cmd_list_set_waiting(struct se_session *se_sess) { - struct se_cmd *se_cmd; + struct se_cmd *se_cmd, *tmp_cmd; unsigned long flags; int rc; @@ -2639,14 +2630,16 @@ void target_sess_cmd_list_set_waiting(struct se_session *se_sess) se_sess->sess_tearing_down = 1; list_splice_init(&se_sess->sess_cmd_list, &se_sess->sess_wait_list); - list_for_each_entry(se_cmd, &se_sess->sess_wait_list, se_cmd_list) { + list_for_each_entry_safe(se_cmd, tmp_cmd, + &se_sess->sess_wait_list, se_cmd_list) { rc = kref_get_unless_zero(&se_cmd->cmd_kref); if (rc) { se_cmd->cmd_wait_set = 1; spin_lock(&se_cmd->t_state_lock); se_cmd->transport_state |= CMD_T_FABRIC_STOP; spin_unlock(&se_cmd->t_state_lock); - } + } else + list_del_init(&se_cmd->se_cmd_list); } spin_unlock_irqrestore(&se_sess->sess_cmd_lock, flags); @@ -2871,6 +2864,12 @@ static const struct sense_info sense_info_table[] = { .ascq = 0x03, /* LOGICAL BLOCK REFERENCE TAG CHECK FAILED */ .add_sector_info = true, }, + [TCM_COPY_TARGET_DEVICE_NOT_REACHABLE] = { + .key = COPY_ABORTED, + .asc = 0x0d, + .ascq = 0x02, /* COPY TARGET DEVICE NOT REACHABLE */ + + }, [TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE] = { /* * Returning ILLEGAL REQUEST would cause immediate IO errors on diff --git a/drivers/target/target_core_user.c b/drivers/target/target_core_user.c index 62bf4fe5704a..47562509b489 100644 --- a/drivers/target/target_core_user.c +++ b/drivers/target/target_core_user.c @@ -96,7 +96,7 @@ struct tcmu_dev { size_t dev_size; u32 cmdr_size; u32 cmdr_last_cleaned; - /* Offset of data ring from start of mb */ + /* Offset of data area from start of mb */ /* Must add data_off and mb_addr to get the address */ size_t data_off; size_t data_size; @@ -349,7 +349,7 @@ static inline size_t spc_bitmap_free(unsigned long *bitmap) /* * We can't queue a command until we have space available on the cmd ring *and* - * space available on the data ring. + * space available on the data area. * * Called with ring lock held. */ @@ -389,7 +389,8 @@ static bool is_ring_space_avail(struct tcmu_dev *udev, size_t cmd_size, size_t d return true; } -static int tcmu_queue_cmd_ring(struct tcmu_cmd *tcmu_cmd) +static sense_reason_t +tcmu_queue_cmd_ring(struct tcmu_cmd *tcmu_cmd) { struct tcmu_dev *udev = tcmu_cmd->tcmu_dev; struct se_cmd *se_cmd = tcmu_cmd->se_cmd; @@ -405,7 +406,7 @@ static int tcmu_queue_cmd_ring(struct tcmu_cmd *tcmu_cmd) DECLARE_BITMAP(old_bitmap, DATA_BLOCK_BITS); if (test_bit(TCMU_DEV_BIT_BROKEN, &udev->flags)) - return -EINVAL; + return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE; /* * Must be a certain minimum size for response sense info, but @@ -432,11 +433,14 @@ static int tcmu_queue_cmd_ring(struct tcmu_cmd *tcmu_cmd) BUG_ON(!(se_cmd->t_bidi_data_sg && se_cmd->t_bidi_data_nents)); data_length += se_cmd->t_bidi_data_sg->length; } - if ((command_size > (udev->cmdr_size / 2)) - || data_length > udev->data_size) - pr_warn("TCMU: Request of size %zu/%zu may be too big for %u/%zu " - "cmd/data ring buffers\n", command_size, data_length, + if ((command_size > (udev->cmdr_size / 2)) || + data_length > udev->data_size) { + pr_warn("TCMU: Request of size %zu/%zu is too big for %u/%zu " + "cmd ring/data area\n", command_size, data_length, udev->cmdr_size, udev->data_size); + spin_unlock_irq(&udev->cmdr_lock); + return TCM_INVALID_CDB_FIELD; + } while (!is_ring_space_avail(udev, command_size, data_length)) { int ret; @@ -450,7 +454,7 @@ static int tcmu_queue_cmd_ring(struct tcmu_cmd *tcmu_cmd) finish_wait(&udev->wait_cmdr, &__wait); if (!ret) { pr_warn("tcmu: command timed out\n"); - return -ETIMEDOUT; + return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE; } spin_lock_irq(&udev->cmdr_lock); @@ -487,9 +491,7 @@ static int tcmu_queue_cmd_ring(struct tcmu_cmd *tcmu_cmd) bitmap_copy(old_bitmap, udev->data_bitmap, DATA_BLOCK_BITS); - /* - * Fix up iovecs, and handle if allocation in data ring wrapped. - */ + /* Handle allocating space from the data area */ iov = &entry->req.iov[0]; iov_cnt = 0; copy_to_data_area = (se_cmd->data_direction == DMA_TO_DEVICE @@ -526,10 +528,11 @@ static int tcmu_queue_cmd_ring(struct tcmu_cmd *tcmu_cmd) mod_timer(&udev->timeout, round_jiffies_up(jiffies + msecs_to_jiffies(TCMU_TIME_OUT))); - return 0; + return TCM_NO_SENSE; } -static int tcmu_queue_cmd(struct se_cmd *se_cmd) +static sense_reason_t +tcmu_queue_cmd(struct se_cmd *se_cmd) { struct se_device *se_dev = se_cmd->se_dev; struct tcmu_dev *udev = TCMU_DEV(se_dev); @@ -538,10 +541,10 @@ static int tcmu_queue_cmd(struct se_cmd *se_cmd) tcmu_cmd = tcmu_alloc_cmd(se_cmd); if (!tcmu_cmd) - return -ENOMEM; + return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE; ret = tcmu_queue_cmd_ring(tcmu_cmd); - if (ret < 0) { + if (ret != TCM_NO_SENSE) { pr_err("TCMU: Could not queue command\n"); spin_lock_irq(&udev->commands_lock); idr_remove(&udev->commands, tcmu_cmd->cmd_id); @@ -561,7 +564,7 @@ static void tcmu_handle_completion(struct tcmu_cmd *cmd, struct tcmu_cmd_entry * if (test_bit(TCMU_CMD_BIT_EXPIRED, &cmd->flags)) { /* * cmd has been completed already from timeout, just reclaim - * data ring space and free cmd + * data area space and free cmd */ free_data_area(udev, cmd); @@ -1129,20 +1132,9 @@ static sector_t tcmu_get_blocks(struct se_device *dev) } static sense_reason_t -tcmu_pass_op(struct se_cmd *se_cmd) -{ - int ret = tcmu_queue_cmd(se_cmd); - - if (ret != 0) - return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE; - else - return TCM_NO_SENSE; -} - -static sense_reason_t tcmu_parse_cdb(struct se_cmd *cmd) { - return passthrough_parse_cdb(cmd, tcmu_pass_op); + return passthrough_parse_cdb(cmd, tcmu_queue_cmd); } static const struct target_backend_ops tcmu_ops = { diff --git a/drivers/target/target_core_xcopy.c b/drivers/target/target_core_xcopy.c index 75cd85426ae3..094a1440eacb 100644 --- a/drivers/target/target_core_xcopy.c +++ b/drivers/target/target_core_xcopy.c @@ -104,7 +104,7 @@ static int target_xcopy_locate_se_dev_e4(struct se_cmd *se_cmd, struct xcopy_op } mutex_unlock(&g_device_mutex); - pr_err("Unable to locate 0xe4 descriptor for EXTENDED_COPY\n"); + pr_debug_ratelimited("Unable to locate 0xe4 descriptor for EXTENDED_COPY\n"); return -EINVAL; } @@ -185,7 +185,7 @@ static int target_xcopy_parse_tiddesc_e4(struct se_cmd *se_cmd, struct xcopy_op static int target_xcopy_parse_target_descriptors(struct se_cmd *se_cmd, struct xcopy_op *xop, unsigned char *p, - unsigned short tdll) + unsigned short tdll, sense_reason_t *sense_ret) { struct se_device *local_dev = se_cmd->se_dev; unsigned char *desc = p; @@ -193,6 +193,8 @@ static int target_xcopy_parse_target_descriptors(struct se_cmd *se_cmd, unsigned short start = 0; bool src = true; + *sense_ret = TCM_INVALID_PARAMETER_LIST; + if (offset != 0) { pr_err("XCOPY target descriptor list length is not" " multiple of %d\n", XCOPY_TARGET_DESC_LEN); @@ -243,9 +245,16 @@ static int target_xcopy_parse_target_descriptors(struct se_cmd *se_cmd, rc = target_xcopy_locate_se_dev_e4(se_cmd, xop, true); else rc = target_xcopy_locate_se_dev_e4(se_cmd, xop, false); - - if (rc < 0) + /* + * If a matching IEEE NAA 0x83 descriptor for the requested device + * is not located on this node, return COPY_ABORTED with ASQ/ASQC + * 0x0d/0x02 - COPY_TARGET_DEVICE_NOT_REACHABLE to request the + * initiator to fall back to normal copy method. + */ + if (rc < 0) { + *sense_ret = TCM_COPY_TARGET_DEVICE_NOT_REACHABLE; goto out; + } pr_debug("XCOPY TGT desc: Source dev: %p NAA IEEE WWN: 0x%16phN\n", xop->src_dev, &xop->src_tid_wwn[0]); @@ -653,6 +662,7 @@ static int target_xcopy_read_source( rc = target_xcopy_setup_pt_cmd(xpt_cmd, xop, src_dev, &cdb[0], remote_port, true); if (rc < 0) { + ec_cmd->scsi_status = xpt_cmd->se_cmd.scsi_status; transport_generic_free_cmd(se_cmd, 0); return rc; } @@ -664,6 +674,7 @@ static int target_xcopy_read_source( rc = target_xcopy_issue_pt_cmd(xpt_cmd); if (rc < 0) { + ec_cmd->scsi_status = xpt_cmd->se_cmd.scsi_status; transport_generic_free_cmd(se_cmd, 0); return rc; } @@ -714,6 +725,7 @@ static int target_xcopy_write_destination( remote_port, false); if (rc < 0) { struct se_cmd *src_cmd = &xop->src_pt_cmd->se_cmd; + ec_cmd->scsi_status = xpt_cmd->se_cmd.scsi_status; /* * If the failure happened before the t_mem_list hand-off in * target_xcopy_setup_pt_cmd(), Reset memory + clear flag so that @@ -729,6 +741,7 @@ static int target_xcopy_write_destination( rc = target_xcopy_issue_pt_cmd(xpt_cmd); if (rc < 0) { + ec_cmd->scsi_status = xpt_cmd->se_cmd.scsi_status; se_cmd->se_cmd_flags &= ~SCF_PASSTHROUGH_SG_TO_MEM_NOALLOC; transport_generic_free_cmd(se_cmd, 0); return rc; @@ -815,9 +828,14 @@ static void target_xcopy_do_work(struct work_struct *work) out: xcopy_pt_undepend_remotedev(xop); kfree(xop); - - pr_warn("target_xcopy_do_work: Setting X-COPY CHECK_CONDITION -> sending response\n"); - ec_cmd->scsi_status = SAM_STAT_CHECK_CONDITION; + /* + * Don't override an error scsi status if it has already been set + */ + if (ec_cmd->scsi_status == SAM_STAT_GOOD) { + pr_warn_ratelimited("target_xcopy_do_work: rc: %d, Setting X-COPY" + " CHECK_CONDITION -> sending response\n", rc); + ec_cmd->scsi_status = SAM_STAT_CHECK_CONDITION; + } target_complete_cmd(ec_cmd, SAM_STAT_CHECK_CONDITION); } @@ -875,7 +893,7 @@ sense_reason_t target_do_xcopy(struct se_cmd *se_cmd) " tdll: %hu sdll: %u inline_dl: %u\n", list_id, list_id_usage, tdll, sdll, inline_dl); - rc = target_xcopy_parse_target_descriptors(se_cmd, xop, &p[16], tdll); + rc = target_xcopy_parse_target_descriptors(se_cmd, xop, &p[16], tdll, &ret); if (rc <= 0) goto out; diff --git a/drivers/target/tcm_fc/tfc_cmd.c b/drivers/target/tcm_fc/tfc_cmd.c index 216e18cc9133..ff5de9a96643 100644 --- a/drivers/target/tcm_fc/tfc_cmd.c +++ b/drivers/target/tcm_fc/tfc_cmd.c @@ -572,10 +572,10 @@ static void ft_send_work(struct work_struct *work) if (target_submit_cmd(&cmd->se_cmd, cmd->sess->se_sess, fcp->fc_cdb, &cmd->ft_sense_buffer[0], scsilun_to_int(&fcp->fc_lun), ntohl(fcp->fc_dl), task_attr, data_dir, - TARGET_SCF_ACK_KREF)) + TARGET_SCF_ACK_KREF | TARGET_SCF_USE_CPUID)) goto err; - pr_debug("r_ctl %x alloc target_submit_cmd\n", fh->fh_r_ctl); + pr_debug("r_ctl %x target_submit_cmd %p\n", fh->fh_r_ctl, cmd); return; err: diff --git a/drivers/target/tcm_fc/tfc_sess.c b/drivers/target/tcm_fc/tfc_sess.c index 6ffbb603d912..fd5c3de79470 100644 --- a/drivers/target/tcm_fc/tfc_sess.c +++ b/drivers/target/tcm_fc/tfc_sess.c @@ -39,6 +39,11 @@ #include "tcm_fc.h" +#define TFC_SESS_DBG(lport, fmt, args...) \ + pr_debug("host%u: rport %6.6x: " fmt, \ + (lport)->host->host_no, \ + (lport)->port_id, ##args ) + static void ft_sess_delete_all(struct ft_tport *); /* @@ -167,24 +172,29 @@ static struct ft_sess *ft_sess_get(struct fc_lport *lport, u32 port_id) struct ft_tport *tport; struct hlist_head *head; struct ft_sess *sess; + char *reason = "no session created"; rcu_read_lock(); tport = rcu_dereference(lport->prov[FC_TYPE_FCP]); - if (!tport) + if (!tport) { + reason = "not an FCP port"; goto out; + } head = &tport->hash[ft_sess_hash(port_id)]; hlist_for_each_entry_rcu(sess, head, hash) { if (sess->port_id == port_id) { kref_get(&sess->kref); rcu_read_unlock(); - pr_debug("port_id %x found %p\n", port_id, sess); + TFC_SESS_DBG(lport, "port_id %x found %p\n", + port_id, sess); return sess; } } out: rcu_read_unlock(); - pr_debug("port_id %x not found\n", port_id); + TFC_SESS_DBG(lport, "port_id %x not found, %s\n", + port_id, reason); return NULL; } @@ -195,7 +205,7 @@ static int ft_sess_alloc_cb(struct se_portal_group *se_tpg, struct ft_tport *tport = sess->tport; struct hlist_head *head = &tport->hash[ft_sess_hash(sess->port_id)]; - pr_debug("port_id %x sess %p\n", sess->port_id, sess); + TFC_SESS_DBG(tport->lport, "port_id %x sess %p\n", sess->port_id, sess); hlist_add_head_rcu(&sess->hash, head); tport->sess_count++; @@ -223,7 +233,7 @@ static struct ft_sess *ft_sess_create(struct ft_tport *tport, u32 port_id, sess = kzalloc(sizeof(*sess), GFP_KERNEL); if (!sess) - return NULL; + return ERR_PTR(-ENOMEM); kref_init(&sess->kref); /* ref for table entry */ sess->tport = tport; @@ -234,8 +244,9 @@ static struct ft_sess *ft_sess_create(struct ft_tport *tport, u32 port_id, TARGET_PROT_NORMAL, &initiatorname[0], sess, ft_sess_alloc_cb); if (IS_ERR(sess->se_sess)) { + int rc = PTR_ERR(sess->se_sess); kfree(sess); - return NULL; + sess = ERR_PTR(rc); } return sess; } @@ -319,7 +330,7 @@ void ft_sess_close(struct se_session *se_sess) mutex_unlock(&ft_lport_lock); return; } - pr_debug("port_id %x\n", port_id); + TFC_SESS_DBG(sess->tport->lport, "port_id %x close session\n", port_id); ft_sess_unhash(sess); mutex_unlock(&ft_lport_lock); ft_close_sess(sess); @@ -379,8 +390,13 @@ static int ft_prli_locked(struct fc_rport_priv *rdata, u32 spp_len, if (!(fcp_parm & FCP_SPPF_INIT_FCN)) return FC_SPP_RESP_CONF; sess = ft_sess_create(tport, rdata->ids.port_id, rdata); - if (!sess) - return FC_SPP_RESP_RES; + if (IS_ERR(sess)) { + if (PTR_ERR(sess) == -EACCES) { + spp->spp_flags &= ~FC_SPP_EST_IMG_PAIR; + return FC_SPP_RESP_CONF; + } else + return FC_SPP_RESP_RES; + } if (!sess->params) rdata->prli_count++; sess->params = fcp_parm; @@ -423,8 +439,8 @@ static int ft_prli(struct fc_rport_priv *rdata, u32 spp_len, mutex_lock(&ft_lport_lock); ret = ft_prli_locked(rdata, spp_len, rspp, spp); mutex_unlock(&ft_lport_lock); - pr_debug("port_id %x flags %x ret %x\n", - rdata->ids.port_id, rspp ? rspp->spp_flags : 0, ret); + TFC_SESS_DBG(rdata->local_port, "port_id %x flags %x ret %x\n", + rdata->ids.port_id, rspp ? rspp->spp_flags : 0, ret); return ret; } @@ -477,11 +493,11 @@ static void ft_recv(struct fc_lport *lport, struct fc_frame *fp) struct ft_sess *sess; u32 sid = fc_frame_sid(fp); - pr_debug("sid %x\n", sid); + TFC_SESS_DBG(lport, "recv sid %x\n", sid); sess = ft_sess_get(lport, sid); if (!sess) { - pr_debug("sid %x sess lookup failed\n", sid); + TFC_SESS_DBG(lport, "sid %x sess lookup failed\n", sid); /* TBD XXX - if FCP_CMND, send PRLO */ fc_frame_free(fp); return; diff --git a/drivers/video/fbdev/pvr2fb.c b/drivers/video/fbdev/pvr2fb.c index 3b1ca4411073..a2564ab91e62 100644 --- a/drivers/video/fbdev/pvr2fb.c +++ b/drivers/video/fbdev/pvr2fb.c @@ -686,8 +686,8 @@ static ssize_t pvr2fb_write(struct fb_info *info, const char *buf, if (!pages) return -ENOMEM; - ret = get_user_pages_unlocked((unsigned long)buf, nr_pages, WRITE, - 0, pages); + ret = get_user_pages_unlocked((unsigned long)buf, nr_pages, pages, + FOLL_WRITE); if (ret < nr_pages) { nr_pages = ret; diff --git a/drivers/virt/fsl_hypervisor.c b/drivers/virt/fsl_hypervisor.c index 60bdad3a689b..150ce2abf6c8 100644 --- a/drivers/virt/fsl_hypervisor.c +++ b/drivers/virt/fsl_hypervisor.c @@ -245,8 +245,8 @@ static long ioctl_memcpy(struct fsl_hv_ioctl_memcpy __user *p) /* Get the physical addresses of the source buffer */ down_read(¤t->mm->mmap_sem); num_pinned = get_user_pages(param.local_vaddr - lb_offset, - num_pages, (param.source == -1) ? READ : WRITE, - 0, pages, NULL); + num_pages, (param.source == -1) ? 0 : FOLL_WRITE, + pages, NULL); up_read(¤t->mm->mmap_sem); if (num_pinned != num_pages) { diff --git a/drivers/watchdog/sa1100_wdt.c b/drivers/watchdog/sa1100_wdt.c index e1d39a1e9628..8965e3f536c3 100644 --- a/drivers/watchdog/sa1100_wdt.c +++ b/drivers/watchdog/sa1100_wdt.c @@ -22,6 +22,7 @@ #include <linux/module.h> #include <linux/moduleparam.h> +#include <linux/clk.h> #include <linux/types.h> #include <linux/kernel.h> #include <linux/fs.h> @@ -155,12 +156,27 @@ static struct miscdevice sa1100dog_miscdev = { }; static int margin __initdata = 60; /* (secs) Default is 1 minute */ +static struct clk *clk; static int __init sa1100dog_init(void) { int ret; - oscr_freq = get_clock_tick_rate(); + clk = clk_get(NULL, "OSTIMER0"); + if (IS_ERR(clk)) { + pr_err("SA1100/PXA2xx Watchdog Timer: clock not found: %d\n", + (int) PTR_ERR(clk)); + return PTR_ERR(clk); + } + + ret = clk_prepare_enable(clk); + if (ret) { + pr_err("SA1100/PXA2xx Watchdog Timer: clock failed to prepare+enable: %d\n", + ret); + goto err; + } + + oscr_freq = clk_get_rate(clk); /* * Read the reset status, and save it for later. If @@ -176,11 +192,17 @@ static int __init sa1100dog_init(void) pr_info("SA1100/PXA2xx Watchdog Timer: timer margin %d sec\n", margin); return ret; +err: + clk_disable_unprepare(clk); + clk_put(clk); + return ret; } static void __exit sa1100dog_exit(void) { misc_deregister(&sa1100dog_miscdev); + clk_disable_unprepare(clk); + clk_put(clk); } module_init(sa1100dog_init); diff --git a/drivers/watchdog/wdat_wdt.c b/drivers/watchdog/wdat_wdt.c index e473e3b23720..6d1fbda0f461 100644 --- a/drivers/watchdog/wdat_wdt.c +++ b/drivers/watchdog/wdat_wdt.c @@ -499,6 +499,10 @@ static int wdat_wdt_resume_noirq(struct device *dev) ret = wdat_wdt_enable_reboot(wdat); if (ret) return ret; + + ret = wdat_wdt_ping(&wdat->wdd); + if (ret) + return ret; } return wdat_wdt_start(&wdat->wdd); diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c index ccc70d96958d..d4d8b7e36b2f 100644 --- a/fs/btrfs/compression.c +++ b/fs/btrfs/compression.c @@ -698,7 +698,7 @@ int btrfs_submit_compressed_read(struct inode *inode, struct bio *bio, ret = btrfs_map_bio(root, comp_bio, mirror_num, 0); if (ret) { - bio->bi_error = ret; + comp_bio->bi_error = ret; bio_endio(comp_bio); } @@ -728,7 +728,7 @@ int btrfs_submit_compressed_read(struct inode *inode, struct bio *bio, ret = btrfs_map_bio(root, comp_bio, mirror_num, 0); if (ret) { - bio->bi_error = ret; + comp_bio->bi_error = ret; bio_endio(comp_bio); } diff --git a/fs/ceph/file.c b/fs/ceph/file.c index 7bf08825cc11..18630e800208 100644 --- a/fs/ceph/file.c +++ b/fs/ceph/file.c @@ -1272,7 +1272,8 @@ again: statret = __ceph_do_getattr(inode, page, CEPH_STAT_CAP_INLINE_DATA, !!page); if (statret < 0) { - __free_page(page); + if (page) + __free_page(page); if (statret == -ENODATA) { BUG_ON(retry_op != READ_INLINE); goto again; diff --git a/fs/ceph/inode.c b/fs/ceph/inode.c index bca1b49c1c4b..ef4d04647325 100644 --- a/fs/ceph/inode.c +++ b/fs/ceph/inode.c @@ -1511,7 +1511,8 @@ int ceph_readdir_prepopulate(struct ceph_mds_request *req, ceph_fill_dirfrag(d_inode(parent), rinfo->dir_dir); } - if (ceph_frag_is_leftmost(frag) && req->r_readdir_offset == 2) { + if (ceph_frag_is_leftmost(frag) && req->r_readdir_offset == 2 && + !(rinfo->hash_order && req->r_path2)) { /* note dir version at start of readdir so we can tell * if any dentries get dropped */ req->r_dir_release_cnt = atomic64_read(&ci->i_release_count); diff --git a/fs/ceph/super.c b/fs/ceph/super.c index a29ffce98187..b382e5910eea 100644 --- a/fs/ceph/super.c +++ b/fs/ceph/super.c @@ -845,6 +845,8 @@ static struct dentry *ceph_real_mount(struct ceph_fs_client *fsc) err = ceph_fs_debugfs_init(fsc); if (err < 0) goto fail; + } else { + root = dget(fsc->sb->s_root); } fsc->mount_state = CEPH_MOUNT_MOUNTED; diff --git a/fs/ceph/xattr.c b/fs/ceph/xattr.c index 40b703217977..febc28f9e2c2 100644 --- a/fs/ceph/xattr.c +++ b/fs/ceph/xattr.c @@ -16,7 +16,7 @@ static int __remove_xattr(struct ceph_inode_info *ci, struct ceph_inode_xattr *xattr); -const struct xattr_handler ceph_other_xattr_handler; +static const struct xattr_handler ceph_other_xattr_handler; /* * List of handlers for synthetic system.* attributes. Other @@ -1086,7 +1086,7 @@ static int ceph_set_xattr_handler(const struct xattr_handler *handler, return __ceph_setxattr(inode, name, value, size, flags); } -const struct xattr_handler ceph_other_xattr_handler = { +static const struct xattr_handler ceph_other_xattr_handler = { .prefix = "", /* match any name => handlers called with full name */ .get = ceph_get_xattr_handler, .set = ceph_set_xattr_handler, diff --git a/fs/crypto/crypto.c b/fs/crypto/crypto.c index 61057b7dbddb..98f87fe8f186 100644 --- a/fs/crypto/crypto.c +++ b/fs/crypto/crypto.c @@ -151,7 +151,10 @@ static int do_page_crypto(struct inode *inode, struct page *src_page, struct page *dest_page, gfp_t gfp_flags) { - u8 xts_tweak[FS_XTS_TWEAK_SIZE]; + struct { + __le64 index; + u8 padding[FS_XTS_TWEAK_SIZE - sizeof(__le64)]; + } xts_tweak; struct skcipher_request *req = NULL; DECLARE_FS_COMPLETION_RESULT(ecr); struct scatterlist dst, src; @@ -171,17 +174,15 @@ static int do_page_crypto(struct inode *inode, req, CRYPTO_TFM_REQ_MAY_BACKLOG | CRYPTO_TFM_REQ_MAY_SLEEP, page_crypt_complete, &ecr); - BUILD_BUG_ON(FS_XTS_TWEAK_SIZE < sizeof(index)); - memcpy(xts_tweak, &index, sizeof(index)); - memset(&xts_tweak[sizeof(index)], 0, - FS_XTS_TWEAK_SIZE - sizeof(index)); + BUILD_BUG_ON(sizeof(xts_tweak) != FS_XTS_TWEAK_SIZE); + xts_tweak.index = cpu_to_le64(index); + memset(xts_tweak.padding, 0, sizeof(xts_tweak.padding)); sg_init_table(&dst, 1); sg_set_page(&dst, dest_page, PAGE_SIZE, 0); sg_init_table(&src, 1); sg_set_page(&src, src_page, PAGE_SIZE, 0); - skcipher_request_set_crypt(req, &src, &dst, PAGE_SIZE, - xts_tweak); + skcipher_request_set_crypt(req, &src, &dst, PAGE_SIZE, &xts_tweak); if (rw == FS_DECRYPT) res = crypto_skcipher_decrypt(req); else diff --git a/fs/crypto/policy.c b/fs/crypto/policy.c index ed115acb5dee..6865663aac69 100644 --- a/fs/crypto/policy.c +++ b/fs/crypto/policy.c @@ -109,6 +109,8 @@ int fscrypt_process_policy(struct file *filp, if (ret) return ret; + inode_lock(inode); + if (!inode_has_encryption_context(inode)) { if (!S_ISDIR(inode->i_mode)) ret = -EINVAL; @@ -127,6 +129,8 @@ int fscrypt_process_policy(struct file *filp, ret = -EINVAL; } + inode_unlock(inode); + mnt_drop_write_file(filp); return ret; } diff --git a/fs/exec.c b/fs/exec.c index 6fcfb3f7b137..4e497b9ee71e 100644 --- a/fs/exec.c +++ b/fs/exec.c @@ -191,6 +191,7 @@ static struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos, { struct page *page; int ret; + unsigned int gup_flags = FOLL_FORCE; #ifdef CONFIG_STACK_GROWSUP if (write) { @@ -199,12 +200,16 @@ static struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos, return NULL; } #endif + + if (write) + gup_flags |= FOLL_WRITE; + /* * We are doing an exec(). 'current' is the process * doing the exec and bprm->mm is the new process's mm. */ - ret = get_user_pages_remote(current, bprm->mm, pos, 1, write, - 1, &page, NULL); + ret = get_user_pages_remote(current, bprm->mm, pos, 1, gup_flags, + &page, NULL); if (ret <= 0) return NULL; diff --git a/fs/ext2/inode.c b/fs/ext2/inode.c index d831e24dc885..41b8b44a391c 100644 --- a/fs/ext2/inode.c +++ b/fs/ext2/inode.c @@ -622,7 +622,7 @@ static int ext2_get_blocks(struct inode *inode, u32 *bno, bool *new, bool *boundary, int create) { - int err = -EIO; + int err; int offsets[4]; Indirect chain[4]; Indirect *partial; @@ -639,7 +639,7 @@ static int ext2_get_blocks(struct inode *inode, depth = ext2_block_to_path(inode,iblock,offsets,&blocks_to_boundary); if (depth == 0) - return (err); + return -EIO; partial = ext2_get_branch(inode, depth, offsets, chain, &err); /* Simplest case - block found, no allocation needed */ @@ -761,7 +761,6 @@ static int ext2_get_blocks(struct inode *inode, ext2_splice_branch(inode, iblock, partial, indirect_blks, count); mutex_unlock(&ei->truncate_mutex); got_it: - *bno = le32_to_cpu(chain[depth-1].key); if (count > blocks_to_boundary) *boundary = true; err = count; @@ -772,6 +771,8 @@ cleanup: brelse(partial->bh); partial--; } + if (err > 0) + *bno = le32_to_cpu(chain[depth-1].key); return err; } diff --git a/fs/ext4/block_validity.c b/fs/ext4/block_validity.c index 02ddec6d8a7d..fdb19543af1e 100644 --- a/fs/ext4/block_validity.c +++ b/fs/ext4/block_validity.c @@ -128,12 +128,12 @@ static void debug_print_tree(struct ext4_sb_info *sbi) node = rb_first(&sbi->system_blks); while (node) { entry = rb_entry(node, struct ext4_system_zone, node); - printk("%s%llu-%llu", first ? "" : ", ", + printk(KERN_CONT "%s%llu-%llu", first ? "" : ", ", entry->start_blk, entry->start_blk + entry->count - 1); first = 0; node = rb_next(node); } - printk("\n"); + printk(KERN_CONT "\n"); } int ext4_setup_system_zone(struct super_block *sb) diff --git a/fs/ext4/mballoc.h b/fs/ext4/mballoc.h index 3ef1df6ae9ec..1aba469f8220 100644 --- a/fs/ext4/mballoc.h +++ b/fs/ext4/mballoc.h @@ -27,16 +27,15 @@ #ifdef CONFIG_EXT4_DEBUG extern ushort ext4_mballoc_debug; -#define mb_debug(n, fmt, a...) \ - do { \ - if ((n) <= ext4_mballoc_debug) { \ - printk(KERN_DEBUG "(%s, %d): %s: ", \ - __FILE__, __LINE__, __func__); \ - printk(fmt, ## a); \ - } \ - } while (0) +#define mb_debug(n, fmt, ...) \ +do { \ + if ((n) <= ext4_mballoc_debug) { \ + printk(KERN_DEBUG "(%s, %d): %s: " fmt, \ + __FILE__, __LINE__, __func__, ##__VA_ARGS__); \ + } \ +} while (0) #else -#define mb_debug(n, fmt, a...) no_printk(fmt, ## a) +#define mb_debug(n, fmt, ...) no_printk(fmt, ##__VA_ARGS__) #endif #define EXT4_MB_HISTORY_ALLOC 1 /* allocation */ diff --git a/fs/ext4/namei.c b/fs/ext4/namei.c index f92f10d4f66a..104f8bfba718 100644 --- a/fs/ext4/namei.c +++ b/fs/ext4/namei.c @@ -577,12 +577,13 @@ static inline unsigned dx_node_limit(struct inode *dir) static void dx_show_index(char * label, struct dx_entry *entries) { int i, n = dx_get_count (entries); - printk(KERN_DEBUG "%s index ", label); + printk(KERN_DEBUG "%s index", label); for (i = 0; i < n; i++) { - printk("%x->%lu ", i ? dx_get_hash(entries + i) : - 0, (unsigned long)dx_get_block(entries + i)); + printk(KERN_CONT " %x->%lu", + i ? dx_get_hash(entries + i) : 0, + (unsigned long)dx_get_block(entries + i)); } - printk("\n"); + printk(KERN_CONT "\n"); } struct stats @@ -679,7 +680,7 @@ static struct stats dx_show_leaf(struct inode *dir, } de = ext4_next_entry(de, size); } - printk("(%i)\n", names); + printk(KERN_CONT "(%i)\n", names); return (struct stats) { names, space, 1 }; } @@ -798,7 +799,7 @@ dx_probe(struct ext4_filename *fname, struct inode *dir, q = entries + count - 1; while (p <= q) { m = p + (q - p) / 2; - dxtrace(printk(".")); + dxtrace(printk(KERN_CONT ".")); if (dx_get_hash(m) > hash) q = m - 1; else @@ -810,7 +811,7 @@ dx_probe(struct ext4_filename *fname, struct inode *dir, at = entries; while (n--) { - dxtrace(printk(",")); + dxtrace(printk(KERN_CONT ",")); if (dx_get_hash(++at) > hash) { at--; @@ -821,7 +822,8 @@ dx_probe(struct ext4_filename *fname, struct inode *dir, } at = p - 1; - dxtrace(printk(" %x->%u\n", at == entries ? 0 : dx_get_hash(at), + dxtrace(printk(KERN_CONT " %x->%u\n", + at == entries ? 0 : dx_get_hash(at), dx_get_block(at))); frame->entries = entries; frame->at = at; diff --git a/fs/ext4/super.c b/fs/ext4/super.c index 6db81fbcbaa6..20da99da0a34 100644 --- a/fs/ext4/super.c +++ b/fs/ext4/super.c @@ -597,14 +597,15 @@ void __ext4_std_error(struct super_block *sb, const char *function, void __ext4_abort(struct super_block *sb, const char *function, unsigned int line, const char *fmt, ...) { + struct va_format vaf; va_list args; save_error_info(sb, function, line); va_start(args, fmt); - printk(KERN_CRIT "EXT4-fs error (device %s): %s:%d: ", sb->s_id, - function, line); - vprintk(fmt, args); - printk("\n"); + vaf.fmt = fmt; + vaf.va = &args; + printk(KERN_CRIT "EXT4-fs error (device %s): %s:%d: %pV\n", + sb->s_id, function, line, &vaf); va_end(args); if ((sb->s_flags & MS_RDONLY) == 0) { @@ -2715,12 +2716,12 @@ static void print_daily_error_info(unsigned long arg) es->s_first_error_func, le32_to_cpu(es->s_first_error_line)); if (es->s_first_error_ino) - printk(": inode %u", + printk(KERN_CONT ": inode %u", le32_to_cpu(es->s_first_error_ino)); if (es->s_first_error_block) - printk(": block %llu", (unsigned long long) + printk(KERN_CONT ": block %llu", (unsigned long long) le64_to_cpu(es->s_first_error_block)); - printk("\n"); + printk(KERN_CONT "\n"); } if (es->s_last_error_time) { printk(KERN_NOTICE "EXT4-fs (%s): last error at time %u: %.*s:%d", @@ -2729,12 +2730,12 @@ static void print_daily_error_info(unsigned long arg) es->s_last_error_func, le32_to_cpu(es->s_last_error_line)); if (es->s_last_error_ino) - printk(": inode %u", + printk(KERN_CONT ": inode %u", le32_to_cpu(es->s_last_error_ino)); if (es->s_last_error_block) - printk(": block %llu", (unsigned long long) + printk(KERN_CONT ": block %llu", (unsigned long long) le64_to_cpu(es->s_last_error_block)); - printk("\n"); + printk(KERN_CONT "\n"); } mod_timer(&sbi->s_err_report, jiffies + 24*60*60*HZ); /* Once a day */ } diff --git a/fs/ext4/sysfs.c b/fs/ext4/sysfs.c index 73bcfd41f5f2..42145be5c6b4 100644 --- a/fs/ext4/sysfs.c +++ b/fs/ext4/sysfs.c @@ -223,14 +223,18 @@ static struct attribute *ext4_attrs[] = { EXT4_ATTR_FEATURE(lazy_itable_init); EXT4_ATTR_FEATURE(batched_discard); EXT4_ATTR_FEATURE(meta_bg_resize); +#ifdef CONFIG_EXT4_FS_ENCRYPTION EXT4_ATTR_FEATURE(encryption); +#endif EXT4_ATTR_FEATURE(metadata_csum_seed); static struct attribute *ext4_feat_attrs[] = { ATTR_LIST(lazy_itable_init), ATTR_LIST(batched_discard), ATTR_LIST(meta_bg_resize), +#ifdef CONFIG_EXT4_FS_ENCRYPTION ATTR_LIST(encryption), +#endif ATTR_LIST(metadata_csum_seed), NULL, }; diff --git a/fs/ext4/xattr.c b/fs/ext4/xattr.c index c15d63389957..d77be9e9f535 100644 --- a/fs/ext4/xattr.c +++ b/fs/ext4/xattr.c @@ -61,18 +61,12 @@ #include "acl.h" #ifdef EXT4_XATTR_DEBUG -# define ea_idebug(inode, f...) do { \ - printk(KERN_DEBUG "inode %s:%lu: ", \ - inode->i_sb->s_id, inode->i_ino); \ - printk(f); \ - printk("\n"); \ - } while (0) -# define ea_bdebug(bh, f...) do { \ - printk(KERN_DEBUG "block %pg:%lu: ", \ - bh->b_bdev, (unsigned long) bh->b_blocknr); \ - printk(f); \ - printk("\n"); \ - } while (0) +# define ea_idebug(inode, fmt, ...) \ + printk(KERN_DEBUG "inode %s:%lu: " fmt "\n", \ + inode->i_sb->s_id, inode->i_ino, ##__VA_ARGS__) +# define ea_bdebug(bh, fmt, ...) \ + printk(KERN_DEBUG "block %pg:%lu: " fmt "\n", \ + bh->b_bdev, (unsigned long)bh->b_blocknr, ##__VA_ARGS__) #else # define ea_idebug(inode, fmt, ...) no_printk(fmt, ##__VA_ARGS__) # define ea_bdebug(bh, fmt, ...) no_printk(fmt, ##__VA_ARGS__) @@ -241,7 +235,7 @@ __xattr_check_inode(struct inode *inode, struct ext4_xattr_ibody_header *header, int error = -EFSCORRUPTED; if (((void *) header >= end) || - (header->h_magic != le32_to_cpu(EXT4_XATTR_MAGIC))) + (header->h_magic != cpu_to_le32(EXT4_XATTR_MAGIC))) goto errout; error = ext4_xattr_check_names(entry, end, entry); errout: diff --git a/fs/f2fs/gc.c b/fs/f2fs/gc.c index 93985c64d8a8..6f14ee923acd 100644 --- a/fs/f2fs/gc.c +++ b/fs/f2fs/gc.c @@ -852,16 +852,16 @@ static int do_garbage_collect(struct f2fs_sb_info *sbi, for (segno = start_segno; segno < end_segno; segno++) { - if (get_valid_blocks(sbi, segno, 1) == 0 || - unlikely(f2fs_cp_error(sbi))) - goto next; - /* find segment summary of victim */ sum_page = find_get_page(META_MAPPING(sbi), GET_SUM_BLOCK(sbi, segno)); - f2fs_bug_on(sbi, !PageUptodate(sum_page)); f2fs_put_page(sum_page, 0); + if (get_valid_blocks(sbi, segno, 1) == 0 || + !PageUptodate(sum_page) || + unlikely(f2fs_cp_error(sbi))) + goto next; + sum = page_address(sum_page); f2fs_bug_on(sbi, type != GET_SUM_TYPE((&sum->footer))); diff --git a/fs/isofs/inode.c b/fs/isofs/inode.c index ad0c745ebad7..871c8b392099 100644 --- a/fs/isofs/inode.c +++ b/fs/isofs/inode.c @@ -687,6 +687,11 @@ static int isofs_fill_super(struct super_block *s, void *data, int silent) pri_bh = NULL; root_found: + /* We don't support read-write mounts */ + if (!(s->s_flags & MS_RDONLY)) { + error = -EACCES; + goto out_freebh; + } if (joliet_level && (pri == NULL || !opt.rock)) { /* This is the case of Joliet with the norock mount flag. @@ -1501,9 +1506,6 @@ struct inode *__isofs_iget(struct super_block *sb, static struct dentry *isofs_mount(struct file_system_type *fs_type, int flags, const char *dev_name, void *data) { - /* We don't support read-write mounts */ - if (!(flags & MS_RDONLY)) - return ERR_PTR(-EACCES); return mount_bdev(fs_type, flags, dev_name, data, isofs_fill_super); } diff --git a/fs/jbd2/transaction.c b/fs/jbd2/transaction.c index 3d8246a9faa4..e1652665bd93 100644 --- a/fs/jbd2/transaction.c +++ b/fs/jbd2/transaction.c @@ -1149,6 +1149,7 @@ int jbd2_journal_get_create_access(handle_t *handle, struct buffer_head *bh) JBUFFER_TRACE(jh, "file as BJ_Reserved"); spin_lock(&journal->j_list_lock); __jbd2_journal_file_buffer(jh, transaction, BJ_Reserved); + spin_unlock(&journal->j_list_lock); } else if (jh->b_transaction == journal->j_committing_transaction) { /* first access by this transaction */ jh->b_modified = 0; @@ -1156,8 +1157,8 @@ int jbd2_journal_get_create_access(handle_t *handle, struct buffer_head *bh) JBUFFER_TRACE(jh, "set next transaction"); spin_lock(&journal->j_list_lock); jh->b_next_transaction = transaction; + spin_unlock(&journal->j_list_lock); } - spin_unlock(&journal->j_list_lock); jbd_unlock_bh_state(bh); /* diff --git a/fs/locks.c b/fs/locks.c index ce93b416b490..22c5b4aa4961 100644 --- a/fs/locks.c +++ b/fs/locks.c @@ -1609,6 +1609,7 @@ int fcntl_getlease(struct file *filp) ctx = smp_load_acquire(&inode->i_flctx); if (ctx && !list_empty_careful(&ctx->flc_lease)) { + percpu_down_read_preempt_disable(&file_rwsem); spin_lock(&ctx->flc_lock); time_out_leases(inode, &dispose); list_for_each_entry(fl, &ctx->flc_lease, fl_list) { @@ -1618,6 +1619,8 @@ int fcntl_getlease(struct file *filp) break; } spin_unlock(&ctx->flc_lock); + percpu_up_read_preempt_enable(&file_rwsem); + locks_dispose_list(&dispose); } return type; @@ -2529,11 +2532,14 @@ locks_remove_lease(struct file *filp, struct file_lock_context *ctx) if (list_empty(&ctx->flc_lease)) return; + percpu_down_read_preempt_disable(&file_rwsem); spin_lock(&ctx->flc_lock); list_for_each_entry_safe(fl, tmp, &ctx->flc_lease, fl_list) if (filp == fl->fl_file) lease_modify(fl, F_UNLCK, &dispose); spin_unlock(&ctx->flc_lock); + percpu_up_read_preempt_enable(&file_rwsem); + locks_dispose_list(&dispose); } diff --git a/fs/nfs/blocklayout/blocklayout.c b/fs/nfs/blocklayout/blocklayout.c index 217847679f0e..2905479f214a 100644 --- a/fs/nfs/blocklayout/blocklayout.c +++ b/fs/nfs/blocklayout/blocklayout.c @@ -344,9 +344,10 @@ static void bl_write_cleanup(struct work_struct *work) u64 start = hdr->args.offset & (loff_t)PAGE_MASK; u64 end = (hdr->args.offset + hdr->args.count + PAGE_SIZE - 1) & (loff_t)PAGE_MASK; + u64 lwb = hdr->args.offset + hdr->args.count; ext_tree_mark_written(bl, start >> SECTOR_SHIFT, - (end - start) >> SECTOR_SHIFT, end); + (end - start) >> SECTOR_SHIFT, lwb); } pnfs_ld_write_done(hdr); diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c index ad917bd72b38..7897826d7c51 100644 --- a/fs/nfs/nfs4proc.c +++ b/fs/nfs/nfs4proc.c @@ -1545,7 +1545,7 @@ static int update_open_stateid(struct nfs4_state *state, struct nfs_client *clp = server->nfs_client; struct nfs_inode *nfsi = NFS_I(state->inode); struct nfs_delegation *deleg_cur; - nfs4_stateid freeme = {0}; + nfs4_stateid freeme = { }; int ret = 0; fmode &= (FMODE_READ|FMODE_WRITE); diff --git a/fs/proc/array.c b/fs/proc/array.c index 89600fd5963d..81818adb8e9e 100644 --- a/fs/proc/array.c +++ b/fs/proc/array.c @@ -412,10 +412,11 @@ static int do_task_stat(struct seq_file *m, struct pid_namespace *ns, mm = get_task_mm(task); if (mm) { vsize = task_vsize(mm); - if (permitted) { - eip = KSTK_EIP(task); - esp = KSTK_ESP(task); - } + /* + * esp and eip are intentionally zeroed out. There is no + * non-racy way to read them without freezing the task. + * Programs that need reliable values can use ptrace(2). + */ } get_task_comm(tcomm, task); diff --git a/fs/proc/base.c b/fs/proc/base.c index c2964d890c9a..8e654468ab67 100644 --- a/fs/proc/base.c +++ b/fs/proc/base.c @@ -252,7 +252,7 @@ static ssize_t proc_pid_cmdline_read(struct file *file, char __user *buf, * Inherently racy -- command line shares address space * with code and data. */ - rv = access_remote_vm(mm, arg_end - 1, &c, 1, 0); + rv = access_remote_vm(mm, arg_end - 1, &c, 1, FOLL_FORCE); if (rv <= 0) goto out_free_page; @@ -270,7 +270,8 @@ static ssize_t proc_pid_cmdline_read(struct file *file, char __user *buf, int nr_read; _count = min3(count, len, PAGE_SIZE); - nr_read = access_remote_vm(mm, p, page, _count, 0); + nr_read = access_remote_vm(mm, p, page, _count, + FOLL_FORCE); if (nr_read < 0) rv = nr_read; if (nr_read <= 0) @@ -305,7 +306,8 @@ static ssize_t proc_pid_cmdline_read(struct file *file, char __user *buf, bool final; _count = min3(count, len, PAGE_SIZE); - nr_read = access_remote_vm(mm, p, page, _count, 0); + nr_read = access_remote_vm(mm, p, page, _count, + FOLL_FORCE); if (nr_read < 0) rv = nr_read; if (nr_read <= 0) @@ -354,7 +356,8 @@ skip_argv: bool final; _count = min3(count, len, PAGE_SIZE); - nr_read = access_remote_vm(mm, p, page, _count, 0); + nr_read = access_remote_vm(mm, p, page, _count, + FOLL_FORCE); if (nr_read < 0) rv = nr_read; if (nr_read <= 0) @@ -832,6 +835,7 @@ static ssize_t mem_rw(struct file *file, char __user *buf, unsigned long addr = *ppos; ssize_t copied; char *page; + unsigned int flags = FOLL_FORCE; if (!mm) return 0; @@ -844,6 +848,9 @@ static ssize_t mem_rw(struct file *file, char __user *buf, if (!atomic_inc_not_zero(&mm->mm_users)) goto free; + if (write) + flags |= FOLL_WRITE; + while (count > 0) { int this_len = min_t(int, count, PAGE_SIZE); @@ -852,7 +859,7 @@ static ssize_t mem_rw(struct file *file, char __user *buf, break; } - this_len = access_remote_vm(mm, addr, page, this_len, write); + this_len = access_remote_vm(mm, addr, page, this_len, flags); if (!this_len) { if (!copied) copied = -EIO; @@ -965,7 +972,7 @@ static ssize_t environ_read(struct file *file, char __user *buf, this_len = min(max_len, this_len); retval = access_remote_vm(mm, (env_start + src), - page, this_len, 0); + page, this_len, FOLL_FORCE); if (retval <= 0) { ret = retval; diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c index 6909582ce5e5..35b92d81692f 100644 --- a/fs/proc/task_mmu.c +++ b/fs/proc/task_mmu.c @@ -266,24 +266,15 @@ static int do_maps_open(struct inode *inode, struct file *file, * /proc/PID/maps that is the stack of the main task. */ static int is_stack(struct proc_maps_private *priv, - struct vm_area_struct *vma, int is_pid) + struct vm_area_struct *vma) { - int stack = 0; - - if (is_pid) { - stack = vma->vm_start <= vma->vm_mm->start_stack && - vma->vm_end >= vma->vm_mm->start_stack; - } else { - struct inode *inode = priv->inode; - struct task_struct *task; - - rcu_read_lock(); - task = pid_task(proc_pid(inode), PIDTYPE_PID); - if (task) - stack = vma_is_stack_for_task(vma, task); - rcu_read_unlock(); - } - return stack; + /* + * We make no effort to guess what a given thread considers to be + * its "stack". It's not even well-defined for programs written + * languages like Go. + */ + return vma->vm_start <= vma->vm_mm->start_stack && + vma->vm_end >= vma->vm_mm->start_stack; } static void @@ -354,7 +345,7 @@ show_map_vma(struct seq_file *m, struct vm_area_struct *vma, int is_pid) goto done; } - if (is_stack(priv, vma, is_pid)) + if (is_stack(priv, vma)) name = "[stack]"; } @@ -1669,7 +1660,7 @@ static int show_numa_map(struct seq_file *m, void *v, int is_pid) seq_file_path(m, file, "\n\t= "); } else if (vma->vm_start <= mm->brk && vma->vm_end >= mm->start_brk) { seq_puts(m, " heap"); - } else if (is_stack(proc_priv, vma, is_pid)) { + } else if (is_stack(proc_priv, vma)) { seq_puts(m, " stack"); } diff --git a/fs/proc/task_nommu.c b/fs/proc/task_nommu.c index faacb0c0d857..37175621e890 100644 --- a/fs/proc/task_nommu.c +++ b/fs/proc/task_nommu.c @@ -124,25 +124,17 @@ unsigned long task_statm(struct mm_struct *mm, } static int is_stack(struct proc_maps_private *priv, - struct vm_area_struct *vma, int is_pid) + struct vm_area_struct *vma) { struct mm_struct *mm = vma->vm_mm; - int stack = 0; - - if (is_pid) { - stack = vma->vm_start <= mm->start_stack && - vma->vm_end >= mm->start_stack; - } else { - struct inode *inode = priv->inode; - struct task_struct *task; - - rcu_read_lock(); - task = pid_task(proc_pid(inode), PIDTYPE_PID); - if (task) - stack = vma_is_stack_for_task(vma, task); - rcu_read_unlock(); - } - return stack; + + /* + * We make no effort to guess what a given thread considers to be + * its "stack". It's not even well-defined for programs written + * languages like Go. + */ + return vma->vm_start <= mm->start_stack && + vma->vm_end >= mm->start_stack; } /* @@ -184,7 +176,7 @@ static int nommu_vma_show(struct seq_file *m, struct vm_area_struct *vma, if (file) { seq_pad(m, ' '); seq_file_path(m, file, ""); - } else if (mm && is_stack(priv, vma, is_pid)) { + } else if (mm && is_stack(priv, vma)) { seq_pad(m, ' '); seq_printf(m, "[stack]"); } diff --git a/fs/ubifs/dir.c b/fs/ubifs/dir.c index c8f60df2733e..bd4a5e8ce441 100644 --- a/fs/ubifs/dir.c +++ b/fs/ubifs/dir.c @@ -439,7 +439,7 @@ static unsigned int vfs_dent_type(uint8_t type) */ static int ubifs_readdir(struct file *file, struct dir_context *ctx) { - int err; + int err = 0; struct qstr nm; union ubifs_key key; struct ubifs_dent_node *dent; @@ -541,14 +541,12 @@ out: kfree(file->private_data); file->private_data = NULL; - if (err != -ENOENT) { + if (err != -ENOENT) ubifs_err(c, "cannot find next direntry, error %d", err); - return err; - } /* 2 is a special value indicating that there are no more direntries */ ctx->pos = 2; - return 0; + return err; } /* Free saved readdir() state when the directory is closed */ @@ -1060,9 +1058,9 @@ static void unlock_4_inodes(struct inode *inode1, struct inode *inode2, mutex_unlock(&ubifs_inode(inode1)->ui_mutex); } -static int ubifs_rename(struct inode *old_dir, struct dentry *old_dentry, - struct inode *new_dir, struct dentry *new_dentry, - unsigned int flags) +static int do_rename(struct inode *old_dir, struct dentry *old_dentry, + struct inode *new_dir, struct dentry *new_dentry, + unsigned int flags) { struct ubifs_info *c = old_dir->i_sb->s_fs_info; struct inode *old_inode = d_inode(old_dentry); @@ -1323,7 +1321,7 @@ static int ubifs_xrename(struct inode *old_dir, struct dentry *old_dentry, return err; } -static int ubifs_rename2(struct inode *old_dir, struct dentry *old_dentry, +static int ubifs_rename(struct inode *old_dir, struct dentry *old_dentry, struct inode *new_dir, struct dentry *new_dentry, unsigned int flags) { @@ -1336,7 +1334,7 @@ static int ubifs_rename2(struct inode *old_dir, struct dentry *old_dentry, if (flags & RENAME_EXCHANGE) return ubifs_xrename(old_dir, old_dentry, new_dir, new_dentry); - return ubifs_rename(old_dir, old_dentry, new_dir, new_dentry, flags); + return do_rename(old_dir, old_dentry, new_dir, new_dentry, flags); } int ubifs_getattr(struct vfsmount *mnt, struct dentry *dentry, @@ -1387,7 +1385,7 @@ const struct inode_operations ubifs_dir_inode_operations = { .mkdir = ubifs_mkdir, .rmdir = ubifs_rmdir, .mknod = ubifs_mknod, - .rename = ubifs_rename2, + .rename = ubifs_rename, .setattr = ubifs_setattr, .getattr = ubifs_getattr, .listxattr = ubifs_listxattr, diff --git a/fs/ubifs/xattr.c b/fs/ubifs/xattr.c index 6c2f4d41ed73..d9f9615bfd71 100644 --- a/fs/ubifs/xattr.c +++ b/fs/ubifs/xattr.c @@ -172,6 +172,7 @@ out_cancel: host_ui->xattr_cnt -= 1; host_ui->xattr_size -= CALC_DENT_SIZE(nm->len); host_ui->xattr_size -= CALC_XATTR_BYTES(size); + host_ui->xattr_names -= nm->len; mutex_unlock(&host_ui->ui_mutex); out_free: make_bad_inode(inode); @@ -478,6 +479,7 @@ out_cancel: host_ui->xattr_cnt += 1; host_ui->xattr_size += CALC_DENT_SIZE(nm->len); host_ui->xattr_size += CALC_XATTR_BYTES(ui->data_len); + host_ui->xattr_names += nm->len; mutex_unlock(&host_ui->ui_mutex); ubifs_release_budget(c, &req); make_bad_inode(inode); diff --git a/include/acpi/pcc.h b/include/acpi/pcc.h index 17a940a14477..8caa79c61703 100644 --- a/include/acpi/pcc.h +++ b/include/acpi/pcc.h @@ -21,7 +21,7 @@ extern void pcc_mbox_free_channel(struct mbox_chan *chan); static inline struct mbox_chan *pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id) { - return NULL; + return ERR_PTR(-ENODEV); } static inline void pcc_mbox_free_channel(struct mbox_chan *chan) { } #endif diff --git a/include/clocksource/pxa.h b/include/clocksource/pxa.h index 1efbe5a66958..a9a0f03024a4 100644 --- a/include/clocksource/pxa.h +++ b/include/clocksource/pxa.h @@ -12,7 +12,6 @@ #ifndef _CLOCKSOURCE_PXA_H #define _CLOCKSOURCE_PXA_H -extern void pxa_timer_nodt_init(int irq, void __iomem *base, - unsigned long clock_tick_rate); +extern void pxa_timer_nodt_init(int irq, void __iomem *base); #endif diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index 5fa55fc56e18..32dc0cbd51ca 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h @@ -677,10 +677,10 @@ static inline int cpufreq_table_find_index_dl(struct cpufreq_policy *policy, if (best == table - 1) return pos - table; - return best - pos; + return best - table; } - return best - pos; + return best - table; } /* Works only on sorted freq-tables */ diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h index 9b207a8c5af3..afe641c02dca 100644 --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h @@ -81,6 +81,7 @@ enum cpuhp_state { CPUHP_AP_ARM_ARCH_TIMER_STARTING, CPUHP_AP_ARM_GLOBAL_TIMER_STARTING, CPUHP_AP_DUMMY_TIMER_STARTING, + CPUHP_AP_JCORE_TIMER_STARTING, CPUHP_AP_EXYNOS4_MCT_TIMER_STARTING, CPUHP_AP_ARM_TWD_STARTING, CPUHP_AP_METAG_TIMER_STARTING, diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index 8361c8d3edd1..b7e34313cdfe 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -290,7 +290,7 @@ #define GITS_BASER_TYPE_SHIFT (56) #define GITS_BASER_TYPE(r) (((r) >> GITS_BASER_TYPE_SHIFT) & 7) #define GITS_BASER_ENTRY_SIZE_SHIFT (48) -#define GITS_BASER_ENTRY_SIZE(r) ((((r) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0xff) + 1) +#define GITS_BASER_ENTRY_SIZE(r) ((((r) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0x1f) + 1) #define GITS_BASER_SHAREABILITY_SHIFT (10) #define GITS_BASER_InnerShareable \ GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) diff --git a/include/linux/kasan.h b/include/linux/kasan.h index d600303306eb..820c0ad54a01 100644 --- a/include/linux/kasan.h +++ b/include/linux/kasan.h @@ -44,6 +44,7 @@ static inline void kasan_disable_current(void) void kasan_unpoison_shadow(const void *address, size_t size); void kasan_unpoison_task_stack(struct task_struct *task); +void kasan_unpoison_stack_above_sp_to(const void *watermark); void kasan_alloc_pages(struct page *page, unsigned int order); void kasan_free_pages(struct page *page, unsigned int order); @@ -85,6 +86,7 @@ size_t kasan_metadata_size(struct kmem_cache *cache); static inline void kasan_unpoison_shadow(const void *address, size_t size) {} static inline void kasan_unpoison_task_stack(struct task_struct *task) {} +static inline void kasan_unpoison_stack_above_sp_to(const void *watermark) {} static inline void kasan_enable_current(void) {} static inline void kasan_disable_current(void) {} diff --git a/include/linux/mm.h b/include/linux/mm.h index e9caec6a51e9..3a191853faaa 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -1266,9 +1266,10 @@ static inline int fixup_user_fault(struct task_struct *tsk, } #endif -extern int access_process_vm(struct task_struct *tsk, unsigned long addr, void *buf, int len, int write); +extern int access_process_vm(struct task_struct *tsk, unsigned long addr, void *buf, int len, + unsigned int gup_flags); extern int access_remote_vm(struct mm_struct *mm, unsigned long addr, - void *buf, int len, int write); + void *buf, int len, unsigned int gup_flags); long __get_user_pages(struct task_struct *tsk, struct mm_struct *mm, unsigned long start, unsigned long nr_pages, @@ -1276,19 +1277,18 @@ long __get_user_pages(struct task_struct *tsk, struct mm_struct *mm, struct vm_area_struct **vmas, int *nonblocking); long get_user_pages_remote(struct task_struct *tsk, struct mm_struct *mm, unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, + unsigned int gup_flags, struct page **pages, struct vm_area_struct **vmas); long get_user_pages(unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, + unsigned int gup_flags, struct page **pages, struct vm_area_struct **vmas); long get_user_pages_locked(unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, int *locked); + unsigned int gup_flags, struct page **pages, int *locked); long __get_user_pages_unlocked(struct task_struct *tsk, struct mm_struct *mm, unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, - unsigned int gup_flags); + struct page **pages, unsigned int gup_flags); long get_user_pages_unlocked(unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages); + struct page **pages, unsigned int gup_flags); int get_user_pages_fast(unsigned long start, int nr_pages, int write, struct page **pages); @@ -1306,7 +1306,7 @@ struct frame_vector { struct frame_vector *frame_vector_create(unsigned int nr_frames); void frame_vector_destroy(struct frame_vector *vec); int get_vaddr_frames(unsigned long start, unsigned int nr_pfns, - bool write, bool force, struct frame_vector *vec); + unsigned int gup_flags, struct frame_vector *vec); void put_vaddr_frames(struct frame_vector *vec); int frame_vector_to_pages(struct frame_vector *vec); void frame_vector_to_pfns(struct frame_vector *vec); @@ -1391,7 +1391,7 @@ static inline int stack_guard_page_end(struct vm_area_struct *vma, !vma_growsup(vma->vm_next, addr); } -int vma_is_stack_for_task(struct vm_area_struct *vma, struct task_struct *t); +int vma_is_stack_for_current(struct vm_area_struct *vma); extern unsigned long move_page_tables(struct vm_area_struct *vma, unsigned long old_addr, struct vm_area_struct *new_vma, @@ -2232,6 +2232,7 @@ static inline struct page *follow_page(struct vm_area_struct *vma, #define FOLL_TRIED 0x800 /* a retry, previous pass started an IO */ #define FOLL_MLOCK 0x1000 /* lock present pages */ #define FOLL_REMOTE 0x2000 /* we are working on non-current tsk/mm */ +#define FOLL_COW 0x4000 /* internal GUP flag */ typedef int (*pte_fn_t)(pte_t *pte, pgtable_t token, unsigned long addr, void *data); diff --git a/include/linux/nvme.h b/include/linux/nvme.h index 7676557ce357..fc3c24206593 100644 --- a/include/linux/nvme.h +++ b/include/linux/nvme.h @@ -16,7 +16,6 @@ #define _LINUX_NVME_H #include <linux/types.h> -#include <linux/uuid.h> /* NQN names in commands fields specified one size */ #define NVMF_NQN_FIELD_LEN 256 @@ -182,7 +181,7 @@ struct nvme_id_ctrl { char fr[8]; __u8 rab; __u8 ieee[3]; - __u8 mic; + __u8 cmic; __u8 mdts; __le16 cntlid; __le32 ver; @@ -202,7 +201,13 @@ struct nvme_id_ctrl { __u8 apsta; __le16 wctemp; __le16 cctemp; - __u8 rsvd270[50]; + __le16 mtfa; + __le32 hmpre; + __le32 hmmin; + __u8 tnvmcap[16]; + __u8 unvmcap[16]; + __le32 rpmbs; + __u8 rsvd316[4]; __le16 kas; __u8 rsvd322[190]; __u8 sqes; @@ -267,7 +272,7 @@ struct nvme_id_ns { __le16 nabo; __le16 nabspf; __u16 rsvd46; - __le64 nvmcap[2]; + __u8 nvmcap[16]; __u8 rsvd64[40]; __u8 nguid[16]; __u8 eui64[8]; @@ -277,6 +282,16 @@ struct nvme_id_ns { }; enum { + NVME_ID_CNS_NS = 0x00, + NVME_ID_CNS_CTRL = 0x01, + NVME_ID_CNS_NS_ACTIVE_LIST = 0x02, + NVME_ID_CNS_NS_PRESENT_LIST = 0x10, + NVME_ID_CNS_NS_PRESENT = 0x11, + NVME_ID_CNS_CTRL_NS_LIST = 0x12, + NVME_ID_CNS_CTRL_LIST = 0x13, +}; + +enum { NVME_NS_FEAT_THIN = 1 << 0, NVME_NS_FLBAS_LBA_MASK = 0xf, NVME_NS_FLBAS_META_EXT = 0x10, @@ -556,8 +571,10 @@ enum nvme_admin_opcode { nvme_admin_set_features = 0x09, nvme_admin_get_features = 0x0a, nvme_admin_async_event = 0x0c, + nvme_admin_ns_mgmt = 0x0d, nvme_admin_activate_fw = 0x10, nvme_admin_download_fw = 0x11, + nvme_admin_ns_attach = 0x15, nvme_admin_keep_alive = 0x18, nvme_admin_format_nvm = 0x80, nvme_admin_security_send = 0x81, @@ -583,6 +600,7 @@ enum { NVME_FEAT_WRITE_ATOMIC = 0x0a, NVME_FEAT_ASYNC_EVENT = 0x0b, NVME_FEAT_AUTO_PST = 0x0c, + NVME_FEAT_HOST_MEM_BUF = 0x0d, NVME_FEAT_KATO = 0x0f, NVME_FEAT_SW_PROGRESS = 0x80, NVME_FEAT_HOST_ID = 0x81, @@ -745,7 +763,7 @@ struct nvmf_common_command { struct nvmf_disc_rsp_page_entry { __u8 trtype; __u8 adrfam; - __u8 nqntype; + __u8 subtype; __u8 treq; __le16 portid; __le16 cntlid; @@ -794,7 +812,7 @@ struct nvmf_connect_command { }; struct nvmf_connect_data { - uuid_be hostid; + __u8 hostid[16]; __le16 cntlid; char resv4[238]; char subsysnqn[NVMF_NQN_FIELD_LEN]; @@ -905,12 +923,23 @@ enum { NVME_SC_INVALID_VECTOR = 0x108, NVME_SC_INVALID_LOG_PAGE = 0x109, NVME_SC_INVALID_FORMAT = 0x10a, - NVME_SC_FIRMWARE_NEEDS_RESET = 0x10b, + NVME_SC_FW_NEEDS_CONV_RESET = 0x10b, NVME_SC_INVALID_QUEUE = 0x10c, NVME_SC_FEATURE_NOT_SAVEABLE = 0x10d, NVME_SC_FEATURE_NOT_CHANGEABLE = 0x10e, NVME_SC_FEATURE_NOT_PER_NS = 0x10f, - NVME_SC_FW_NEEDS_RESET_SUBSYS = 0x110, + NVME_SC_FW_NEEDS_SUBSYS_RESET = 0x110, + NVME_SC_FW_NEEDS_RESET = 0x111, + NVME_SC_FW_NEEDS_MAX_TIME = 0x112, + NVME_SC_FW_ACIVATE_PROHIBITED = 0x113, + NVME_SC_OVERLAPPING_RANGE = 0x114, + NVME_SC_NS_INSUFFICENT_CAP = 0x115, + NVME_SC_NS_ID_UNAVAILABLE = 0x116, + NVME_SC_NS_ALREADY_ATTACHED = 0x118, + NVME_SC_NS_IS_PRIVATE = 0x119, + NVME_SC_NS_NOT_ATTACHED = 0x11a, + NVME_SC_THIN_PROV_NOT_SUPP = 0x11b, + NVME_SC_CTRL_LIST_INVALID = 0x11c, /* * I/O Command Set Specific - NVM commands: @@ -941,6 +970,7 @@ enum { NVME_SC_REFTAG_CHECK = 0x284, NVME_SC_COMPARE_FAILED = 0x285, NVME_SC_ACCESS_DENIED = 0x286, + NVME_SC_UNWRITTEN_BLOCK = 0x287, NVME_SC_DNR = 0x4000, }; @@ -960,6 +990,7 @@ struct nvme_completion { __le16 status; /* did the command fail, and if so, why? */ }; -#define NVME_VS(major, minor) (((major) << 16) | ((minor) << 8)) +#define NVME_VS(major, minor, tertiary) \ + (((major) << 16) | ((minor) << 8) | (tertiary)) #endif /* _LINUX_NVME_H */ diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h index 0d7abb8b7315..91a740f6b884 100644 --- a/include/linux/syscalls.h +++ b/include/linux/syscalls.h @@ -902,8 +902,5 @@ asmlinkage long sys_pkey_mprotect(unsigned long start, size_t len, unsigned long prot, int pkey); asmlinkage long sys_pkey_alloc(unsigned long flags, unsigned long init_val); asmlinkage long sys_pkey_free(int pkey); -//asmlinkage long sys_pkey_get(int pkey, unsigned long flags); -//asmlinkage long sys_pkey_set(int pkey, unsigned long access_rights, -// unsigned long flags); #endif diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h index 45f004e9cc59..2873baf5372a 100644 --- a/include/linux/thread_info.h +++ b/include/linux/thread_info.h @@ -14,17 +14,6 @@ struct timespec; struct compat_timespec; #ifdef CONFIG_THREAD_INFO_IN_TASK -struct thread_info { - unsigned long flags; /* low level flags */ -}; - -#define INIT_THREAD_INFO(tsk) \ -{ \ - .flags = 0, \ -} -#endif - -#ifdef CONFIG_THREAD_INFO_IN_TASK #define current_thread_info() ((struct thread_info *)current) #endif diff --git a/include/target/target_core_base.h b/include/target/target_core_base.h index fb8e3b6febdf..c2119008990a 100644 --- a/include/target/target_core_base.h +++ b/include/target/target_core_base.h @@ -177,6 +177,7 @@ enum tcm_sense_reason_table { TCM_LOGICAL_BLOCK_GUARD_CHECK_FAILED = R(0x15), TCM_LOGICAL_BLOCK_APP_TAG_CHECK_FAILED = R(0x16), TCM_LOGICAL_BLOCK_REF_TAG_CHECK_FAILED = R(0x17), + TCM_COPY_TARGET_DEVICE_NOT_REACHABLE = R(0x18), #undef R }; diff --git a/include/uapi/asm-generic/unistd.h b/include/uapi/asm-generic/unistd.h index dbfee7e86ba6..9b1462e38b82 100644 --- a/include/uapi/asm-generic/unistd.h +++ b/include/uapi/asm-generic/unistd.h @@ -730,10 +730,6 @@ __SYSCALL(__NR_pkey_mprotect, sys_pkey_mprotect) __SYSCALL(__NR_pkey_alloc, sys_pkey_alloc) #define __NR_pkey_free 290 __SYSCALL(__NR_pkey_free, sys_pkey_free) -#define __NR_pkey_get 291 -//__SYSCALL(__NR_pkey_get, sys_pkey_get) -#define __NR_pkey_set 292 -//__SYSCALL(__NR_pkey_set, sys_pkey_set) #undef __NR_syscalls #define __NR_syscalls 291 diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild index 6965d0909554..cd2be1c8e9fb 100644 --- a/include/uapi/linux/Kbuild +++ b/include/uapi/linux/Kbuild @@ -75,6 +75,7 @@ header-y += bpf_perf_event.h header-y += bpf.h header-y += bpqether.h header-y += bsg.h +header-y += bt-bmc.h header-y += btrfs.h header-y += can.h header-y += capability.h diff --git a/include/uapi/linux/bt-bmc.h b/include/uapi/linux/bt-bmc.h new file mode 100644 index 000000000000..d9ec766a63d0 --- /dev/null +++ b/include/uapi/linux/bt-bmc.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2015-2016, IBM Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef _UAPI_LINUX_BT_BMC_H +#define _UAPI_LINUX_BT_BMC_H + +#include <linux/ioctl.h> + +#define __BT_BMC_IOCTL_MAGIC 0xb1 +#define BT_BMC_IOCTL_SMS_ATN _IO(__BT_BMC_IOCTL_MAGIC, 0x00) + +#endif /* _UAPI_LINUX_BT_BMC_H */ diff --git a/kernel/cpu.c b/kernel/cpu.c index 5df20d6d1520..29de1a9352c0 100644 --- a/kernel/cpu.c +++ b/kernel/cpu.c @@ -228,7 +228,7 @@ static struct { .wq = __WAIT_QUEUE_HEAD_INITIALIZER(cpu_hotplug.wq), .lock = __MUTEX_INITIALIZER(cpu_hotplug.lock), #ifdef CONFIG_DEBUG_LOCK_ALLOC - .dep_map = {.name = "cpu_hotplug.lock" }, + .dep_map = STATIC_LOCKDEP_MAP_INIT("cpu_hotplug.dep_map", &cpu_hotplug.dep_map), #endif }; diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c index d4129bb05e5d..f9ec9add2164 100644 --- a/kernel/events/uprobes.c +++ b/kernel/events/uprobes.c @@ -300,7 +300,8 @@ int uprobe_write_opcode(struct mm_struct *mm, unsigned long vaddr, retry: /* Read the page with vaddr into memory */ - ret = get_user_pages_remote(NULL, mm, vaddr, 1, 0, 1, &old_page, &vma); + ret = get_user_pages_remote(NULL, mm, vaddr, 1, FOLL_FORCE, &old_page, + &vma); if (ret <= 0) return ret; @@ -1710,7 +1711,8 @@ static int is_trap_at_addr(struct mm_struct *mm, unsigned long vaddr) * but we treat this as a 'remote' access since it is * essentially a kernel access to the memory. */ - result = get_user_pages_remote(NULL, mm, vaddr, 1, 0, 1, &page, NULL); + result = get_user_pages_remote(NULL, mm, vaddr, 1, FOLL_FORCE, &page, + NULL); if (result < 0) return result; diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index 0c5f1a5db654..9c4d30483264 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -721,6 +721,7 @@ int irq_set_parent(int irq, int parent_irq) irq_put_desc_unlock(desc, flags); return 0; } +EXPORT_SYMBOL_GPL(irq_set_parent); #endif /* diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c index d5e397315473..de08fc90baaf 100644 --- a/kernel/printk/printk.c +++ b/kernel/printk/printk.c @@ -1769,6 +1769,10 @@ static size_t log_output(int facility, int level, enum log_flags lflags, const c cont_flush(); } + /* Skip empty continuation lines that couldn't be added - they just flush */ + if (!text_len && (lflags & LOG_CONT)) + return 0; + /* If it doesn't end in a newline, try to buffer the current line */ if (!(lflags & LOG_NEWLINE)) { if (cont_add(facility, level, lflags, text, text_len)) diff --git a/kernel/ptrace.c b/kernel/ptrace.c index 2a99027312a6..e6474f7272ec 100644 --- a/kernel/ptrace.c +++ b/kernel/ptrace.c @@ -537,7 +537,7 @@ int ptrace_readdata(struct task_struct *tsk, unsigned long src, char __user *dst int this_len, retval; this_len = (len > sizeof(buf)) ? sizeof(buf) : len; - retval = access_process_vm(tsk, src, buf, this_len, 0); + retval = access_process_vm(tsk, src, buf, this_len, FOLL_FORCE); if (!retval) { if (copied) break; @@ -564,7 +564,8 @@ int ptrace_writedata(struct task_struct *tsk, char __user *src, unsigned long ds this_len = (len > sizeof(buf)) ? sizeof(buf) : len; if (copy_from_user(buf, src, this_len)) return -EFAULT; - retval = access_process_vm(tsk, dst, buf, this_len, 1); + retval = access_process_vm(tsk, dst, buf, this_len, + FOLL_FORCE | FOLL_WRITE); if (!retval) { if (copied) break; @@ -1127,7 +1128,7 @@ int generic_ptrace_peekdata(struct task_struct *tsk, unsigned long addr, unsigned long tmp; int copied; - copied = access_process_vm(tsk, addr, &tmp, sizeof(tmp), 0); + copied = access_process_vm(tsk, addr, &tmp, sizeof(tmp), FOLL_FORCE); if (copied != sizeof(tmp)) return -EIO; return put_user(tmp, (unsigned long __user *)data); @@ -1138,7 +1139,8 @@ int generic_ptrace_pokedata(struct task_struct *tsk, unsigned long addr, { int copied; - copied = access_process_vm(tsk, addr, &data, sizeof(data), 1); + copied = access_process_vm(tsk, addr, &data, sizeof(data), + FOLL_FORCE | FOLL_WRITE); return (copied == sizeof(data)) ? 0 : -EIO; } @@ -1155,7 +1157,8 @@ int compat_ptrace_request(struct task_struct *child, compat_long_t request, switch (request) { case PTRACE_PEEKTEXT: case PTRACE_PEEKDATA: - ret = access_process_vm(child, addr, &word, sizeof(word), 0); + ret = access_process_vm(child, addr, &word, sizeof(word), + FOLL_FORCE); if (ret != sizeof(word)) ret = -EIO; else @@ -1164,7 +1167,8 @@ int compat_ptrace_request(struct task_struct *child, compat_long_t request, case PTRACE_POKETEXT: case PTRACE_POKEDATA: - ret = access_process_vm(child, addr, &data, sizeof(data), 1); + ret = access_process_vm(child, addr, &data, sizeof(data), + FOLL_FORCE | FOLL_WRITE); ret = (ret != sizeof(data) ? -EIO : 0); break; diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index 2d4ad72f8f3c..d941c97dfbc3 100644 --- a/kernel/sched/fair.c +++ b/kernel/sched/fair.c @@ -690,7 +690,14 @@ void init_entity_runnable_average(struct sched_entity *se) * will definitely be update (after enqueue). */ sa->period_contrib = 1023; - sa->load_avg = scale_load_down(se->load.weight); + /* + * Tasks are intialized with full load to be seen as heavy tasks until + * they get a chance to stabilize to their real load level. + * Group entities are intialized with zero load to reflect the fact that + * nothing has been attached to the task group yet. + */ + if (entity_is_task(se)) + sa->load_avg = scale_load_down(se->load.weight); sa->load_sum = sa->load_avg * LOAD_AVG_MAX; /* * At this point, util_avg won't be used in select_task_rq_fair anyway @@ -5471,13 +5478,18 @@ static inline int select_idle_smt(struct task_struct *p, struct sched_domain *sd */ static int select_idle_cpu(struct task_struct *p, struct sched_domain *sd, int target) { - struct sched_domain *this_sd = rcu_dereference(*this_cpu_ptr(&sd_llc)); - u64 avg_idle = this_rq()->avg_idle; - u64 avg_cost = this_sd->avg_scan_cost; + struct sched_domain *this_sd; + u64 avg_cost, avg_idle = this_rq()->avg_idle; u64 time, cost; s64 delta; int cpu, wrap; + this_sd = rcu_dereference(*this_cpu_ptr(&sd_llc)); + if (!this_sd) + return -1; + + avg_cost = this_sd->avg_scan_cost; + /* * Due to large variance we need a large fuzz factor; hackbench in * particularly is sensitive here. diff --git a/kernel/time/alarmtimer.c b/kernel/time/alarmtimer.c index c3aad685bbc0..12dd190634ab 100644 --- a/kernel/time/alarmtimer.c +++ b/kernel/time/alarmtimer.c @@ -542,7 +542,6 @@ static int alarm_clock_get(clockid_t which_clock, struct timespec *tp) static int alarm_timer_create(struct k_itimer *new_timer) { enum alarmtimer_type type; - struct alarm_base *base; if (!alarmtimer_get_rtcdev()) return -ENOTSUPP; @@ -551,7 +550,6 @@ static int alarm_timer_create(struct k_itimer *new_timer) return -EPERM; type = clock2alarm(new_timer->it_clock); - base = &alarm_bases[type]; alarm_init(&new_timer->it.alarm.alarmtimer, type, alarm_handle_timer); return 0; } diff --git a/mm/frame_vector.c b/mm/frame_vector.c index 381bb07ed14f..db77dcb38afd 100644 --- a/mm/frame_vector.c +++ b/mm/frame_vector.c @@ -11,10 +11,7 @@ * get_vaddr_frames() - map virtual addresses to pfns * @start: starting user address * @nr_frames: number of pages / pfns from start to map - * @write: whether pages will be written to by the caller - * @force: whether to force write access even if user mapping is - * readonly. See description of the same argument of - get_user_pages(). + * @gup_flags: flags modifying lookup behaviour * @vec: structure which receives pages / pfns of the addresses mapped. * It should have space for at least nr_frames entries. * @@ -34,7 +31,7 @@ * This function takes care of grabbing mmap_sem as necessary. */ int get_vaddr_frames(unsigned long start, unsigned int nr_frames, - bool write, bool force, struct frame_vector *vec) + unsigned int gup_flags, struct frame_vector *vec) { struct mm_struct *mm = current->mm; struct vm_area_struct *vma; @@ -59,7 +56,7 @@ int get_vaddr_frames(unsigned long start, unsigned int nr_frames, vec->got_ref = true; vec->is_pfns = false; ret = get_user_pages_locked(start, nr_frames, - write, force, (struct page **)(vec->ptrs), &locked); + gup_flags, (struct page **)(vec->ptrs), &locked); goto out; } @@ -60,6 +60,16 @@ static int follow_pfn_pte(struct vm_area_struct *vma, unsigned long address, return -EEXIST; } +/* + * FOLL_FORCE can write to even unwritable pte's, but only + * after we've gone through a COW cycle and they are dirty. + */ +static inline bool can_follow_write_pte(pte_t pte, unsigned int flags) +{ + return pte_write(pte) || + ((flags & FOLL_FORCE) && (flags & FOLL_COW) && pte_dirty(pte)); +} + static struct page *follow_page_pte(struct vm_area_struct *vma, unsigned long address, pmd_t *pmd, unsigned int flags) { @@ -95,7 +105,7 @@ retry: } if ((flags & FOLL_NUMA) && pte_protnone(pte)) goto no_page; - if ((flags & FOLL_WRITE) && !pte_write(pte)) { + if ((flags & FOLL_WRITE) && !can_follow_write_pte(pte, flags)) { pte_unmap_unlock(ptep, ptl); return NULL; } @@ -412,7 +422,7 @@ static int faultin_page(struct task_struct *tsk, struct vm_area_struct *vma, * reCOWed by userspace write). */ if ((ret & VM_FAULT_WRITE) && !(vma->vm_flags & VM_WRITE)) - *flags &= ~FOLL_WRITE; + *flags |= FOLL_COW; return 0; } @@ -729,7 +739,6 @@ static __always_inline long __get_user_pages_locked(struct task_struct *tsk, struct mm_struct *mm, unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, struct vm_area_struct **vmas, int *locked, bool notify_drop, @@ -747,10 +756,6 @@ static __always_inline long __get_user_pages_locked(struct task_struct *tsk, if (pages) flags |= FOLL_GET; - if (write) - flags |= FOLL_WRITE; - if (force) - flags |= FOLL_FORCE; pages_done = 0; lock_dropped = false; @@ -843,12 +848,12 @@ static __always_inline long __get_user_pages_locked(struct task_struct *tsk, * up_read(&mm->mmap_sem); */ long get_user_pages_locked(unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, + unsigned int gup_flags, struct page **pages, int *locked) { return __get_user_pages_locked(current, current->mm, start, nr_pages, - write, force, pages, NULL, locked, true, - FOLL_TOUCH); + pages, NULL, locked, true, + gup_flags | FOLL_TOUCH); } EXPORT_SYMBOL(get_user_pages_locked); @@ -864,14 +869,14 @@ EXPORT_SYMBOL(get_user_pages_locked); */ __always_inline long __get_user_pages_unlocked(struct task_struct *tsk, struct mm_struct *mm, unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, - unsigned int gup_flags) + struct page **pages, unsigned int gup_flags) { long ret; int locked = 1; + down_read(&mm->mmap_sem); - ret = __get_user_pages_locked(tsk, mm, start, nr_pages, write, force, - pages, NULL, &locked, false, gup_flags); + ret = __get_user_pages_locked(tsk, mm, start, nr_pages, pages, NULL, + &locked, false, gup_flags); if (locked) up_read(&mm->mmap_sem); return ret; @@ -896,10 +901,10 @@ EXPORT_SYMBOL(__get_user_pages_unlocked); * "force" parameter). */ long get_user_pages_unlocked(unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages) + struct page **pages, unsigned int gup_flags) { return __get_user_pages_unlocked(current, current->mm, start, nr_pages, - write, force, pages, FOLL_TOUCH); + pages, gup_flags | FOLL_TOUCH); } EXPORT_SYMBOL(get_user_pages_unlocked); @@ -910,9 +915,7 @@ EXPORT_SYMBOL(get_user_pages_unlocked); * @mm: mm_struct of target mm * @start: starting user address * @nr_pages: number of pages from start to pin - * @write: whether pages will be written to by the caller - * @force: whether to force access even when user mapping is currently - * protected (but never forces write access to shared mapping). + * @gup_flags: flags modifying lookup behaviour * @pages: array that receives pointers to the pages pinned. * Should be at least nr_pages long. Or NULL, if caller * only intends to ensure the pages are faulted in. @@ -941,9 +944,9 @@ EXPORT_SYMBOL(get_user_pages_unlocked); * or similar operation cannot guarantee anything stronger anyway because * locks can't be held over the syscall boundary. * - * If write=0, the page must not be written to. If the page is written to, - * set_page_dirty (or set_page_dirty_lock, as appropriate) must be called - * after the page is finished with, and before put_page is called. + * If gup_flags & FOLL_WRITE == 0, the page must not be written to. If the page + * is written to, set_page_dirty (or set_page_dirty_lock, as appropriate) must + * be called after the page is finished with, and before put_page is called. * * get_user_pages is typically used for fewer-copy IO operations, to get a * handle on the memory by some means other than accesses via the user virtual @@ -960,12 +963,12 @@ EXPORT_SYMBOL(get_user_pages_unlocked); */ long get_user_pages_remote(struct task_struct *tsk, struct mm_struct *mm, unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, + unsigned int gup_flags, struct page **pages, struct vm_area_struct **vmas) { - return __get_user_pages_locked(tsk, mm, start, nr_pages, write, force, - pages, vmas, NULL, false, - FOLL_TOUCH | FOLL_REMOTE); + return __get_user_pages_locked(tsk, mm, start, nr_pages, pages, vmas, + NULL, false, + gup_flags | FOLL_TOUCH | FOLL_REMOTE); } EXPORT_SYMBOL(get_user_pages_remote); @@ -976,12 +979,12 @@ EXPORT_SYMBOL(get_user_pages_remote); * obviously don't pass FOLL_REMOTE in here. */ long get_user_pages(unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, + unsigned int gup_flags, struct page **pages, struct vm_area_struct **vmas) { return __get_user_pages_locked(current, current->mm, start, nr_pages, - write, force, pages, vmas, NULL, false, - FOLL_TOUCH); + pages, vmas, NULL, false, + gup_flags | FOLL_TOUCH); } EXPORT_SYMBOL(get_user_pages); @@ -1505,7 +1508,8 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write, start += nr << PAGE_SHIFT; pages += nr; - ret = get_user_pages_unlocked(start, nr_pages - nr, write, 0, pages); + ret = get_user_pages_unlocked(start, nr_pages - nr, pages, + write ? FOLL_WRITE : 0); /* Have to be a bit careful with return values */ if (nr > 0) { diff --git a/mm/kasan/kasan.c b/mm/kasan/kasan.c index 88af13c00d3c..70c009741aab 100644 --- a/mm/kasan/kasan.c +++ b/mm/kasan/kasan.c @@ -34,6 +34,7 @@ #include <linux/string.h> #include <linux/types.h> #include <linux/vmalloc.h> +#include <linux/bug.h> #include "kasan.h" #include "../slab.h" @@ -62,7 +63,7 @@ void kasan_unpoison_shadow(const void *address, size_t size) } } -static void __kasan_unpoison_stack(struct task_struct *task, void *sp) +static void __kasan_unpoison_stack(struct task_struct *task, const void *sp) { void *base = task_stack_page(task); size_t size = sp - base; @@ -77,9 +78,24 @@ void kasan_unpoison_task_stack(struct task_struct *task) } /* Unpoison the stack for the current task beyond a watermark sp value. */ -asmlinkage void kasan_unpoison_remaining_stack(void *sp) +asmlinkage void kasan_unpoison_task_stack_below(const void *watermark) { - __kasan_unpoison_stack(current, sp); + __kasan_unpoison_stack(current, watermark); +} + +/* + * Clear all poison for the region between the current SP and a provided + * watermark value, as is sometimes required prior to hand-crafted asm function + * returns in the middle of functions. + */ +void kasan_unpoison_stack_above_sp_to(const void *watermark) +{ + const void *sp = __builtin_frame_address(0); + size_t size = watermark - sp; + + if (WARN_ON(sp > watermark)) + return; + kasan_unpoison_shadow(sp, size); } /* diff --git a/mm/memory.c b/mm/memory.c index fc1987dfd8cc..e18c57bdc75c 100644 --- a/mm/memory.c +++ b/mm/memory.c @@ -3869,10 +3869,11 @@ EXPORT_SYMBOL_GPL(generic_access_phys); * given task for page fault accounting. */ static int __access_remote_vm(struct task_struct *tsk, struct mm_struct *mm, - unsigned long addr, void *buf, int len, int write) + unsigned long addr, void *buf, int len, unsigned int gup_flags) { struct vm_area_struct *vma; void *old_buf = buf; + int write = gup_flags & FOLL_WRITE; down_read(&mm->mmap_sem); /* ignore errors, just check how much was successfully transferred */ @@ -3882,7 +3883,7 @@ static int __access_remote_vm(struct task_struct *tsk, struct mm_struct *mm, struct page *page = NULL; ret = get_user_pages_remote(tsk, mm, addr, 1, - write, 1, &page, &vma); + gup_flags, &page, &vma); if (ret <= 0) { #ifndef CONFIG_HAVE_IOREMAP_PROT break; @@ -3934,14 +3935,14 @@ static int __access_remote_vm(struct task_struct *tsk, struct mm_struct *mm, * @addr: start address to access * @buf: source or destination buffer * @len: number of bytes to transfer - * @write: whether the access is a write + * @gup_flags: flags modifying lookup behaviour * * The caller must hold a reference on @mm. */ int access_remote_vm(struct mm_struct *mm, unsigned long addr, - void *buf, int len, int write) + void *buf, int len, unsigned int gup_flags) { - return __access_remote_vm(NULL, mm, addr, buf, len, write); + return __access_remote_vm(NULL, mm, addr, buf, len, gup_flags); } /* @@ -3950,7 +3951,7 @@ int access_remote_vm(struct mm_struct *mm, unsigned long addr, * Do not walk the page table directly, use get_user_pages */ int access_process_vm(struct task_struct *tsk, unsigned long addr, - void *buf, int len, int write) + void *buf, int len, unsigned int gup_flags) { struct mm_struct *mm; int ret; @@ -3959,7 +3960,8 @@ int access_process_vm(struct task_struct *tsk, unsigned long addr, if (!mm) return 0; - ret = __access_remote_vm(tsk, mm, addr, buf, len, write); + ret = __access_remote_vm(tsk, mm, addr, buf, len, gup_flags); + mmput(mm); return ret; diff --git a/mm/mempolicy.c b/mm/mempolicy.c index ad1c96ac313c..0b859af06b87 100644 --- a/mm/mempolicy.c +++ b/mm/mempolicy.c @@ -850,7 +850,7 @@ static int lookup_node(unsigned long addr) struct page *p; int err; - err = get_user_pages(addr & PAGE_MASK, 1, 0, 0, &p, NULL); + err = get_user_pages(addr & PAGE_MASK, 1, 0, &p, NULL); if (err >= 0) { err = page_to_nid(p); put_page(p); diff --git a/mm/mprotect.c b/mm/mprotect.c index bcdbe62f3e6d..11936526b08b 100644 --- a/mm/mprotect.c +++ b/mm/mprotect.c @@ -25,7 +25,6 @@ #include <linux/perf_event.h> #include <linux/pkeys.h> #include <linux/ksm.h> -#include <linux/pkeys.h> #include <asm/uaccess.h> #include <asm/pgtable.h> #include <asm/cacheflush.h> diff --git a/mm/nommu.c b/mm/nommu.c index 95daf81a4855..db5fd1795298 100644 --- a/mm/nommu.c +++ b/mm/nommu.c @@ -160,33 +160,25 @@ finish_or_fault: * - don't permit access to VMAs that don't support it, such as I/O mappings */ long get_user_pages(unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, + unsigned int gup_flags, struct page **pages, struct vm_area_struct **vmas) { - int flags = 0; - - if (write) - flags |= FOLL_WRITE; - if (force) - flags |= FOLL_FORCE; - - return __get_user_pages(current, current->mm, start, nr_pages, flags, - pages, vmas, NULL); + return __get_user_pages(current, current->mm, start, nr_pages, + gup_flags, pages, vmas, NULL); } EXPORT_SYMBOL(get_user_pages); long get_user_pages_locked(unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, + unsigned int gup_flags, struct page **pages, int *locked) { - return get_user_pages(start, nr_pages, write, force, pages, NULL); + return get_user_pages(start, nr_pages, gup_flags, pages, NULL); } EXPORT_SYMBOL(get_user_pages_locked); long __get_user_pages_unlocked(struct task_struct *tsk, struct mm_struct *mm, unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages, - unsigned int gup_flags) + struct page **pages, unsigned int gup_flags) { long ret; down_read(&mm->mmap_sem); @@ -198,10 +190,10 @@ long __get_user_pages_unlocked(struct task_struct *tsk, struct mm_struct *mm, EXPORT_SYMBOL(__get_user_pages_unlocked); long get_user_pages_unlocked(unsigned long start, unsigned long nr_pages, - int write, int force, struct page **pages) + struct page **pages, unsigned int gup_flags) { return __get_user_pages_unlocked(current, current->mm, start, nr_pages, - write, force, pages, 0); + pages, gup_flags); } EXPORT_SYMBOL(get_user_pages_unlocked); @@ -1817,9 +1809,10 @@ void filemap_map_pages(struct fault_env *fe, EXPORT_SYMBOL(filemap_map_pages); static int __access_remote_vm(struct task_struct *tsk, struct mm_struct *mm, - unsigned long addr, void *buf, int len, int write) + unsigned long addr, void *buf, int len, unsigned int gup_flags) { struct vm_area_struct *vma; + int write = gup_flags & FOLL_WRITE; down_read(&mm->mmap_sem); @@ -1854,21 +1847,22 @@ static int __access_remote_vm(struct task_struct *tsk, struct mm_struct *mm, * @addr: start address to access * @buf: source or destination buffer * @len: number of bytes to transfer - * @write: whether the access is a write + * @gup_flags: flags modifying lookup behaviour * * The caller must hold a reference on @mm. */ int access_remote_vm(struct mm_struct *mm, unsigned long addr, - void *buf, int len, int write) + void *buf, int len, unsigned int gup_flags) { - return __access_remote_vm(NULL, mm, addr, buf, len, write); + return __access_remote_vm(NULL, mm, addr, buf, len, gup_flags); } /* * Access another process' address space. * - source/target buffer must be kernel space */ -int access_process_vm(struct task_struct *tsk, unsigned long addr, void *buf, int len, int write) +int access_process_vm(struct task_struct *tsk, unsigned long addr, void *buf, int len, + unsigned int gup_flags) { struct mm_struct *mm; @@ -1879,7 +1873,7 @@ int access_process_vm(struct task_struct *tsk, unsigned long addr, void *buf, in if (!mm) return 0; - len = __access_remote_vm(tsk, mm, addr, buf, len, write); + len = __access_remote_vm(tsk, mm, addr, buf, len, gup_flags); mmput(mm); return len; diff --git a/mm/process_vm_access.c b/mm/process_vm_access.c index 07514d41ebcc..be8dc8d1edb9 100644 --- a/mm/process_vm_access.c +++ b/mm/process_vm_access.c @@ -88,12 +88,16 @@ static int process_vm_rw_single_vec(unsigned long addr, ssize_t rc = 0; unsigned long max_pages_per_loop = PVM_MAX_KMALLOC_PAGES / sizeof(struct pages *); + unsigned int flags = FOLL_REMOTE; /* Work out address and page range required */ if (len == 0) return 0; nr_pages = (addr + len - 1) / PAGE_SIZE - addr / PAGE_SIZE + 1; + if (vm_write) + flags |= FOLL_WRITE; + while (!rc && nr_pages && iov_iter_count(iter)) { int pages = min(nr_pages, max_pages_per_loop); size_t bytes; @@ -104,8 +108,7 @@ static int process_vm_rw_single_vec(unsigned long addr, * current/current->mm */ pages = __get_user_pages_unlocked(task, mm, pa, pages, - vm_write, 0, process_pages, - FOLL_REMOTE); + process_pages, flags); if (pages <= 0) return -EFAULT; diff --git a/mm/util.c b/mm/util.c index 662cddf914af..1a41553db866 100644 --- a/mm/util.c +++ b/mm/util.c @@ -230,8 +230,10 @@ void __vma_link_list(struct mm_struct *mm, struct vm_area_struct *vma, } /* Check if the vma is being used as a stack by this task */ -int vma_is_stack_for_task(struct vm_area_struct *vma, struct task_struct *t) +int vma_is_stack_for_current(struct vm_area_struct *vma) { + struct task_struct * __maybe_unused t = current; + return (vma->vm_start <= KSTK_ESP(t) && vma->vm_end >= KSTK_ESP(t)); } @@ -283,7 +285,8 @@ EXPORT_SYMBOL_GPL(__get_user_pages_fast); int __weak get_user_pages_fast(unsigned long start, int nr_pages, int write, struct page **pages) { - return get_user_pages_unlocked(start, nr_pages, write, 0, pages); + return get_user_pages_unlocked(start, nr_pages, pages, + write ? FOLL_WRITE : 0); } EXPORT_SYMBOL_GPL(get_user_pages_fast); @@ -623,7 +626,7 @@ int get_cmdline(struct task_struct *task, char *buffer, int buflen) if (len > buflen) len = buflen; - res = access_process_vm(task, arg_start, buffer, len, 0); + res = access_process_vm(task, arg_start, buffer, len, FOLL_FORCE); /* * If the nul at the end of args has been overwritten, then @@ -638,7 +641,8 @@ int get_cmdline(struct task_struct *task, char *buffer, int buflen) if (len > buflen - res) len = buflen - res; res += access_process_vm(task, env_start, - buffer+res, len, 0); + buffer+res, len, + FOLL_FORCE); res = strnlen(buffer, res); } } diff --git a/net/ceph/pagevec.c b/net/ceph/pagevec.c index 00d2601407c5..1a7c9a79a53c 100644 --- a/net/ceph/pagevec.c +++ b/net/ceph/pagevec.c @@ -26,7 +26,7 @@ struct page **ceph_get_direct_page_vector(const void __user *data, while (got < num_pages) { rc = get_user_pages_unlocked( (unsigned long)data + ((unsigned long)got * PAGE_SIZE), - num_pages - got, write_page, 0, pages + got); + num_pages - got, pages + got, write_page ? FOLL_WRITE : 0); if (rc < 0) break; BUG_ON(rc == 0); diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c index 085057936287..09fd6108e421 100644 --- a/security/selinux/hooks.c +++ b/security/selinux/hooks.c @@ -3557,7 +3557,7 @@ static int selinux_file_mprotect(struct vm_area_struct *vma, } else if (!vma->vm_file && ((vma->vm_start <= vma->vm_mm->start_stack && vma->vm_end >= vma->vm_mm->start_stack) || - vma_is_stack_for_task(vma, current))) { + vma_is_stack_for_current(vma))) { rc = current_has_perm(current, PROCESS__EXECSTACK); } else if (vma->vm_file && vma->anon_vma) { /* diff --git a/security/tomoyo/domain.c b/security/tomoyo/domain.c index ade7c6cad172..682b73af7766 100644 --- a/security/tomoyo/domain.c +++ b/security/tomoyo/domain.c @@ -881,7 +881,7 @@ bool tomoyo_dump_page(struct linux_binprm *bprm, unsigned long pos, * the execve(). */ if (get_user_pages_remote(current, bprm->mm, pos, 1, - 0, 1, &page, NULL) <= 0) + FOLL_FORCE, &page, NULL) <= 0) return false; #else page = bprm->page[pos / PAGE_SIZE]; diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h index 1188bc849ee3..a39629206864 100644 --- a/tools/arch/x86/include/asm/cpufeatures.h +++ b/tools/arch/x86/include/asm/cpufeatures.h @@ -194,6 +194,8 @@ #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */ #define X86_FEATURE_INTEL_PT ( 7*32+15) /* Intel Processor Trace */ +#define X86_FEATURE_AVX512_4VNNIW (7*32+16) /* AVX-512 Neural Network Instructions */ +#define X86_FEATURE_AVX512_4FMAPS (7*32+17) /* AVX-512 Multiply Accumulation Single precision */ /* Virtualization flags: Linux defined, word 8 */ #define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */ diff --git a/tools/objtool/arch/x86/decode.c b/tools/objtool/arch/x86/decode.c index c0c0b265e88e..b63a31be1218 100644 --- a/tools/objtool/arch/x86/decode.c +++ b/tools/objtool/arch/x86/decode.c @@ -98,6 +98,15 @@ int arch_decode_instruction(struct elf *elf, struct section *sec, *type = INSN_FP_SETUP; break; + case 0x8d: + if (insn.rex_prefix.bytes && + insn.rex_prefix.bytes[0] == 0x48 && + insn.modrm.nbytes && insn.modrm.bytes[0] == 0x2c && + insn.sib.nbytes && insn.sib.bytes[0] == 0x24) + /* lea %(rsp), %rbp */ + *type = INSN_FP_SETUP; + break; + case 0x90: *type = INSN_NOP; break; diff --git a/tools/objtool/builtin-check.c b/tools/objtool/builtin-check.c index 143b6cdd7f06..4490601a9235 100644 --- a/tools/objtool/builtin-check.c +++ b/tools/objtool/builtin-check.c @@ -97,6 +97,19 @@ static struct instruction *next_insn_same_sec(struct objtool_file *file, return next; } +static bool gcov_enabled(struct objtool_file *file) +{ + struct section *sec; + struct symbol *sym; + + list_for_each_entry(sec, &file->elf->sections, list) + list_for_each_entry(sym, &sec->symbol_list, list) + if (!strncmp(sym->name, "__gcov_.", 8)) + return true; + + return false; +} + #define for_each_insn(file, insn) \ list_for_each_entry(insn, &file->insn_list, list) @@ -713,6 +726,7 @@ static struct rela *find_switch_table(struct objtool_file *file, struct instruction *insn) { struct rela *text_rela, *rodata_rela; + struct instruction *orig_insn = insn; text_rela = find_rela_by_dest_range(insn->sec, insn->offset, insn->len); if (text_rela && text_rela->sym == file->rodata->sym) { @@ -733,10 +747,16 @@ static struct rela *find_switch_table(struct objtool_file *file, /* case 3 */ func_for_each_insn_continue_reverse(file, func, insn) { - if (insn->type == INSN_JUMP_UNCONDITIONAL || - insn->type == INSN_JUMP_DYNAMIC) + if (insn->type == INSN_JUMP_DYNAMIC) break; + /* allow small jumps within the range */ + if (insn->type == INSN_JUMP_UNCONDITIONAL && + insn->jump_dest && + (insn->jump_dest->offset <= insn->offset || + insn->jump_dest->offset >= orig_insn->offset)) + break; + text_rela = find_rela_by_dest_range(insn->sec, insn->offset, insn->len); if (text_rela && text_rela->sym == file->rodata->sym) @@ -1034,34 +1054,6 @@ static int validate_branch(struct objtool_file *file, return 0; } -static bool is_gcov_insn(struct instruction *insn) -{ - struct rela *rela; - struct section *sec; - struct symbol *sym; - unsigned long offset; - - rela = find_rela_by_dest_range(insn->sec, insn->offset, insn->len); - if (!rela) - return false; - - if (rela->sym->type != STT_SECTION) - return false; - - sec = rela->sym->sec; - offset = rela->addend + insn->offset + insn->len - rela->offset; - - list_for_each_entry(sym, &sec->symbol_list, list) { - if (sym->type != STT_OBJECT) - continue; - - if (offset >= sym->offset && offset < sym->offset + sym->len) - return (!memcmp(sym->name, "__gcov0.", 8)); - } - - return false; -} - static bool is_kasan_insn(struct instruction *insn) { return (insn->type == INSN_CALL && @@ -1083,9 +1075,6 @@ static bool ignore_unreachable_insn(struct symbol *func, if (insn->type == INSN_NOP) return true; - if (is_gcov_insn(insn)) - return true; - /* * Check if this (or a subsequent) instruction is related to * CONFIG_UBSAN or CONFIG_KASAN. @@ -1146,6 +1135,19 @@ static int validate_functions(struct objtool_file *file) ignore_unreachable_insn(func, insn)) continue; + /* + * gcov produces a lot of unreachable + * instructions. If we get an unreachable + * warning and the file has gcov enabled, just + * ignore it, and all other such warnings for + * the file. + */ + if (!file->ignore_unreachables && + gcov_enabled(file)) { + file->ignore_unreachables = true; + continue; + } + WARN_FUNC("function has unreachable instruction", insn->sec, insn->offset); warnings++; } diff --git a/tools/perf/jvmti/Makefile b/tools/perf/jvmti/Makefile index 5ce61a1bda9c..df14e6b67b63 100644 --- a/tools/perf/jvmti/Makefile +++ b/tools/perf/jvmti/Makefile @@ -36,7 +36,7 @@ SOLIBEXT=so # The following works at least on fedora 23, you may need the next # line for other distros. ifneq (,$(wildcard /usr/sbin/update-java-alternatives)) -JDIR=$(shell /usr/sbin/update-java-alternatives -l | head -1 | cut -d ' ' -f 3) +JDIR=$(shell /usr/sbin/update-java-alternatives -l | head -1 | awk '{print $$3}') else ifneq (,$(wildcard /usr/sbin/alternatives)) JDIR=$(shell alternatives --display java | tail -1 | cut -d' ' -f 5 | sed 's%/jre/bin/java.%%g') diff --git a/tools/perf/ui/browsers/hists.c b/tools/perf/ui/browsers/hists.c index fb8e42c7507a..4ffff7be9299 100644 --- a/tools/perf/ui/browsers/hists.c +++ b/tools/perf/ui/browsers/hists.c @@ -601,7 +601,8 @@ int hist_browser__run(struct hist_browser *browser, const char *help) u64 nr_entries; hbt->timer(hbt->arg); - if (hist_browser__has_filter(browser)) + if (hist_browser__has_filter(browser) || + symbol_conf.report_hierarchy) hist_browser__update_nr_entries(browser); nr_entries = hist_browser__nr_entries(browser); diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c index 85dd0db0a127..2f3eded54b0c 100644 --- a/tools/perf/util/header.c +++ b/tools/perf/util/header.c @@ -1895,7 +1895,6 @@ static int process_numa_topology(struct perf_file_section *section __maybe_unuse if (ph->needs_swap) nr = bswap_32(nr); - ph->env.nr_numa_nodes = nr; nodes = zalloc(sizeof(*nodes) * nr); if (!nodes) return -ENOMEM; @@ -1932,6 +1931,7 @@ static int process_numa_topology(struct perf_file_section *section __maybe_unuse free(str); } + ph->env.nr_numa_nodes = nr; ph->env.numa_nodes = nodes; return 0; diff --git a/tools/perf/util/parse-events.l b/tools/perf/util/parse-events.l index 9f43fda2570f..660fca05bc93 100644 --- a/tools/perf/util/parse-events.l +++ b/tools/perf/util/parse-events.l @@ -136,8 +136,8 @@ do { \ group [^,{}/]*[{][^}]*[}][^,{}/]* event_pmu [^,{}/]+[/][^/]*[/][^,{}/]* event [^,{}/]+ -bpf_object .*\.(o|bpf) -bpf_source .*\.c +bpf_object [^,{}]+\.(o|bpf) +bpf_source [^,{}]+\.c num_dec [0-9]+ num_hex 0x[a-fA-F0-9]+ diff --git a/virt/kvm/async_pf.c b/virt/kvm/async_pf.c index db9668869f6f..8035cc1eb955 100644 --- a/virt/kvm/async_pf.c +++ b/virt/kvm/async_pf.c @@ -84,7 +84,8 @@ static void async_pf_execute(struct work_struct *work) * mm and might be done in another context, so we must * use FOLL_REMOTE. */ - __get_user_pages_unlocked(NULL, mm, addr, 1, 1, 0, NULL, FOLL_REMOTE); + __get_user_pages_unlocked(NULL, mm, addr, 1, NULL, + FOLL_WRITE | FOLL_REMOTE); kvm_async_page_present_sync(vcpu, apf); diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c index 81dfc73d3df3..28510e72618a 100644 --- a/virt/kvm/kvm_main.c +++ b/virt/kvm/kvm_main.c @@ -1416,10 +1416,15 @@ static int hva_to_pfn_slow(unsigned long addr, bool *async, bool write_fault, down_read(¤t->mm->mmap_sem); npages = get_user_page_nowait(addr, write_fault, page); up_read(¤t->mm->mmap_sem); - } else + } else { + unsigned int flags = FOLL_TOUCH | FOLL_HWPOISON; + + if (write_fault) + flags |= FOLL_WRITE; + npages = __get_user_pages_unlocked(current, current->mm, addr, 1, - write_fault, 0, page, - FOLL_TOUCH|FOLL_HWPOISON); + page, flags); + } if (npages != 1) return npages; |