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-rw-r--r--Documentation/devicetree/bindings/arm/omap/mpu.txt27
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt
index 1a5a42ce21bb..e41490e6979c 100644
--- a/Documentation/devicetree/bindings/arm/omap/mpu.txt
+++ b/Documentation/devicetree/bindings/arm/omap/mpu.txt
@@ -7,10 +7,28 @@ The MPU contain CPUs, GIC, L2 cache and a local PRCM.
Required properties:
- compatible : Should be "ti,omap3-mpu" for OMAP3
Should be "ti,omap4-mpu" for OMAP4
+ Should be "ti,omap5-mpu" for OMAP5
- ti,hwmods: "mpu"
+Optional properties:
+- sram: Phandle to the ocmcram node
+
+am335x and am437x only:
+- pm-sram: Phandles to ocmcram nodes to be used for power management.
+ First should be type 'protect-exec' for the driver to use to copy
+ and run PM functions, second should be regular pool to be used for
+ data region for code. See Documentation/devicetree/bindings/sram/sram.yaml
+ for more details.
+
Examples:
+- For an OMAP5 SMP system:
+
+mpu {
+ compatible = "ti,omap5-mpu";
+ ti,hwmods = "mpu"
+};
+
- For an OMAP4 SMP system:
mpu {
@@ -25,3 +43,12 @@ mpu {
compatible = "ti,omap3-mpu";
ti,hwmods = "mpu";
};
+
+- For an AM335x system:
+
+mpu {
+ compatible = "ti,omap3-mpu";
+ ti,hwmods = "mpu";
+ pm-sram = <&pm_sram_code
+ &pm_sram_data>;
+};