diff options
Diffstat (limited to 'Documentation/devicetree/bindings/mips/mscc.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/mips/mscc.txt | 19 |
1 files changed, 1 insertions, 18 deletions
diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt index bc817e984628..e74165696b76 100644 --- a/Documentation/devicetree/bindings/mips/mscc.txt +++ b/Documentation/devicetree/bindings/mips/mscc.txt @@ -4,7 +4,7 @@ Boards with a SoC of the Microsemi MIPS family shall have the following properties: Required properties: -- compatible: "mscc,ocelot" +- compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2" * Other peripherals: @@ -25,23 +25,6 @@ Example: reg = <0x71070000 0x1c>; }; - -o CPU system control: - -The SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of -the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU -endianness, CPU bus control, CPU status. - -Required properties: -- compatible: Should be "mscc,ocelot-cpu-syscon", "syscon" -- reg : Should contain registers location and length - -Example: - syscon@70000000 { - compatible = "mscc,ocelot-cpu-syscon", "syscon"; - reg = <0x70000000 0x2c>; - }; - o HSIO regs: The SoC has a few registers (HSIO) handling miscellaneous functionalities: |