diff options
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml | 232 |
1 files changed, 172 insertions, 60 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml index ef4de32cb17c..76d956b4a537 100644 --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml @@ -8,10 +8,10 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: STM32 GPIO and Pin Mux/Config controller maintainers: - - Alexandre TORGUE <alexandre.torgue@st.com> + - Alexandre TORGUE <alexandre.torgue@foss.st.com> description: | - STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware + STMicroelectronics's STM32 MCUs integrate a GPIO and Pin mux/config hardware controller. It controls the input/output settings on the available pins and also provides ability to multiplex and configure the output of various on-chip controllers onto these pads. @@ -24,53 +24,75 @@ properties: - st,stm32f746-pinctrl - st,stm32f769-pinctrl - st,stm32h743-pinctrl + - st,stm32mp135-pinctrl - st,stm32mp157-pinctrl - st,stm32mp157-z-pinctrl + - st,stm32mp257-pinctrl + - st,stm32mp257-z-pinctrl '#address-cells': const: 1 + '#size-cells': const: 1 ranges: true - pins-are-numbered: true + + pins-are-numbered: + $ref: /schemas/types.yaml#/definitions/flag + deprecated: true + hwlocks: true + interrupts: + maxItems: 1 + st,syscfg: - allOf: - - $ref: "/schemas/types.yaml#/definitions/phandle-array" - description: Should be phandle/offset/mask - - Phandle to the syscon node which includes IRQ mux selection. - - The offset of the IRQ mux selection register. - - The field mask of IRQ mux, needed if different of 0xf. + description: Phandle+args to the syscon node which includes IRQ mux selection. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - minItems: 2 + items: + - description: syscon node which includes IRQ mux selection + - description: The offset of the IRQ mux selection register + - description: The field mask of IRQ mux, needed if different of 0xf st,package: - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32 - - enum: [1, 2, 4, 8] description: - Indicates the SOC package used. - More details in include/dt-bindings/pinctrl/stm32-pinfunc.h - + Indicates the SOC package used. + More details in include/dt-bindings/pinctrl/stm32-pinfunc.h + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0x1, 0x2, 0x4, 0x8, 0x100, 0x400, 0x800] patternProperties: '^gpio@[0-9a-f]*$': type: object + additionalProperties: false properties: gpio-controller: true + '#gpio-cells': const: 2 + interrupt-controller: true + '#interrupt-cells': + const: 2 + reg: maxItems: 1 + clocks: maxItems: 1 - reset: - minItems: 1 + + resets: maxItems: 1 + + gpio-line-names: true + gpio-ranges: minItems: 1 maxItems: 16 + ngpios: description: Number of available gpios in a bank. @@ -78,33 +100,36 @@ patternProperties: maximum: 16 st,bank-name: - allOf: - - $ref: "/schemas/types.yaml#/definitions/string" - - enum: - - GPIOA - - GPIOB - - GPIOC - - GPIOD - - GPIOE - - GPIOF - - GPIOG - - GPIOH - - GPIOI - - GPIOJ - - GPIOK - - GPIOZ description: Should be a name string for this bank as specified in the datasheet. + $ref: /schemas/types.yaml#/definitions/string + enum: + - GPIOA + - GPIOB + - GPIOC + - GPIOD + - GPIOE + - GPIOF + - GPIOG + - GPIOH + - GPIOI + - GPIOJ + - GPIOK + - GPIOZ st,bank-ioport: - allOf: - - $ref: "/schemas/types.yaml#/definitions/uint32" - - minimum: 0 - - maximum: 11 - description: Should correspond to the EXTI IOport selection (EXTI line used to select GPIOs as interrupts). + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 11 + + patternProperties: + "^(.+-hog(-[0-9]+)?)$": + type: object + required: + - gpio-hog required: - gpio-controller @@ -115,18 +140,22 @@ patternProperties: '-[0-9]*$': type: object + additionalProperties: false + patternProperties: '^pins': type: object + additionalProperties: false description: | A pinctrl node should contain at least one subnode representing the pinctrl group available on the machine. Each subnode will list the pins it needs, and how they should be configured, with regard to muxer configuration, pullups, drive, output high/low and output speed. + $ref: /schemas/pinctrl/pincfg-node.yaml + properties: pinmux: - allOf: - - $ref: "/schemas/types.yaml#/definitions/uint32-array" + $ref: /schemas/types.yaml#/definitions/uint32-array description: | Integer array, represents gpio pin number and mux setting. Supported pin number and mux varies for different SoCs, and are @@ -143,11 +172,15 @@ patternProperties: * ... * 16 : Alternate Function 15 * 17 : Analog + * 18 : Reserved To simplify the usage, macro is available to generate "pinmux" field. This macro is available here: - include/dt-bindings/pinctrl/stm32-pinfunc.h + Setting the pinmux's function to the Reserved (RSVD) value is used to inform + the driver that it shall not apply the mux setting. This can be used to + reserve some pins, for example to a co-processor not running Linux. Some examples of using macro: - /* GPIO A9 set as alernate function 2 */ + /* GPIO A9 set as alternate function 2 */ ... { pinmux = <STM32_PINMUX('A', 9, AF2)>; }; @@ -159,40 +192,100 @@ patternProperties: ... { pinmux = <STM32_PINMUX('A', 9, ANALOG)>; }; + /* GPIO A9 reserved for co-processor */ + ... { + pinmux = <STM32_PINMUX('A', 9, RSVD)>; + }; + + bias-disable: true + + bias-pull-down: true + + bias-pull-up: true + + drive-push-pull: true + + drive-open-drain: true + + output-low: true + + output-high: true - bias-disable: - type: boolean - bias-pull-down: - type: boolean - bias-pull-up: - type: boolean - drive-push-pull: - type: boolean - drive-open-drain: - type: boolean - output-low: - type: boolean - output-high: - type: boolean slew-rate: description: | 0: Low speed 1: Medium speed 2: Fast speed 3: High speed - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32 - - enum: [0, 1, 2, 3] + minimum: 0 + maximum: 3 + + skew-delay-input-ps: + description: | + IO synchronization skew rate applied to the input path + enum: [0, 300, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000, 3250] + + skew-delay-output-ps: + description: | + IO synchronization latch delay applied to the output path + enum: [0, 300, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000, 3250] + + st,io-sync: + $ref: /schemas/types.yaml#/definitions/string + enum: + - pass-through + - clock inverted + - data on rising edge + - data on falling edge + - data on both edges + description: | + IO synchronization through re-sampling or inversion + "pass-through" - data or clock GPIO pass-through + "clock inverted" - clock GPIO inverted + "data on rising edge" - data GPIO re-sampled on clock rising edge + "data on falling edge" - data GPIO re-sampled on clock falling edge + "data on both edges" - data GPIO re-sampled on both clock edges + default: pass-through required: - pinmux + # Not allowed both skew-delay-input-ps and skew-delay-output-ps + if: + required: + - skew-delay-input-ps + then: + properties: + skew-delay-output-ps: false + +allOf: + - $ref: pinctrl.yaml# + + - if: + not: + properties: + compatible: + contains: + enum: + - st,stm32mp257-pinctrl + - st,stm32mp257-z-pinctrl + then: + patternProperties: + '-[0-9]*$': + patternProperties: + '^pins': + properties: + skew-delay-input-ps: false + skew-delay-output-ps: false + st,io-sync: false + required: - compatible - '#address-cells' - '#size-cells' - ranges - - pins-are-numbered + +additionalProperties: false examples: - | @@ -204,7 +297,6 @@ examples: #size-cells = <1>; compatible = "st,stm32f429-pinctrl"; ranges = <0 0x40020000 0x3000>; - pins-are-numbered; gpioa: gpio@0 { gpio-controller; @@ -222,7 +314,6 @@ examples: #size-cells = <1>; compatible = "st,stm32f429-pinctrl"; ranges = <0 0x50020000 0x3000>; - pins-are-numbered; gpiob: gpio@1000 { gpio-controller; @@ -268,4 +359,25 @@ examples: pinctrl-names = "default"; }; + - | + #include <dt-bindings/pinctrl/stm32-pinfunc.h> + //Example 4 skew-delay and st,io-sync + pinctrl: pinctrl@44240000 { + compatible = "st,stm32mp257-pinctrl"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x44240000 0xa0400>; + + eth3_rgmii_pins_a: eth3-rgmii-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 6, AF14)>; + st,io-sync = "data on both edges"; + }; + pins2 { + pinmux = <STM32_PINMUX('H', 2, AF14)>; + skew-delay-output-ps = <500>; + }; + }; + }; + ... |