diff options
Diffstat (limited to 'Documentation/devicetree/bindings/rtc')
32 files changed, 577 insertions, 350 deletions
diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml index 4531eec568a6..9df5cdb6f63f 100644 --- a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml @@ -30,7 +30,9 @@ properties: - const: allwinner,sun50i-a64-rtc - const: allwinner,sun8i-h3-rtc - items: - - const: allwinner,sun20i-d1-rtc + - enum: + - allwinner,sun20i-d1-rtc + - allwinner,sun55i-a523-rtc - const: allwinner,sun50i-r329-rtc reg: diff --git a/Documentation/devicetree/bindings/rtc/alphascale,asm9260-rtc.txt b/Documentation/devicetree/bindings/rtc/alphascale,asm9260-rtc.txt deleted file mode 100644 index 76ebca568db9..000000000000 --- a/Documentation/devicetree/bindings/rtc/alphascale,asm9260-rtc.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Alphascale asm9260 SoC Real Time Clock - -Required properties: -- compatible: Should be "alphascale,asm9260-rtc" -- reg: Physical base address of the controller and length - of memory mapped region. -- interrupts: IRQ line for the RTC. -- clocks: Reference to the clock entry. -- clock-names: should contain: - * "ahb" for the SoC RTC clock - -Example: -rtc0: rtc@800a0000 { - compatible = "alphascale,asm9260-rtc"; - reg = <0x800a0000 0x100>; - clocks = <&acc CLKID_AHB_RTC>; - clock-names = "ahb"; - interrupts = <2>; -}; diff --git a/Documentation/devicetree/bindings/rtc/alphascale,asm9260-rtc.yaml b/Documentation/devicetree/bindings/rtc/alphascale,asm9260-rtc.yaml new file mode 100644 index 000000000000..f955a7f638ad --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/alphascale,asm9260-rtc.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/alphascale,asm9260-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Alphascale asm9260 SoC Real Time Clock + +maintainers: + - Javier Carrasco <javier.carrasco.cruz@gmail.com> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + const: alphascale,asm9260-rtc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: ahb + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/alphascale,asm9260.h> + + rtc@800a0000 { + compatible = "alphascale,asm9260-rtc"; + reg = <0x800a0000 0x100>; + clocks = <&acc CLKID_AHB_RTC>; + clock-names = "ahb"; + interrupts = <2>; + }; diff --git a/Documentation/devicetree/bindings/rtc/amlogic,a4-rtc.yaml b/Documentation/devicetree/bindings/rtc/amlogic,a4-rtc.yaml new file mode 100644 index 000000000000..5d3ac737abcb --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/amlogic,a4-rtc.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2024 Amlogic, Inc. All rights reserved +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/amlogic,a4-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic A4 and A5 RTC + +maintainers: + - Yiting Deng <yiting.deng@amlogic.com> + - Xianwei Zhao <xianwei.zhao@amlogic.com> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + enum: + - amlogic,a4-rtc + - amlogic,a5-rtc + + reg: + maxItems: 1 + + clocks: + items: + - description: RTC clock source, available 24M or 32K crystal + oscillator source. when using 24M, need to divide 24M into 32K. + - description: RTC module accesses the clock of the apb bus. + + clock-names: + items: + - const: osc + - const: sys + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + apb { + #address-cells = <2>; + #size-cells = <2>; + + rtc@8e600 { + compatible = "amlogic,a4-rtc"; + reg = <0x0 0x8e600 0x0 0x38>; + clocks = <&xtal_32k>, <&clkc_periphs 1>; + clock-names = "osc", "sys"; + interrupts = <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>; + }; + }; diff --git a/Documentation/devicetree/bindings/rtc/armada-380-rtc.txt b/Documentation/devicetree/bindings/rtc/armada-380-rtc.txt deleted file mode 100644 index c3c9a1226f9a..000000000000 --- a/Documentation/devicetree/bindings/rtc/armada-380-rtc.txt +++ /dev/null @@ -1,24 +0,0 @@ -* Real Time Clock of the Armada 38x/7K/8K SoCs - -RTC controller for the Armada 38x, 7K and 8K SoCs - -Required properties: -- compatible : Should be one of the following: - "marvell,armada-380-rtc" for Armada 38x SoC - "marvell,armada-8k-rtc" for Aramda 7K/8K SoCs -- reg: a list of base address and size pairs, one for each entry in - reg-names -- reg names: should contain: - * "rtc" for the RTC registers - * "rtc-soc" for the SoC related registers and among them the one - related to the interrupt. -- interrupts: IRQ line for the RTC. - -Example: - -rtc@a3800 { - compatible = "marvell,armada-380-rtc"; - reg = <0xa3800 0x20>, <0x184a0 0x0c>; - reg-names = "rtc", "rtc-soc"; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; -}; diff --git a/Documentation/devicetree/bindings/rtc/digicolor-rtc.txt b/Documentation/devicetree/bindings/rtc/digicolor-rtc.txt deleted file mode 100644 index d464986012cd..000000000000 --- a/Documentation/devicetree/bindings/rtc/digicolor-rtc.txt +++ /dev/null @@ -1,17 +0,0 @@ -Conexant Digicolor Real Time Clock controller - -This binding currently supports the CX92755 SoC. - -Required properties: -- compatible: should be "cnxt,cx92755-rtc" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: rtc alarm interrupt - -Example: - - rtc@f0000c30 { - compatible = "cnxt,cx92755-rtc"; - reg = <0xf0000c30 0x18>; - interrupts = <25>; - }; diff --git a/Documentation/devicetree/bindings/rtc/fsl,ls-ftm-alarm.yaml b/Documentation/devicetree/bindings/rtc/fsl,ls-ftm-alarm.yaml new file mode 100644 index 000000000000..3ec111f2fdc4 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/fsl,ls-ftm-alarm.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/fsl,ls-ftm-alarm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale FlexTimer Module (FTM) Alarm + +maintainers: + - Frank Li <Frank.Li@nxp.com> + +properties: + compatible: + enum: + - fsl,ls1012a-ftm-alarm + - fsl,ls1021a-ftm-alarm + - fsl,ls1028a-ftm-alarm + - fsl,ls1043a-ftm-alarm + - fsl,ls1046a-ftm-alarm + - fsl,ls1088a-ftm-alarm + - fsl,ls208xa-ftm-alarm + - fsl,lx2160a-ftm-alarm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + fsl,rcpm-wakeup: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to rcpm node + - description: bit mask of IPPDEXPCR0 + - description: bit mask of IPPDEXPCR1 + - description: bit mask of IPPDEXPCR2 + - description: bit mask of IPPDEXPCR3 + - description: bit mask of IPPDEXPCR4 + - description: bit mask of IPPDEXPCR5 + - description: bit mask of IPPDEXPCR6 + minItems: 1 + description: + phandle to rcpm node, Please refer + Documentation/devicetree/bindings/soc/fsl/fsl,rcpm.yaml + + big-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: + If the host controller is big-endian mode, specify this property. + The default endian mode is little-endian. + +required: + - compatible + - reg + - interrupts + - fsl,rcpm-wakeup + +allOf: + - $ref: rtc.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + rtc@2800000 { + compatible = "fsl,ls1088a-ftm-alarm"; + reg = <0x2800000 0x10000>; + fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + }; diff --git a/Documentation/devicetree/bindings/rtc/fsl,stmp3xxx-rtc.yaml b/Documentation/devicetree/bindings/rtc/fsl,stmp3xxx-rtc.yaml new file mode 100644 index 000000000000..534de4196a4f --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/fsl,stmp3xxx-rtc.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/fsl,stmp3xxx-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMP3xxx/i.MX28 Time Clock Controller + +maintainers: + - Javier Carrasco <javier.carrasco.cruz@gmail.com> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx28-rtc + - fsl,imx23-rtc + - const: fsl,stmp3xxx-rtc + - const: fsl,stmp3xxx-rtc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + stmp,crystal-freq: + description: + Override crystal frequency as determined from fuse bits. + Use <0> for "no crystal". + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 32000, 32768] + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + rtc@80056000 { + compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc"; + reg = <0x80056000 2000>; + interrupts = <29>; + }; diff --git a/Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt b/Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt deleted file mode 100644 index 634312dd95ca..000000000000 --- a/Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt +++ /dev/null @@ -1,17 +0,0 @@ -Android Goldfish RTC - -Android Goldfish RTC device used by Android emulator. - -Required properties: - -- compatible : should contain "google,goldfish-rtc" -- reg : <registers mapping> -- interrupts : <interrupt mapping> - -Example: - - goldfish_timer@9020000 { - compatible = "google,goldfish-rtc"; - reg = <0x9020000 0x1000>; - interrupts = <0x3>; - }; diff --git a/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt b/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt deleted file mode 100644 index a87a1e9bc060..000000000000 --- a/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt +++ /dev/null @@ -1,15 +0,0 @@ -* NXP LPC32xx SoC Real Time Clock controller - -Required properties: -- compatible: must be "nxp,lpc3220-rtc" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: The RTC interrupt - -Example: - - rtc@40024000 { - compatible = "nxp,lpc3220-rtc"; - reg = <0x40024000 0x1000>; - interrupts = <52 0>; - }; diff --git a/Documentation/devicetree/bindings/rtc/marvell,armada-380-rtc.yaml b/Documentation/devicetree/bindings/rtc/marvell,armada-380-rtc.yaml new file mode 100644 index 000000000000..adf3ba0cd09f --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/marvell,armada-380-rtc.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/marvell,armada-380-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RTC controller for the Armada 38x, 7K and 8K SoCs + +maintainers: + - Javier Carrasco <javier.carrasco.cruz@gmail.com> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + enum: + - marvell,armada-380-rtc + - marvell,armada-8k-rtc + + reg: + items: + - description: RTC base address size + - description: Base address and size of SoC related registers + + reg-names: + items: + - const: rtc + - const: rtc-soc + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + rtc@a3800 { + compatible = "marvell,armada-380-rtc"; + reg = <0xa3800 0x20>, <0x184a0 0x0c>; + reg-names = "rtc", "rtc-soc"; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + }; diff --git a/Documentation/devicetree/bindings/rtc/marvell,pxa-rtc.yaml b/Documentation/devicetree/bindings/rtc/marvell,pxa-rtc.yaml new file mode 100644 index 000000000000..43d68681a1bf --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/marvell,pxa-rtc.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/marvell,pxa-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PXA Real Time Clock + +maintainers: + - Javier Carrasco <javier.carrasco.cruz@gmail.com> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + const: marvell,pxa-rtc + + reg: + maxItems: 1 + + interrupts: + items: + - description: 1 Hz + - description: Alarm + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + rtc@40900000 { + compatible = "marvell,pxa-rtc"; + reg = <0x40900000 0x3c>; + interrupts = <30>, <31>; + }; diff --git a/Documentation/devicetree/bindings/rtc/maxim,ds1742.txt b/Documentation/devicetree/bindings/rtc/maxim,ds1742.txt deleted file mode 100644 index d0f937c355b5..000000000000 --- a/Documentation/devicetree/bindings/rtc/maxim,ds1742.txt +++ /dev/null @@ -1,12 +0,0 @@ -* Maxim (Dallas) DS1742/DS1743 Real Time Clock - -Required properties: -- compatible: Should contain "maxim,ds1742". -- reg: Physical base address of the RTC and length of memory - mapped region. - -Example: - rtc: rtc@10000000 { - compatible = "maxim,ds1742"; - reg = <0x10000000 0x800>; - }; diff --git a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml b/Documentation/devicetree/bindings/rtc/microchip,mpfs-rtc.yaml index 7742465b9383..a3e60d9f8399 100644 --- a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/microchip,mpfs-rtc.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/rtc/microchip,mfps-rtc.yaml# +$id: http://devicetree.org/schemas/rtc/microchip,mpfs-rtc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# @@ -12,12 +12,14 @@ allOf: maintainers: - Daire McNamara <daire.mcnamara@microchip.com> - - Lewis Hanly <lewis.hanly@microchip.com> properties: compatible: - enum: - - microchip,mpfs-rtc + oneOf: + - items: + - const: microchip,pic64gx-rtc + - const: microchip,mpfs-rtc + - const: microchip,mpfs-rtc reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml b/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml index 5ade5dfad048..cda8ad7c1203 100644 --- a/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml +++ b/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml @@ -22,6 +22,9 @@ properties: interrupts: maxItems: 1 + "#clock-cells": + const: 0 + trickle-resistor-ohms: enum: - 3000 diff --git a/Documentation/devicetree/bindings/rtc/nxp,lpc1788-rtc.txt b/Documentation/devicetree/bindings/rtc/nxp,lpc1788-rtc.txt deleted file mode 100644 index 3c97bd180592..000000000000 --- a/Documentation/devicetree/bindings/rtc/nxp,lpc1788-rtc.txt +++ /dev/null @@ -1,21 +0,0 @@ -NXP LPC1788 real-time clock - -The LPC1788 RTC provides calendar and clock functionality -together with periodic tick and alarm interrupt support. - -Required properties: -- compatible : must contain "nxp,lpc1788-rtc" -- reg : Specifies base physical address and size of the registers. -- interrupts : A single interrupt specifier. -- clocks : Must contain clock specifiers for rtc and register clock -- clock-names : Must contain "rtc" and "reg" - See ../clocks/clock-bindings.txt for details. - -Example: -rtc: rtc@40046000 { - compatible = "nxp,lpc1788-rtc"; - reg = <0x40046000 0x1000>; - interrupts = <47>; - clocks = <&creg_clk 0>, <&ccu1 CLK_CPU_BUS>; - clock-names = "rtc", "reg"; -}; diff --git a/Documentation/devicetree/bindings/rtc/nxp,lpc1788-rtc.yaml b/Documentation/devicetree/bindings/rtc/nxp,lpc1788-rtc.yaml new file mode 100644 index 000000000000..e88b847a1cc5 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/nxp,lpc1788-rtc.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/nxp,lpc1788-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP LPC1788 real-time clock + +description: + The LPC1788 RTC provides calendar and clock functionality + together with periodic tick and alarm interrupt support. + +maintainers: + - Javier Carrasco <javier.carrasco.cruz@gmail.com> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + const: nxp,lpc1788-rtc + + reg: + maxItems: 1 + + clocks: + items: + - description: RTC clock + - description: Register clock + + clock-names: + items: + - const: rtc + - const: reg + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/lpc18xx-ccu.h> + + rtc@40046000 { + compatible = "nxp,lpc1788-rtc"; + reg = <0x40046000 0x1000>; + clocks = <&creg_clk 0>, <&ccu1 CLK_CPU_BUS>; + clock-names = "rtc", "reg"; + interrupts = <47>; + }; diff --git a/Documentation/devicetree/bindings/rtc/orion-rtc.txt b/Documentation/devicetree/bindings/rtc/orion-rtc.txt deleted file mode 100644 index 3bf63ffa5160..000000000000 --- a/Documentation/devicetree/bindings/rtc/orion-rtc.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Mvebu Real Time Clock - -RTC controller for the Kirkwood, the Dove, the Armada 370 and the -Armada XP SoCs - -Required properties: -- compatible : Should be "marvell,orion-rtc" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: IRQ line for the RTC. - -Example: - -rtc@10300 { - compatible = "marvell,orion-rtc"; - reg = <0xd0010300 0x20>; - interrupts = <50>; -}; diff --git a/Documentation/devicetree/bindings/rtc/pxa-rtc.txt b/Documentation/devicetree/bindings/rtc/pxa-rtc.txt deleted file mode 100644 index 8c6672a1b7d7..000000000000 --- a/Documentation/devicetree/bindings/rtc/pxa-rtc.txt +++ /dev/null @@ -1,14 +0,0 @@ -* PXA RTC - -PXA specific RTC driver. - -Required properties: -- compatible : Should be "marvell,pxa-rtc" - -Examples: - -rtc@40900000 { - compatible = "marvell,pxa-rtc"; - reg = <0x40900000 0x3c>; - interrupts = <30 31>; -}; diff --git a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml new file mode 100644 index 000000000000..e70eeb66aa64 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/renesas,rz-rtca3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RTCA-3 Real Time Clock + +maintainers: + - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + items: + - enum: + - renesas,r9a08g045-rtca3 # RZ/G3S + - const: renesas,rz-rtca3 + + reg: + maxItems: 1 + + interrupts: + items: + - description: Alarm interrupt + - description: Periodic interrupt + - description: Carry interrupt + + interrupt-names: + items: + - const: alarm + - const: period + - const: carry + + clocks: + items: + - description: RTC bus clock + - description: RTC counter clock + + clock-names: + items: + - const: bus + - const: counter + + power-domains: + maxItems: 1 + + resets: + items: + - description: VBATTB module reset + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/r9a08g045-cpg.h> + #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + rtc@1004ec00 { + compatible = "renesas,r9a08g045-rtca3", "renesas,rz-rtca3"; + reg = <0x1004ec00 0x400>; + interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "alarm", "period", "carry"; + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattclk VBATTB_VBATTCLK>; + clock-names = "bus", "counter"; + power-domains = <&cpg>; + resets = <&cpg R9A08G045_VBAT_BRESETN>; + }; diff --git a/Documentation/devicetree/bindings/rtc/rtc-aspeed.txt b/Documentation/devicetree/bindings/rtc/rtc-aspeed.txt deleted file mode 100644 index 2e956b3dc276..000000000000 --- a/Documentation/devicetree/bindings/rtc/rtc-aspeed.txt +++ /dev/null @@ -1,22 +0,0 @@ -ASPEED BMC RTC -============== - -Required properties: - - compatible: should be one of the following - * aspeed,ast2400-rtc for the ast2400 - * aspeed,ast2500-rtc for the ast2500 - * aspeed,ast2600-rtc for the ast2600 - - - reg: physical base address of the controller and length of memory mapped - region - - - interrupts: The interrupt number - -Example: - - rtc@1e781000 { - compatible = "aspeed,ast2400-rtc"; - reg = <0x1e781000 0x18>; - interrupts = <22>; - status = "disabled"; - }; diff --git a/Documentation/devicetree/bindings/rtc/rtc-fsl-ftm-alarm.txt b/Documentation/devicetree/bindings/rtc/rtc-fsl-ftm-alarm.txt deleted file mode 100644 index fffac74999da..000000000000 --- a/Documentation/devicetree/bindings/rtc/rtc-fsl-ftm-alarm.txt +++ /dev/null @@ -1,36 +0,0 @@ -Freescale FlexTimer Module (FTM) Alarm - -Required properties: -- compatible : Should be "fsl,<chip>-ftm-alarm", the - supported chips include - "fsl,ls1012a-ftm-alarm" - "fsl,ls1021a-ftm-alarm" - "fsl,ls1028a-ftm-alarm" - "fsl,ls1043a-ftm-alarm" - "fsl,ls1046a-ftm-alarm" - "fsl,ls1088a-ftm-alarm" - "fsl,ls208xa-ftm-alarm" - "fsl,lx2160a-ftm-alarm" -- reg : Specifies base physical address and size of the register sets for the - FlexTimer Module. -- interrupts : Should be the FlexTimer Module interrupt. -- fsl,rcpm-wakeup property and rcpm node : Please refer - Documentation/devicetree/bindings/soc/fsl/rcpm.txt - -Optional properties: -- big-endian: If the host controller is big-endian mode, specify this property. - The default endian mode is little-endian. - -Example: -rcpm: rcpm@1e34040 { - compatible = "fsl,ls1088a-rcpm", "fsl,qoriq-rcpm-2.1+"; - reg = <0x0 0x1e34040 0x0 0x18>; - #fsl,rcpm-wakeup-cells = <6>; -}; - -ftm_alarm0: timer@2800000 { - compatible = "fsl,ls1088a-ftm-alarm"; - reg = <0x0 0x2800000 0x0 0x10000>; - fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>; - interrupts = <0 44 4>; -}; diff --git a/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt b/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt deleted file mode 100644 index 7212076a8f1b..000000000000 --- a/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt +++ /dev/null @@ -1,31 +0,0 @@ -Device-Tree bindings for MediaTek PMIC based RTC - -MediaTek PMIC based RTC is an independent function of MediaTek PMIC that works -as a type of multi-function device (MFD). The RTC can be configured and set up -with PMIC wrapper bus which is a common resource shared with the other -functions found on the same PMIC. - -For MediaTek PMIC MFD bindings, see: -../mfd/mt6397.txt - -For MediaTek PMIC wrapper bus bindings, see: -../soc/mediatek/pwrap.txt - -Required properties: -- compatible: Should be one of follows - "mediatek,mt6323-rtc": for MT6323 PMIC - "mediatek,mt6358-rtc": for MT6358 PMIC - "mediatek,mt6366-rtc", "mediatek,mt6358-rtc": for MT6366 PMIC - "mediatek,mt6397-rtc": for MT6397 PMIC - -Example: - - pmic { - compatible = "mediatek,mt6323"; - - ... - - rtc { - compatible = "mediatek,mt6323-rtc"; - }; - }; diff --git a/Documentation/devicetree/bindings/rtc/rtc-mxc.yaml b/Documentation/devicetree/bindings/rtc/rtc-mxc.yaml index a14b52178c4b..2599b847f406 100644 --- a/Documentation/devicetree/bindings/rtc/rtc-mxc.yaml +++ b/Documentation/devicetree/bindings/rtc/rtc-mxc.yaml @@ -14,9 +14,13 @@ maintainers: properties: compatible: - enum: - - fsl,imx1-rtc - - fsl,imx21-rtc + oneOf: + - const: fsl,imx1-rtc + - const: fsl,imx21-rtc + - items: + - enum: + - fsl,imx31-rtc + - const: fsl,imx21-rtc reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/rtc/spear-rtc.txt b/Documentation/devicetree/bindings/rtc/spear-rtc.txt deleted file mode 100644 index fecf8e4ad4b4..000000000000 --- a/Documentation/devicetree/bindings/rtc/spear-rtc.txt +++ /dev/null @@ -1,15 +0,0 @@ -* SPEAr RTC - -Required properties: -- compatible : "st,spear600-rtc" -- reg : Address range of the rtc registers -- interrupt: Should contain the rtc interrupt number - -Example: - - rtc@fc000000 { - compatible = "st,spear600-rtc"; - reg = <0xfc000000 0x1000>; - interrupt-parent = <&vic1>; - interrupts = <12>; - }; diff --git a/Documentation/devicetree/bindings/rtc/sprd,sc2731-rtc.yaml b/Documentation/devicetree/bindings/rtc/sprd,sc2731-rtc.yaml new file mode 100644 index 000000000000..5756f617df36 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/sprd,sc2731-rtc.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/sprd,sc2731-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Spreadtrum SC2731 Real Time Clock + +maintainers: + - Orson Zhai <orsonzhai@gmail.com> + - Baolin Wang <baolin.wang7@gmail.com> + - Chunyan Zhang <zhang.lyra@gmail.com> + +properties: + compatible: + const: sprd,sc2731-rtc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +allOf: + - $ref: rtc.yaml# + +unevaluatedProperties: false +... diff --git a/Documentation/devicetree/bindings/rtc/sprd,sc27xx-rtc.txt b/Documentation/devicetree/bindings/rtc/sprd,sc27xx-rtc.txt deleted file mode 100644 index 1f5754299d31..000000000000 --- a/Documentation/devicetree/bindings/rtc/sprd,sc27xx-rtc.txt +++ /dev/null @@ -1,26 +0,0 @@ -Spreadtrum SC27xx Real Time Clock - -Required properties: -- compatible: should be "sprd,sc2731-rtc". -- reg: address offset of rtc register. -- interrupts: rtc alarm interrupt. - -Example: - - sc2731_pmic: pmic@0 { - compatible = "sprd,sc2731"; - reg = <0>; - spi-max-frequency = <26000000>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; - interrupt-controller; - #interrupt-cells = <2>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@280 { - compatible = "sprd,sc2731-rtc"; - reg = <0x280>; - interrupt-parent = <&sc2731_pmic>; - interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; - }; - }; diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml index 4703083d1f11..aae06e570c22 100644 --- a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml @@ -15,6 +15,7 @@ properties: - st,stm32-rtc - st,stm32h7-rtc - st,stm32mp1-rtc + - st,stm32mp25-rtc reg: maxItems: 1 @@ -52,6 +53,28 @@ properties: override default rtc_ck parent clock phandle of the new parent clock of rtc_ck maxItems: 1 +patternProperties: + "^rtc-[a-z]+-[0-9]+$": + type: object + $ref: /schemas/pinctrl/pinmux-node.yaml + description: | + Configuration of STM32 RTC pins description. STM32 RTC is able to output + some signals on specific pins: + - LSCO (Low Speed Clock Output) that allow to output LSE clock on a pin. + - Alarm out that allow to send a pulse on a pin when alarm A of the RTC + expires. + additionalProperties: false + properties: + function: + enum: + - lsco + - alarm-a + pins: + enum: + - out1 + - out2 + - out2_rmp + allOf: - if: properties: @@ -67,6 +90,9 @@ allOf: clock-names: false + patternProperties: + "^rtc-[a-z]+-[0-9]+$": false + required: - st,syscfg @@ -82,6 +108,9 @@ allOf: minItems: 2 maxItems: 2 + patternProperties: + "^rtc-[a-z]+-[0-9]+$": false + required: - clock-names - st,syscfg @@ -90,7 +119,9 @@ allOf: properties: compatible: contains: - const: st,stm32mp1-rtc + enum: + - st,stm32mp1-rtc + - st,stm32mp25-rtc then: properties: diff --git a/Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt b/Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt deleted file mode 100644 index fa6a94226669..000000000000 --- a/Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt +++ /dev/null @@ -1,21 +0,0 @@ -* STMP3xxx/i.MX28 Time Clock controller - -Required properties: -- compatible: should be one of the following. - * "fsl,stmp3xxx-rtc" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: rtc alarm interrupt - -Optional properties: -- stmp,crystal-freq: override crystal frequency as determined from fuse bits. - Only <32000> and <32768> are possible for the hardware. Use <0> for - "no crystal". - -Example: - -rtc@80056000 { - compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc"; - reg = <0x80056000 2000>; - interrupts = <29>; -}; diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml index c9e3c5262c21..7330a7200831 100644 --- a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml @@ -24,35 +24,47 @@ properties: - abracon,abb5zes3 # AB-RTCMC-32.768kHz-EOZ9: Real Time Clock/Calendar Module with I2C Interface - abracon,abeoz9 + # ASPEED BMC ast2400 Real-time Clock + - aspeed,ast2400-rtc + # ASPEED BMC ast2500 Real-time Clock + - aspeed,ast2500-rtc + # ASPEED BMC ast2600 Real-time Clock + - aspeed,ast2600-rtc + # Conexant Digicolor Real Time Clock Controller + - cnxt,cx92755-rtc # I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output - dallas,ds1374 # Dallas DS1672 Real-time Clock - dallas,ds1672 # Extremely Accurate I²C RTC with Integrated Crystal and SRAM - dallas,ds3232 + # SD2405AL Real-Time Clock + - dfrobot,sd2405al # EM Microelectronic EM3027 RTC - emmicro,em3027 # I2C-BUS INTERFACE REAL TIME CLOCK MODULE - epson,rx8010 # I2C-BUS INTERFACE REAL TIME CLOCK MODULE - - epson,rx8025 - epson,rx8035 # I2C-BUS INTERFACE REAL TIME CLOCK MODULE with Battery Backed RAM + - epson,rx8111 - epson,rx8571 # I2C-BUS INTERFACE REAL TIME CLOCK MODULE - epson,rx8581 - # Intersil ISL1208 Low Power RTC with Battery Backed SRAM - - isil,isl1208 - # Intersil ISL1218 Low Power RTC with Battery Backed SRAM - - isil,isl1218 + # Android Goldfish Real-time Clock + - google,goldfish-rtc + # Mvebu Real-time Clock + - marvell,orion-rtc + # Maxim DS1742/DS1743 Real-time Clock + - maxim,ds1742 # SPI-BUS INTERFACE REAL TIME CLOCK MODULE - maxim,mcp795 # Real Time Clock Module with I2C-Bus - microcrystal,rv3029 # Real Time Clock - microcrystal,rv8523 - # Real-time Clock Module - - pericom,pt7c4338 + # NXP LPC32xx SoC Real-time Clock + - nxp,lpc3220-rtc # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC - ricoh,r2025sd # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC @@ -67,6 +79,10 @@ properties: - ricoh,rv5c387a # 2-wire CMOS real-time clock - sii,s35390a + # ST SPEAr Real-time Clock + - st,spear600-rtc + # VIA/Wondermedia VT8500 Real-time Clock + - via,vt8500-rtc # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC - whwave,sd3078 # Xircom X1205 I2C RTC diff --git a/Documentation/devicetree/bindings/rtc/twl-rtc.txt b/Documentation/devicetree/bindings/rtc/twl-rtc.txt deleted file mode 100644 index 8f9a94f2f896..000000000000 --- a/Documentation/devicetree/bindings/rtc/twl-rtc.txt +++ /dev/null @@ -1,11 +0,0 @@ -* Texas Instruments TWL4030/6030 RTC - -Required properties: -- compatible : Should be "ti,twl4030-rtc" -- interrupts : Should be the interrupt number. - -Example: - rtc { - compatible = "ti,twl4030-rtc"; - interrupts = <11>; - }; diff --git a/Documentation/devicetree/bindings/rtc/via,vt8500-rtc.txt b/Documentation/devicetree/bindings/rtc/via,vt8500-rtc.txt deleted file mode 100644 index 3c0484c49582..000000000000 --- a/Documentation/devicetree/bindings/rtc/via,vt8500-rtc.txt +++ /dev/null @@ -1,15 +0,0 @@ -VIA/Wondermedia VT8500 Realtime Clock Controller ------------------------------------------------------ - -Required properties: -- compatible : "via,vt8500-rtc" -- reg : Should contain 1 register ranges(address and length) -- interrupts : alarm interrupt - -Example: - - rtc@d8100000 { - compatible = "via,vt8500-rtc"; - reg = <0xd8100000 0x10000>; - interrupts = <48>; - }; |