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-rw-r--r--Documentation/devicetree/bindings/cris/axis.txt9
-rw-r--r--Documentation/devicetree/bindings/cris/boards.txt8
-rw-r--r--Documentation/devicetree/bindings/cris/interrupts.txt23
3 files changed, 40 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/cris/axis.txt b/Documentation/devicetree/bindings/cris/axis.txt
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index 000000000000..d209ca2a47c0
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+++ b/Documentation/devicetree/bindings/cris/axis.txt
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+Axis Communications AB
+ARTPEC series SoC Device Tree Bindings
+
+
+CRISv32 based SoCs are ETRAX FS and ARTPEC-3:
+
+ - compatible = "axis,crisv32";
+
+
diff --git a/Documentation/devicetree/bindings/cris/boards.txt b/Documentation/devicetree/bindings/cris/boards.txt
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index 000000000000..533dd273ccf7
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+++ b/Documentation/devicetree/bindings/cris/boards.txt
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+Boards based on the CRIS SoCs:
+
+Required root node properties:
+ - compatible = should be one or more of the following:
+ - "axis,dev88" - for Axis devboard 88 with ETRAX FS
+
+Optional:
+
diff --git a/Documentation/devicetree/bindings/cris/interrupts.txt b/Documentation/devicetree/bindings/cris/interrupts.txt
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index 000000000000..e8b123b0a5e6
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+++ b/Documentation/devicetree/bindings/cris/interrupts.txt
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+* CRISv32 Interrupt Controller
+
+Interrupt controller for the CRISv32 SoCs.
+
+Main node required properties:
+
+- compatible : should be:
+ "axis,crisv32-intc"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The type shall be a <u32> and the value shall be 1.
+- reg: physical base address and size of the intc registers map.
+
+Example:
+
+ intc: interrupt-controller {
+ compatible = "axis,crisv32-intc";
+ reg = <0xb001c000 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+