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Diffstat (limited to 'arch/arc/boot/dts/hsdk.dts')
-rw-r--r--arch/arc/boot/dts/hsdk.dts50
1 files changed, 42 insertions, 8 deletions
diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts
index 7425bb0f2d1b..9a45cb093096 100644
--- a/arch/arc/boot/dts/hsdk.dts
+++ b/arch/arc/boot/dts/hsdk.dts
@@ -1,9 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2017 Synopsys, Inc. (www.synopsys.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
/*
@@ -11,7 +8,6 @@
*/
/dts-v1/;
-#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/reset/snps,hsdk-reset.h>
/ {
@@ -167,6 +163,24 @@
#clock-cells = <0>;
};
+ gpu_core_clk: gpu-core-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <400000000>;
+ #clock-cells = <0>;
+ };
+
+ gpu_dma_clk: gpu-dma-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <400000000>;
+ #clock-cells = <0>;
+ };
+
+ gpu_cfg_clk: gpu-cfg-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ #clock-cells = <0>;
+ };
+
dmac_core_clk: dmac-core-clk {
compatible = "fixed-clock";
clock-frequency = <400000000>;
@@ -187,6 +201,7 @@
interrupt-names = "macirq";
phy-mode = "rgmii";
snps,pbl = <32>;
+ snps,multicast-filter-bins = <256>;
clocks = <&gmacclk>;
clock-names = "stmmaceth";
phy-handle = <&phy0>;
@@ -195,15 +210,15 @@
mac-address = [00 00 00 00 00 00]; /* Filled in by U-Boot */
dma-coherent;
+ tx-fifo-depth = <4096>;
+ rx-fifo-depth = <4096>;
+
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <0>;
- ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
};
};
@@ -237,6 +252,14 @@
dma-coherent;
};
+ creg_gpio: gpio@14b0 {
+ compatible = "snps,creg-gpio-hsdk";
+ reg = <0x14b0 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <2>;
+ };
+
gpio: gpio@3000 {
compatible = "snps,dw-apb-gpio";
reg = <0x3000 0x20>;
@@ -252,6 +275,17 @@
};
};
+ gpu_3d: gpu@90000 {
+ compatible = "vivante,gc";
+ reg = <0x90000 0x4000>;
+ clocks = <&gpu_dma_clk>,
+ <&gpu_cfg_clk>,
+ <&gpu_core_clk>,
+ <&gpu_core_clk>;
+ clock-names = "bus", "reg", "core", "shader";
+ interrupts = <28>;
+ };
+
dmac: dmac@80000 {
compatible = "snps,axi-dma-1.01a";
reg = <0x80000 0x400>;