diff options
Diffstat (limited to 'arch/arm/boot/dts/allwinner/sun8i-v3.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/allwinner/sun8i-v3.dtsi | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3.dtsi new file mode 100644 index 000000000000..95bd0b616349 --- /dev/null +++ b/arch/arm/boot/dts/allwinner/sun8i-v3.dtsi @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io> + * Copyright (C) 2021 Tobias Schramm <t.schramm@manjaro.org> + */ + +#include "sun8i-v3s.dtsi" + +/ { + soc { + i2s0: i2s@1c22000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun8i-v3-i2s", + "allwinner,sun8i-h3-i2s"; + reg = <0x01c22000 0x400>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>; + clock-names = "apb", "mod"; + dmas = <&dma 3>, <&dma 3>; + dma-names = "rx", "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_pins>; + resets = <&ccu RST_BUS_I2S0>; + status = "disabled"; + }; + }; +}; + +&ccu { + compatible = "allwinner,sun8i-v3-ccu"; +}; + +&codec_analog { + compatible = "allwinner,sun8i-v3-codec-analog", + "allwinner,sun8i-h3-codec-analog"; +}; + +&emac { + /delete-property/ phy-handle; + /delete-property/ phy-mode; +}; + +&mdio_mux { + external_mdio: mdio@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; + +&pio { + compatible = "allwinner,sun8i-v3-pinctrl"; + + i2s0_pins: i2s0-pins { + pins = "PG10", "PG11", "PG12", "PG13"; + function = "i2s"; + }; + + /omit-if-no-ref/ + lcd_rgb666_pd_pins: lcd-rgb666-pd-pins { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", + "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", + "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", + "PD18", "PD19", "PD20", "PD21"; + function = "lcd"; + }; + + uart1_pg_pins: uart1-pg-pins { + pins = "PG6", "PG7"; + function = "uart1"; + }; +}; |