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Diffstat (limited to 'arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi | 146 |
1 files changed, 0 insertions, 146 deletions
diff --git a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi deleted file mode 100644 index 9b508a8161f5..000000000000 --- a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi +++ /dev/null @@ -1,146 +0,0 @@ -/* - * Device Tree file for SolidRun Armada 38x Microsom - * - * Copyright (C) 2015 Russell King - * - * This board is in development; the contents of this file work with - * the A1 rev 2.0 of the board, which does not represent final - * production board. Things will change, don't expect this file to - * remain compatible info the future. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include <dt-bindings/input/input.h> -#include <dt-bindings/gpio/gpio.h> - -/ { - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; /* 256 MB */ - }; - - soc { - ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 - MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 - MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 - MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 - MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { - rtc@a3800 { - /* - * If the rtc doesn't work, run "date reset" - * twice in u-boot. - */ - status = "okay"; - }; - }; - }; -}; - -&bm { - status = "okay"; -}; - -&bm_bppi { - status = "okay"; -}; - -ð0 { - /* ethernet@70000 */ - pinctrl-0 = <&ge0_rgmii_pins>; - pinctrl-names = "default"; - phy = <&phy_dedicated>; - phy-mode = "rgmii-id"; - buffer-manager = <&bm>; - bm,pool-long = <0>; - bm,pool-short = <1>; - status = "okay"; -}; - -&mdio { - /* - * Add the phy clock here, so the phy can be accessed to read its - * IDs prior to binding with the driver. - */ - pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>; - pinctrl-names = "default"; - - phy_dedicated: ethernet-phy@0 { - /* - * Annoyingly, the marvell phy driver configures the LED - * register, rather than preserving reset-loaded setting. - * We undo that rubbish here. - */ - marvell,reg-init = <3 16 0 0x101e>; - reg = <0>; - }; -}; - -&pinctrl { - microsom_phy_clk_pins: microsom-phy-clk-pins { - marvell,pins = "mpp45"; - marvell,function = "ref"; - }; - /* Optional eMMC */ - microsom_sdhci_pins: microsom-sdhci-pins { - marvell,pins = "mpp21", "mpp28", "mpp37", - "mpp38", "mpp39", "mpp40"; - marvell,function = "sd0"; - }; -}; - -&spi1 { - /* The microsom has an optional W25Q32 on board, connected to CS0 */ - pinctrl-0 = <&spi1_pins>; - - w25q32: spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "w25q32", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <3000000>; - status = "disabled"; - }; -}; - -&uart0 { - pinctrl-0 = <&uart0_pins>; - pinctrl-names = "default"; - status = "okay"; -}; |