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Diffstat (limited to 'arch/arm/boot/dts/exynos5420.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi66
1 files changed, 33 insertions, 33 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index bf0f97428327..b1051a7d07af 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -182,7 +182,7 @@
clock_audss: audss-clock-controller@3810000 {
compatible = "samsung,exynos5420-audss-clock";
- reg = <0x03810000 0x0C>;
+ reg = <0x03810000 0x0c>;
#clock-cells = <1>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
<&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
@@ -262,37 +262,37 @@
nocp_mem0_0: nocp@10ca1000 {
compatible = "samsung,exynos5420-nocp";
- reg = <0x10CA1000 0x200>;
+ reg = <0x10ca1000 0x200>;
status = "disabled";
};
nocp_mem0_1: nocp@10ca1400 {
compatible = "samsung,exynos5420-nocp";
- reg = <0x10CA1400 0x200>;
+ reg = <0x10ca1400 0x200>;
status = "disabled";
};
nocp_mem1_0: nocp@10ca1800 {
compatible = "samsung,exynos5420-nocp";
- reg = <0x10CA1800 0x200>;
+ reg = <0x10ca1800 0x200>;
status = "disabled";
};
nocp_mem1_1: nocp@10ca1c00 {
compatible = "samsung,exynos5420-nocp";
- reg = <0x10CA1C00 0x200>;
+ reg = <0x10ca1c00 0x200>;
status = "disabled";
};
nocp_g3d_0: nocp@11a51000 {
compatible = "samsung,exynos5420-nocp";
- reg = <0x11A51000 0x200>;
+ reg = <0x11a51000 0x200>;
status = "disabled";
};
nocp_g3d_1: nocp@11a51400 {
compatible = "samsung,exynos5420-nocp";
- reg = <0x11A51400 0x200>;
+ reg = <0x11a51400 0x200>;
status = "disabled";
};
@@ -374,14 +374,14 @@
disp_pd: power-domain@100440c0 {
compatible = "samsung,exynos4210-pd";
- reg = <0x100440C0 0x20>;
+ reg = <0x100440c0 0x20>;
#power-domain-cells = <0>;
label = "DISP";
};
mau_pd: power-domain@100440e0 {
compatible = "samsung,exynos4210-pd";
- reg = <0x100440E0 0x20>;
+ reg = <0x100440e0 0x20>;
#power-domain-cells = <0>;
label = "MAU";
};
@@ -442,7 +442,7 @@
pdma0: dma-controller@121a0000 {
compatible = "arm,pl330", "arm,primecell";
- reg = <0x121A0000 0x1000>;
+ reg = <0x121a0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
@@ -451,7 +451,7 @@
pdma1: dma-controller@121b0000 {
compatible = "arm,pl330", "arm,primecell";
- reg = <0x121B0000 0x1000>;
+ reg = <0x121b0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
@@ -469,7 +469,7 @@
mdma1: dma-controller@11c10000 {
compatible = "arm,pl330", "arm,primecell";
- reg = <0x11C10000 0x1000>;
+ reg = <0x11c10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk";
@@ -507,7 +507,7 @@
i2s1: i2s@12d60000 {
compatible = "samsung,exynos5420-i2s";
- reg = <0x12D60000 0x100>;
+ reg = <0x12d60000 0x100>;
dmas = <&pdma1 12>,
<&pdma1 11>;
dma-names = "tx", "rx";
@@ -523,7 +523,7 @@
i2s2: i2s@12d70000 {
compatible = "samsung,exynos5420-i2s";
- reg = <0x12D70000 0x100>;
+ reg = <0x12d70000 0x100>;
dmas = <&pdma0 12>,
<&pdma0 11>;
dma-names = "tx", "rx";
@@ -612,7 +612,7 @@
hsi2c_8: i2c@12e00000 {
compatible = "samsung,exynos5250-hsi2c";
- reg = <0x12E00000 0x1000>;
+ reg = <0x12e00000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -625,7 +625,7 @@
hsi2c_9: i2c@12e10000 {
compatible = "samsung,exynos5250-hsi2c";
- reg = <0x12E10000 0x1000>;
+ reg = <0x12e10000 0x1000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -638,7 +638,7 @@
hsi2c_10: i2c@12e20000 {
compatible = "samsung,exynos5250-hsi2c";
- reg = <0x12E20000 0x1000>;
+ reg = <0x12e20000 0x1000>;
interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -666,12 +666,12 @@
};
hdmiphy: hdmi-phy@145d0000 {
- reg = <0x145D0000 0x20>;
+ reg = <0x145d0000 0x20>;
};
hdmicec: cec@101b0000 {
compatible = "samsung,s5p-cec";
- reg = <0x101B0000 0x200>;
+ reg = <0x101b0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_HDMI_CEC>;
clock-names = "hdmicec";
@@ -696,7 +696,7 @@
rotator: rotator@11c00000 {
compatible = "samsung,exynos5250-rotator";
- reg = <0x11C00000 0x64>;
+ reg = <0x11c00000 0x64>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_ROTATOR>;
clock-names = "rotator";
@@ -805,7 +805,7 @@
jpeg_0: jpeg@11f50000 {
compatible = "samsung,exynos5420-jpeg";
- reg = <0x11F50000 0x1000>;
+ reg = <0x11f50000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "jpeg";
clocks = <&clock CLK_JPEG>;
@@ -814,7 +814,7 @@
jpeg_1: jpeg@11f60000 {
compatible = "samsung,exynos5420-jpeg";
- reg = <0x11F60000 0x1000>;
+ reg = <0x11f60000 0x1000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "jpeg";
clocks = <&clock CLK_JPEG2>;
@@ -879,7 +879,7 @@
sysmmu_g2dr: sysmmu@10a60000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x10A60000 0x1000>;
+ reg = <0x10a60000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <24 5>;
clock-names = "sysmmu", "master";
@@ -889,7 +889,7 @@
sysmmu_g2dw: sysmmu@10a70000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x10A70000 0x1000>;
+ reg = <0x10a70000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <22 2>;
clock-names = "sysmmu", "master";
@@ -910,7 +910,7 @@
sysmmu_gscl0: sysmmu@13e80000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x13E80000 0x1000>;
+ reg = <0x13e80000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <2 0>;
clock-names = "sysmmu", "master";
@@ -921,7 +921,7 @@
sysmmu_gscl1: sysmmu@13e90000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x13E90000 0x1000>;
+ reg = <0x13e90000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <2 2>;
clock-names = "sysmmu", "master";
@@ -953,7 +953,7 @@
sysmmu_scaler2r: sysmmu@128a0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x128A0000 0x1000>;
+ reg = <0x128a0000 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
@@ -963,7 +963,7 @@
sysmmu_scaler0w: sysmmu@128c0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x128C0000 0x1000>;
+ reg = <0x128c0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <27 2>;
clock-names = "sysmmu", "master";
@@ -974,7 +974,7 @@
sysmmu_scaler1w: sysmmu@128d0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x128D0000 0x1000>;
+ reg = <0x128d0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <22 6>;
clock-names = "sysmmu", "master";
@@ -985,7 +985,7 @@
sysmmu_scaler2w: sysmmu@128e0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x128E0000 0x1000>;
+ reg = <0x128e0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <19 6>;
clock-names = "sysmmu", "master";
@@ -996,7 +996,7 @@
sysmmu_rotator: sysmmu@11d40000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x11D40000 0x1000>;
+ reg = <0x11d40000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 0>;
clock-names = "sysmmu", "master";
@@ -1006,7 +1006,7 @@
sysmmu_jpeg0: sysmmu@11f10000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x11F10000 0x1000>;
+ reg = <0x11f10000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 2>;
clock-names = "sysmmu", "master";
@@ -1016,7 +1016,7 @@
sysmmu_jpeg1: sysmmu@11f20000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x11F20000 0x1000>;
+ reg = <0x11f20000 0x1000>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>;
generated by cgit (git 2.34.1) at 2024-05-20 15:38:02 +0000