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Diffstat (limited to 'arch/arm/boot/dts/imx6q.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi104
1 files changed, 102 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 21e675848bd1..ba09dc32324e 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -18,6 +18,7 @@
cpu@0 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
operating-points = <
@@ -39,18 +40,21 @@
cpu@1 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
};
cpu@2 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <2>;
next-level-cache = <&L2>;
};
cpu@3 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <3>;
next-level-cache = <&L2>;
};
@@ -157,6 +161,27 @@
MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
>;
};
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6Q_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6Q_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6Q_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6Q_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6Q_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6Q_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6Q_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6Q_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6Q_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6Q_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6Q_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6Q_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6Q_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
};
gpmi-nand {
@@ -168,8 +193,6 @@
MX6Q_PAD_NANDF_RB0__NAND_READY_B 0xb000
MX6Q_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
MX6Q_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
- MX6Q_PAD_NANDF_CS2__NAND_CE2_B 0xb0b1
- MX6Q_PAD_NANDF_CS3__NAND_CE3_B 0xb0b1
MX6Q_PAD_SD4_CMD__NAND_RE_B 0xb0b1
MX6Q_PAD_SD4_CLK__NAND_WE_B 0xb0b1
MX6Q_PAD_NANDF_D0__NAND_DATA00 0xb0b1
@@ -192,6 +215,13 @@
MX6Q_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
+
+ pinctrl_i2c1_2: i2c1grp-2 {
+ fsl,pins = <
+ MX6Q_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
+ MX6Q_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
+ >;
+ };
};
i2c2 {
@@ -268,6 +298,17 @@
MX6Q_PAD_NANDF_D7__SD2_DATA7 0x17059
>;
};
+
+ pinctrl_usdhc2_2: usdhc2grp-2 {
+ fsl,pins = <
+ MX6Q_PAD_SD2_CMD__SD2_CMD 0x17059
+ MX6Q_PAD_SD2_CLK__SD2_CLK 0x10059
+ MX6Q_PAD_SD2_DAT0__SD2_DATA0 0x17059
+ MX6Q_PAD_SD2_DAT1__SD2_DATA1 0x17059
+ MX6Q_PAD_SD2_DAT2__SD2_DATA2 0x17059
+ MX6Q_PAD_SD2_DAT3__SD2_DATA3 0x17059
+ >;
+ };
};
usdhc3 {
@@ -325,6 +366,65 @@
>;
};
};
+
+ weim {
+ pinctrl_weim_cs0_1: weim_cs0grp-1 {
+ fsl,pins = <
+ MX6Q_PAD_EIM_CS0__EIM_CS0_B 0xb0b1
+ >;
+ };
+
+ pinctrl_weim_nor_1: weimnorgrp-1 {
+ fsl,pins = <
+ MX6Q_PAD_EIM_OE__EIM_OE_B 0xb0b1
+ MX6Q_PAD_EIM_RW__EIM_RW 0xb0b1
+ MX6Q_PAD_EIM_WAIT__EIM_WAIT_B 0xb060
+ /* data */
+ MX6Q_PAD_EIM_D16__EIM_DATA16 0x1b0b0
+ MX6Q_PAD_EIM_D17__EIM_DATA17 0x1b0b0
+ MX6Q_PAD_EIM_D18__EIM_DATA18 0x1b0b0
+ MX6Q_PAD_EIM_D19__EIM_DATA19 0x1b0b0
+ MX6Q_PAD_EIM_D20__EIM_DATA20 0x1b0b0
+ MX6Q_PAD_EIM_D21__EIM_DATA21 0x1b0b0
+ MX6Q_PAD_EIM_D22__EIM_DATA22 0x1b0b0
+ MX6Q_PAD_EIM_D23__EIM_DATA23 0x1b0b0
+ MX6Q_PAD_EIM_D24__EIM_DATA24 0x1b0b0
+ MX6Q_PAD_EIM_D25__EIM_DATA25 0x1b0b0
+ MX6Q_PAD_EIM_D26__EIM_DATA26 0x1b0b0
+ MX6Q_PAD_EIM_D27__EIM_DATA27 0x1b0b0
+ MX6Q_PAD_EIM_D28__EIM_DATA28 0x1b0b0
+ MX6Q_PAD_EIM_D29__EIM_DATA29 0x1b0b0
+ MX6Q_PAD_EIM_D30__EIM_DATA30 0x1b0b0
+ MX6Q_PAD_EIM_D31__EIM_DATA31 0x1b0b0
+ /* address */
+ MX6Q_PAD_EIM_A23__EIM_ADDR23 0xb0b1
+ MX6Q_PAD_EIM_A22__EIM_ADDR22 0xb0b1
+ MX6Q_PAD_EIM_A21__EIM_ADDR21 0xb0b1
+ MX6Q_PAD_EIM_A20__EIM_ADDR20 0xb0b1
+ MX6Q_PAD_EIM_A19__EIM_ADDR19 0xb0b1
+ MX6Q_PAD_EIM_A18__EIM_ADDR18 0xb0b1
+ MX6Q_PAD_EIM_A17__EIM_ADDR17 0xb0b1
+ MX6Q_PAD_EIM_A16__EIM_ADDR16 0xb0b1
+ MX6Q_PAD_EIM_DA15__EIM_AD15 0xb0b1
+ MX6Q_PAD_EIM_DA14__EIM_AD14 0xb0b1
+ MX6Q_PAD_EIM_DA13__EIM_AD13 0xb0b1
+ MX6Q_PAD_EIM_DA12__EIM_AD12 0xb0b1
+ MX6Q_PAD_EIM_DA11__EIM_AD11 0xb0b1
+ MX6Q_PAD_EIM_DA10__EIM_AD10 0xb0b1
+ MX6Q_PAD_EIM_DA9__EIM_AD09 0xb0b1
+ MX6Q_PAD_EIM_DA8__EIM_AD08 0xb0b1
+ MX6Q_PAD_EIM_DA7__EIM_AD07 0xb0b1
+ MX6Q_PAD_EIM_DA6__EIM_AD06 0xb0b1
+ MX6Q_PAD_EIM_DA5__EIM_AD05 0xb0b1
+ MX6Q_PAD_EIM_DA4__EIM_AD04 0xb0b1
+ MX6Q_PAD_EIM_DA3__EIM_AD03 0xb0b1
+ MX6Q_PAD_EIM_DA2__EIM_AD02 0xb0b1
+ MX6Q_PAD_EIM_DA1__EIM_AD01 0xb0b1
+ MX6Q_PAD_EIM_DA0__EIM_AD00 0xb0b1
+ >;
+ };
+
+ };
};
};