diff options
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 835 |
1 files changed, 0 insertions, 835 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi deleted file mode 100644 index f21d259080fd..000000000000 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ /dev/null @@ -1,835 +0,0 @@ -/* - * Copyright 2011 Freescale Semiconductor, Inc. - * Copyright 2011 Linaro Ltd. - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#include "skeleton.dtsi" - -/ { - aliases { - serial0 = &uart1; - serial1 = &uart2; - serial2 = &uart3; - serial3 = &uart4; - serial4 = &uart5; - gpio0 = &gpio1; - gpio1 = &gpio2; - gpio2 = &gpio3; - gpio3 = &gpio4; - gpio4 = &gpio5; - gpio5 = &gpio6; - gpio6 = &gpio7; - }; - - intc: interrupt-controller@00a01000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <1>; - #size-cells = <1>; - interrupt-controller; - reg = <0x00a01000 0x1000>, - <0x00a00100 0x100>; - }; - - clocks { - #address-cells = <1>; - #size-cells = <0>; - - ckil { - compatible = "fsl,imx-ckil", "fixed-clock"; - clock-frequency = <32768>; - }; - - ckih1 { - compatible = "fsl,imx-ckih1", "fixed-clock"; - clock-frequency = <0>; - }; - - osc { - compatible = "fsl,imx-osc", "fixed-clock"; - clock-frequency = <24000000>; - }; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - interrupt-parent = <&intc>; - ranges; - - dma_apbh: dma-apbh@00110000 { - compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; - reg = <0x00110000 0x2000>; - interrupts = <0 13 0x04>, <0 13 0x04>, <0 13 0x04>, <0 13 0x04>; - interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; - #dma-cells = <1>; - dma-channels = <4>; - clocks = <&clks 106>; - }; - - gpmi: gpmi-nand@00112000 { - compatible = "fsl,imx6q-gpmi-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x00112000 0x2000>, <0x00114000 0x2000>; - reg-names = "gpmi-nand", "bch"; - interrupts = <0 13 0x04>, <0 15 0x04>; - interrupt-names = "gpmi-dma", "bch"; - clocks = <&clks 152>, <&clks 153>, <&clks 151>, - <&clks 150>, <&clks 149>; - clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", - "gpmi_bch_apb", "per1_bch"; - dmas = <&dma_apbh 0>; - dma-names = "rx-tx"; - fsl,gpmi-dma-channel = <0>; - status = "disabled"; - }; - - timer@00a00600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x00a00600 0x20>; - interrupts = <1 13 0xf01>; - clocks = <&clks 15>; - }; - - L2: l2-cache@00a02000 { - compatible = "arm,pl310-cache"; - reg = <0x00a02000 0x1000>; - interrupts = <0 92 0x04>; - cache-unified; - cache-level = <2>; - arm,tag-latency = <4 2 3>; - arm,data-latency = <4 2 3>; - }; - - pmu { - compatible = "arm,cortex-a9-pmu"; - interrupts = <0 94 0x04>; - }; - - aips-bus@02000000 { /* AIPS1 */ - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x02000000 0x100000>; - ranges; - - spba-bus@02000000 { - compatible = "fsl,spba-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x02000000 0x40000>; - ranges; - - spdif: spdif@02004000 { - reg = <0x02004000 0x4000>; - interrupts = <0 52 0x04>; - }; - - ecspi1: ecspi@02008000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; - reg = <0x02008000 0x4000>; - interrupts = <0 31 0x04>; - clocks = <&clks 112>, <&clks 112>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - ecspi2: ecspi@0200c000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; - reg = <0x0200c000 0x4000>; - interrupts = <0 32 0x04>; - clocks = <&clks 113>, <&clks 113>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - ecspi3: ecspi@02010000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; - reg = <0x02010000 0x4000>; - interrupts = <0 33 0x04>; - clocks = <&clks 114>, <&clks 114>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - ecspi4: ecspi@02014000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; - reg = <0x02014000 0x4000>; - interrupts = <0 34 0x04>; - clocks = <&clks 115>, <&clks 115>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - uart1: serial@02020000 { - compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x02020000 0x4000>; - interrupts = <0 26 0x04>; - clocks = <&clks 160>, <&clks 161>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - esai: esai@02024000 { - reg = <0x02024000 0x4000>; - interrupts = <0 51 0x04>; - }; - - ssi1: ssi@02028000 { - compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; - reg = <0x02028000 0x4000>; - interrupts = <0 46 0x04>; - clocks = <&clks 178>; - fsl,fifo-depth = <15>; - fsl,ssi-dma-events = <38 37>; - status = "disabled"; - }; - - ssi2: ssi@0202c000 { - compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; - reg = <0x0202c000 0x4000>; - interrupts = <0 47 0x04>; - clocks = <&clks 179>; - fsl,fifo-depth = <15>; - fsl,ssi-dma-events = <42 41>; - status = "disabled"; - }; - - ssi3: ssi@02030000 { - compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; - reg = <0x02030000 0x4000>; - interrupts = <0 48 0x04>; - clocks = <&clks 180>; - fsl,fifo-depth = <15>; - fsl,ssi-dma-events = <46 45>; - status = "disabled"; - }; - - asrc: asrc@02034000 { - reg = <0x02034000 0x4000>; - interrupts = <0 50 0x04>; - }; - - spba@0203c000 { - reg = <0x0203c000 0x4000>; - }; - }; - - vpu: vpu@02040000 { - reg = <0x02040000 0x3c000>; - interrupts = <0 3 0x04 0 12 0x04>; - }; - - aipstz@0207c000 { /* AIPSTZ1 */ - reg = <0x0207c000 0x4000>; - }; - - pwm1: pwm@02080000 { - #pwm-cells = <2>; - compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; - reg = <0x02080000 0x4000>; - interrupts = <0 83 0x04>; - clocks = <&clks 62>, <&clks 145>; - clock-names = "ipg", "per"; - }; - - pwm2: pwm@02084000 { - #pwm-cells = <2>; - compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; - reg = <0x02084000 0x4000>; - interrupts = <0 84 0x04>; - clocks = <&clks 62>, <&clks 146>; - clock-names = "ipg", "per"; - }; - - pwm3: pwm@02088000 { - #pwm-cells = <2>; - compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; - reg = <0x02088000 0x4000>; - interrupts = <0 85 0x04>; - clocks = <&clks 62>, <&clks 147>; - clock-names = "ipg", "per"; - }; - - pwm4: pwm@0208c000 { - #pwm-cells = <2>; - compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; - reg = <0x0208c000 0x4000>; - interrupts = <0 86 0x04>; - clocks = <&clks 62>, <&clks 148>; - clock-names = "ipg", "per"; - }; - - can1: flexcan@02090000 { - reg = <0x02090000 0x4000>; - interrupts = <0 110 0x04>; - }; - - can2: flexcan@02094000 { - reg = <0x02094000 0x4000>; - interrupts = <0 111 0x04>; - }; - - gpt: gpt@02098000 { - compatible = "fsl,imx6q-gpt"; - reg = <0x02098000 0x4000>; - interrupts = <0 55 0x04>; - clocks = <&clks 119>, <&clks 120>; - clock-names = "ipg", "per"; - }; - - gpio1: gpio@0209c000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x0209c000 0x4000>; - interrupts = <0 66 0x04 0 67 0x04>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@020a0000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020a0000 0x4000>; - interrupts = <0 68 0x04 0 69 0x04>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@020a4000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020a4000 0x4000>; - interrupts = <0 70 0x04 0 71 0x04>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@020a8000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020a8000 0x4000>; - interrupts = <0 72 0x04 0 73 0x04>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio5: gpio@020ac000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020ac000 0x4000>; - interrupts = <0 74 0x04 0 75 0x04>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio6: gpio@020b0000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020b0000 0x4000>; - interrupts = <0 76 0x04 0 77 0x04>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio7: gpio@020b4000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020b4000 0x4000>; - interrupts = <0 78 0x04 0 79 0x04>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - kpp: kpp@020b8000 { - reg = <0x020b8000 0x4000>; - interrupts = <0 82 0x04>; - }; - - wdog1: wdog@020bc000 { - compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; - reg = <0x020bc000 0x4000>; - interrupts = <0 80 0x04>; - clocks = <&clks 0>; - }; - - wdog2: wdog@020c0000 { - compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; - reg = <0x020c0000 0x4000>; - interrupts = <0 81 0x04>; - clocks = <&clks 0>; - status = "disabled"; - }; - - clks: ccm@020c4000 { - compatible = "fsl,imx6q-ccm"; - reg = <0x020c4000 0x4000>; - interrupts = <0 87 0x04 0 88 0x04>; - #clock-cells = <1>; - }; - - anatop: anatop@020c8000 { - compatible = "fsl,imx6q-anatop", "syscon", "simple-bus"; - reg = <0x020c8000 0x1000>; - interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; - - regulator-1p1@110 { - compatible = "fsl,anatop-regulator"; - regulator-name = "vdd1p1"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1375000>; - regulator-always-on; - anatop-reg-offset = <0x110>; - anatop-vol-bit-shift = <8>; - anatop-vol-bit-width = <5>; - anatop-min-bit-val = <4>; - anatop-min-voltage = <800000>; - anatop-max-voltage = <1375000>; - }; - - regulator-3p0@120 { - compatible = "fsl,anatop-regulator"; - regulator-name = "vdd3p0"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <3150000>; - regulator-always-on; - anatop-reg-offset = <0x120>; - anatop-vol-bit-shift = <8>; - anatop-vol-bit-width = <5>; - anatop-min-bit-val = <0>; - anatop-min-voltage = <2625000>; - anatop-max-voltage = <3400000>; - }; - - regulator-2p5@130 { - compatible = "fsl,anatop-regulator"; - regulator-name = "vdd2p5"; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2750000>; - regulator-always-on; - anatop-reg-offset = <0x130>; - anatop-vol-bit-shift = <8>; - anatop-vol-bit-width = <5>; - anatop-min-bit-val = <0>; - anatop-min-voltage = <2000000>; - anatop-max-voltage = <2750000>; - }; - - reg_arm: regulator-vddcore@140 { - compatible = "fsl,anatop-regulator"; - regulator-name = "cpu"; - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - anatop-reg-offset = <0x140>; - anatop-vol-bit-shift = <0>; - anatop-vol-bit-width = <5>; - anatop-delay-reg-offset = <0x170>; - anatop-delay-bit-shift = <24>; - anatop-delay-bit-width = <2>; - anatop-min-bit-val = <1>; - anatop-min-voltage = <725000>; - anatop-max-voltage = <1450000>; - }; - - reg_pu: regulator-vddpu@140 { - compatible = "fsl,anatop-regulator"; - regulator-name = "vddpu"; - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - anatop-reg-offset = <0x140>; - anatop-vol-bit-shift = <9>; - anatop-vol-bit-width = <5>; - anatop-delay-reg-offset = <0x170>; - anatop-delay-bit-shift = <26>; - anatop-delay-bit-width = <2>; - anatop-min-bit-val = <1>; - anatop-min-voltage = <725000>; - anatop-max-voltage = <1450000>; - }; - - reg_soc: regulator-vddsoc@140 { - compatible = "fsl,anatop-regulator"; - regulator-name = "vddsoc"; - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - anatop-reg-offset = <0x140>; - anatop-vol-bit-shift = <18>; - anatop-vol-bit-width = <5>; - anatop-delay-reg-offset = <0x170>; - anatop-delay-bit-shift = <28>; - anatop-delay-bit-width = <2>; - anatop-min-bit-val = <1>; - anatop-min-voltage = <725000>; - anatop-max-voltage = <1450000>; - }; - }; - - usbphy1: usbphy@020c9000 { - compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; - reg = <0x020c9000 0x1000>; - interrupts = <0 44 0x04>; - clocks = <&clks 182>; - }; - - usbphy2: usbphy@020ca000 { - compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; - reg = <0x020ca000 0x1000>; - interrupts = <0 45 0x04>; - clocks = <&clks 183>; - }; - - snvs@020cc000 { - compatible = "fsl,sec-v4.0-mon", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x020cc000 0x4000>; - - snvs-rtc-lp@34 { - compatible = "fsl,sec-v4.0-mon-rtc-lp"; - reg = <0x34 0x58>; - interrupts = <0 19 0x04 0 20 0x04>; - }; - }; - - epit1: epit@020d0000 { /* EPIT1 */ - reg = <0x020d0000 0x4000>; - interrupts = <0 56 0x04>; - }; - - epit2: epit@020d4000 { /* EPIT2 */ - reg = <0x020d4000 0x4000>; - interrupts = <0 57 0x04>; - }; - - src: src@020d8000 { - compatible = "fsl,imx6q-src", "fsl,imx51-src"; - reg = <0x020d8000 0x4000>; - interrupts = <0 91 0x04 0 96 0x04>; - #reset-cells = <1>; - }; - - gpc: gpc@020dc000 { - compatible = "fsl,imx6q-gpc"; - reg = <0x020dc000 0x4000>; - interrupts = <0 89 0x04 0 90 0x04>; - }; - - gpr: iomuxc-gpr@020e0000 { - compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; - reg = <0x020e0000 0x38>; - }; - - ldb: ldb@020e0008 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb"; - gpr = <&gpr>; - status = "disabled"; - - lvds-channel@0 { - reg = <0>; - crtcs = <&ipu1 0>; - status = "disabled"; - }; - - lvds-channel@1 { - reg = <1>; - crtcs = <&ipu1 1>; - status = "disabled"; - }; - }; - - dcic1: dcic@020e4000 { - reg = <0x020e4000 0x4000>; - interrupts = <0 124 0x04>; - }; - - dcic2: dcic@020e8000 { - reg = <0x020e8000 0x4000>; - interrupts = <0 125 0x04>; - }; - - sdma: sdma@020ec000 { - compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; - reg = <0x020ec000 0x4000>; - interrupts = <0 2 0x04>; - clocks = <&clks 155>, <&clks 155>; - clock-names = "ipg", "ahb"; - fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; - }; - }; - - aips-bus@02100000 { /* AIPS2 */ - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x02100000 0x100000>; - ranges; - - caam@02100000 { - reg = <0x02100000 0x40000>; - interrupts = <0 105 0x04 0 106 0x04>; - }; - - aipstz@0217c000 { /* AIPSTZ2 */ - reg = <0x0217c000 0x4000>; - }; - - usbotg: usb@02184000 { - compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; - reg = <0x02184000 0x200>; - interrupts = <0 43 0x04>; - clocks = <&clks 162>; - fsl,usbphy = <&usbphy1>; - fsl,usbmisc = <&usbmisc 0>; - status = "disabled"; - }; - - usbh1: usb@02184200 { - compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; - reg = <0x02184200 0x200>; - interrupts = <0 40 0x04>; - clocks = <&clks 162>; - fsl,usbphy = <&usbphy2>; - fsl,usbmisc = <&usbmisc 1>; - status = "disabled"; - }; - - usbh2: usb@02184400 { - compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; - reg = <0x02184400 0x200>; - interrupts = <0 41 0x04>; - clocks = <&clks 162>; - fsl,usbmisc = <&usbmisc 2>; - status = "disabled"; - }; - - usbh3: usb@02184600 { - compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; - reg = <0x02184600 0x200>; - interrupts = <0 42 0x04>; - clocks = <&clks 162>; - fsl,usbmisc = <&usbmisc 3>; - status = "disabled"; - }; - - usbmisc: usbmisc@02184800 { - #index-cells = <1>; - compatible = "fsl,imx6q-usbmisc"; - reg = <0x02184800 0x200>; - clocks = <&clks 162>; - }; - - fec: ethernet@02188000 { - compatible = "fsl,imx6q-fec"; - reg = <0x02188000 0x4000>; - interrupts = <0 118 0x04 0 119 0x04>; - clocks = <&clks 117>, <&clks 117>, <&clks 190>; - clock-names = "ipg", "ahb", "ptp"; - status = "disabled"; - }; - - mlb@0218c000 { - reg = <0x0218c000 0x4000>; - interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; - }; - - usdhc1: usdhc@02190000 { - compatible = "fsl,imx6q-usdhc"; - reg = <0x02190000 0x4000>; - interrupts = <0 22 0x04>; - clocks = <&clks 163>, <&clks 163>, <&clks 163>; - clock-names = "ipg", "ahb", "per"; - bus-width = <4>; - status = "disabled"; - }; - - usdhc2: usdhc@02194000 { - compatible = "fsl,imx6q-usdhc"; - reg = <0x02194000 0x4000>; - interrupts = <0 23 0x04>; - clocks = <&clks 164>, <&clks 164>, <&clks 164>; - clock-names = "ipg", "ahb", "per"; - bus-width = <4>; - status = "disabled"; - }; - - usdhc3: usdhc@02198000 { - compatible = "fsl,imx6q-usdhc"; - reg = <0x02198000 0x4000>; - interrupts = <0 24 0x04>; - clocks = <&clks 165>, <&clks 165>, <&clks 165>; - clock-names = "ipg", "ahb", "per"; - bus-width = <4>; - status = "disabled"; - }; - - usdhc4: usdhc@0219c000 { - compatible = "fsl,imx6q-usdhc"; - reg = <0x0219c000 0x4000>; - interrupts = <0 25 0x04>; - clocks = <&clks 166>, <&clks 166>, <&clks 166>; - clock-names = "ipg", "ahb", "per"; - bus-width = <4>; - status = "disabled"; - }; - - i2c1: i2c@021a0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; - reg = <0x021a0000 0x4000>; - interrupts = <0 36 0x04>; - clocks = <&clks 125>; - status = "disabled"; - }; - - i2c2: i2c@021a4000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; - reg = <0x021a4000 0x4000>; - interrupts = <0 37 0x04>; - clocks = <&clks 126>; - status = "disabled"; - }; - - i2c3: i2c@021a8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; - reg = <0x021a8000 0x4000>; - interrupts = <0 38 0x04>; - clocks = <&clks 127>; - status = "disabled"; - }; - - romcp@021ac000 { - reg = <0x021ac000 0x4000>; - }; - - mmdc0: mmdc@021b0000 { /* MMDC0 */ - compatible = "fsl,imx6q-mmdc"; - reg = <0x021b0000 0x4000>; - }; - - mmdc1: mmdc@021b4000 { /* MMDC1 */ - reg = <0x021b4000 0x4000>; - }; - - weim: weim@021b8000 { - compatible = "fsl,imx6q-weim"; - reg = <0x021b8000 0x4000>; - interrupts = <0 14 0x04>; - clocks = <&clks 196>; - }; - - ocotp@021bc000 { - compatible = "fsl,imx6q-ocotp"; - reg = <0x021bc000 0x4000>; - }; - - tzasc@021d0000 { /* TZASC1 */ - reg = <0x021d0000 0x4000>; - interrupts = <0 108 0x04>; - }; - - tzasc@021d4000 { /* TZASC2 */ - reg = <0x021d4000 0x4000>; - interrupts = <0 109 0x04>; - }; - - audmux: audmux@021d8000 { - compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; - reg = <0x021d8000 0x4000>; - status = "disabled"; - }; - - mipi@021dc000 { /* MIPI-CSI */ - reg = <0x021dc000 0x4000>; - }; - - mipi@021e0000 { /* MIPI-DSI */ - reg = <0x021e0000 0x4000>; - }; - - vdoa@021e4000 { - reg = <0x021e4000 0x4000>; - interrupts = <0 18 0x04>; - }; - - uart2: serial@021e8000 { - compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x021e8000 0x4000>; - interrupts = <0 27 0x04>; - clocks = <&clks 160>, <&clks 161>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - uart3: serial@021ec000 { - compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x021ec000 0x4000>; - interrupts = <0 28 0x04>; - clocks = <&clks 160>, <&clks 161>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - uart4: serial@021f0000 { - compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x021f0000 0x4000>; - interrupts = <0 29 0x04>; - clocks = <&clks 160>, <&clks 161>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - uart5: serial@021f4000 { - compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x021f4000 0x4000>; - interrupts = <0 30 0x04>; - clocks = <&clks 160>, <&clks 161>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - }; - - ipu1: ipu@02400000 { - #crtc-cells = <1>; - compatible = "fsl,imx6q-ipu"; - reg = <0x02400000 0x400000>; - interrupts = <0 6 0x4 0 5 0x4>; - clocks = <&clks 130>, <&clks 131>, <&clks 132>; - clock-names = "bus", "di0", "di1"; - resets = <&src 2>; - }; - }; -}; |