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Diffstat (limited to 'arch/arm/boot/dts/meson8.dtsi')
-rw-r--r--arch/arm/boot/dts/meson8.dtsi15
1 files changed, 8 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 5a7e3e5caebe..4f59a4c8f036 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -455,6 +455,8 @@
&hhi {
clkc: clock-controller {
compatible = "amlogic,meson8-clkc";
+ clocks = <&xtal>;
+ clock-names = "xtal";
#clock-cells = <1>;
#reset-cells = <1>;
};
@@ -529,8 +531,7 @@
&saradc {
compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc";
- clocks = <&clkc CLKID_XTAL>,
- <&clkc CLKID_SAR_ADC>;
+ clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
clock-names = "clkin", "core";
amlogic,hhi-sysctrl = <&hhi>;
nvmem-cells = <&temperature_calib>;
@@ -548,31 +549,31 @@
};
&timer_abcde {
- clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
+ clocks = <&xtal>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk";
};
&uart_AO {
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
- clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
+ clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>;
clock-names = "baud", "xtal", "pclk";
};
&uart_A {
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
- clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>;
+ clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>;
clock-names = "baud", "xtal", "pclk";
};
&uart_B {
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
- clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>;
+ clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>;
clock-names = "baud", "xtal", "pclk";
};
&uart_C {
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
- clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>;
+ clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>;
clock-names = "baud", "xtal", "pclk";
};