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Diffstat (limited to 'arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi')
-rw-r--r--arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi31
1 files changed, 22 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi
index 7d032d1f3b47..ee2c6bec92e8 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi
@@ -36,21 +36,21 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpiobuttons>;
- button1 {
+ button-1 {
label = "s6";
linux,code = <KEY_F6>;
gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
wakeup-source;
};
- button2 {
+ button-2 {
label = "s7";
linux,code = <KEY_F7>;
gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
wakeup-source;
};
- button3 {
+ button-3 {
label = "s8";
linux,code = <KEY_F8>;
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
@@ -106,11 +106,25 @@
vin-supply = <&reg_mba6_3p3v>;
};
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ linux,cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x14000000>;
+ alloc-ranges = <0x10000000 0x20000000>;
+ linux,cma-default;
+ };
+ };
+
sound {
compatible = "fsl,imx-audio-tlv320aic32x4";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
- model = "imx-audio-tlv320aic32x4";
+ model = "tqm-tlv320aic32";
ssi-controller = <&ssi1>;
audio-codec = <&tlv320aic32x4>;
audio-asrc = <&asrc>;
@@ -298,6 +312,7 @@
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ vdd-supply = <&reg_mba6_3p3v>;
ethernet@1 {
compatible = "usb424,9e00";
@@ -441,8 +456,6 @@
pinctrl_hog: hoggrp {
fsl,pins = <
- MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099
-
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x0001b099
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x0001b099
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x0001b099
@@ -500,21 +513,21 @@
pinctrl_pwm1: pwm1grp {
fsl,pins = <
- /* 100 k PD, DSE 120 OHM, SPPEED LO */
+ /* 100 k PD, DSE 120 OHM, SPEED LO */
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x00003050
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
- /* 100 k PD, DSE 120 OHM, SPPEED LO */
+ /* 100 k PD, DSE 120 OHM, SPEED LO */
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x00003050
>;
};
pinctrl_pwm4: pwm4grp {
fsl,pins = <
- /* 100 k PD, DSE 120 OHM, SPPEED LO */
+ /* 100 k PD, DSE 120 OHM, SPEED LO */
MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x00003050
>;
};