summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi153
1 files changed, 83 insertions, 70 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi
index f0ef86fadc9d..8eeaab1c0be1 100644
--- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi
@@ -47,13 +47,12 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
enable-method = "qcom,kpss-acc-v2";
- next-level-cache = <&L2>;
+ next-level-cache = <&l2>;
qcom,acc = <&acc0>;
qcom,saw = <&saw0>;
reg = <0x0>;
clocks = <&gcc GCC_APPS_CLK_SRC>;
clock-frequency = <0>;
- clock-latency = <256000>;
operating-points-v2 = <&cpu0_opp_table>;
};
@@ -61,13 +60,12 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
enable-method = "qcom,kpss-acc-v2";
- next-level-cache = <&L2>;
+ next-level-cache = <&l2>;
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
reg = <0x1>;
clocks = <&gcc GCC_APPS_CLK_SRC>;
clock-frequency = <0>;
- clock-latency = <256000>;
operating-points-v2 = <&cpu0_opp_table>;
};
@@ -75,13 +73,12 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
enable-method = "qcom,kpss-acc-v2";
- next-level-cache = <&L2>;
+ next-level-cache = <&l2>;
qcom,acc = <&acc2>;
qcom,saw = <&saw2>;
reg = <0x2>;
clocks = <&gcc GCC_APPS_CLK_SRC>;
clock-frequency = <0>;
- clock-latency = <256000>;
operating-points-v2 = <&cpu0_opp_table>;
};
@@ -89,17 +86,16 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
enable-method = "qcom,kpss-acc-v2";
- next-level-cache = <&L2>;
+ next-level-cache = <&l2>;
qcom,acc = <&acc3>;
qcom,saw = <&saw3>;
reg = <0x3>;
clocks = <&gcc GCC_APPS_CLK_SRC>;
clock-frequency = <0>;
- clock-latency = <256000>;
operating-points-v2 = <&cpu0_opp_table>;
};
- L2: l2-cache {
+ l2: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
@@ -126,7 +122,7 @@
opp-716000000 {
opp-hz = /bits/ 64 <716000000>;
clock-latency-ns = <256000>;
- };
+ };
};
memory {
@@ -162,10 +158,10 @@
timer {
compatible = "arm,armv7-timer";
- interrupts = <1 2 0xf08>,
- <1 3 0xf08>,
- <1 4 0xf08>,
- <1 1 0xf08>;
+ interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <48000000>;
always-on;
};
@@ -179,6 +175,7 @@
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
+ #address-cells = <0>;
#interrupt-cells = <3>;
reg = <0x0b000000 0x1000>,
<0x0b002000 0x1000>;
@@ -187,7 +184,6 @@
gcc: clock-controller@1800000 {
compatible = "qcom,gcc-ipq4019";
#clock-cells = <1>;
- #power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x1800000 0x60000>;
clocks = <&xo>, <&sleep_clk>;
@@ -224,15 +220,18 @@
};
sdhci: mmc@7824900 {
- compatible = "qcom,sdhci-msm-v4";
+ compatible = "qcom,ipq4019-sdhci", "qcom,sdhci-msm-v4";
reg = <0x7824900 0x11c>, <0x7824000 0x800>;
reg-names = "hc", "core";
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
bus-width = <8>;
- clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>,
- <&gcc GCC_DCD_XO_CLK>;
- clock-names = "iface", "core", "xo";
+ clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+ <&gcc GCC_SDCC1_APPS_CLK>,
+ <&xo>;
+ clock-names = "iface",
+ "core",
+ "xo";
status = "disabled";
};
@@ -347,34 +346,29 @@
reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
};
- saw0: regulator@b089000 {
- compatible = "qcom,saw2";
+ saw0: power-manager@b089000 {
+ compatible = "qcom,ipq4019-saw2-cpu", "qcom,saw2";
reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>;
- regulator;
};
- saw1: regulator@b099000 {
- compatible = "qcom,saw2";
+ saw1: power-manager@b099000 {
+ compatible = "qcom,ipq4019-saw2-cpu", "qcom,saw2";
reg = <0x0b099000 0x1000>, <0x0b009000 0x1000>;
- regulator;
};
- saw2: regulator@b0a9000 {
- compatible = "qcom,saw2";
+ saw2: power-manager@b0a9000 {
+ compatible = "qcom,ipq4019-saw2-cpu", "qcom,saw2";
reg = <0x0b0a9000 0x1000>, <0x0b009000 0x1000>;
- regulator;
};
- saw3: regulator@b0b9000 {
- compatible = "qcom,saw2";
+ saw3: power-manager@b0b9000 {
+ compatible = "qcom,ipq4019-saw2-cpu", "qcom,saw2";
reg = <0x0b0b9000 0x1000>, <0x0b009000 0x1000>;
- regulator;
};
- saw_l2: regulator@b012000 {
- compatible = "qcom,saw2";
+ saw_l2: power-manager@b012000 {
+ compatible = "qcom,ipq4019-saw2-l2", "qcom,saw2";
reg = <0xb012000 0x1000>;
- regulator;
};
blsp1_uart1: serial@78af000 {
@@ -414,12 +408,12 @@
reg = <0x4ab000 0x4>;
};
- pcie0: pci@40000000 {
+ pcie0: pcie@40000000 {
compatible = "qcom,pcie-ipq4019";
- reg = <0x40000000 0xf1d
- 0x40000f20 0xa8
- 0x80000 0x2000
- 0x40100000 0x1000>;
+ reg = <0x40000000 0xf1d>,
+ <0x40000f20 0xa8>,
+ <0x80000 0x2000>,
+ <0x40100000 0x1000>;
reg-names = "dbi", "elbi", "parf", "config";
device_type = "pci";
linux,pci-domain = <0>;
@@ -435,10 +429,10 @@
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
- <0 0 0 2 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
- <0 0 0 3 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
- <0 0 0 4 &intc 0 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+ interrupt-map = <0 0 0 1 &intc GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+ <0 0 0 2 &intc GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+ <0 0 0 3 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+ <0 0 0 4 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
clocks = <&gcc GCC_PCIE_AHB_CLK>,
<&gcc GCC_PCIE_AXI_M_CLK>,
<&gcc GCC_PCIE_AXI_S_CLK>;
@@ -472,6 +466,16 @@
"phy_ahb";
status = "disabled";
+
+ pcie@0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
qpic_bam: dma-controller@7984000 {
@@ -543,9 +547,9 @@
<GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi0", "msi1", "msi2", "msi3",
- "msi4", "msi5", "msi6", "msi7",
- "msi8", "msi9", "msi10", "msi11",
+ interrupt-names = "msi0", "msi1", "msi2", "msi3",
+ "msi4", "msi5", "msi6", "msi7",
+ "msi8", "msi9", "msi10", "msi11",
"msi12", "msi13", "msi14", "msi15",
"legacy";
status = "disabled";
@@ -585,9 +589,9 @@
<GIC_SPI 62 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 63 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi0", "msi1", "msi2", "msi3",
- "msi4", "msi5", "msi6", "msi7",
- "msi8", "msi9", "msi10", "msi11",
+ interrupt-names = "msi0", "msi1", "msi2", "msi3",
+ "msi4", "msi5", "msi6", "msi7",
+ "msi8", "msi9", "msi10", "msi11",
"msi12", "msi13", "msi14", "msi15",
"legacy";
status = "disabled";
@@ -600,28 +604,37 @@
reg = <0x90000 0x64>;
status = "disabled";
- ethphy0: ethernet-phy@0 {
+ ethernet-phy-package@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "qcom,qca8075-package";
reg = <0>;
- };
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- };
+ qcom,tx-drive-strength-milliwatt = <300>;
- ethphy2: ethernet-phy@2 {
- reg = <2>;
- };
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
- ethphy3: ethernet-phy@3 {
- reg = <3>;
- };
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ ethphy2: ethernet-phy@2 {
+ reg = <2>;
+ };
- ethphy4: ethernet-phy@4 {
- reg = <4>;
+ ethphy3: ethernet-phy@3 {
+ reg = <3>;
+ };
+
+ ethphy4: ethernet-phy@4 {
+ reg = <4>;
+ };
};
};
- usb3_ss_phy: ssphy@9a000 {
+ usb3_ss_phy: usb-phy@9a000 {
compatible = "qcom,usb-ss-ipq4019-phy";
#phy-cells = <0>;
reg = <0x9a000 0x800>;
@@ -631,7 +644,7 @@
status = "disabled";
};
- usb3_hs_phy: hsphy@a6000 {
+ usb3_hs_phy: usb-phy@a6000 {
compatible = "qcom,usb-hs-ipq4019-phy";
#phy-cells = <0>;
reg = <0xa6000 0x40>;
@@ -641,7 +654,7 @@
status = "disabled";
};
- usb3: usb3@8af8800 {
+ usb3: usb@8af8800 {
compatible = "qcom,ipq4019-dwc3", "qcom,dwc3";
reg = <0x8af8800 0x100>;
#address-cells = <1>;
@@ -653,7 +666,7 @@
ranges;
status = "disabled";
- dwc3@8a00000 {
+ usb3_dwc: usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x8a00000 0xf8000>;
interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
@@ -663,7 +676,7 @@
};
};
- usb2_hs_phy: hsphy@a8000 {
+ usb2_hs_phy: usb-phy@a8000 {
compatible = "qcom,usb-hs-ipq4019-phy";
#phy-cells = <0>;
reg = <0xa8000 0x40>;
@@ -673,7 +686,7 @@
status = "disabled";
};
- usb2: usb2@60f8800 {
+ usb2: usb@60f8800 {
compatible = "qcom,ipq4019-dwc3", "qcom,dwc3";
reg = <0x60f8800 0x100>;
#address-cells = <1>;
@@ -681,11 +694,11 @@
clocks = <&gcc GCC_USB2_MASTER_CLK>,
<&gcc GCC_USB2_SLEEP_CLK>,
<&gcc GCC_USB2_MOCK_UTMI_CLK>;
- clock-names = "master", "sleep", "mock_utmi";
+ clock-names = "core", "sleep", "mock_utmi";
ranges;
status = "disabled";
- dwc3@6000000 {
+ usb@6000000 {
compatible = "snps,dwc3";
reg = <0x6000000 0xf8000>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
generated by cgit (git 2.34.1) at 2025-12-27 07:05:49 +0000