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-rw-r--r--arch/arm/boot/dts/r8a7743.dtsi507
1 files changed, 0 insertions, 507 deletions
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
deleted file mode 100644
index 0ddac81742e4..000000000000
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ /dev/null
@@ -1,507 +0,0 @@
-/*
- * Device Tree Source for the r8a7743 SoC
- *
- * Copyright (C) 2016 Cogent Embedded Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/r8a7743-cpg-mssr.h>
-#include <dt-bindings/power/r8a7743-sysc.h>
-
-/ {
- compatible = "renesas,r8a7743";
- #address-cells = <2>;
- #size-cells = <2>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <0>;
- clock-frequency = <1500000000>;
- clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
- power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
- next-level-cache = <&L2_CA15>;
- };
-
- L2_CA15: cache-controller-0 {
- compatible = "cache";
- cache-unified;
- cache-level = <2>;
- power-domains = <&sysc R8A7743_PD_CA15_SCU>;
- };
- };
-
- soc {
- compatible = "simple-bus";
- interrupt-parent = <&gic>;
-
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gic: interrupt-controller@f1001000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x2000>,
- <0 0xf1004000 0 0x2000>,
- <0 0xf1006000 0 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
- irqc: interrupt-controller@e61c0000 {
- compatible = "renesas,irqc-r8a7743", "renesas,irqc";
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <0 0xe61c0000 0 0x200>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 407>;
- };
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_LEVEL_LOW)>;
- };
-
- cpg: clock-controller@e6150000 {
- compatible = "renesas,r8a7743-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&usb_extal_clk>;
- clock-names = "extal", "usb_extal";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- prr: chipid@ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
-
- rst: reset-controller@e6160000 {
- compatible = "renesas,r8a7743-rst";
- reg = <0 0xe6160000 0 0x100>;
- };
-
- sysc: system-controller@e6180000 {
- compatible = "renesas,r8a7743-sysc";
- reg = <0 0xe6180000 0 0x200>;
- #power-domain-cells = <1>;
- };
-
- dmac0: dma-controller@e6700000 {
- compatible = "renesas,dmac-r8a7743",
- "renesas,rcar-dmac";
- reg = <0 0xe6700000 0 0x20000>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 219>;
- clock-names = "fck";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 219>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
-
- dmac1: dma-controller@e6720000 {
- compatible = "renesas,dmac-r8a7743",
- "renesas,rcar-dmac";
- reg = <0 0xe6720000 0 0x20000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <15>;
- };
-
- scifa0: serial@e6c40000 {
- compatible = "renesas,scifa-r8a7743",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c40000 0 0x40>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
- dmas = <&dmac0 0x21>, <&dmac0 0x22>,
- <&dmac1 0x21>, <&dmac1 0x22>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
- status = "disabled";
- };
-
- scifa1: serial@e6c50000 {
- compatible = "renesas,scifa-r8a7743",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c50000 0 0x40>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
- dmas = <&dmac0 0x25>, <&dmac0 0x26>,
- <&dmac1 0x25>, <&dmac1 0x26>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
- status = "disabled";
- };
-
- scifa2: serial@e6c60000 {
- compatible = "renesas,scifa-r8a7743",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c60000 0 0x40>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
- dmas = <&dmac0 0x27>, <&dmac0 0x28>,
- <&dmac1 0x27>, <&dmac1 0x28>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
- };
-
- scifa3: serial@e6c70000 {
- compatible = "renesas,scifa-r8a7743",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c70000 0 0x40>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1106>;
- clock-names = "fck";
- dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
- <&dmac1 0x1b>, <&dmac1 0x1c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 1106>;
- status = "disabled";
- };
-
- scifa4: serial@e6c78000 {
- compatible = "renesas,scifa-r8a7743",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c78000 0 0x40>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1107>;
- clock-names = "fck";
- dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
- <&dmac1 0x1f>, <&dmac1 0x20>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 1107>;
- status = "disabled";
- };
-
- scifa5: serial@e6c80000 {
- compatible = "renesas,scifa-r8a7743",
- "renesas,rcar-gen2-scifa", "renesas,scifa";
- reg = <0 0xe6c80000 0 0x40>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 1108>;
- clock-names = "fck";
- dmas = <&dmac0 0x23>, <&dmac0 0x24>,
- <&dmac1 0x23>, <&dmac1 0x24>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 1108>;
- status = "disabled";
- };
-
- scifb0: serial@e6c20000 {
- compatible = "renesas,scifb-r8a7743",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
- dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
- <&dmac1 0x3d>, <&dmac1 0x3e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
- status = "disabled";
- };
-
- scifb1: serial@e6c30000 {
- compatible = "renesas,scifb-r8a7743",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
- dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
- <&dmac1 0x19>, <&dmac1 0x1a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
- status = "disabled";
- };
-
- scifb2: serial@e6ce0000 {
- compatible = "renesas,scifb-r8a7743",
- "renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 0x100>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 216>;
- clock-names = "fck";
- dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
- <&dmac1 0x1d>, <&dmac1 0x1e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 216>;
- status = "disabled";
- };
-
- scif0: serial@e6e60000 {
- compatible = "renesas,scif-r8a7743",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6e60000 0 0x40>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 721>,
- <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
- <&dmac1 0x29>, <&dmac1 0x2a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 721>;
- status = "disabled";
- };
-
- scif1: serial@e6e68000 {
- compatible = "renesas,scif-r8a7743",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6e68000 0 0x40>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>,
- <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
- <&dmac1 0x2d>, <&dmac1 0x2e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 720>;
- status = "disabled";
- };
-
- scif2: serial@e6e58000 {
- compatible = "renesas,scif-r8a7743",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6e58000 0 0x40>;
- interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 719>,
- <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
- <&dmac1 0x2b>, <&dmac1 0x2c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 719>;
- status = "disabled";
- };
-
- scif3: serial@e6ea8000 {
- compatible = "renesas,scif-r8a7743",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6ea8000 0 0x40>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 718>,
- <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
- <&dmac1 0x2f>, <&dmac1 0x30>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 718>;
- status = "disabled";
- };
-
- scif4: serial@e6ee0000 {
- compatible = "renesas,scif-r8a7743",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6ee0000 0 0x40>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 715>,
- <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
- <&dmac1 0xfb>, <&dmac1 0xfc>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 715>;
- status = "disabled";
- };
-
- scif5: serial@e6ee8000 {
- compatible = "renesas,scif-r8a7743",
- "renesas,rcar-gen2-scif", "renesas,scif";
- reg = <0 0xe6ee8000 0 0x40>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 714>,
- <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
- <&dmac1 0xfd>, <&dmac1 0xfe>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 714>;
- status = "disabled";
- };
-
- hscif0: serial@e62c0000 {
- compatible = "renesas,hscif-r8a7743",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c0000 0 0x60>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 717>,
- <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
- <&dmac1 0x39>, <&dmac1 0x3a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 717>;
- status = "disabled";
- };
-
- hscif1: serial@e62c8000 {
- compatible = "renesas,hscif-r8a7743",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62c8000 0 0x60>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 716>,
- <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
- <&dmac1 0x4d>, <&dmac1 0x4e>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 716>;
- status = "disabled";
- };
-
- hscif2: serial@e62d0000 {
- compatible = "renesas,hscif-r8a7743",
- "renesas,rcar-gen2-hscif", "renesas,hscif";
- reg = <0 0xe62d0000 0 0x60>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 713>,
- <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
- <&dmac1 0x3b>, <&dmac1 0x3c>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 713>;
- status = "disabled";
- };
-
- ether: ethernet@ee700000 {
- compatible = "renesas,ether-r8a7743";
- reg = <0 0xee700000 0 0x400>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 813>;
- power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
- resets = <&cpg 813>;
- phy-mode = "rmii";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
- };
-
- /* External root clock */
- extal_clk: extal {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-
- /* External USB clock - can be overridden by the board */
- usb_extal_clk: usb_extal {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <48000000>;
- };
-
- /* External SCIF clock */
- scif_clk: scif {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- /* This value must be overridden by the board. */
- clock-frequency = <0>;
- };
-};
generated by cgit (git 2.34.1) at 2026-01-01 13:48:22 +0000