diff options
Diffstat (limited to 'arch/arm/boot/dts/renesas/r7s72100.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/renesas/r7s72100.dtsi | 54 |
1 files changed, 49 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/renesas/r7s72100.dtsi b/arch/arm/boot/dts/renesas/r7s72100.dtsi index 08ea4c551ed0..245c26bb8e03 100644 --- a/arch/arm/boot/dts/renesas/r7s72100.dtsi +++ b/arch/arm/boot/dts/renesas/r7s72100.dtsi @@ -14,6 +14,7 @@ compatible = "renesas,r7s72100"; #address-cells = <1>; #size-cells = <1>; + interrupt-parent = <&gic>; aliases { i2c0 = &i2c0; @@ -36,11 +37,12 @@ clock-div = <3>; }; - bsc: bsc { + bsc: bus { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0x18000000>; + bootph-all; }; cpus { @@ -83,7 +85,7 @@ pmu { compatible = "arm,cortex-a9-pmu"; - interrupts-extended = <&gic GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>; }; rtc_x1_clk: rtc_x1 { @@ -102,11 +104,11 @@ soc { compatible = "simple-bus"; - interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <1>; ranges; + bootph-all; L2: cache-controller@3ffff000 { compatible = "arm,pl310-cache"; @@ -238,6 +240,8 @@ <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI0>; + dmas = <&dmac 0x2d21>, <&dmac 0x2d22>; + dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; num-cs = <1>; #address-cells = <1>; @@ -253,6 +257,8 @@ <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI1>; + dmas = <&dmac 0x2d25>, <&dmac 0x2d26>; + dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; num-cs = <1>; #address-cells = <1>; @@ -268,6 +274,8 @@ <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI2>; + dmas = <&dmac 0x2d29>, <&dmac 0x2d2a>; + dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; num-cs = <1>; #address-cells = <1>; @@ -283,6 +291,8 @@ <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI3>; + dmas = <&dmac 0x2d2d>, <&dmac 0x2d2e>; + dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; num-cs = <1>; #address-cells = <1>; @@ -298,6 +308,8 @@ <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI4>; + dmas = <&dmac 0x2d31>, <&dmac 0x2d32>; + dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; num-cs = <1>; #address-cells = <1>; @@ -332,9 +344,9 @@ <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp8_clks R7S72100_CLK_MMCIF>; + dmas = <&dmac 0x2cc9>, <&dmac 0x2cca>; + dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; - reg-io-width = <4>; - bus-width = <8>; status = "disabled"; }; @@ -370,6 +382,37 @@ status = "disabled"; }; + dmac: dma-controller@e8200000 { + compatible = "renesas,r7s72100-dmac", + "renesas,rz-dmac"; + reg = <0xe8200000 0x1000>, + <0xfcfe1000 0x20>; + interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 9 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 11 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 12 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 13 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 14 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 15 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 16 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 17 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 18 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 24 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + #dma-cells = <1>; + dma-channels = <16>; + }; + gic: interrupt-controller@e8201000 { compatible = "arm,pl390"; #interrupt-cells = <3>; @@ -516,6 +559,7 @@ pinctrl: pinctrl@fcfe3000 { compatible = "renesas,r7s72100-ports"; + bootph-all; reg = <0xfcfe3000 0x4230>; |