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Diffstat (limited to 'arch/arm/boot/dts/sun8i-h3.dtsi')
-rw-r--r--arch/arm/boot/dts/sun8i-h3.dtsi40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 4e97378e1b28..27780b97c863 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -348,6 +348,7 @@
"PF4", "PF5";
function = "mmc0";
drive-strength = <30>;
+ bias-pull-up;
};
mmc0_cd_pin: mmc0_cd_pin@0 {
@@ -361,6 +362,7 @@
"PG4", "PG5";
function = "mmc1";
drive-strength = <30>;
+ bias-pull-up;
};
mmc2_8bit_pins: mmc2_8bit {
@@ -370,6 +372,12 @@
"PC15", "PC16";
function = "mmc2";
drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ spdif_tx_pins_a: spdif@0 {
+ pins = "PA17";
+ function = "spdif";
};
spi0_pins: spi0 {
@@ -454,6 +462,19 @@
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
};
+ spdif: spdif@01c21000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-h3-spdif";
+ reg = <0x01c21000 0x400>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
+ resets = <&ccu RST_BUS_SPDIF>;
+ clock-names = "apb", "spdif";
+ dmas = <&dma 2>;
+ dma-names = "tx";
+ status = "disabled";
+ };
+
pwm: pwm@01c21400 {
compatible = "allwinner,sun8i-h3-pwm";
reg = <0x01c21400 0x8>;
@@ -462,6 +483,20 @@
status = "disabled";
};
+ codec: codec@01c22c00 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-h3-codec";
+ reg = <0x01c22c00 0x400>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+ clock-names = "apb", "codec";
+ resets = <&ccu RST_BUS_CODEC>;
+ dmas = <&dma 15>, <&dma 15>;
+ dma-names = "rx", "tx";
+ allwinner,codec-analog-controls = <&codec_analog>;
+ status = "disabled";
+ };
+
uart0: serial@01c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
@@ -577,6 +612,11 @@
#reset-cells = <1>;
};
+ codec_analog: codec-analog@01f015c0 {
+ compatible = "allwinner,sun8i-h3-codec-analog";
+ reg = <0x01f015c0 0x4>;
+ };
+
ir: ir@01f02000 {
compatible = "allwinner,sun5i-a13-ir";
clocks = <&apb0_gates 1>, <&ir_clk>;