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Diffstat (limited to 'arch/arm/boot/dts/tegra114.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra114.dtsi474
1 files changed, 0 insertions, 474 deletions
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
deleted file mode 100644
index abf6c40d28c6..000000000000
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ /dev/null
@@ -1,474 +0,0 @@
-#include <dt-bindings/clock/tegra114-car.h>
-#include <dt-bindings/gpio/tegra-gpio.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-#include "skeleton.dtsi"
-
-/ {
- compatible = "nvidia,tegra114";
- interrupt-parent = <&gic>;
-
- aliases {
- serial0 = &uarta;
- serial1 = &uartb;
- serial2 = &uartc;
- serial3 = &uartd;
- };
-
- gic: interrupt-controller {
- compatible = "arm,cortex-a15-gic";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0x50041000 0x1000>,
- <0x50042000 0x1000>,
- <0x50044000 0x2000>,
- <0x50046000 0x2000>;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- };
-
- timer@60005000 {
- compatible = "nvidia,tegra114-timer", "nvidia,tegra20-timer";
- reg = <0x60005000 0x400>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA114_CLK_TIMER>;
- };
-
- tegra_car: clock {
- compatible = "nvidia,tegra114-car";
- reg = <0x60006000 0x1000>;
- #clock-cells = <1>;
- };
-
- apbdma: dma {
- compatible = "nvidia,tegra114-apbdma";
- reg = <0x6000a000 0x1400>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA114_CLK_APBDMA>;
- };
-
- ahb: ahb {
- compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";
- reg = <0x6000c004 0x14c>;
- };
-
- gpio: gpio {
- compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
- reg = <0x6000d000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- #interrupt-cells = <2>;
- interrupt-controller;
- };
-
- pinmux: pinmux {
- compatible = "nvidia,tegra114-pinmux";
- reg = <0x70000868 0x148 /* Pad control registers */
- 0x70003000 0x40c>; /* Mux registers */
- };
-
- /*
- * There are two serial driver i.e. 8250 based simple serial
- * driver and APB DMA based serial driver for higher baudrate
- * and performace. To enable the 8250 based driver, the compatible
- * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
- * the APB DMA based serial driver, the comptible is
- * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
- */
- uarta: serial@70006000 {
- compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
- reg = <0x70006000 0x40>;
- reg-shift = <2>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- nvidia,dma-request-selector = <&apbdma 8>;
- status = "disabled";
- clocks = <&tegra_car TEGRA114_CLK_UARTA>;
- };
-
- uartb: serial@70006040 {
- compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
- reg = <0x70006040 0x40>;
- reg-shift = <2>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- nvidia,dma-request-selector = <&apbdma 9>;
- status = "disabled";
- clocks = <&tegra_car TEGRA114_CLK_UARTB>;
- };
-
- uartc: serial@70006200 {
- compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
- reg = <0x70006200 0x100>;
- reg-shift = <2>;
- interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- nvidia,dma-request-selector = <&apbdma 10>;
- status = "disabled";
- clocks = <&tegra_car TEGRA114_CLK_UARTC>;
- };
-
- uartd: serial@70006300 {
- compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
- reg = <0x70006300 0x100>;
- reg-shift = <2>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- nvidia,dma-request-selector = <&apbdma 19>;
- status = "disabled";
- clocks = <&tegra_car TEGRA114_CLK_UARTD>;
- };
-
- pwm: pwm {
- compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm";
- reg = <0x7000a000 0x100>;
- #pwm-cells = <2>;
- clocks = <&tegra_car TEGRA114_CLK_PWM>;
- status = "disabled";
- };
-
- i2c@7000c000 {
- compatible = "nvidia,tegra114-i2c";
- reg = <0x7000c000 0x100>;
- interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car TEGRA114_CLK_I2C1>;
- clock-names = "div-clk";
- status = "disabled";
- };
-
- i2c@7000c400 {
- compatible = "nvidia,tegra114-i2c";
- reg = <0x7000c400 0x100>;
- interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car TEGRA114_CLK_I2C2>;
- clock-names = "div-clk";
- status = "disabled";
- };
-
- i2c@7000c500 {
- compatible = "nvidia,tegra114-i2c";
- reg = <0x7000c500 0x100>;
- interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car TEGRA114_CLK_I2C3>;
- clock-names = "div-clk";
- status = "disabled";
- };
-
- i2c@7000c700 {
- compatible = "nvidia,tegra114-i2c";
- reg = <0x7000c700 0x100>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car TEGRA114_CLK_I2C4>;
- clock-names = "div-clk";
- status = "disabled";
- };
-
- i2c@7000d000 {
- compatible = "nvidia,tegra114-i2c";
- reg = <0x7000d000 0x100>;
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car TEGRA114_CLK_I2C5>;
- clock-names = "div-clk";
- status = "disabled";
- };
-
- spi@7000d400 {
- compatible = "nvidia,tegra114-spi";
- reg = <0x7000d400 0x200>;
- interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
- nvidia,dma-request-selector = <&apbdma 15>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car TEGRA114_CLK_SBC1>;
- clock-names = "spi";
- status = "disabled";
- };
-
- spi@7000d600 {
- compatible = "nvidia,tegra114-spi";
- reg = <0x7000d600 0x200>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
- nvidia,dma-request-selector = <&apbdma 16>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car TEGRA114_CLK_SBC2>;
- clock-names = "spi";
- status = "disabled";
- };
-
- spi@7000d800 {
- compatible = "nvidia,tegra114-spi";
- reg = <0x7000d800 0x200>;
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- nvidia,dma-request-selector = <&apbdma 17>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car TEGRA114_CLK_SBC3>;
- clock-names = "spi";
- status = "disabled";
- };
-
- spi@7000da00 {
- compatible = "nvidia,tegra114-spi";
- reg = <0x7000da00 0x200>;
- interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
- nvidia,dma-request-selector = <&apbdma 18>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car TEGRA114_CLK_SBC4>;
- clock-names = "spi";
- status = "disabled";
- };
-
- spi@7000dc00 {
- compatible = "nvidia,tegra114-spi";
- reg = <0x7000dc00 0x200>;
- interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
- nvidia,dma-request-selector = <&apbdma 27>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car TEGRA114_CLK_SBC5>;
- clock-names = "spi";
- status = "disabled";
- };
-
- spi@7000de00 {
- compatible = "nvidia,tegra114-spi";
- reg = <0x7000de00 0x200>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
- nvidia,dma-request-selector = <&apbdma 28>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car TEGRA114_CLK_SBC6>;
- clock-names = "spi";
- status = "disabled";
- };
-
- rtc {
- compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
- reg = <0x7000e000 0x100>;
- interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA114_CLK_RTC>;
- };
-
- kbc {
- compatible = "nvidia,tegra114-kbc";
- reg = <0x7000e200 0x100>;
- interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA114_CLK_KBC>;
- status = "disabled";
- };
-
- pmc {
- compatible = "nvidia,tegra114-pmc";
- reg = <0x7000e400 0x400>;
- clocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>;
- clock-names = "pclk", "clk32k_in";
- };
-
- iommu {
- compatible = "nvidia,tegra114-smmu", "nvidia,tegra30-smmu";
- reg = <0x7000f010 0x02c
- 0x7000f1f0 0x010
- 0x7000f228 0x074>;
- nvidia,#asids = <4>;
- dma-window = <0 0x40000000>;
- nvidia,swgroups = <0x18659fe>;
- nvidia,ahb = <&ahb>;
- };
-
- ahub {
- compatible = "nvidia,tegra114-ahub";
- reg = <0x70080000 0x200>,
- <0x70080200 0x100>,
- <0x70081000 0x200>;
- interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
- nvidia,dma-request-selector = <&apbdma 1>, <&apbdma 2>,
- <&apbdma 3>, <&apbdma 4>, <&apbdma 6>, <&apbdma 7>,
- <&apbdma 12>, <&apbdma 13>, <&apbdma 14>,
- <&apbdma 29>;
- clocks = <&tegra_car TEGRA114_CLK_D_AUDIO>,
- <&tegra_car TEGRA114_CLK_APBIF>,
- <&tegra_car TEGRA114_CLK_I2S0>,
- <&tegra_car TEGRA114_CLK_I2S1>,
- <&tegra_car TEGRA114_CLK_I2S2>,
- <&tegra_car TEGRA114_CLK_I2S3>,
- <&tegra_car TEGRA114_CLK_I2S4>,
- <&tegra_car TEGRA114_CLK_DAM0>,
- <&tegra_car TEGRA114_CLK_DAM1>,
- <&tegra_car TEGRA114_CLK_DAM2>,
- <&tegra_car TEGRA114_CLK_SPDIF_IN>,
- <&tegra_car TEGRA114_CLK_AMX>,
- <&tegra_car TEGRA114_CLK_ADX>;
- clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
- "i2s3", "i2s4", "dam0", "dam1", "dam2",
- "spdif_in", "amx", "adx";
- ranges;
- #address-cells = <1>;
- #size-cells = <1>;
-
- tegra_i2s0: i2s@70080300 {
- compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
- reg = <0x70080300 0x100>;
- nvidia,ahub-cif-ids = <4 4>;
- clocks = <&tegra_car TEGRA114_CLK_I2S0>;
- status = "disabled";
- };
-
- tegra_i2s1: i2s@70080400 {
- compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
- reg = <0x70080400 0x100>;
- nvidia,ahub-cif-ids = <5 5>;
- clocks = <&tegra_car TEGRA114_CLK_I2S1>;
- status = "disabled";
- };
-
- tegra_i2s2: i2s@70080500 {
- compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
- reg = <0x70080500 0x100>;
- nvidia,ahub-cif-ids = <6 6>;
- clocks = <&tegra_car TEGRA114_CLK_I2S2>;
- status = "disabled";
- };
-
- tegra_i2s3: i2s@70080600 {
- compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
- reg = <0x70080600 0x100>;
- nvidia,ahub-cif-ids = <7 7>;
- clocks = <&tegra_car TEGRA114_CLK_I2S3>;
- status = "disabled";
- };
-
- tegra_i2s4: i2s@70080700 {
- compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
- reg = <0x70080700 0x100>;
- nvidia,ahub-cif-ids = <8 8>;
- clocks = <&tegra_car TEGRA114_CLK_I2S4>;
- status = "disabled";
- };
- };
-
- sdhci@78000000 {
- compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
- reg = <0x78000000 0x200>;
- interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA114_CLK_SDMMC1>;
- status = "disable";
- };
-
- sdhci@78000200 {
- compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
- reg = <0x78000200 0x200>;
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA114_CLK_SDMMC2>;
- status = "disable";
- };
-
- sdhci@78000400 {
- compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
- reg = <0x78000400 0x200>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA114_CLK_SDMMC3>;
- status = "disable";
- };
-
- sdhci@78000600 {
- compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
- reg = <0x78000600 0x200>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA114_CLK_SDMMC4>;
- status = "disable";
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <0>;
- };
-
- cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <1>;
- };
-
- cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <2>;
- };
-
- cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <3>;
- };
- };
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts =
- <GIC_PPI 13
- (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14
- (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11
- (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10
- (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- };
-};
generated by cgit (git 2.34.1) at 2025-12-26 09:55:21 +0000