diff options
Diffstat (limited to 'arch/arm/boot/dts')
356 files changed, 10061 insertions, 4330 deletions
diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwinner/Makefile index 589a1ce1120a..eebb5a0c873a 100644 --- a/arch/arm/boot/dts/allwinner/Makefile +++ b/arch/arm/boot/dts/allwinner/Makefile @@ -179,6 +179,25 @@ dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-pcduino3-nano.dtb \ sun7i-a20-wexler-tab7200.dtb \ sun7i-a20-wits-pro-a20-dkt.dtb + +# Enables support for device-tree overlays for all pis +DTC_FLAGS_sun8i-h3-orangepi-lite := -@ +DTC_FLAGS_sun8i-h3-bananapi-m2-plus := -@ +DTC_FLAGS_sun8i-h3-nanopi-m1-plus := -@ +DTC_FLAGS_sun8i-h3-nanopi-m1 := -@ +DTC_FLAGS_sun8i-h3-nanopi-duo2 := -@ +DTC_FLAGS_sun8i-h3-orangepi-plus2e := -@ +DTC_FLAGS_sun8i-h3-orangepi-one := -@ +DTC_FLAGS_sun8i-h3-orangepi-plus := -@ +DTC_FLAGS_sun8i-h3-orangepi-2 := -@ +DTC_FLAGS_sun8i-h3-orangepi-zero-plus2 := -@ +DTC_FLAGS_sun8i-h3-nanopi-neo-air := -@ +DTC_FLAGS_sun8i-h3-zeropi := -@ +DTC_FLAGS_sun8i-h3-nanopi-neo := -@ +DTC_FLAGS_sun8i-h3-nanopi-r1 := -@ +DTC_FLAGS_sun8i-h3-orangepi-pc := -@ +DTC_FLAGS_sun8i-h3-bananapi-m2-plus-v1.2 := -@ +DTC_FLAGS_sun8i-h3-orangepi-pc-plus := -@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a23-evb.dtb \ sun8i-a23-gt90h-v4.dtb \ diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts b/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts index 94e24b5926dd..8b3a75383816 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) // Copyright (C) 2022 Arm Ltd. #include <dt-bindings/interrupt-controller/irq.h> diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi index 804aa197a24f..c7181308ae6f 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) // Copyright (C) 2022 Arm Ltd. #define SOC_PERIPHERAL_IRQ(nr) GIC_SPI nr diff --git a/arch/arm/boot/dts/allwinner/sunxi-d1s-t113-mangopi-mq-r.dtsi b/arch/arm/boot/dts/allwinner/sunxi-d1s-t113-mangopi-mq-r.dtsi index e9bc749488bb..a415c4a78a70 100644 --- a/arch/arm/boot/dts/allwinner/sunxi-d1s-t113-mangopi-mq-r.dtsi +++ b/arch/arm/boot/dts/allwinner/sunxi-d1s-t113-mangopi-mq-r.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) // Copyright (C) 2022 Arm Ltd. /* * Common peripherals and configurations for MangoPi MQ-R boards. diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile index c68984322a86..23cbc7203a8e 100644 --- a/arch/arm/boot/dts/aspeed/Makefile +++ b/arch/arm/boot/dts/aspeed/Makefile @@ -26,6 +26,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-facebook-wedge400.dtb \ aspeed-bmc-facebook-yamp.dtb \ aspeed-bmc-facebook-yosemitev2.dtb \ + aspeed-bmc-facebook-yosemite4.dtb \ aspeed-bmc-ibm-bonnell.dtb \ aspeed-bmc-ibm-everest.dtb \ aspeed-bmc-ibm-rainier.dtb \ @@ -53,6 +54,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-quanta-q71l.dtb \ aspeed-bmc-quanta-s6q.dtb \ aspeed-bmc-supermicro-x11spi.dtb \ + aspeed-bmc-inventec-starscream.dtb \ aspeed-bmc-inventec-transformers.dtb \ aspeed-bmc-tyan-s7106.dtb \ aspeed-bmc-tyan-s8036.dtb \ diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts index 1e0e88465254..0715cb9ab30c 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts @@ -4,12 +4,18 @@ /dts-v1/; #include "aspeed-g6.dtsi" +#include <dt-bindings/i2c/i2c.h> #include <dt-bindings/gpio/aspeed-gpio.h> / { model = "Ampere Mt.Mitchell BMC"; compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600"; + aliases { + serial7 = &uart8; + serial8 = &uart9; + }; + chosen { stdout-path = &uart5; }; @@ -61,174 +67,192 @@ adc0mux: adc0mux { compatible = "io-channel-mux"; - io-channels = <&adc0 0>; + io-channels = <&adc_i2c_0 0>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc1mux: adc1mux { compatible = "io-channel-mux"; - io-channels = <&adc0 1>; + io-channels = <&adc_i2c_0 1>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc2mux: adc2mux { compatible = "io-channel-mux"; - io-channels = <&adc0 2>; + io-channels = <&adc_i2c_0 2>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc3mux: adc3mux { compatible = "io-channel-mux"; - io-channels = <&adc0 3>; + io-channels = <&adc_i2c_0 3>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc4mux: adc4mux { compatible = "io-channel-mux"; - io-channels = <&adc0 4>; + io-channels = <&adc_i2c_0 4>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc5mux: adc5mux { compatible = "io-channel-mux"; - io-channels = <&adc0 5>; + io-channels = <&adc_i2c_0 5>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc6mux: adc6mux { compatible = "io-channel-mux"; - io-channels = <&adc0 6>; + io-channels = <&adc_i2c_0 6>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc7mux: adc7mux { compatible = "io-channel-mux"; - io-channels = <&adc0 7>; + io-channels = <&adc_i2c_0 7>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc8mux: adc8mux { compatible = "io-channel-mux"; - io-channels = <&adc1 0>; + io-channels = <&adc_i2c_0 8>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc9mux: adc9mux { compatible = "io-channel-mux"; - io-channels = <&adc1 1>; + io-channels = <&adc_i2c_0 9>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc10mux: adc10mux { compatible = "io-channel-mux"; - io-channels = <&adc1 2>; + io-channels = <&adc_i2c_0 10>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc11mux: adc11mux { compatible = "io-channel-mux"; - io-channels = <&adc1 3>; + io-channels = <&adc_i2c_0 11>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc12mux: adc12mux { compatible = "io-channel-mux"; - io-channels = <&adc1 4>; + io-channels = <&adc_i2c_0 12>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc13mux: adc13mux { compatible = "io-channel-mux"; - io-channels = <&adc1 5>; + io-channels = <&adc_i2c_0 13>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc14mux: adc14mux { compatible = "io-channel-mux"; - io-channels = <&adc1 6>; + io-channels = <&adc_i2c_0 14>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; adc15mux: adc15mux { compatible = "io-channel-mux"; - io-channels = <&adc1 7>; + io-channels = <&adc_i2c_0 15>; #io-channel-cells = <1>; io-channel-names = "parent"; mux-controls = <&gpioI5mux>; + settle-time-us = <10000>; channels = "s0", "s1"; }; iio-hwmon { compatible = "iio-hwmon"; - io-channels = <&adc0mux 0>, <&adc0mux 1>, - <&adc1mux 0>, <&adc1mux 1>, - <&adc2mux 0>, <&adc2mux 1>, - <&adc3mux 0>, <&adc3mux 1>, - <&adc4mux 0>, <&adc4mux 1>, - <&adc5mux 0>, <&adc5mux 1>, - <&adc6mux 0>, <&adc6mux 1>, - <&adc7mux 0>, <&adc7mux 1>, - <&adc8mux 0>, <&adc8mux 1>, - <&adc9mux 0>, <&adc9mux 1>, - <&adc10mux 0>, <&adc10mux 1>, - <&adc11mux 0>, <&adc11mux 1>, - <&adc12mux 0>, <&adc12mux 1>, - <&adc13mux 0>, <&adc13mux 1>, - <&adc14mux 0>, <&adc14mux 1>, - <&adc15mux 0>, <&adc15mux 1>, - <&adc_i2c 0>, <&adc_i2c 1>, - <&adc_i2c 2>, <&adc_i2c 3>, - <&adc_i2c 4>, <&adc_i2c 5>, - <&adc_i2c 6>, <&adc_i2c 7>, - <&adc_i2c 8>, <&adc_i2c 9>, - <&adc_i2c 10>, <&adc_i2c 11>, - <&adc_i2c 12>, <&adc_i2c 13>, - <&adc_i2c 14>, <&adc_i2c 15>; + io-channels = <&adc0mux 0>, <&adc0mux 1>, + <&adc1mux 0>, <&adc1mux 1>, + <&adc2mux 0>, <&adc2mux 1>, + <&adc3mux 0>, <&adc3mux 1>, + <&adc4mux 0>, <&adc4mux 1>, + <&adc5mux 0>, <&adc5mux 1>, + <&adc6mux 0>, <&adc6mux 1>, + <&adc7mux 0>, <&adc7mux 1>, + <&adc8mux 0>, <&adc8mux 1>, + <&adc9mux 0>, <&adc9mux 1>, + <&adc10mux 0>, <&adc10mux 1>, + <&adc11mux 0>, <&adc11mux 1>, + <&adc12mux 0>, <&adc12mux 1>, + <&adc13mux 0>, <&adc13mux 1>, + <&adc14mux 0>, <&adc14mux 1>, + <&adc15mux 0>, <&adc15mux 1>, + <&adc_i2c_1 0>, <&adc_i2c_1 1>, + <&adc_i2c_1 2>, <&adc_i2c_1 3>, + <&adc_i2c_1 4>, <&adc_i2c_1 5>, + <&adc_i2c_1 6>, <&adc_i2c_1 7>, + <&adc_i2c_1 8>, <&adc_i2c_1 9>, + <&adc_i2c_1 10>, <&adc_i2c_1 11>, + <&adc_i2c_1 12>, <&adc_i2c_1 13>, + <&adc_i2c_1 14>, <&adc_i2c_1 15>, + <&adc0 0>, <&adc0 1>, + <&adc0 2>; }; }; @@ -307,6 +331,14 @@ status = "okay"; }; +&uart8 { + status = "okay"; +}; + +&uart9 { + status = "okay"; +}; + &i2c0 { status = "okay"; @@ -336,12 +368,27 @@ &i2c3 { status = "okay"; + bus-frequency = <1000000>; + multi-master; + mctp-controller; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; }; &i2c4 { status = "okay"; - adc_i2c: adc@16 { + adc_i2c_0: adc@14 { + compatible = "lltc,ltc2497"; + reg = <0x14>; + vref-supply = <&voltage_mon_reg>; + #io-channel-cells = <1>; + }; + + adc_i2c_1: adc@16 { compatible = "lltc,ltc2497"; reg = <0x16>; vref-supply = <&voltage_mon_reg>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts index f75cad41ae6f..3f03a198a1a8 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts @@ -424,7 +424,7 @@ &i2c3 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -471,7 +471,7 @@ &i2c6 { status = "okay"; - i2c-switch@72 { + i2c-mux@72 { compatible = "nxp,pca9548"; reg = <0x72>; #address-cells = <1>; @@ -524,7 +524,7 @@ }; }; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -533,7 +533,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; reg = <0x71>; #address-cells = <1>; @@ -569,7 +569,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <1>; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; reg = <0x71>; #address-cells = <1>; @@ -605,7 +605,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <2>; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; reg = <0x71>; #address-cells = <1>; @@ -640,7 +640,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <3>; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; reg = <0x71>; #address-cells = <1>; @@ -808,7 +808,7 @@ &i2c10 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -838,7 +838,7 @@ }; }; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; reg = <0x71>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts index 5cd060029ea9..d49328fa487a 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts @@ -132,7 +132,7 @@ * PCA9548 (1-0070) provides 8 channels connecting to SMB (Switch * Main Board). */ - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -194,7 +194,7 @@ * PCA9548 (2-0070) provides 8 channels connecting to SCM (System * Controller Module). */ - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -256,7 +256,7 @@ * PCA9548 (3-0070) provides 8 channels connecting to SMB (Switch * Main Board). */ - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -423,7 +423,7 @@ * PCA9548 (8-0070) provides 8 channels connecting to PDB (Power * Delivery Board). */ - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -486,7 +486,7 @@ * PCA9548 (15-0076) provides 8 channels connecting to FCM (Fan * Controller Module). */ - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cmm.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cmm.dts index 90a3f485c67a..24153868cc00 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cmm.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cmm.dts @@ -328,7 +328,7 @@ &i2c1 { status = "okay"; - i2c-switch@77 { + i2c-mux@77 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -341,7 +341,7 @@ #size-cells = <0>; reg = <0>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -390,7 +390,7 @@ }; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -446,7 +446,7 @@ #size-cells = <0>; reg = <1>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -495,7 +495,7 @@ }; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -551,7 +551,7 @@ #size-cells = <0>; reg = <2>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -600,7 +600,7 @@ }; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -656,7 +656,7 @@ #size-cells = <0>; reg = <3>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -705,7 +705,7 @@ }; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -761,7 +761,7 @@ #size-cells = <0>; reg = <4>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -810,7 +810,7 @@ }; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -866,7 +866,7 @@ #size-cells = <0>; reg = <5>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -915,7 +915,7 @@ }; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -971,7 +971,7 @@ #size-cells = <0>; reg = <6>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1020,7 +1020,7 @@ }; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1076,7 +1076,7 @@ #size-cells = <0>; reg = <7>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1125,7 +1125,7 @@ }; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1183,7 +1183,7 @@ &i2c2 { status = "okay"; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1281,7 +1281,7 @@ &i2c8 { status = "okay"; - i2c-switch@77 { + i2c-mux@77 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1294,7 +1294,7 @@ #size-cells = <0>; reg = <0>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1350,7 +1350,7 @@ #size-cells = <0>; reg = <1>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1406,7 +1406,7 @@ #size-cells = <0>; reg = <2>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1462,7 +1462,7 @@ #size-cells = <0>; reg = <3>; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts index b5cd4c7800b0..74f3c67e0eff 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts @@ -65,7 +65,7 @@ }; &i2c2 { - i2c-switch@75 { + i2c-mux@75 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -123,7 +123,7 @@ }; &i2c5 { - i2c-switch@75 { + i2c-mux@75 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts index 6b319f34a9b9..f23c26a3441d 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts @@ -233,7 +233,7 @@ * PCA9548 (2-0070) provides 8 channels connecting to SCM (System * Controller Module). */ - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -303,7 +303,7 @@ * PCA9548 (8-0070) provides 8 channels connecting to SMB (Switch * Main Board). */ - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -315,7 +315,7 @@ #size-cells = <0>; reg = <0>; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -481,7 +481,7 @@ #size-cells = <0>; reg = <1>; - i2c-switch@72 { + i2c-mux@72 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -544,7 +544,7 @@ #size-cells = <0>; reg = <2>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -615,7 +615,7 @@ #size-cells = <0>; reg = <3>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -715,7 +715,7 @@ * PCA9548 (11-0077) provides 8 channels connecting to SMB (Switch * Main Board). */ - i2c-switch@77 { + i2c-mux@77 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -727,7 +727,7 @@ #size-cells = <0>; reg = <0>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -790,7 +790,7 @@ #size-cells = <0>; reg = <1>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -853,7 +853,7 @@ #size-cells = <0>; reg = <2>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -916,7 +916,7 @@ #size-cells = <0>; reg = <3>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -979,7 +979,7 @@ #size-cells = <0>; reg = <4>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1042,7 +1042,7 @@ #size-cells = <0>; reg = <5>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1105,7 +1105,7 @@ #size-cells = <0>; reg = <6>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1168,7 +1168,7 @@ #size-cells = <0>; reg = <7>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minipack.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minipack.dts index 230d16cd9967..aafd1042b6e5 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minipack.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minipack.dts @@ -344,7 +344,7 @@ * I2C Switch 2-0070 is connecting to SCM (System Controller * Module). */ - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -425,7 +425,7 @@ &i2c8 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -441,7 +441,7 @@ #size-cells = <0>; reg = <0>; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -507,7 +507,7 @@ #size-cells = <0>; reg = <1>; - i2c-switch@72 { + i2c-mux@72 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -573,7 +573,7 @@ #size-cells = <0>; reg = <2>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -639,7 +639,7 @@ #size-cells = <0>; reg = <3>; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -729,7 +729,7 @@ * I2C Switch 9-0070 is connecting to MAC/PHY EEPROMs on SMB * (Switch Main Board). */ - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -793,7 +793,7 @@ &i2c11 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -809,7 +809,7 @@ #size-cells = <0>; reg = <0>; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -875,7 +875,7 @@ #size-cells = <0>; reg = <1>; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -941,7 +941,7 @@ #size-cells = <0>; reg = <2>; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1007,7 +1007,7 @@ #size-cells = <0>; reg = <3>; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1073,7 +1073,7 @@ #size-cells = <0>; reg = <4>; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1139,7 +1139,7 @@ #size-cells = <0>; reg = <5>; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1205,7 +1205,7 @@ #size-cells = <0>; reg = <6>; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -1271,7 +1271,7 @@ #size-cells = <0>; reg = <7>; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts index b6b16356f571..704ee684e0fb 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts @@ -211,7 +211,7 @@ &i2c1 { status = "okay"; //X24 Riser - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9544"; #address-cells = <1>; #size-cells = <0>; @@ -243,7 +243,7 @@ pagesize = <32>; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9546"; #address-cells = <1>; #size-cells = <0>; @@ -303,7 +303,7 @@ pagesize = <32>; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9546"; #address-cells = <1>; #size-cells = <0>; @@ -363,7 +363,7 @@ pagesize = <32>; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9546"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge100.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge100.dts index 584efa528450..97cd11c3d9a5 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge100.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge100.dts @@ -44,7 +44,7 @@ }; &i2c7 { - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts index ed305948386f..a677c827e758 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts @@ -59,7 +59,8 @@ ast-adc-hwmon { compatible = "iio-hwmon"; - io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>, + <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>; }; /* @@ -138,7 +139,7 @@ &i2c2 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -218,7 +219,7 @@ &i2c8 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -287,7 +288,7 @@ &i2c11 { status = "okay"; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -366,6 +367,7 @@ }; &sdhci1 { + max-frequency = <25000000>; /* * DMA mode needs to be disabled to avoid conflicts with UHCI * Controller in AST2500 SoC. diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yamp.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yamp.dts index 5e6105874217..98fe0d6c8188 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yamp.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yamp.dts @@ -57,7 +57,7 @@ &i2c2 { status = "okay"; - i2c-switch@75 { + i2c-mux@75 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts new file mode 100644 index 000000000000..64075cc41d92 --- /dev/null +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts @@ -0,0 +1,624 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2022 Facebook Inc. + +/dts-v1/; +#include "aspeed-g6.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> +#include <dt-bindings/leds/leds-pca955x.h> +#include <dt-bindings/i2c/i2c.h> + +/ { + model = "Facebook Yosemite 4 BMC"; + compatible = "facebook,yosemite4-bmc", "aspeed,ast2600"; + + aliases { + serial4 = &uart5; + serial5 = &uart6; + serial6 = &uart7; + serial7 = &uart8; + serial8 = &uart9; + }; + + chosen { + stdout-path = "serial4:57600n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, + <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, + <&adc1 0>, <&adc1 1>; + }; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&uart6 { + status = "okay"; +}; + +&uart7 { + status = "okay"; +}; + +&uart8 { + status = "okay"; +}; + +&uart9 { + status = "okay"; +}; + +&wdt1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdtrst1_default>; + aspeed,reset-type = "soc"; + aspeed,external-signal; + aspeed,ext-push-pull; + aspeed,ext-active-high; + aspeed,ext-pulse-duration = <256>; +}; + +&mac2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii3_default>; + use-ncsi; + mlx,multi-host; +}; + +&mac3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii4_default>; + use-ncsi; + mlx,multi-host; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; +#include "openbmc-flash-layout-64.dtsi" + }; + flash@1 { + status = "okay"; + m25p,fast-read; + label = "bmc2"; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + }; +}; + +&i2c0 { + status = "okay"; + mctp-controller; + bus-frequency = <400000>; + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + power-sensor@40 { + compatible = "adi,adm1278"; + reg = <0x40>; + }; +}; + +&i2c1 { + status = "okay"; + mctp-controller; + bus-frequency = <400000>; + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + power-sensor@40 { + compatible = "adi,adm1278"; + reg = <0x40>; + }; +}; + +&i2c2 { + status = "okay"; + mctp-controller; + bus-frequency = <400000>; + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + power-sensor@40 { + compatible = "adi,adm1278"; + reg = <0x40>; + }; +}; + +&i2c3 { + status = "okay"; + mctp-controller; + bus-frequency = <400000>; + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + power-sensor@40 { + compatible = "adi,adm1278"; + reg = <0x40>; + }; +}; + +&i2c4 { + status = "okay"; + mctp-controller; + bus-frequency = <400000>; + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + power-sensor@40 { + compatible = "adi,adm1278"; + reg = <0x40>; + }; +}; + +&i2c5 { + status = "okay"; + mctp-controller; + bus-frequency = <400000>; + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + power-sensor@40 { + compatible = "adi,adm1278"; + reg = <0x40>; + }; +}; + +&i2c6 { + status = "okay"; + mctp-controller; + bus-frequency = <400000>; + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + power-sensor@40 { + compatible = "adi,adm1278"; + reg = <0x40>; + }; +}; + +&i2c7 { + status = "okay"; + mctp-controller; + bus-frequency = <400000>; + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + power-sensor@40 { + compatible = "adi,adm1278"; + reg = <0x40>; + }; +}; + +&i2c8 { + status = "okay"; + bus-frequency = <400000>; + i2c-mux@70 { + compatible = "nxp,pca9544"; + idle-state = <0>; + i2c-mux-idle-disconnect; + reg = <0x70>; + }; +}; + +&i2c9 { + status = "okay"; + bus-frequency = <400000>; + i2c-mux@71 { + compatible = "nxp,pca9544"; + idle-state = <0>; + i2c-mux-idle-disconnect; + reg = <0x71>; + }; +}; + +&i2c10 { + status = "okay"; + bus-frequency = <400000>; +}; + +&i2c11 { + status = "okay"; + power-sensor@10 { + compatible = "adi, adm1272"; + reg = <0x10>; + }; + + power-sensor@12 { + compatible = "adi, adm1272"; + reg = <0x12>; + }; + + gpio@20 { + compatible = "nxp,pca9555"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@21 { + compatible = "nxp,pca9555"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@22 { + compatible = "nxp,pca9555"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@23 { + compatible = "nxp,pca9555"; + reg = <0x23>; + gpio-controller; + #gpio-cells = <2>; + }; + + temperature-sensor@48 { + compatible = "ti,tmp75"; + reg = <0x48>; + }; + + temperature-sensor@49 { + compatible = "ti,tmp75"; + reg = <0x49>; + }; + + temperature-sensor@4a { + compatible = "ti,tmp75"; + reg = <0x4a>; + }; + + temperature-sensor@4b { + compatible = "ti,tmp75"; + reg = <0x4b>; + }; + + eeprom@54 { + compatible = "atmel,24c256"; + reg = <0x54>; + }; +}; + +&i2c12 { + status = "okay"; + bus-frequency = <400000>; + + temperature-sensor@48 { + compatible = "ti,tmp75"; + reg = <0x48>; + }; + + eeprom@50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; + + rtc@6f { + compatible = "nuvoton,nct3018y"; + reg = <0x6f>; + }; +}; + +&i2c13 { + status = "okay"; + bus-frequency = <400000>; +}; + +&i2c14 { + status = "okay"; + bus-frequency = <400000>; + adc@1d { + compatible = "ti,adc128d818"; + reg = <0x1d>; + ti,mode = /bits/ 8 <2>; + }; + + adc@35 { + compatible = "ti,adc128d818"; + reg = <0x35>; + ti,mode = /bits/ 8 <2>; + }; + + adc@37 { + compatible = "ti,adc128d818"; + reg = <0x37>; + ti,mode = /bits/ 8 <2>; + }; + + power-sensor@40 { + compatible = "ti,ina230"; + reg = <0x40>; + }; + + power-sensor@41 { + compatible = "ti,ina230"; + reg = <0x41>; + }; + + power-sensor@42 { + compatible = "ti,ina230"; + reg = <0x42>; + }; + + power-sensor@43 { + compatible = "ti,ina230"; + reg = <0x43>; + }; + + power-sensor@44 { + compatible = "ti,ina230"; + reg = <0x44>; + }; + + temperature-sensor@4e { + compatible = "ti,tmp75"; + reg = <0x4e>; + }; + + temperature-sensor@4f { + compatible = "ti,tmp75"; + reg = <0x4f>; + }; + + eeprom@51 { + compatible = "atmel,24c128"; + reg = <0x51>; + }; + + i2c-mux@71 { + compatible = "nxp,pca9846"; + #address-cells = <1>; + #size-cells = <0>; + + idle-state = <0>; + i2c-mux-idle-disconnect; + reg = <0x71>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + adc@1f { + compatible = "ti,adc128d818"; + reg = <0x1f>; + ti,mode = /bits/ 8 <2>; + }; + + pwm@20{ + compatible = "max31790"; + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + }; + + gpio@22{ + compatible = "ti,tca6424"; + reg = <0x22>; + }; + + pwm@23{ + compatible = "max31790"; + reg = <0x23>; + #address-cells = <1>; + #size-cells = <0>; + }; + + adc@33 { + compatible = "maxim,max11615"; + reg = <0x33>; + }; + + eeprom@52 { + compatible = "atmel,24c128"; + reg = <0x52>; + }; + + gpio@61 { + compatible = "nxp,pca9552"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + adc@1f { + compatible = "ti,adc128d818"; + reg = <0x1f>; + ti,mode = /bits/ 8 <2>; + }; + + pwm@20{ + compatible = "max31790"; + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + }; + + gpio@22{ + compatible = "ti,tca6424"; + reg = <0x22>; + }; + + pwm@23{ + compatible = "max31790"; + reg = <0x23>; + #address-cells = <1>; + #size-cells = <0>; + }; + + adc@33 { + compatible = "maxim,max11615"; + reg = <0x33>; + }; + + eeprom@52 { + compatible = "atmel,24c128"; + reg = <0x52>; + }; + + gpio@61 { + compatible = "nxp,pca9552"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + }; + + i2c-mux@73 { + compatible = "nxp,pca9544"; + #address-cells = <1>; + #size-cells = <0>; + + idle-state = <0>; + i2c-mux-idle-disconnect; + reg = <0x73>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + adc@35 { + compatible = "maxim,max11617"; + reg = <0x35>; + }; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + adc@35 { + compatible = "maxim,max11617"; + reg = <0x35>; + }; + }; + }; +}; + +&i2c15 { + status = "okay"; + mctp-controller; + multi-master; + bus-frequency = <400000>; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + i2c-mux@72 { + compatible = "nxp,pca9544"; + idle-state = <0>; + i2c-mux-idle-disconnect; + reg = <0x72>; + }; +}; + +&adc0 { + ref_voltage = <2500>; + status = "okay"; + pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default + &pinctrl_adc2_default &pinctrl_adc3_default + &pinctrl_adc4_default &pinctrl_adc5_default + &pinctrl_adc6_default &pinctrl_adc7_default>; +}; + +&adc1 { + ref_voltage = <2500>; + status = "okay"; + pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default>; +}; + + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&uhci { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts index 81902cbe662c..d47ce4edc67c 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts @@ -12,38 +12,11 @@ compatible = "ibm,bonnell-bmc", "aspeed,ast2600"; aliases { - i2c100 = &cfam0_i2c0; - i2c101 = &cfam0_i2c1; - i2c110 = &cfam0_i2c10; - i2c111 = &cfam0_i2c11; - i2c112 = &cfam0_i2c12; - i2c113 = &cfam0_i2c13; - i2c114 = &cfam0_i2c14; - i2c115 = &cfam0_i2c15; - i2c202 = &cfam1_i2c2; - i2c203 = &cfam1_i2c3; - i2c210 = &cfam1_i2c10; - i2c211 = &cfam1_i2c11; - i2c214 = &cfam1_i2c14; - i2c215 = &cfam1_i2c15; - i2c216 = &cfam1_i2c16; - i2c217 = &cfam1_i2c17; - serial4 = &uart5; i2c16 = &i2c11mux0chn0; i2c17 = &i2c11mux0chn1; i2c18 = &i2c11mux0chn2; i2c19 = &i2c11mux0chn3; - - spi10 = &cfam0_spi0; - spi11 = &cfam0_spi1; - spi12 = &cfam0_spi2; - spi13 = &cfam0_spi3; - spi20 = &cfam1_spi0; - spi21 = &cfam1_spi1; - spi22 = &cfam1_spi2; - spi23 = &cfam1_spi3; - }; chosen { @@ -197,313 +170,6 @@ clk-phase-mmc-hs200 = <180>, <180>; }; -&fsim0 { - status = "okay"; - - #address-cells = <2>; - #size-cells = <0>; - - cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; - - cfam@0,0 { - reg = <0 0>; - #address-cells = <1>; - #size-cells = <1>; - chip-id = <0>; - - scom@1000 { - compatible = "ibm,fsi2pib"; - reg = <0x1000 0x400>; - }; - - i2c@1800 { - compatible = "ibm,fsi-i2c-master"; - reg = <0x1800 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam0_i2c0: i2c-bus@0 { - reg = <0>; /* OMI01 */ - }; - - cfam0_i2c1: i2c-bus@1 { - reg = <1>; /* OMI23 */ - }; - - cfam0_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ - }; - - cfam0_i2c11: i2c-bus@b { - reg = <11>; /* OP3B */ - }; - - cfam0_i2c12: i2c-bus@c { - reg = <12>; /* OP4A */ - }; - - cfam0_i2c13: i2c-bus@d { - reg = <13>; /* OP4B */ - }; - - cfam0_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ - }; - - cfam0_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ - }; - }; - - fsi2spi@1c00 { - compatible = "ibm,fsi2spi"; - reg = <0x1c00 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam0_spi0: spi@0 { - reg = <0x0>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam0_spi1: spi@20 { - reg = <0x20>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam0_spi2: spi@40 { - reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam0_spi3: spi@60 { - reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - }; - - sbefifo@2400 { - compatible = "ibm,p9-sbefifo"; - reg = <0x2400 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - fsi_occ0: occ { - compatible = "ibm,p10-occ"; - - occ-hwmon { - compatible = "ibm,p10-occ-hwmon"; - ibm,no-poll-on-init; - }; - }; - }; - - fsi_hub0: hub@3400 { - compatible = "fsi-master-hub"; - reg = <0x3400 0x400>; - #address-cells = <2>; - #size-cells = <0>; - }; - }; -}; - -&fsi_hub0 { - cfam@1,0 { - reg = <1 0>; - #address-cells = <1>; - #size-cells = <1>; - chip-id = <1>; - - scom@1000 { - compatible = "ibm,fsi2pib"; - reg = <0x1000 0x400>; - }; - - i2c@1800 { - compatible = "ibm,fsi-i2c-master"; - reg = <0x1800 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam1_i2c2: i2c-bus@2 { - reg = <2>; /* OMI45 */ - }; - - cfam1_i2c3: i2c-bus@3 { - reg = <3>; /* OMI67 */ - }; - - cfam1_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ - }; - - cfam1_i2c11: i2c-bus@b { - reg = <11>; /* OP3B */ - }; - - cfam1_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ - }; - - cfam1_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ - }; - - cfam1_i2c16: i2c-bus@10 { - reg = <16>; /* OP6A */ - }; - - cfam1_i2c17: i2c-bus@11 { - reg = <17>; /* OP6B */ - }; - }; - - fsi2spi@1c00 { - compatible = "ibm,fsi2spi"; - reg = <0x1c00 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam1_spi0: spi@0 { - reg = <0x0>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam1_spi1: spi@20 { - reg = <0x20>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam1_spi2: spi@40 { - reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam1_spi3: spi@60 { - reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - }; - - sbefifo@2400 { - compatible = "ibm,p9-sbefifo"; - reg = <0x2400 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - fsi_occ1: occ { - compatible = "ibm,p10-occ"; - - occ-hwmon { - compatible = "ibm,p10-occ-hwmon"; - ibm,no-poll-on-init; - }; - }; - }; - - fsi_hub1: hub@3400 { - compatible = "fsi-master-hub"; - reg = <0x3400 0x400>; - #address-cells = <2>; - #size-cells = <0>; - - no-scan-on-init; - }; - }; -}; - &ibt { status = "okay"; }; @@ -913,3 +579,33 @@ aspeed,lpc-io-reg = <0xca2>; aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; }; + +#include "ibm-power10-dual.dtsi" + +&cfam0_i2c10 { + eeprom@50 { + compatible = "atmel,at30tse004a"; + reg = <0x50>; + }; +}; + +&cfam0_i2c11 { + eeprom@50 { + compatible = "atmel,at30tse004a"; + reg = <0x50>; + }; +}; + +&cfam0_i2c12 { + eeprom@50 { + compatible = "atmel,at30tse004a"; + reg = <0x50>; + }; +}; + +&cfam0_i2c13 { + eeprom@50 { + compatible = "atmel,at30tse004a"; + reg = <0x50>; + }; +}; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts index c6f8f20914d1..214b2e6a4c6d 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts @@ -12,38 +12,6 @@ compatible = "ibm,everest-bmc", "aspeed,ast2600"; aliases { - i2c100 = &cfam0_i2c0; - i2c101 = &cfam0_i2c1; - i2c110 = &cfam0_i2c10; - i2c111 = &cfam0_i2c11; - i2c112 = &cfam0_i2c12; - i2c113 = &cfam0_i2c13; - i2c114 = &cfam0_i2c14; - i2c115 = &cfam0_i2c15; - i2c202 = &cfam1_i2c2; - i2c203 = &cfam1_i2c3; - i2c210 = &cfam1_i2c10; - i2c211 = &cfam1_i2c11; - i2c214 = &cfam1_i2c14; - i2c215 = &cfam1_i2c15; - i2c216 = &cfam1_i2c16; - i2c217 = &cfam1_i2c17; - i2c300 = &cfam2_i2c0; - i2c301 = &cfam2_i2c1; - i2c310 = &cfam2_i2c10; - i2c311 = &cfam2_i2c11; - i2c312 = &cfam2_i2c12; - i2c313 = &cfam2_i2c13; - i2c314 = &cfam2_i2c14; - i2c315 = &cfam2_i2c15; - i2c402 = &cfam3_i2c2; - i2c403 = &cfam3_i2c3; - i2c410 = &cfam3_i2c10; - i2c411 = &cfam3_i2c11; - i2c414 = &cfam3_i2c14; - i2c415 = &cfam3_i2c15; - i2c416 = &cfam3_i2c16; - i2c417 = &cfam3_i2c17; i2c500 = &cfam4_i2c0; i2c501 = &cfam4_i2c1; i2c510 = &cfam4_i2c10; @@ -113,22 +81,72 @@ serial4 = &uart5; - spi10 = &cfam0_spi0; - spi11 = &cfam0_spi1; - spi12 = &cfam0_spi2; - spi13 = &cfam0_spi3; - spi20 = &cfam1_spi0; - spi21 = &cfam1_spi1; - spi22 = &cfam1_spi2; - spi23 = &cfam1_spi3; - spi30 = &cfam2_spi0; - spi31 = &cfam2_spi1; - spi32 = &cfam2_spi2; - spi33 = &cfam2_spi3; - spi40 = &cfam3_spi0; - spi41 = &cfam3_spi1; - spi42 = &cfam3_spi2; - spi43 = &cfam3_spi3; + sbefifo500 = &sbefifo500; + sbefifo501 = &sbefifo501; + sbefifo510 = &sbefifo510; + sbefifo511 = &sbefifo511; + sbefifo512 = &sbefifo512; + sbefifo513 = &sbefifo513; + sbefifo514 = &sbefifo514; + sbefifo515 = &sbefifo515; + sbefifo602 = &sbefifo602; + sbefifo603 = &sbefifo603; + sbefifo610 = &sbefifo610; + sbefifo611 = &sbefifo611; + sbefifo614 = &sbefifo614; + sbefifo615 = &sbefifo615; + sbefifo616 = &sbefifo616; + sbefifo617 = &sbefifo617; + sbefifo700 = &sbefifo700; + sbefifo701 = &sbefifo701; + sbefifo710 = &sbefifo710; + sbefifo711 = &sbefifo711; + sbefifo712 = &sbefifo712; + sbefifo713 = &sbefifo713; + sbefifo714 = &sbefifo714; + sbefifo715 = &sbefifo715; + sbefifo802 = &sbefifo802; + sbefifo803 = &sbefifo803; + sbefifo810 = &sbefifo810; + sbefifo811 = &sbefifo811; + sbefifo814 = &sbefifo814; + sbefifo815 = &sbefifo815; + sbefifo816 = &sbefifo816; + sbefifo817 = &sbefifo817; + + scom500 = &scom500; + scom501 = &scom501; + scom510 = &scom510; + scom511 = &scom511; + scom512 = &scom512; + scom513 = &scom513; + scom514 = &scom514; + scom515 = &scom515; + scom602 = &scom602; + scom603 = &scom603; + scom610 = &scom610; + scom611 = &scom611; + scom614 = &scom614; + scom615 = &scom615; + scom616 = &scom616; + scom617 = &scom617; + scom700 = &scom700; + scom701 = &scom701; + scom710 = &scom710; + scom711 = &scom711; + scom712 = &scom712; + scom713 = &scom713; + scom714 = &scom714; + scom715 = &scom715; + scom802 = &scom802; + scom803 = &scom803; + scom810 = &scom810; + scom811 = &scom811; + scom814 = &scom814; + scom815 = &scom815; + scom816 = &scom816; + scom817 = &scom817; + spi50 = &cfam4_spi0; spi51 = &cfam4_spi1; spi52 = &cfam4_spi2; @@ -399,7 +417,7 @@ "expander-cable-card5"; }; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -544,7 +562,7 @@ "expander-cable-card11"; }; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -701,7 +719,7 @@ &i2c6 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -1792,7 +1810,7 @@ reg = <0x50>; }; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -1929,7 +1947,7 @@ reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>; }; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -2188,7 +2206,7 @@ }; }; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; reg = <0x71>; #address-cells = <1>; @@ -2241,7 +2259,7 @@ &i2c15 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -2293,7 +2311,7 @@ }; }; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; reg = <0x71>; #address-cells = <1>; @@ -2345,7 +2363,7 @@ }; }; - i2c-switch@72 { + i2c-mux@72 { compatible = "nxp,pca9546"; reg = <0x72>; #address-cells = <1>; @@ -2413,172 +2431,85 @@ clk-phase-mmc-hs200 = <210>, <228>; }; -&fsim0 { +&ibt { status = "okay"; +}; - #address-cells = <2>; - #size-cells = <0>; - - /* - * CFAM Reset is supposed to be active low but pass1 hardware is wired - * active high. - */ - cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; - - cfam@0,0 { /* DCM0_C0 */ - reg = <0 0>; - #address-cells = <1>; - #size-cells = <1>; - chip-id = <0>; - - scom@1000 { - compatible = "ibm,fsi2pib"; - reg = <0x1000 0x400>; - }; - - i2c@1800 { - compatible = "ibm,fsi-i2c-master"; - reg = <0x1800 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam0_i2c0: i2c-bus@0 { - reg = <0>; /* OMI01 */ - }; - - cfam0_i2c1: i2c-bus@1 { - reg = <1>; /* OMI23 */ - }; - - cfam0_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ - }; - - cfam0_i2c11: i2c-bus@b { - reg = <11>; /* OP3B */ - }; - - cfam0_i2c12: i2c-bus@c { - reg = <12>; /* OP4A */ - }; - - cfam0_i2c13: i2c-bus@d { - reg = <13>; /* OP4B */ - }; - - cfam0_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ - }; - - cfam0_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ - }; - }; - - fsi2spi@1c00 { - compatible = "ibm,fsi2spi"; - reg = <0x1c00 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam0_spi0: spi@0 { - reg = <0x0>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam0_spi1: spi@20 { - reg = <0x20>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; +&uart2 { + status = "okay"; +}; - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; +&vuart1 { + status = "okay"; +}; - cfam0_spi2: spi@40 { - reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; +&vuart2 { + status = "okay"; +}; - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; +&lpc_ctrl { + status = "okay"; + memory-region = <&flash_memory>; +}; - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; +&mac2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii3_default>; + clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>, + <&syscon ASPEED_CLK_MAC3RCLK>; + clock-names = "MACCLK", "RCLK"; + use-ncsi; +}; - cfam0_spi3: spi@60 { - reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; +&mac3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii4_default>; + clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>, + <&syscon ASPEED_CLK_MAC4RCLK>; + clock-names = "MACCLK", "RCLK"; + use-ncsi; +}; - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; +&wdt1 { + aspeed,reset-type = "none"; + aspeed,external-signal; + aspeed,ext-push-pull; + aspeed,ext-active-high; - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - }; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdtrst1_default>; +}; - sbefifo@2400 { - compatible = "ibm,p9-sbefifo"; - reg = <0x2400 0x400>; - #address-cells = <1>; - #size-cells = <0>; +&wdt2 { + status = "okay"; +}; - fsi_occ0: occ { - compatible = "ibm,p10-occ"; +&xdma { + status = "okay"; + memory-region = <&vga_memory>; +}; - occ-hwmon { - compatible = "ibm,p10-occ-hwmon"; - ibm,no-poll-on-init; - }; - }; - }; +&kcs2 { + status = "okay"; + aspeed,lpc-io-reg = <0xca8 0xcac>; +}; - fsi_hub0: hub@3400 { - compatible = "fsi-master-hub"; - reg = <0x3400 0x400>; - #address-cells = <2>; - #size-cells = <0>; - }; - }; +&kcs3 { + status = "okay"; + aspeed,lpc-io-reg = <0xca2>; + aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; }; +#include "ibm-power10-quad.dtsi" + &fsi_hub0 { - cfam@1,0 { /* DCM0_C1 */ - reg = <1 0>; + cfam@4,0 { /* DCM2_C0 */ + reg = <4 0>; #address-cells = <1>; #size-cells = <1>; - chip-id = <1>; + chip-id = <4>; scom@1000 { compatible = "ibm,fsi2pib"; @@ -2591,185 +2522,260 @@ #address-cells = <1>; #size-cells = <0>; - cfam1_i2c2: i2c-bus@2 { - reg = <2>; /* OMI45 */ - }; + cfam4_i2c0: i2c-bus@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; /* OM01 */ - cfam1_i2c3: i2c-bus@3 { - reg = <3>; /* OMI67 */ - }; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - cfam1_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ - }; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - cfam1_i2c11: i2c-bus@b { - reg = <11>; /* OP3B */ - }; + scom500: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - cfam1_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ + sbefifo500: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; - cfam1_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ - }; + cfam4_i2c1: i2c-bus@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; /* OM23 */ - cfam1_i2c16: i2c-bus@10 { - reg = <16>; /* OP6A */ - }; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - cfam1_i2c17: i2c-bus@11 { - reg = <17>; /* OP6B */ - }; - }; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - fsi2spi@1c00 { - compatible = "ibm,fsi2spi"; - reg = <0x1c00 0x400>; - #address-cells = <1>; - #size-cells = <0>; + scom501: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - cfam1_spi0: spi@0 { - reg = <0x0>; + sbefifo501: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam4_i2c10: i2c-bus@a { #address-cells = <1>; #size-cells = <0>; + reg = <10>; /* OP3A */ - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom510: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo510: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; - cfam1_spi1: spi@20 { - reg = <0x20>; + cfam4_i2c11: i2c-bus@b { #address-cells = <1>; #size-cells = <0>; + reg = <11>; /* OP3B */ - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom511: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo511: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; - cfam1_spi2: spi@40 { - reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; + cfam4_i2c12: i2c-bus@c { #address-cells = <1>; #size-cells = <0>; + reg = <12>; /* OP4A */ - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom512: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo512: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; - cfam1_spi3: spi@60 { - reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; + cfam4_i2c13: i2c-bus@d { #address-cells = <1>; #size-cells = <0>; + reg = <13>; /* OP4B */ - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - }; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - sbefifo@2400 { - compatible = "ibm,p9-sbefifo"; - reg = <0x2400 0x400>; - #address-cells = <1>; - #size-cells = <0>; + scom513: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - fsi_occ1: occ { - compatible = "ibm,p10-occ"; - - occ-hwmon { - compatible = "ibm,p10-occ-hwmon"; - ibm,no-poll-on-init; + sbefifo513: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; - }; - fsi_hub1: hub@3400 { - compatible = "fsi-master-hub"; - reg = <0x3400 0x400>; - #address-cells = <2>; - #size-cells = <0>; - - no-scan-on-init; - }; - }; - - cfam@2,0 { /* DCM1_C0 */ - reg = <2 0>; - #address-cells = <1>; - #size-cells = <1>; - chip-id = <2>; - - scom@1000 { - compatible = "ibm,fsi2pib"; - reg = <0x1000 0x400>; - }; + cfam4_i2c14: i2c-bus@e { + #address-cells = <1>; + #size-cells = <0>; + reg = <14>; /* OP5A */ - i2c@1800 { - compatible = "ibm,fsi-i2c-master"; - reg = <0x1800 0x400>; - #address-cells = <1>; - #size-cells = <0>; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - cfam2_i2c0: i2c-bus@0 { - reg = <0>; /* OM01 */ - }; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - cfam2_i2c1: i2c-bus@1 { - reg = <1>; /* OM23 */ - }; + scom514: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - cfam2_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ + sbefifo514: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; - cfam2_i2c11: i2c-bus@b { - reg = <11>; /* OP3B */ - }; + cfam4_i2c15: i2c-bus@f { + #address-cells = <1>; + #size-cells = <0>; + reg = <15>; /* OP5B */ - cfam2_i2c12: i2c-bus@c { - reg = <12>; /* OP4A */ - }; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - cfam2_i2c13: i2c-bus@d { - reg = <13>; /* OP4B */ - }; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - cfam2_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ - }; + scom515: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - cfam2_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ + sbefifo515: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; }; @@ -2779,7 +2785,7 @@ #address-cells = <1>; #size-cells = <0>; - cfam2_spi0: spi@0 { + cfam4_spi0: spi@0 { reg = <0x0>; #address-cells = <1>; #size-cells = <0>; @@ -2795,7 +2801,7 @@ }; }; - cfam2_spi1: spi@20 { + cfam4_spi1: spi@20 { reg = <0x20>; #address-cells = <1>; #size-cells = <0>; @@ -2811,9 +2817,9 @@ }; }; - cfam2_spi2: spi@40 { + cfam4_spi2: spi@40 { reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; + compatible = "ibm,fsi2spi"; #address-cells = <1>; #size-cells = <0>; @@ -2828,9 +2834,9 @@ }; }; - cfam2_spi3: spi@60 { + cfam4_spi3: spi@60 { reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; + compatible = "ibm,fsi2spi"; #address-cells = <1>; #size-cells = <0>; @@ -2852,7 +2858,7 @@ #address-cells = <1>; #size-cells = <0>; - fsi_occ2: occ { + fsi_occ4: occ { compatible = "ibm,p10-occ"; occ-hwmon { @@ -2862,7 +2868,7 @@ }; }; - fsi_hub2: hub@3400 { + fsi_hub4: hub@3400 { compatible = "fsi-master-hub"; reg = <0x3400 0x400>; #address-cells = <2>; @@ -2872,11 +2878,11 @@ }; }; - cfam@3,0 { /* DCM1_C1 */ - reg = <3 0>; + cfam@5,0 { /* DCM2_C1 */ + reg = <5 0>; #address-cells = <1>; #size-cells = <1>; - chip-id = <3>; + chip-id = <5>; scom@1000 { compatible = "ibm,fsi2pib"; @@ -2889,334 +2895,260 @@ #address-cells = <1>; #size-cells = <0>; - cfam3_i2c2: i2c-bus@2 { + cfam5_i2c2: i2c-bus@2 { + #address-cells = <1>; + #size-cells = <0>; reg = <2>; /* OM45 */ - }; - - cfam3_i2c3: i2c-bus@3 { - reg = <3>; /* OM67 */ - }; - - cfam3_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ - }; - - cfam3_i2c11: i2c-bus@b { - reg = <11>; /* OP3B */ - }; - - cfam3_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ - }; - - cfam3_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ - }; - - cfam3_i2c16: i2c-bus@10 { - reg = <16>; /* OP6A */ - }; - cfam3_i2c17: i2c-bus@11 { - reg = <17>; /* OP6B */ - }; - }; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - fsi2spi@1c00 { - compatible = "ibm,fsi2spi"; - reg = <0x1c00 0x400>; - #address-cells = <1>; - #size-cells = <0>; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - cfam3_spi0: spi@0 { - reg = <0x0>; - #address-cells = <1>; - #size-cells = <0>; + scom602: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; + sbefifo602: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; - cfam3_spi1: spi@20 { - reg = <0x20>; + cfam5_i2c3: i2c-bus@3 { #address-cells = <1>; #size-cells = <0>; + reg = <3>; /* OM67 */ - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - cfam3_spi2: spi@40 { - reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; + scom603: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; + sbefifo603: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; - cfam3_spi3: spi@60 { - reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; + cfam5_i2c10: i2c-bus@a { #address-cells = <1>; #size-cells = <0>; + reg = <10>; /* OP3A */ - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - }; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - sbefifo@2400 { - compatible = "ibm,p9-sbefifo"; - reg = <0x2400 0x400>; - #address-cells = <1>; - #size-cells = <0>; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - fsi_occ3: occ { - compatible = "ibm,p10-occ"; + scom610: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - occ-hwmon { - compatible = "ibm,p10-occ-hwmon"; - ibm,no-poll-on-init; + sbefifo610: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; - }; - - fsi_hub3: hub@3400 { - compatible = "fsi-master-hub"; - reg = <0x3400 0x400>; - #address-cells = <2>; - #size-cells = <0>; - - no-scan-on-init; - }; - }; - - cfam@4,0 { /* DCM2_C0 */ - reg = <4 0>; - #address-cells = <1>; - #size-cells = <1>; - chip-id = <4>; - - scom@1000 { - compatible = "ibm,fsi2pib"; - reg = <0x1000 0x400>; - }; - - i2c@1800 { - compatible = "ibm,fsi-i2c-master"; - reg = <0x1800 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam4_i2c0: i2c-bus@0 { - reg = <0>; /* OM01 */ - }; - - cfam4_i2c1: i2c-bus@1 { - reg = <1>; /* OM23 */ - }; - cfam4_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ - }; - - cfam4_i2c11: i2c-bus@b { + cfam5_i2c11: i2c-bus@b { + #address-cells = <1>; + #size-cells = <0>; reg = <11>; /* OP3B */ - }; - cfam4_i2c12: i2c-bus@c { - reg = <12>; /* OP4A */ - }; - - cfam4_i2c13: i2c-bus@d { - reg = <13>; /* OP4B */ - }; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - cfam4_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ - }; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - cfam4_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ - }; - }; + scom611: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - fsi2spi@1c00 { - compatible = "ibm,fsi2spi"; - reg = <0x1c00 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam4_spi0: spi@0 { - reg = <0x0>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; + sbefifo611: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; - cfam4_spi1: spi@20 { - reg = <0x20>; + cfam5_i2c14: i2c-bus@e { #address-cells = <1>; #size-cells = <0>; + reg = <14>; /* OP5A */ - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - cfam4_spi2: spi@40 { - reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; + scom614: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; + sbefifo614: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; - cfam4_spi3: spi@60 { - reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; + cfam5_i2c15: i2c-bus@f { #address-cells = <1>; #size-cells = <0>; + reg = <15>; /* OP5B */ - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - }; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - sbefifo@2400 { - compatible = "ibm,p9-sbefifo"; - reg = <0x2400 0x400>; - #address-cells = <1>; - #size-cells = <0>; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - fsi_occ4: occ { - compatible = "ibm,p10-occ"; + scom615: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - occ-hwmon { - compatible = "ibm,p10-occ-hwmon"; - ibm,no-poll-on-init; + sbefifo615: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; - }; - - fsi_hub4: hub@3400 { - compatible = "fsi-master-hub"; - reg = <0x3400 0x400>; - #address-cells = <2>; - #size-cells = <0>; - no-scan-on-init; - }; - }; + cfam5_i2c16: i2c-bus@10 { + #address-cells = <1>; + #size-cells = <0>; + reg = <16>; /* OP6A */ - cfam@5,0 { /* DCM2_C1 */ - reg = <5 0>; - #address-cells = <1>; - #size-cells = <1>; - chip-id = <5>; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - scom@1000 { - compatible = "ibm,fsi2pib"; - reg = <0x1000 0x400>; - }; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - i2c@1800 { - compatible = "ibm,fsi-i2c-master"; - reg = <0x1800 0x400>; - #address-cells = <1>; - #size-cells = <0>; + scom616: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - cfam5_i2c2: i2c-bus@2 { - reg = <2>; /* OM45 */ - }; - - cfam5_i2c3: i2c-bus@3 { - reg = <3>; /* OM67 */ - }; - - cfam5_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ + sbefifo616: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; - cfam5_i2c11: i2c-bus@b { - reg = <11>; /* OP3B */ - }; + cfam5_i2c17: i2c-bus@11 { + #address-cells = <1>; + #size-cells = <0>; + reg = <17>; /* OP6B */ - cfam5_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ - }; + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; - cfam5_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ - }; + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; - cfam5_i2c16: i2c-bus@10 { - reg = <16>; /* OP6A */ - }; + scom617: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; - cfam5_i2c17: i2c-bus@11 { - reg = <17>; /* OP6B */ + sbefifo617: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; }; @@ -3260,7 +3192,7 @@ cfam5_spi2: spi@40 { reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; + compatible = "ibm,fsi2spi"; #address-cells = <1>; #size-cells = <0>; @@ -3277,7 +3209,7 @@ cfam5_spi3: spi@60 { reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; + compatible = "ibm,fsi2spi"; #address-cells = <1>; #size-cells = <0>; @@ -3337,35 +3269,259 @@ #size-cells = <0>; cfam6_i2c0: i2c-bus@0 { + #address-cells = <1>; + #size-cells = <0>; reg = <0>; /* OM01 */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom700: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo700: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam6_i2c1: i2c-bus@1 { + #address-cells = <1>; + #size-cells = <0>; reg = <1>; /* OM23 */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom701: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo701: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam6_i2c10: i2c-bus@a { + #address-cells = <1>; + #size-cells = <0>; reg = <10>; /* OP3A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom710: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo710: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam6_i2c11: i2c-bus@b { + #address-cells = <1>; + #size-cells = <0>; reg = <11>; /* OP3B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom711: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo711: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam6_i2c12: i2c-bus@c { + #address-cells = <1>; + #size-cells = <0>; reg = <12>; /* OP4A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom712: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo712: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam6_i2c13: i2c-bus@d { + #address-cells = <1>; + #size-cells = <0>; reg = <13>; /* OP4B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom713: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo713: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam6_i2c14: i2c-bus@e { + #address-cells = <1>; + #size-cells = <0>; reg = <14>; /* OP5A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom714: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo714: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam6_i2c15: i2c-bus@f { + #address-cells = <1>; + #size-cells = <0>; reg = <15>; /* OP5B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom715: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo715: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; }; @@ -3409,7 +3565,7 @@ cfam6_spi2: spi@40 { reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; + compatible = "ibm,fsi2spi"; #address-cells = <1>; #size-cells = <0>; @@ -3426,7 +3582,7 @@ cfam6_spi3: spi@60 { reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; + compatible = "ibm,fsi2spi"; #address-cells = <1>; #size-cells = <0>; @@ -3486,35 +3642,259 @@ #size-cells = <0>; cfam7_i2c2: i2c-bus@2 { + #address-cells = <1>; + #size-cells = <0>; reg = <2>; /* OM45 */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom802: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo802: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam7_i2c3: i2c-bus@3 { + #address-cells = <1>; + #size-cells = <0>; reg = <3>; /* OM67 */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom803: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo803: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam7_i2c10: i2c-bus@a { + #address-cells = <1>; + #size-cells = <0>; reg = <10>; /* OP3A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom810: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo810: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam7_i2c11: i2c-bus@b { + #address-cells = <1>; + #size-cells = <0>; reg = <11>; /* OP3B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom811: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo811: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam7_i2c14: i2c-bus@e { + #address-cells = <1>; + #size-cells = <0>; reg = <14>; /* OP5A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom814: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo814: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam7_i2c15: i2c-bus@f { + #address-cells = <1>; + #size-cells = <0>; reg = <15>; /* OP5B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom815: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo815: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam7_i2c16: i2c-bus@10 { + #address-cells = <1>; + #size-cells = <0>; reg = <16>; /* OP6A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom816: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo816: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; cfam7_i2c17: i2c-bus@11 { + #address-cells = <1>; + #size-cells = <0>; reg = <17>; /* OP6B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom817: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo817: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; }; @@ -3558,7 +3938,7 @@ cfam7_spi2: spi@40 { reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; + compatible = "ibm,fsi2spi"; #address-cells = <1>; #size-cells = <0>; @@ -3575,7 +3955,7 @@ cfam7_spi3: spi@60 { reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; + compatible = "ibm,fsi2spi"; #address-cells = <1>; #size-cells = <0>; @@ -3619,22 +3999,6 @@ }; /* Legacy OCC numbering (to get rid of when userspace is fixed) */ -&fsi_occ0 { - reg = <1>; -}; - -&fsi_occ1 { - reg = <2>; -}; - -&fsi_occ2 { - reg = <3>; -}; - -&fsi_occ3 { - reg = <4>; -}; - &fsi_occ4 { reg = <5>; }; @@ -3650,74 +4014,3 @@ &fsi_occ7 { reg = <8>; }; - -&ibt { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&vuart1 { - status = "okay"; -}; - -&vuart2 { - status = "okay"; -}; - -&lpc_ctrl { - status = "okay"; - memory-region = <&flash_memory>; -}; - -&mac2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rmii3_default>; - clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>, - <&syscon ASPEED_CLK_MAC3RCLK>; - clock-names = "MACCLK", "RCLK"; - use-ncsi; -}; - -&mac3 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rmii4_default>; - clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>, - <&syscon ASPEED_CLK_MAC4RCLK>; - clock-names = "MACCLK", "RCLK"; - use-ncsi; -}; - -&wdt1 { - aspeed,reset-type = "none"; - aspeed,external-signal; - aspeed,ext-push-pull; - aspeed,ext-active-high; - - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdtrst1_default>; -}; - -&wdt2 { - status = "okay"; -}; - -&xdma { - status = "okay"; - memory-region = <&vga_memory>; -}; - -&kcs2 { - status = "okay"; - aspeed,lpc-io-reg = <0xca8 0xcac>; -}; - -&kcs3 { - status = "okay"; - aspeed,lpc-io-reg = <0xca2>; - aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; -}; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts index 7162e65b8115..5cb0094e21e0 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts @@ -12,39 +12,6 @@ compatible = "ibm,rainier-bmc", "aspeed,ast2600"; aliases { - i2c100 = &cfam0_i2c0; - i2c101 = &cfam0_i2c1; - i2c110 = &cfam0_i2c10; - i2c111 = &cfam0_i2c11; - i2c112 = &cfam0_i2c12; - i2c113 = &cfam0_i2c13; - i2c114 = &cfam0_i2c14; - i2c115 = &cfam0_i2c15; - i2c202 = &cfam1_i2c2; - i2c203 = &cfam1_i2c3; - i2c210 = &cfam1_i2c10; - i2c211 = &cfam1_i2c11; - i2c214 = &cfam1_i2c14; - i2c215 = &cfam1_i2c15; - i2c216 = &cfam1_i2c16; - i2c217 = &cfam1_i2c17; - i2c300 = &cfam2_i2c0; - i2c301 = &cfam2_i2c1; - i2c310 = &cfam2_i2c10; - i2c311 = &cfam2_i2c11; - i2c312 = &cfam2_i2c12; - i2c313 = &cfam2_i2c13; - i2c314 = &cfam2_i2c14; - i2c315 = &cfam2_i2c15; - i2c402 = &cfam3_i2c2; - i2c403 = &cfam3_i2c3; - i2c410 = &cfam3_i2c10; - i2c411 = &cfam3_i2c11; - i2c414 = &cfam3_i2c14; - i2c415 = &cfam3_i2c15; - i2c416 = &cfam3_i2c16; - i2c417 = &cfam3_i2c17; - serial4 = &uart5; i2c16 = &i2c2mux0; i2c17 = &i2c2mux1; @@ -61,23 +28,6 @@ i2c28 = &i2c6mux0chn3; i2c29 = &i2c11mux0chn0; i2c30 = &i2c11mux0chn1; - - spi10 = &cfam0_spi0; - spi11 = &cfam0_spi1; - spi12 = &cfam0_spi2; - spi13 = &cfam0_spi3; - spi20 = &cfam1_spi0; - spi21 = &cfam1_spi1; - spi22 = &cfam1_spi2; - spi23 = &cfam1_spi3; - spi30 = &cfam2_spi0; - spi31 = &cfam2_spi1; - spi32 = &cfam2_spi2; - spi33 = &cfam2_spi3; - spi40 = &cfam3_spi0; - spi41 = &cfam3_spi1; - spi42 = &cfam3_spi2; - spi43 = &cfam3_spi3; }; chosen { @@ -301,632 +251,6 @@ clk-phase-mmc-hs200 = <180>, <180>; }; -&fsim0 { - status = "okay"; - - #address-cells = <2>; - #size-cells = <0>; - - /* - * CFAM Reset is supposed to be active low but pass1 hardware is wired - * active high. - */ - cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; - - cfam@0,0 { - reg = <0 0>; - #address-cells = <1>; - #size-cells = <1>; - chip-id = <0>; - - scom@1000 { - compatible = "ibm,fsi2pib"; - reg = <0x1000 0x400>; - }; - - i2c@1800 { - compatible = "ibm,fsi-i2c-master"; - reg = <0x1800 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam0_i2c0: i2c-bus@0 { - reg = <0>; /* OMI01 */ - }; - - cfam0_i2c1: i2c-bus@1 { - reg = <1>; /* OMI23 */ - }; - - cfam0_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ - }; - - cfam0_i2c11: i2c-bus@b { - reg = <11>; /* OP3B */ - }; - - cfam0_i2c12: i2c-bus@c { - reg = <12>; /* OP4A */ - }; - - cfam0_i2c13: i2c-bus@d { - reg = <13>; /* OP4B */ - }; - - cfam0_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ - }; - - cfam0_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ - }; - }; - - fsi2spi@1c00 { - compatible = "ibm,fsi2spi"; - reg = <0x1c00 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam0_spi0: spi@0 { - reg = <0x0>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam0_spi1: spi@20 { - reg = <0x20>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam0_spi2: spi@40 { - reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam0_spi3: spi@60 { - reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - }; - - sbefifo@2400 { - compatible = "ibm,p9-sbefifo"; - reg = <0x2400 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - fsi_occ0: occ { - compatible = "ibm,p10-occ"; - - occ-hwmon { - compatible = "ibm,p10-occ-hwmon"; - ibm,no-poll-on-init; - }; - }; - }; - - fsi_hub0: hub@3400 { - compatible = "fsi-master-hub"; - reg = <0x3400 0x400>; - #address-cells = <2>; - #size-cells = <0>; - }; - }; -}; - -&fsi_hub0 { - cfam@1,0 { - reg = <1 0>; - #address-cells = <1>; - #size-cells = <1>; - chip-id = <1>; - - scom@1000 { - compatible = "ibm,fsi2pib"; - reg = <0x1000 0x400>; - }; - - i2c@1800 { - compatible = "ibm,fsi-i2c-master"; - reg = <0x1800 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam1_i2c2: i2c-bus@2 { - reg = <2>; /* OMI45 */ - }; - - cfam1_i2c3: i2c-bus@3 { - reg = <3>; /* OMI67 */ - }; - - cfam1_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ - }; - - cfam1_i2c11: i2c-bus@b { - reg = <11>; /* OP3B */ - }; - - cfam1_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ - }; - - cfam1_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ - }; - - cfam1_i2c16: i2c-bus@10 { - reg = <16>; /* OP6A */ - }; - - cfam1_i2c17: i2c-bus@11 { - reg = <17>; /* OP6B */ - }; - }; - - fsi2spi@1c00 { - compatible = "ibm,fsi2spi"; - reg = <0x1c00 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam1_spi0: spi@0 { - reg = <0x0>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam1_spi1: spi@20 { - reg = <0x20>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam1_spi2: spi@40 { - reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam1_spi3: spi@60 { - reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - }; - - sbefifo@2400 { - compatible = "ibm,p9-sbefifo"; - reg = <0x2400 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - fsi_occ1: occ { - compatible = "ibm,p10-occ"; - - occ-hwmon { - compatible = "ibm,p10-occ-hwmon"; - ibm,no-poll-on-init; - }; - }; - }; - - fsi_hub1: hub@3400 { - compatible = "fsi-master-hub"; - reg = <0x3400 0x400>; - #address-cells = <2>; - #size-cells = <0>; - - no-scan-on-init; - }; - }; - - cfam@2,0 { - reg = <2 0>; - #address-cells = <1>; - #size-cells = <1>; - chip-id = <2>; - - scom@1000 { - compatible = "ibm,fsi2pib"; - reg = <0x1000 0x400>; - }; - - i2c@1800 { - compatible = "ibm,fsi-i2c-master"; - reg = <0x1800 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam2_i2c0: i2c-bus@0 { - reg = <0>; /* OM01 */ - }; - - cfam2_i2c1: i2c-bus@1 { - reg = <1>; /* OM23 */ - }; - - cfam2_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ - }; - - cfam2_i2c11: i2c-bus@b { - reg = <11>; /* OP3B */ - }; - - cfam2_i2c12: i2c-bus@c { - reg = <12>; /* OP4A */ - }; - - cfam2_i2c13: i2c-bus@d { - reg = <13>; /* OP4B */ - }; - - cfam2_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ - }; - - cfam2_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ - }; - }; - - fsi2spi@1c00 { - compatible = "ibm,fsi2spi"; - reg = <0x1c00 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam2_spi0: spi@0 { - reg = <0x0>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam2_spi1: spi@20 { - reg = <0x20>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam2_spi2: spi@40 { - reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam2_spi3: spi@60 { - reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - }; - - sbefifo@2400 { - compatible = "ibm,p9-sbefifo"; - reg = <0x2400 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - fsi_occ2: occ { - compatible = "ibm,p10-occ"; - - occ-hwmon { - compatible = "ibm,p10-occ-hwmon"; - ibm,no-poll-on-init; - }; - }; - }; - - fsi_hub2: hub@3400 { - compatible = "fsi-master-hub"; - reg = <0x3400 0x400>; - #address-cells = <2>; - #size-cells = <0>; - - no-scan-on-init; - }; - }; - - cfam@3,0 { - reg = <3 0>; - #address-cells = <1>; - #size-cells = <1>; - chip-id = <3>; - - scom@1000 { - compatible = "ibm,fsi2pib"; - reg = <0x1000 0x400>; - }; - - i2c@1800 { - compatible = "ibm,fsi-i2c-master"; - reg = <0x1800 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam3_i2c2: i2c-bus@2 { - reg = <2>; /* OM45 */ - }; - - cfam3_i2c3: i2c-bus@3 { - reg = <3>; /* OM67 */ - }; - - cfam3_i2c10: i2c-bus@a { - reg = <10>; /* OP3A */ - }; - - cfam3_i2c11: i2c-bus@b { - reg = <11>; /* OP3B */ - }; - - cfam3_i2c14: i2c-bus@e { - reg = <14>; /* OP5A */ - }; - - cfam3_i2c15: i2c-bus@f { - reg = <15>; /* OP5B */ - }; - - cfam3_i2c16: i2c-bus@10 { - reg = <16>; /* OP6A */ - }; - - cfam3_i2c17: i2c-bus@11 { - reg = <17>; /* OP6B */ - }; - }; - - fsi2spi@1c00 { - compatible = "ibm,fsi2spi"; - reg = <0x1c00 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - cfam3_spi0: spi@0 { - reg = <0x0>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam3_spi1: spi@20 { - reg = <0x20>; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam3_spi2: spi@40 { - reg = <0x40>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - cfam3_spi3: spi@60 { - reg = <0x60>; - compatible = "ibm,fsi2spi-restricted"; - #address-cells = <1>; - #size-cells = <0>; - - eeprom@0 { - at25,byte-len = <0x80000>; - at25,addr-mode = <4>; - at25,page-size = <256>; - - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - }; - - sbefifo@2400 { - compatible = "ibm,p9-sbefifo"; - reg = <0x2400 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - fsi_occ3: occ { - compatible = "ibm,p10-occ"; - - occ-hwmon { - compatible = "ibm,p10-occ-hwmon"; - ibm,no-poll-on-init; - }; - }; - }; - - fsi_hub3: hub@3400 { - compatible = "fsi-master-hub"; - reg = <0x3400 0x400>; - #address-cells = <2>; - #size-cells = <0>; - - no-scan-on-init; - }; - }; -}; - -/* Legacy OCC numbering (to get rid of when userspace is fixed) */ -&fsi_occ0 { - reg = <1>; -}; - -&fsi_occ1 { - reg = <2>; -}; - -&fsi_occ2 { - reg = <3>; -}; - -&fsi_occ3 { - reg = <4>; -}; - &ibt { status = "okay"; }; @@ -1017,7 +341,7 @@ reg = <0x4a>; }; - pca9546@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -1099,7 +423,7 @@ reg = <0x49>; }; - pca9546@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -1201,7 +525,7 @@ reg = <0x4b>; }; - pca9546@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -2031,7 +1355,7 @@ reg = <0x49>; }; - pca9546@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -2092,11 +1416,6 @@ &i2c12 { status = "okay"; - tpm@2e { - compatible = "nuvoton,npct75x"; - reg = <0x2e>; - }; - eeprom@50 { compatible = "atmel,24c64"; reg = <0x50>; @@ -2418,3 +1737,5 @@ aspeed,lpc-io-reg = <0xca2>; aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; }; + +#include "ibm-power10-quad.dtsi" diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts index 208b0f094ed9..0dea014e4f30 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts @@ -348,7 +348,7 @@ label = "outlet"; }; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -432,7 +432,7 @@ &i2c7 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-nf5280m6.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-nf5280m6.dts index b3c1e3ba5831..92b9b3987c92 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-nf5280m6.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-nf5280m6.dts @@ -215,7 +215,7 @@ label = "outlet"; }; - pca9548@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; reg = <0x70>; }; @@ -224,17 +224,17 @@ &i2c3 { status = "okay"; - pca9548@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; reg = <0x70>; }; - pca9548@71 { + i2c-mux@71 { compatible = "nxp,pca9548"; reg = <0x71>; }; - pca9548@72 { + i2c-mux@72 { compatible = "nxp,pca9548"; reg = <0x72>; }; @@ -248,7 +248,7 @@ &i2c5 { status = "okay"; - pca9548@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; reg = <0x70>; }; @@ -257,7 +257,7 @@ &i2c6 { status = "okay"; - pca9548@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; reg = <0x70>; }; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-inventec-starscream.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-inventec-starscream.dts new file mode 100644 index 000000000000..ec82af94e1fb --- /dev/null +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-inventec-starscream.dts @@ -0,0 +1,389 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2023 Inventec Corp. + +/dts-v1/; + +#include "aspeed-g6.dtsi" +#include "aspeed-g6-pinctrl.dtsi" +#include <dt-bindings/i2c/i2c.h> +#include <dt-bindings/gpio/aspeed-gpio.h> + +/ { + model = "STARSCREAM BMC"; + compatible = "inventec,starscream-bmc", "aspeed,ast2600"; + + aliases { + serial4 = &uart5; + }; + + chosen { + stdout-path = &uart5; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + video_engine_memory: video { + size = <0x04000000>; + alignment = <0x01000000>; + compatible = "shared-dma-pool"; + reusable; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-uid { + label = "UID_LED"; + gpios = <&gpio0 186 GPIO_ACTIVE_LOW>; + }; + + led-heartbeat { + label = "HB_LED"; + gpios = <&gpio0 127 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&mdio0 { + status = "okay"; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&mac2 { + status = "okay"; + pinctrl-names = "default"; + phy-mode = "rmii"; + pinctrl-0 = <&pinctrl_rmii3_default>; + use-ncsi; +}; + +&mac3 { + status = "okay"; + phy-mode = "rgmii"; + phy-handle = <ðphy0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii4_default>; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; +#include "openbmc-flash-layout.dtsi" + }; + + flash@1 { + status = "okay"; + m25p,fast-read; + label = "bmc2"; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + +&spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default>; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bios"; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + +&vuart1 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&kcs3 { + aspeed,lpc-io-reg = <0xca2>; + status = "okay"; +}; + +&uart_routing { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; +&i2c1 { + status = "okay"; +}; +&i2c2 { + status = "okay"; +}; +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; + + // I2C EXPANDER + i2c-mux@71 { + compatible = "nxp,pca9546"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x71>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + // AMD SB-TSI CPU1 + sbtsi@4c { + compatible = "amd,sbtsi"; + reg = <0x4c>; + }; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + // AMD SB-TSI CPU2 + sbtsi@48 { + compatible = "amd,sbtsi"; + reg = <0x48>; + }; + }; + }; +}; + +&i2c5 { + status = "okay"; + + // I2C EXPANDER U153 + i2c-mux@70 { + compatible = "nxp,pca9546"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x70>; + + usb_hub: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + riser1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + riser2: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; +}; + +&i2c6 { + status = "okay"; + + // Motherboard Temp_U89 + temperature-sensor@4e { + compatible = "ti,tmp421"; + reg = <0x4e>; + }; + + // RunBMC Temp_U6 + temperature-sensor@49 { + compatible = "ti,tmp75"; + reg = <0x49>; + }; +}; + +&i2c7 { + status = "okay"; + // I2C EXPANDER U40 + i2c-mux@70 { + compatible = "nxp,pca9545"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x70>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; +}; + +&i2c8 { + status = "okay"; + // FRU RunBMC + eeprom@51 { + compatible = "atmel,24c512"; + reg = <0x51>; + pagesize = <128>; + }; +}; + +&i2c9 { + status = "okay"; +}; + +&i2c10 { + status = "okay"; +}; + +&i2c11 { + status = "okay"; +}; + +&i2c12 { + status = "okay"; + // FRU SCM + eeprom@51 { + compatible = "atmel,24c512"; + reg = <0x51>; + pagesize = <128>; + }; + + // SCM Temp_U17 + temperature-sensor@4f { + compatible = "ti,tmp75"; + reg = <0x4f>; + }; +}; + +&gpio0 { + status = "okay"; + gpio-line-names = + /*A0-A7*/ "","","","","","","","", + /*B0-B7*/ "alert-psu0-smb-r-n","bmc-ready","","assert-cpu0-prochot-r-n", + "","","","", + /*C0-C7*/ "","","","","","","","", + /*D0-D7*/ "","","","","","","","", + /*E0-E7*/ "","","","","","","","", + /*F0-F7*/ "","","","","reset-sgpio-r-n","","","", + /*G0-G7*/ "","","scm-jtag-mux-select","","","","","", + /*H0-H7*/ "","","","","reset-out","power-out","","", + /*I0-I7*/ "","","","","","","irq-bmc-cpu0-buf-nmi-n","", + /*J0-J7*/ "","","","","","","","", + /*K0-K7*/ "","","","","","","","", + /*L0-L7*/ "","","","","","","","", + /*M0-M7*/ "","","","","","","","", + /*N0-N7*/ "","","ncsi-ocp-clk-en-n","","","","","", + /*O0-O7*/ "","","","","","","cpu1-thermal-trip-n","", + /*P0-P7*/ "","","","","","","","", + /*Q0-Q7*/ "cpu0-prochot-n","","cpu1-prochot-n","","cpu0-pe-rst0","","","", + /*R0-R7*/ "","","","","","","","", + /*S0-S7*/ "","","","", + "","PCH_SLP_S4_BMC_N","cpu0-thermtrip-n","alert-psu1-smb-r-n", + /*T0-T7*/ "","","","","","","","", + /*U0-U7*/ "","","","","","","","", + /*V0-V7*/ "bios-recovery-buf-n","","assert-cpu1-prochot-r-n","", + "power-chassis-good","","","", + /*W0-W7*/ "","","","","","","","", + /*X0-X7*/ "","","","","platform-type","","","", + /*Y0-Y7*/ "","","","","","","","", + /*Z0-Z7*/ "","cpld-power-break-n","","","","","","", + /*AA0-AA7*/ "","","","","","","","", + /*AB0-AB7*/ "","","","","","","","", + /*AC0-AC7*/ "","","","","","","",""; +}; + +&sgpiom0 { + status = "okay"; + ngpios = <64>; + bus-frequency = <1000000>; +}; + +&lpc_snoop { + status = "okay"; + snoop-ports = <0x80>; +}; + +&emmc_controller { + status = "okay"; +}; + +&emmc { + status = "okay"; + non-removable; + max-frequency = <52000000>; + bus-width = <8>; +}; + +&video { + status = "okay"; + memory-region = <&video_engine_memory>; +}; + +&vhub { + status = "okay"; + aspeed,vhub-downstream-ports = <7>; + aspeed,vhub-generic-endpoints = <21>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2ad_default>; +}; + +&rtc { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-inventec-transformers.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-inventec-transformers.dts index caf66651e5b5..c713cb7a6187 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-inventec-transformers.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-inventec-transformers.dts @@ -193,14 +193,14 @@ // I2C EXPANDER status = "okay"; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9544"; #address-cells = <1>; #size-cells = <0>; reg = <0x71>; }; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9544"; #address-cells = <1>; #size-cells = <0>; @@ -212,7 +212,7 @@ // I2C EXPANDER status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9544"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts index 8f543cca7c21..ddbcbc64e235 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts @@ -208,7 +208,7 @@ * Slot 3 */ - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9545"; reg = <0x70>; #address-cells = <1>; @@ -249,7 +249,7 @@ * Slot 2, * Slot 3 */ - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9546"; reg = <0x76>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts index bcc1820f5c07..6045b60b80da 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts @@ -175,7 +175,7 @@ &i2c0 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9545"; reg = <0x70>; #address-cells = <1>; @@ -227,7 +227,7 @@ &i2c3 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts index 0cb7b20ff3ab..3d2d8db73ca6 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts @@ -231,7 +231,7 @@ &i2c1 { status = "okay"; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; reg = <0x71>; #address-cells = <1>; @@ -282,7 +282,7 @@ &i2c4 { status = "okay"; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; reg = <0x71>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-q71l.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-q71l.dts index 9605e53f5bbf..fed2791f5994 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-q71l.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-q71l.dts @@ -197,7 +197,7 @@ * Slot 6, * Slot 7 */ - i2c-switch@74 { + i2c-mux@74 { compatible = "nxp,pca9546"; reg = <0x74>; #address-cells = <1>; @@ -238,7 +238,7 @@ * SSD 1, * SSD 2 */ - i2c-switch@77 { + i2c-mux@77 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -325,7 +325,7 @@ * PSU3 * PSU2 */ - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts index 46cbba6305b8..983853eedaef 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts @@ -285,7 +285,7 @@ reg = <0x4b>; }; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9546"; reg = <0x70>; #address-cells = <1>; @@ -321,7 +321,7 @@ &i2c1 { status = "okay"; - i2c-switch@59 { + i2c-mux@59 { compatible = "nxp,pca9848"; reg = <0x59>; #address-cells = <1>; @@ -393,7 +393,7 @@ #size-cells = <0>; reg = <7>; - i2c-switch@77 { + i2c-mux@77 { compatible = "nxp,pca9546"; reg = <0x77>; #address-cells = <1>; @@ -490,7 +490,7 @@ &i2c6 { status = "okay"; - i2c-switch@77 { + i2c-mux@77 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -556,7 +556,7 @@ &i2c7 { status = "okay"; - i2c-switch@75 { + i2c-mux@75 { compatible = "nxp,pca9546"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-n110.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-n110.dts index 24319267d550..44b9853f6e63 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-n110.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-n110.dts @@ -88,16 +88,16 @@ &i2c13 { /* SMB_PCIE2_STBY_LVC3 */ - mux-expa@73 { - compatible = "nxp,pca9545"; - reg = <0x73>; + i2c-mux@71 { + compatible = "nxp,pca9543"; + reg = <0x71>; #address-cells = <1>; #size-cells = <0>; i2c-mux-idle-disconnect; }; - mux-sata@71 { - compatible = "nxp,pca9543"; - reg = <0x71>; + i2c-mux@73 { + compatible = "nxp,pca9545"; + reg = <0x73>; #address-cells = <1>; #size-cells = <0>; i2c-mux-idle-disconnect; @@ -106,7 +106,7 @@ &i2c2 { /* SMB_PCIE_STBY_LVC3 */ - mux-expb@71 { + i2c-mux@71 { compatible = "nxp,pca9545"; reg = <0x71>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts index ebbb68b55559..b8f0b08018a3 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts @@ -133,7 +133,7 @@ &i2c13 { /* SMB_PCIE2_STBY_LVC3 */ - mux-expa@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; reg = <0x70>; #address-cells = <1>; @@ -144,7 +144,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <2>; - rsra-mux@72 { + i2c-mux@72 { compatible = "nxp,pca9548"; reg = <0x72>; #address-cells = <1>; @@ -165,7 +165,7 @@ }; }; }; - mux-sata@71 { + i2c-mux@71 { compatible = "nxp,pca9543"; reg = <0x71>; #address-cells = <1>; @@ -176,7 +176,7 @@ &i2c2 { /* SMB_PCIE_STBY_LVC3 */ - mux-expb@71 { + i2c-mux@71 { compatible = "nxp,pca9548"; reg = <0x71>; #address-cells = <1>; @@ -187,7 +187,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; - rsrb-mux@72 { + i2c-mux@72 { compatible = "nxp,pca9548"; reg = <0x72>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-sx20.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-sx20.dts index e36ee4704994..933ca831d375 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-sx20.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-sx20.dts @@ -88,16 +88,16 @@ &i2c13 { /* SMB_PCIE2_STBY_LVC3 */ - mux-expa@73 { - compatible = "nxp,pca9545"; - reg = <0x73>; + i2c-mux@71 { + compatible = "nxp,pca9543"; + reg = <0x71>; #address-cells = <1>; #size-cells = <0>; i2c-mux-idle-disconnect; }; - mux-sata@71 { - compatible = "nxp,pca9543"; - reg = <0x71>; + i2c-mux@73 { + compatible = "nxp,pca9545"; + reg = <0x73>; #address-cells = <1>; #size-cells = <0>; i2c-mux-idle-disconnect; @@ -106,7 +106,7 @@ &i2c2 { /* SMB_PCIE_STBY_LVC3 */ - mux-expb@71 { + i2c-mux@71 { compatible = "nxp,pca9545"; reg = <0x71>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi index 7cd4f075e325..289668f051eb 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi @@ -297,6 +297,16 @@ groups = "I2C9"; }; + pinctrl_i3c1_default: i3c1_default { + function = "I3C1"; + groups = "I3C1"; + }; + + pinctrl_i3c2_default: i3c2_default { + function = "I3C2"; + groups = "I3C2"; + }; + pinctrl_i3c3_default: i3c3_default { function = "I3C3"; groups = "I3C3"; diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi index 172dd748d807..c4d1faade8be 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -729,6 +729,16 @@ status = "disabled"; }; + vuart3: serial@1e787800 { + compatible = "aspeed,ast2500-vuart"; + reg = <0x1e787800 0x40>; + reg-shift = <2>; + interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_APB2>; + no-loopback-test; + status = "disabled"; + }; + vuart2: serial@1e788000 { compatible = "aspeed,ast2500-vuart"; reg = <0x1e788000 0x40>; @@ -739,6 +749,16 @@ status = "disabled"; }; + vuart4: serial@1e788800 { + compatible = "aspeed,ast2500-vuart"; + reg = <0x1e788800 0x40>; + reg-shift = <2>; + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_APB2>; + no-loopback-test; + status = "disabled"; + }; + uart2: serial@1e78d000 { compatible = "ns16550a"; reg = <0x1e78d000 0x20>; diff --git a/arch/arm/boot/dts/aspeed/ast2500-facebook-netbmc-common.dtsi b/arch/arm/boot/dts/aspeed/ast2500-facebook-netbmc-common.dtsi index c0c43b8644ee..7f1ae3f4df9d 100644 --- a/arch/arm/boot/dts/aspeed/ast2500-facebook-netbmc-common.dtsi +++ b/arch/arm/boot/dts/aspeed/ast2500-facebook-netbmc-common.dtsi @@ -4,6 +4,10 @@ #include "aspeed-g5.dtsi" / { + aliases { + spi0 = &fmc; + }; + memory@80000000 { reg = <0x80000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi b/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi new file mode 100644 index 000000000000..cc466910bb52 --- /dev/null +++ b/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi @@ -0,0 +1,380 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2023 IBM Corp. + +&fsim0 { + status = "okay"; + + #address-cells = <2>; + #size-cells = <0>; + + cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom@1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c@1800 { + compatible = "ibm,fsi-i2c-master"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam0_i2c0: i2c-bus@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; /* OMI01 */ + }; + + cfam0_i2c1: i2c-bus@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; /* OMI23 */ + }; + + cfam0_i2c10: i2c-bus@a { + #address-cells = <1>; + #size-cells = <0>; + reg = <10>; /* OP3A */ + }; + + cfam0_i2c11: i2c-bus@b { + #address-cells = <1>; + #size-cells = <0>; + reg = <11>; /* OP3B */ + }; + + cfam0_i2c12: i2c-bus@c { + #address-cells = <1>; + #size-cells = <0>; + reg = <12>; /* OP4A */ + }; + + cfam0_i2c13: i2c-bus@d { + #address-cells = <1>; + #size-cells = <0>; + reg = <13>; /* OP4B */ + }; + + cfam0_i2c14: i2c-bus@e { + #address-cells = <1>; + #size-cells = <0>; + reg = <14>; /* OP5A */ + }; + + cfam0_i2c15: i2c-bus@f { + #address-cells = <1>; + #size-cells = <0>; + reg = <15>; /* OP5B */ + }; + }; + + fsi2spi@1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam0_spi0: spi@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam0_spi1: spi@20 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam0_spi2: spi@40 { + reg = <0x40>; + compatible = "ibm,fsi2spi"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam0_spi3: spi@60 { + reg = <0x60>; + compatible = "ibm,fsi2spi"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ0: occ { + compatible = "ibm,p10-occ"; + + occ-hwmon { + compatible = "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub0: hub@3400 { + compatible = "fsi-master-hub"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + }; + }; +}; + +&fsi_hub0 { + cfam@1,0 { + reg = <1 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <1>; + + scom@1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c@1800 { + compatible = "ibm,fsi-i2c-master"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam1_i2c2: i2c-bus@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; /* OMI45 */ + }; + + cfam1_i2c3: i2c-bus@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; /* OMI67 */ + }; + + cfam1_i2c10: i2c-bus@a { + #address-cells = <1>; + #size-cells = <0>; + reg = <10>; /* OP3A */ + }; + + cfam1_i2c11: i2c-bus@b { + #address-cells = <1>; + #size-cells = <0>; + reg = <11>; /* OP3B */ + }; + + cfam1_i2c14: i2c-bus@e { + #address-cells = <1>; + #size-cells = <0>; + reg = <14>; /* OP5A */ + }; + + cfam1_i2c15: i2c-bus@f { + #address-cells = <1>; + #size-cells = <0>; + reg = <15>; /* OP5B */ + }; + + cfam1_i2c16: i2c-bus@10 { + #address-cells = <1>; + #size-cells = <0>; + reg = <16>; /* OP6A */ + }; + + cfam1_i2c17: i2c-bus@11 { + #address-cells = <1>; + #size-cells = <0>; + reg = <17>; /* OP6B */ + }; + }; + + fsi2spi@1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam1_spi0: spi@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam1_spi1: spi@20 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam1_spi2: spi@40 { + reg = <0x40>; + compatible = "ibm,fsi2spi"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam1_spi3: spi@60 { + reg = <0x60>; + compatible = "ibm,fsi2spi"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ1: occ { + compatible = "ibm,p10-occ"; + + occ-hwmon { + compatible = "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub1: hub@3400 { + compatible = "fsi-master-hub"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + + no-scan-on-init; + }; + }; +}; + +/* Legacy OCC numbering (to get rid of when userspace is fixed) */ +&fsi_occ0 { + reg = <1>; +}; + +&fsi_occ1 { + reg = <2>; +}; + +/ { + aliases { + i2c100 = &cfam0_i2c0; + i2c101 = &cfam0_i2c1; + i2c110 = &cfam0_i2c10; + i2c111 = &cfam0_i2c11; + i2c112 = &cfam0_i2c12; + i2c113 = &cfam0_i2c13; + i2c114 = &cfam0_i2c14; + i2c115 = &cfam0_i2c15; + i2c202 = &cfam1_i2c2; + i2c203 = &cfam1_i2c3; + i2c210 = &cfam1_i2c10; + i2c211 = &cfam1_i2c11; + i2c214 = &cfam1_i2c14; + i2c215 = &cfam1_i2c15; + i2c216 = &cfam1_i2c16; + i2c217 = &cfam1_i2c17; + + spi10 = &cfam0_spi0; + spi11 = &cfam0_spi1; + spi12 = &cfam0_spi2; + spi13 = &cfam0_spi3; + spi20 = &cfam1_spi0; + spi21 = &cfam1_spi1; + spi22 = &cfam1_spi2; + spi23 = &cfam1_spi3; + }; +}; diff --git a/arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi b/arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi new file mode 100644 index 000000000000..57494c744b5d --- /dev/null +++ b/arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi @@ -0,0 +1,1305 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2023 IBM Corp. + +#include "ibm-power10-dual.dtsi" + +&cfam0_i2c0 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom100: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo100: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c1 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom101: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo101: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c10 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom110: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo110: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c11 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom111: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo111: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c12 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom112: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo112: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c13 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom113: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo113: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c14 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom114: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo114: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c15 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom115: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo115: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c2 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom202: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo202: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c3 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom203: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo203: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c10 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom210: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo210: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c11 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom211: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo211: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c14 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom214: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo214: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c15 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom215: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo215: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c16 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom216: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo216: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c17 { + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom217: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo217: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&fsi_hub0 { + cfam@2,0 { + reg = <2 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <2>; + + scom@1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c@1800 { + compatible = "ibm,fsi-i2c-master"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam2_i2c0: i2c-bus@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; /* OM01 */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom300: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo300: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam2_i2c1: i2c-bus@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; /* OM23 */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom301: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo301: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam2_i2c10: i2c-bus@a { + #address-cells = <1>; + #size-cells = <0>; + reg = <10>; /* OP3A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom310: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo310: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam2_i2c11: i2c-bus@b { + #address-cells = <1>; + #size-cells = <0>; + reg = <11>; /* OP3B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom311: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo311: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam2_i2c12: i2c-bus@c { + #address-cells = <1>; + #size-cells = <0>; + reg = <12>; /* OP4A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom312: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo312: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam2_i2c13: i2c-bus@d { + #address-cells = <1>; + #size-cells = <0>; + reg = <13>; /* OP4B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom313: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo313: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam2_i2c14: i2c-bus@e { + #address-cells = <1>; + #size-cells = <0>; + reg = <14>; /* OP5A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom314: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo314: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam2_i2c15: i2c-bus@f { + #address-cells = <1>; + #size-cells = <0>; + reg = <15>; /* OP5B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom315: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo315: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + }; + + fsi2spi@1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam2_spi0: spi@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam2_spi1: spi@20 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam2_spi2: spi@40 { + reg = <0x40>; + compatible = "ibm,fsi2spi"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam2_spi3: spi@60 { + reg = <0x60>; + compatible = "ibm,fsi2spi"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ2: occ { + compatible = "ibm,p10-occ"; + + occ-hwmon { + compatible = "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub2: hub@3400 { + compatible = "fsi-master-hub"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + + no-scan-on-init; + }; + }; + + cfam@3,0 { + reg = <3 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <3>; + + scom@1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c@1800 { + compatible = "ibm,fsi-i2c-master"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam3_i2c2: i2c-bus@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; /* OM45 */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom402: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo402: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam3_i2c3: i2c-bus@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; /* OM67 */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom403: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo403: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam3_i2c10: i2c-bus@a { + #address-cells = <1>; + #size-cells = <0>; + reg = <10>; /* OP3A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom410: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo410: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam3_i2c11: i2c-bus@b { + #address-cells = <1>; + #size-cells = <0>; + reg = <11>; /* OP3B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom411: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo411: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam3_i2c14: i2c-bus@e { + #address-cells = <1>; + #size-cells = <0>; + reg = <14>; /* OP5A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom414: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo414: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam3_i2c15: i2c-bus@f { + #address-cells = <1>; + #size-cells = <0>; + reg = <15>; /* OP5B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom415: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo415: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam3_i2c16: i2c-bus@10 { + #address-cells = <1>; + #size-cells = <0>; + reg = <16>; /* OP6A */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom416: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo416: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + + cfam3_i2c17: i2c-bus@11 { + #address-cells = <1>; + #size-cells = <0>; + reg = <17>; /* OP6B */ + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom417: scom@1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo417: sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; + }; + + fsi2spi@1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam3_spi0: spi@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam3_spi1: spi@20 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam3_spi2: spi@40 { + reg = <0x40>; + compatible = "ibm,fsi2spi"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam3_spi3: spi@60 { + reg = <0x60>; + compatible = "ibm,fsi2spi"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ3: occ { + compatible = "ibm,p10-occ"; + + occ-hwmon { + compatible = "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub3: hub@3400 { + compatible = "fsi-master-hub"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + + no-scan-on-init; + }; + }; +}; + +/* Legacy OCC numbering (to get rid of when userspace is fixed) */ +&fsi_occ2 { + reg = <3>; +}; + +&fsi_occ3 { + reg = <4>; +}; + +/ { + aliases { + i2c300 = &cfam2_i2c0; + i2c301 = &cfam2_i2c1; + i2c310 = &cfam2_i2c10; + i2c311 = &cfam2_i2c11; + i2c312 = &cfam2_i2c12; + i2c313 = &cfam2_i2c13; + i2c314 = &cfam2_i2c14; + i2c315 = &cfam2_i2c15; + i2c402 = &cfam3_i2c2; + i2c403 = &cfam3_i2c3; + i2c410 = &cfam3_i2c10; + i2c411 = &cfam3_i2c11; + i2c414 = &cfam3_i2c14; + i2c415 = &cfam3_i2c15; + i2c416 = &cfam3_i2c16; + i2c417 = &cfam3_i2c17; + + sbefifo100 = &sbefifo100; + sbefifo101 = &sbefifo101; + sbefifo110 = &sbefifo110; + sbefifo111 = &sbefifo111; + sbefifo112 = &sbefifo112; + sbefifo113 = &sbefifo113; + sbefifo114 = &sbefifo114; + sbefifo115 = &sbefifo115; + sbefifo202 = &sbefifo202; + sbefifo203 = &sbefifo203; + sbefifo210 = &sbefifo210; + sbefifo211 = &sbefifo211; + sbefifo214 = &sbefifo214; + sbefifo215 = &sbefifo215; + sbefifo216 = &sbefifo216; + sbefifo217 = &sbefifo217; + sbefifo300 = &sbefifo300; + sbefifo301 = &sbefifo301; + sbefifo310 = &sbefifo310; + sbefifo311 = &sbefifo311; + sbefifo312 = &sbefifo312; + sbefifo313 = &sbefifo313; + sbefifo314 = &sbefifo314; + sbefifo315 = &sbefifo315; + sbefifo402 = &sbefifo402; + sbefifo403 = &sbefifo403; + sbefifo410 = &sbefifo410; + sbefifo411 = &sbefifo411; + sbefifo414 = &sbefifo414; + sbefifo415 = &sbefifo415; + sbefifo416 = &sbefifo416; + sbefifo417 = &sbefifo417; + + scom100 = &scom100; + scom101 = &scom101; + scom110 = &scom110; + scom111 = &scom111; + scom112 = &scom112; + scom113 = &scom113; + scom114 = &scom114; + scom115 = &scom115; + scom202 = &scom202; + scom203 = &scom203; + scom210 = &scom210; + scom211 = &scom211; + scom214 = &scom214; + scom215 = &scom215; + scom216 = &scom216; + scom217 = &scom217; + scom300 = &scom300; + scom301 = &scom301; + scom310 = &scom310; + scom311 = &scom311; + scom312 = &scom312; + scom313 = &scom313; + scom314 = &scom314; + scom315 = &scom315; + scom402 = &scom402; + scom403 = &scom403; + scom410 = &scom410; + scom411 = &scom411; + scom414 = &scom414; + scom415 = &scom415; + scom416 = &scom416; + scom417 = &scom417; + + spi30 = &cfam2_spi0; + spi31 = &cfam2_spi1; + spi32 = &cfam2_spi2; + spi33 = &cfam2_spi3; + spi40 = &cfam3_spi0; + spi41 = &cfam3_spi1; + spi42 = &cfam3_spi2; + spi43 = &cfam3_spi3; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/Makefile b/arch/arm/boot/dts/broadcom/Makefile index 95b0ef2a4215..7099d9560033 100644 --- a/arch/arm/boot/dts/broadcom/Makefile +++ b/arch/arm/boot/dts/broadcom/Makefile @@ -70,6 +70,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm4709-netgear-r7000.dtb \ bcm4709-netgear-r8000.dtb \ bcm4709-tplink-archer-c9-v1.dtb \ + bcm47094-asus-rt-ac3100.dtb \ bcm47094-asus-rt-ac88u.dtb \ bcm47094-dlink-dir-885l.dtb \ bcm47094-dlink-dir-890l.dtb \ diff --git a/arch/arm/boot/dts/broadcom/bcm-hr2.dtsi b/arch/arm/boot/dts/broadcom/bcm-hr2.dtsi index 33e6ba63a1ee..788a6806191a 100644 --- a/arch/arm/boot/dts/broadcom/bcm-hr2.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm-hr2.dtsi @@ -54,8 +54,8 @@ pmu { compatible = "arm,cortex-a9-pmu"; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; interrupt-affinity = <&cpu0>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi index dae9c47ace76..88fda18af1f8 100644 --- a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi @@ -272,14 +272,32 @@ gmac0: ethernet@24000 { reg = <0x24000 0x800>; + phy-mode = "internal"; + + fixed-link { + speed = <1000>; + full-duplex; + }; }; gmac1: ethernet@25000 { reg = <0x25000 0x800>; + phy-mode = "internal"; + + fixed-link { + speed = <1000>; + full-duplex; + }; }; gmac2: ethernet@26000 { reg = <0x26000 0x800>; + phy-mode = "internal"; + + fixed-link { + speed = <1000>; + full-duplex; + }; }; gmac3: ethernet@27000 { diff --git a/arch/arm/boot/dts/broadcom/bcm-nsp.dtsi b/arch/arm/boot/dts/broadcom/bcm-nsp.dtsi index 5b1dc58d40ba..9d20ba3b1ffb 100644 --- a/arch/arm/boot/dts/broadcom/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm-nsp.dtsi @@ -72,8 +72,8 @@ pmu { compatible = "arm,cortex-a9-pmu"; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; interrupt-affinity = <&cpu0>, <&cpu1>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm11351.dtsi b/arch/arm/boot/dts/broadcom/bcm11351.dtsi index b271a9bf06a9..53857e572080 100644 --- a/arch/arm/boot/dts/broadcom/bcm11351.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm11351.dtsi @@ -111,13 +111,12 @@ gpio: gpio@35003000 { compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio"; reg = <0x35003000 0x800>; - interrupts = - <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; #interrupt-cells = <2>; gpio-controller; diff --git a/arch/arm/boot/dts/broadcom/bcm21664.dtsi b/arch/arm/boot/dts/broadcom/bcm21664.dtsi index 2eb7f5b0c1dc..fa73600e883e 100644 --- a/arch/arm/boot/dts/broadcom/bcm21664.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm21664.dtsi @@ -101,11 +101,10 @@ gpio: gpio@35003000 { compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio"; reg = <0x35003000 0x524>; - interrupts = - <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; #interrupt-cells = <2>; gpio-controller; diff --git a/arch/arm/boot/dts/broadcom/bcm23550.dtsi b/arch/arm/boot/dts/broadcom/bcm23550.dtsi index 445eadb8d871..50ebe93d6bd0 100644 --- a/arch/arm/boot/dts/broadcom/bcm23550.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm23550.dtsi @@ -101,11 +101,10 @@ gpio: gpio@1003000 { compatible = "brcm,bcm23550-gpio", "brcm,kona-gpio"; reg = <0x01003000 0x524>; - interrupts = - <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; #interrupt-cells = <2>; gpio-controller; diff --git a/arch/arm/boot/dts/broadcom/bcm2711.dtsi b/arch/arm/boot/dts/broadcom/bcm2711.dtsi index 097e9f252235..4a379a14966d 100644 --- a/arch/arm/boot/dts/broadcom/bcm2711.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm2711.dtsi @@ -76,7 +76,7 @@ }; }; - dma: dma@7e007000 { + dma: dma-controller@7e007000 { compatible = "brcm,bcm2835-dma"; reg = <0x7e007000 0xb00>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, @@ -278,7 +278,7 @@ clocks = <&clocks BCM2835_CLOCK_PWM>; assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; assigned-clock-rates = <10000000>; - #pwm-cells = <2>; + #pwm-cells = <3>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/broadcom/bcm28155-ap.dts b/arch/arm/boot/dts/broadcom/bcm28155-ap.dts index 0a8ad1d673d8..2f3634545e64 100644 --- a/arch/arm/boot/dts/broadcom/bcm28155-ap.dts +++ b/arch/arm/boot/dts/broadcom/bcm28155-ap.dts @@ -15,64 +15,64 @@ device_type = "memory"; reg = <0x80000000 0x40000000>; /* 1 GB */ }; +}; - serial@3e000000 { - status = "okay"; - }; - - i2c@3e016000 { - clock-frequency = <400000>; - status = "okay"; - }; +&bsc1 { + clock-frequency = <400000>; + status = "okay"; +}; - i2c@3e017000 { - clock-frequency = <400000>; - status = "okay"; - }; +&bsc2 { + clock-frequency = <400000>; + status = "okay"; +}; - i2c@3e018000 { - clock-frequency = <400000>; - status = "okay"; - }; +&bsc3 { + clock-frequency = <400000>; + status = "okay"; +}; - i2c@3500d000 { - clock-frequency = <100000>; - status = "okay"; +&pmu_bsc { + clock-frequency = <100000>; + status = "okay"; - pmu: pmu@8 { - reg = <0x08>; - }; + pmu: pmu@8 { + reg = <0x08>; }; +}; - sdio2: mmc@3f190000 { - non-removable; - max-frequency = <48000000>; - vmmc-supply = <&camldo1_reg>; - vqmmc-supply = <&iosr1_reg>; - status = "okay"; - }; +&pwm { + status = "okay"; +}; - sdio4: mmc@3f1b0000 { - max-frequency = <48000000>; - cd-gpios = <&gpio 14 GPIO_ACTIVE_LOW>; - vmmc-supply = <&sdldo_reg>; - vqmmc-supply = <&sdxldo_reg>; - status = "okay"; - }; +&sdio2 { + non-removable; + max-frequency = <48000000>; + vmmc-supply = <&camldo1_reg>; + vqmmc-supply = <&iosr1_reg>; + status = "okay"; +}; - pwm: pwm@3e01a000 { - status = "okay"; - }; +&sdio4 { + max-frequency = <48000000>; + cd-gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + vmmc-supply = <&sdldo_reg>; + vqmmc-supply = <&sdxldo_reg>; + status = "okay"; +}; - usbotg: usb@3f120000 { - vusb_d-supply = <&usbldo_reg>; - vusb_a-supply = <&iosr1_reg>; - status = "okay"; - }; +&uartb { + status = "okay"; +}; - usbphy: usb-phy@3f130000 { - status = "okay"; - }; +&usbotg { + vusb_d-supply = <&usbldo_reg>; + vusb_a-supply = <&iosr1_reg>; + status = "okay"; +}; + +&usbphy { + status = "okay"; }; #include "bcm59056.dtsi" diff --git a/arch/arm/boot/dts/broadcom/bcm2835-common.dtsi b/arch/arm/boot/dts/broadcom/bcm2835-common.dtsi index bb7e8f7facaf..9261b67dbee1 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-common.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm2835-common.dtsi @@ -8,7 +8,7 @@ interrupt-parent = <&intc>; soc { - dma: dma@7e007000 { + dma: dma-controller@7e007000 { compatible = "brcm,bcm2835-dma"; reg = <0x7e007000 0xf00>; interrupts = <1 16>, diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/broadcom/bcm2835-rpi-a-plus.dts index 02ce817868ba..069b48272aa5 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-rpi-a-plus.dts +++ b/arch/arm/boot/dts/broadcom/bcm2835-rpi-a-plus.dts @@ -81,6 +81,7 @@ "SD_DATA2_R", "SD_DATA3_R"; + pinctrl-names = "default"; pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; /* I2S interface */ diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi-a.dts b/arch/arm/boot/dts/broadcom/bcm2835-rpi-a.dts index 3fdf60eb11dc..2726c00431e8 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-rpi-a.dts +++ b/arch/arm/boot/dts/broadcom/bcm2835-rpi-a.dts @@ -83,6 +83,7 @@ "SD_DATA2_R", "SD_DATA3_R"; + pinctrl-names = "default"; pinctrl-0 = <&gpioout &alt0 &i2s_alt2>; /* I2S interface */ diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/broadcom/bcm2835-rpi-b-plus.dts index 9956fd06a4b6..c57b999a4520 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-rpi-b-plus.dts +++ b/arch/arm/boot/dts/broadcom/bcm2835-rpi-b-plus.dts @@ -83,6 +83,7 @@ "SD_DATA2_R", "SD_DATA3_R"; + pinctrl-names = "default"; pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; /* I2S interface */ diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/broadcom/bcm2835-rpi-b-rev2.dts index 4e1770afb145..ae6d3a9586ab 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-rpi-b-rev2.dts +++ b/arch/arm/boot/dts/broadcom/bcm2835-rpi-b-rev2.dts @@ -83,6 +83,7 @@ "SD_DATA2_R", "SD_DATA3_R"; + pinctrl-names = "default"; pinctrl-0 = <&gpioout &alt0 &i2s_alt2>; /* I2S interface */ diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi-b.dts b/arch/arm/boot/dts/broadcom/bcm2835-rpi-b.dts index eec1d0892d33..72764be75a79 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-rpi-b.dts +++ b/arch/arm/boot/dts/broadcom/bcm2835-rpi-b.dts @@ -83,6 +83,7 @@ "SD_DATA2_R", "SD_DATA3_R"; + pinctrl-names = "default"; pinctrl-0 = <&gpioout &alt0>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi-cm1-io1.dts b/arch/arm/boot/dts/broadcom/bcm2835-rpi-cm1-io1.dts index 87958a96c3e0..3f9d198ac3ab 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-rpi-cm1-io1.dts +++ b/arch/arm/boot/dts/broadcom/bcm2835-rpi-cm1-io1.dts @@ -73,6 +73,7 @@ "SD_DATA2_R", "SD_DATA3_R"; + pinctrl-names = "default"; pinctrl-0 = <&gpioout &alt0>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi-zero-w.dts b/arch/arm/boot/dts/broadcom/bcm2835-rpi-zero-w.dts index dbf825985ec0..1f0b163e400c 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-rpi-zero-w.dts +++ b/arch/arm/boot/dts/broadcom/bcm2835-rpi-zero-w.dts @@ -97,6 +97,7 @@ "SD_DATA2_R", "SD_DATA3_R"; + pinctrl-names = "default"; pinctrl-0 = <&gpioout &alt0>; }; @@ -111,6 +112,7 @@ }; &sdhci { + pinctrl-names = "default"; pinctrl-0 = <&emmc_gpio34 &gpclk2_gpio43>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/broadcom/bcm2835-rpi-zero.dts index f80e65a825fd..539c19c10946 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-rpi-zero.dts +++ b/arch/arm/boot/dts/broadcom/bcm2835-rpi-zero.dts @@ -85,6 +85,7 @@ "SD_DATA2_R", "SD_DATA3_R"; + pinctrl-names = "default"; pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; /* I2S interface */ diff --git a/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi index ee9ee9d1fe65..f0acc9390f31 100644 --- a/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm2835-rpi.dtsi @@ -26,8 +26,6 @@ }; &gpio { - pinctrl-names = "default"; - gpioout: gpioout { brcm,pins = <6>; brcm,function = <BCM2835_FSEL_GPIO_OUT>; diff --git a/arch/arm/boot/dts/broadcom/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/broadcom/bcm2836-rpi-2-b.dts index 6068ec390081..79918033750e 100644 --- a/arch/arm/boot/dts/broadcom/bcm2836-rpi-2-b.dts +++ b/arch/arm/boot/dts/broadcom/bcm2836-rpi-2-b.dts @@ -82,6 +82,7 @@ "SD_DATA2_R", "SD_DATA3_R"; + pinctrl-names = "default"; pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; /* I2S interface */ diff --git a/arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts b/arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts index cf84e69fced8..72d26d130efa 100644 --- a/arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts +++ b/arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts @@ -72,6 +72,7 @@ "SD_DATA2_R", "SD_DATA3_R"; + pinctrl-names = "default"; pinctrl-0 = <&gpioout &alt0>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm2837-rpi-zero-2-w.dts b/arch/arm/boot/dts/broadcom/bcm2837-rpi-zero-2-w.dts index b9cc4594398b..85cf594724ef 100644 --- a/arch/arm/boot/dts/broadcom/bcm2837-rpi-zero-2-w.dts +++ b/arch/arm/boot/dts/broadcom/bcm2837-rpi-zero-2-w.dts @@ -95,6 +95,7 @@ "SD_DATA2_R", "SD_DATA3_R"; + pinctrl-names = "default"; pinctrl-0 = <&gpioout &alt0>; }; @@ -109,6 +110,7 @@ }; &sdhci { + pinctrl-names = "default"; pinctrl-0 = <&emmc_gpio34 &gpclk2_gpio43>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm283x.dtsi b/arch/arm/boot/dts/broadcom/bcm283x.dtsi index c9c52a19ef3b..2ca8a2505a4d 100644 --- a/arch/arm/boot/dts/broadcom/bcm283x.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm283x.dtsi @@ -416,7 +416,7 @@ clocks = <&clocks BCM2835_CLOCK_PWM>; assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; assigned-clock-rates = <10000000>; - #pwm-cells = <2>; + #pwm-cells = <3>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts b/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts index f1412ba83def..0454423fe166 100644 --- a/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts +++ b/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts @@ -19,7 +19,8 @@ memory@0 { device_type = "memory"; - reg = <0x00000000 0x08000000>; + reg = <0x00000000 0x08000000>, + <0x88000000 0x08000000>; }; gpio-keys { diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts new file mode 100644 index 000000000000..5f089307cd8c --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Author: Arınç ÃœNAL <arinc.unal@arinc9.com> + */ + +/dts-v1/; + +#include "bcm47094-asus-rt-ac3100.dtsi" + +/ { + compatible = "asus,rt-ac3100", "brcm,bcm47094", "brcm,bcm4708"; + model = "ASUS RT-AC3100"; + + nvram@1c080000 { + et0macaddr: et0macaddr { + }; + }; +}; + +&gmac0 { + nvmem-cells = <&et0macaddr>; + nvmem-cell-names = "mac-address"; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi new file mode 100644 index 000000000000..09cefce27fb1 --- /dev/null +++ b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac3100.dtsi @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Author: Arınç ÃœNAL <arinc.unal@arinc9.com> + */ + +#include "bcm47094.dtsi" +#include "bcm5301x-nand-cs0-bch8.dtsi" + +/ { + chosen { + bootargs = "earlycon"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x08000000>, + <0x88000000 0x18000000>; + }; + + nvram@1c080000 { + compatible = "brcm,nvram"; + reg = <0x1c080000 0x00180000>; + }; + + leds { + compatible = "gpio-leds"; + + led-power { + label = "white:power"; + gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + + led-wan-red { + label = "red:wan"; + gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; + }; + + led-lan { + label = "white:lan"; + gpios = <&chipcommon 21 GPIO_ACTIVE_LOW>; + }; + + led-usb2 { + label = "white:usb2"; + gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>; + trigger-sources = <&ehci_port2>; + linux,default-trigger = "usbport"; + }; + + led-usb3 { + label = "white:usb3"; + gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; + trigger-sources = <&ehci_port1>, <&xhci_port1>; + linux,default-trigger = "usbport"; + }; + + led-wps { + label = "white:wps"; + gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-wps { + label = "WPS"; + linux,code = <KEY_WPS_BUTTON>; + gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>; + }; + + button-reset { + label = "Reset"; + linux,code = <KEY_RESTART>; + gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; + }; + + button-wifi { + label = "Wi-Fi"; + linux,code = <KEY_RFKILL>; + gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; + }; + + button-led { + label = "Backlight"; + linux,code = <KEY_BRIGHTNESS_ZERO>; + gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&srab { + compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab"; + status = "okay"; + + ports { + port@0 { + label = "lan4"; + }; + + port@1 { + label = "lan3"; + }; + + port@2 { + label = "lan2"; + }; + + port@3 { + label = "lan1"; + }; + + port@4 { + label = "wan"; + }; + + port@5 { + label = "cpu"; + }; + + port@7 { + label = "cpu"; + }; + + port@8 { + label = "cpu"; + }; + }; +}; + +&usb2 { + vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>; +}; + +&usb3_phy { + status = "okay"; +}; + +&nandcs { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "boot"; + reg = <0x00000000 0x00080000>; + read-only; + }; + + partition@80000 { + label = "nvram"; + reg = <0x00080000 0x00180000>; + }; + + partition@200000 { + label = "firmware"; + reg = <0x00200000 0x07e00000>; + compatible = "brcm,trx"; + }; + }; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts index 4d5747aa5dc8..fd344b55087e 100644 --- a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts +++ b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts @@ -1,102 +1,21 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright (C) 2021-2022 Arınç ÃœNAL <arinc.unal@arinc9.com> + * Author: Arınç ÃœNAL <arinc.unal@arinc9.com> */ /dts-v1/; -#include "bcm47094.dtsi" -#include "bcm5301x-nand-cs0-bch8.dtsi" +#include "bcm47094-asus-rt-ac3100.dtsi" / { compatible = "asus,rt-ac88u", "brcm,bcm47094", "brcm,bcm4708"; - model = "Asus RT-AC88U"; - - chosen { - bootargs = "earlycon"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x00000000 0x08000000>, - <0x88000000 0x18000000>; - }; + model = "ASUS RT-AC88U"; nvram@1c080000 { - compatible = "brcm,nvram"; - reg = <0x1c080000 0x00180000>; - et1macaddr: et1macaddr { }; }; - leds { - compatible = "gpio-leds"; - - led-power { - label = "white:power"; - gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-on"; - }; - - led-wan-red { - label = "red:wan"; - gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; - }; - - led-lan { - label = "white:lan"; - gpios = <&chipcommon 21 GPIO_ACTIVE_LOW>; - }; - - led-usb2 { - label = "white:usb2"; - gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>; - trigger-sources = <&ehci_port2>; - linux,default-trigger = "usbport"; - }; - - led-usb3 { - label = "white:usb3"; - gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; - trigger-sources = <&ehci_port1>, <&xhci_port1>; - linux,default-trigger = "usbport"; - }; - - led-wps { - label = "white:wps"; - gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - button-wps { - label = "WPS"; - linux,code = <KEY_WPS_BUTTON>; - gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>; - }; - - button-reset { - label = "Reset"; - linux,code = <KEY_RESTART>; - gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; - }; - - button-wifi { - label = "Wi-Fi"; - linux,code = <KEY_RFKILL>; - gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; - }; - - button-led { - label = "Backlight"; - linux,code = <KEY_BRIGHTNESS_ZERO>; - gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; - }; - }; - switch { compatible = "realtek,rtl8365mb"; /* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */ @@ -175,31 +94,9 @@ }; &srab { - compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab"; - status = "okay"; dsa,member = <0 0>; ports { - port@0 { - label = "lan4"; - }; - - port@1 { - label = "lan3"; - }; - - port@2 { - label = "lan2"; - }; - - port@3 { - label = "lan1"; - }; - - port@4 { - label = "wan"; - }; - sw0_p5: port@5 { /delete-property/ethernet; @@ -212,19 +109,6 @@ pause; }; }; - - port@7 { - label = "cpu"; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - port@8 { - label = "cpu"; - }; }; }; @@ -236,36 +120,3 @@ nvmem-cells = <&et1macaddr>; nvmem-cell-names = "mac-address"; }; - -&usb2 { - vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>; -}; - -&usb3_phy { - status = "okay"; -}; - -&nandcs { - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "boot"; - reg = <0x00000000 0x00080000>; - read-only; - }; - - partition@80000 { - label = "nvram"; - reg = <0x00080000 0x00180000>; - }; - - partition@200000 { - label = "firmware"; - reg = <0x00200000 0x07e00000>; - compatible = "brcm,trx"; - }; - }; -}; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts b/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts index 51ce510b3e3a..c914569ddd5e 100644 --- a/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts +++ b/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts @@ -33,6 +33,7 @@ #size-cells = <1>; partition@0 { + compatible = "seama"; label = "firmware"; reg = <0x00000000 0x08000000>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-890l.dts b/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-890l.dts index 60744f82c2b7..f050acbea0b2 100644 --- a/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-890l.dts +++ b/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-890l.dts @@ -149,6 +149,7 @@ * partitions: this device uses SEAMA. */ firmware@0 { + compatible = "seama"; label = "firmware"; reg = <0x00000000 0x08000000>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-linksys-panamera.dts b/arch/arm/boot/dts/broadcom/bcm47094-linksys-panamera.dts index 8036c04d81cb..2b5c80d835e9 100644 --- a/arch/arm/boot/dts/broadcom/bcm47094-linksys-panamera.dts +++ b/arch/arm/boot/dts/broadcom/bcm47094-linksys-panamera.dts @@ -279,7 +279,7 @@ reg = <0x080000 0x0100000>; }; - partition@180000{ + partition@180000 { label = "devinfo"; reg = <0x0180000 0x080000>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts index 6875625869d9..afc635c8cdeb 100644 --- a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts +++ b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts @@ -64,6 +64,43 @@ nvmem-cell-names = "mac-address"; }; + +&pcie0 { + #address-cells = <3>; + #size-cells = <2>; + + bridge@0,0 { + reg = <0x0000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + + wifi@0,0 { + compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac"; + reg = <0x0000 0 0 0 0>; + brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825"; + }; + }; +}; + +&pcie1 { + #address-cells = <3>; + #size-cells = <2>; + + bridge@0,0 { + reg = <0x0000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + + wifi@0,0 { + compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac"; + reg = <0x0000 0 0 0 0>; + brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825"; + }; + }; +}; + &spi_nor { status = "okay"; }; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts index 789dd2a3d226..e28f7a350117 100644 --- a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts +++ b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts @@ -81,6 +81,42 @@ nvmem-cell-names = "mac-address"; }; +&pcie0 { + #address-cells = <3>; + #size-cells = <2>; + + bridge@0,0 { + reg = <0x0000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + + wifi@0,0 { + compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac"; + reg = <0x0000 0 0 0 0>; + brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930"; + }; + }; +}; + +&pcie1 { + #address-cells = <3>; + #size-cells = <2>; + + bridge@0,0 { + reg = <0x0000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + + wifi@0,0 { + compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac"; + reg = <0x0000 0 0 0 0>; + brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930"; + }; + }; +}; + &usb3 { vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/broadcom/bcm47094-phicomm-k3.dts b/arch/arm/boot/dts/broadcom/bcm47094-phicomm-k3.dts index 3bf6e24978ac..bb1bc4e61bc2 100644 --- a/arch/arm/boot/dts/broadcom/bcm47094-phicomm-k3.dts +++ b/arch/arm/boot/dts/broadcom/bcm47094-phicomm-k3.dts @@ -55,7 +55,7 @@ reg = <0x0080000 0x0100000>; }; - partition@180000{ + partition@180000 { label = "phicomm"; reg = <0x0180000 0x0280000>; read-only; diff --git a/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts b/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts index 0734aa249b8e..ac44c745bdf8 100644 --- a/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts +++ b/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts @@ -26,7 +26,6 @@ led-wlan { label = "bcm53xx:blue:wlan"; gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-off"; }; led-system { @@ -46,3 +45,22 @@ }; }; }; + +&gmac0 { + phy-mode = "rgmii"; + phy-handle = <&bcm54210e>; + + /delete-node/ fixed-link; + + mdio { + /delete-node/ switch@1e; + + bcm54210e: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&gmac1 { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts b/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts index e6fb6cbe6963..fd071da26cfa 100644 --- a/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts +++ b/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts @@ -26,7 +26,6 @@ led-5ghz { label = "bcm53xx:blue:5ghz"; gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "default-off"; }; led-system { @@ -42,7 +41,6 @@ led-2ghz { label = "bcm53xx:blue:2ghz"; gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "default-off"; }; }; @@ -83,3 +81,22 @@ }; }; }; + +&gmac0 { + phy-mode = "rgmii"; + phy-handle = <&bcm54210e>; + + /delete-node/ fixed-link; + + mdio { + /delete-node/ switch@1e; + + bcm54210e: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&gmac1 { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm47189-tenda-ac9.dts b/arch/arm/boot/dts/broadcom/bcm47189-tenda-ac9.dts index dab2e5f63a72..3ac6cac541ca 100644 --- a/arch/arm/boot/dts/broadcom/bcm47189-tenda-ac9.dts +++ b/arch/arm/boot/dts/broadcom/bcm47189-tenda-ac9.dts @@ -111,34 +111,27 @@ ports { port@0 { - reg = <0>; label = "wan"; }; port@1 { - reg = <1>; label = "lan1"; }; port@2 { - reg = <2>; label = "lan2"; }; port@3 { - reg = <3>; label = "lan3"; }; port@4 { - reg = <4>; label = "lan4"; }; - port@5 { - reg = <5>; + port@8 { label = "cpu"; - ethernet = <&gmac0>; }; }; }; diff --git a/arch/arm/boot/dts/broadcom/bcm53573.dtsi b/arch/arm/boot/dts/broadcom/bcm53573.dtsi index 3f03a381db0f..2df80740d181 100644 --- a/arch/arm/boot/dts/broadcom/bcm53573.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm53573.dtsi @@ -127,6 +127,9 @@ pcie0: pcie@2000 { reg = <0x00002000 0x1000>; + + #address-cells = <3>; + #size-cells = <2>; }; usb2: usb2@4000 { @@ -156,8 +159,6 @@ }; ohci: usb@d000 { - #usb-cells = <0>; - compatible = "generic-ohci"; reg = <0xd000 0x1000>; interrupt-parent = <&gic>; @@ -180,6 +181,12 @@ gmac0: ethernet@5000 { reg = <0x5000 0x1000>; + phy-mode = "internal"; + + fixed-link { + speed = <1000>; + full-duplex; + }; mdio { #address-cells = <1>; @@ -191,10 +198,44 @@ status = "disabled"; - /* ports are defined in board DTS */ ports { #address-cells = <1>; #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + }; + + port@2 { + reg = <2>; + }; + + port@3 { + reg = <3>; + }; + + port@4 { + reg = <4>; + }; + + port@5 { + reg = <5>; + ethernet = <&gmac1>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@8 { + reg = <8>; + ethernet = <&gmac0>; + }; }; }; }; @@ -202,6 +243,12 @@ gmac1: ethernet@b000 { reg = <0xb000 0x1000>; + phy-mode = "internal"; + + fixed-link { + speed = <1000>; + full-duplex; + }; }; pmu@12000 { diff --git a/arch/arm/boot/dts/broadcom/bcm947189acdbmr.dts b/arch/arm/boot/dts/broadcom/bcm947189acdbmr.dts index 3709baa2376f..0b8727ae6f16 100644 --- a/arch/arm/boot/dts/broadcom/bcm947189acdbmr.dts +++ b/arch/arm/boot/dts/broadcom/bcm947189acdbmr.dts @@ -60,9 +60,9 @@ spi { compatible = "spi-gpio"; num-chipselects = <1>; - gpio-sck = <&chipcommon 21 0>; - gpio-miso = <&chipcommon 22 0>; - gpio-mosi = <&chipcommon 23 0>; + sck-gpios = <&chipcommon 21 0>; + miso-gpios = <&chipcommon 22 0>; + mosi-gpios = <&chipcommon 23 0>; cs-gpios = <&chipcommon 24 0>; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/hisilicon/hi3519.dtsi b/arch/arm/boot/dts/hisilicon/hi3519.dtsi index c524c854d319..a42b71cdc5d7 100644 --- a/arch/arm/boot/dts/hisilicon/hi3519.dtsi +++ b/arch/arm/boot/dts/hisilicon/hi3519.dtsi @@ -54,7 +54,7 @@ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; clocks = <&crg HI3519_UART0_CLK>, <&crg HI3519_UART0_CLK>; clock-names = "uartclk", "apb_pclk"; - status = "disable"; + status = "disabled"; }; uart1: serial@12101000 { @@ -63,7 +63,7 @@ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; clocks = <&crg HI3519_UART1_CLK>, <&crg HI3519_UART1_CLK>; clock-names = "uartclk", "apb_pclk"; - status = "disable"; + status = "disabled"; }; uart2: serial@12102000 { @@ -72,7 +72,7 @@ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; clocks = <&crg HI3519_UART2_CLK>, <&crg HI3519_UART2_CLK>; clock-names = "uartclk", "apb_pclk"; - status = "disable"; + status = "disabled"; }; uart3: serial@12103000 { @@ -81,7 +81,7 @@ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&crg HI3519_UART3_CLK>, <&crg HI3519_UART3_CLK>; clock-names = "uartclk", "apb_pclk"; - status = "disable"; + status = "disabled"; }; uart4: serial@12104000 { @@ -90,7 +90,7 @@ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; clocks = <&crg HI3519_UART4_CLK>, <&crg HI3519_UART4_CLK>; clock-names = "uartclk", "apb_pclk"; - status = "disable"; + status = "disabled"; }; dual_timer0: timer@12000000 { @@ -100,7 +100,7 @@ reg = <0x12000000 0x1000>; clocks = <&clk_3m>; clock-names = "apb_pclk"; - status = "disable"; + status = "disabled"; }; dual_timer1: timer@12001000 { @@ -110,7 +110,7 @@ reg = <0x12001000 0x1000>; clocks = <&clk_3m>; clock-names = "apb_pclk"; - status = "disable"; + status = "disabled"; }; dual_timer2: timer@12002000 { @@ -120,7 +120,7 @@ reg = <0x12002000 0x1000>; clocks = <&clk_3m>; clock-names = "apb_pclk"; - status = "disable"; + status = "disabled"; }; spi_bus0: spi@12120000 { @@ -132,7 +132,7 @@ num-cs = <1>; #address-cells = <1>; #size-cells = <0>; - status = "disable"; + status = "disabled"; }; spi_bus1: spi@12121000 { @@ -144,7 +144,7 @@ num-cs = <1>; #address-cells = <1>; #size-cells = <0>; - status = "disable"; + status = "disabled"; }; spi_bus2: spi@12122000 { @@ -156,7 +156,7 @@ num-cs = <1>; #address-cells = <1>; #size-cells = <0>; - status = "disable"; + status = "disabled"; }; sysctrl: system-controller@12020000 { diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 72c55e5187ca..f36063c57c7f 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -440,7 +440,7 @@ clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; clock-names = "stmmaceth", "ptp_ref"; resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>; - reset-names = "stmmaceth", "stmmaceth-ocp"; + reset-names = "stmmaceth", "ahb"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -460,7 +460,7 @@ clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; clock-names = "stmmaceth", "ptp_ref"; resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>; - reset-names = "stmmaceth", "stmmaceth-ocp"; + reset-names = "stmmaceth", "ahb"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -480,7 +480,7 @@ clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; clock-names = "stmmaceth", "ptp_ref"; resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>; - reset-names = "stmmaceth", "stmmaceth-ocp"; + reset-names = "stmmaceth", "ahb"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/marvell/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/marvell/armada-370-dlink-dns327l.dts index 561195b749eb..d4c4efabd254 100644 --- a/arch/arm/boot/dts/marvell/armada-370-dlink-dns327l.dts +++ b/arch/arm/boot/dts/marvell/armada-370-dlink-dns327l.dts @@ -105,54 +105,45 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - usb_power: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - pinctrl-0 = <&xhci_pwr_pin>; - pinctrl-names = "default"; - regulator-name = "USB3.0 Port Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-boot-on; - regulator-always-on; - gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>; - }; + usb_power: regulator-1 { + compatible = "regulator-fixed"; + pinctrl-0 = <&xhci_pwr_pin>; + pinctrl-names = "default"; + regulator-name = "USB3.0 Port Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-boot-on; + regulator-always-on; + gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>; + }; - sata_r_power: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - pinctrl-0 = <&sata_r_pwr_pin>; - pinctrl-names = "default"; - regulator-name = "SATA-R Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - startup-delay-us = <2000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; - }; + sata_r_power: regulator-2 { + compatible = "regulator-fixed"; + pinctrl-0 = <&sata_r_pwr_pin>; + pinctrl-names = "default"; + regulator-name = "SATA-R Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + startup-delay-us = <2000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; + }; - sata_l_power: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - pinctrl-0 = <&sata_l_pwr_pin>; - pinctrl-names = "default"; - regulator-name = "SATA-L Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - startup-delay-us = <4000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; - }; + sata_l_power: regulator-3 { + compatible = "regulator-fixed"; + pinctrl-0 = <&sata_l_pwr_pin>; + pinctrl-names = "default"; + regulator-name = "SATA-L Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + startup-delay-us = <4000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/marvell/armada-370-seagate-nas-4bay.dts b/arch/arm/boot/dts/marvell/armada-370-seagate-nas-4bay.dts index 9cb69999b1db..370ca9c43247 100644 --- a/arch/arm/boot/dts/marvell/armada-370-seagate-nas-4bay.dts +++ b/arch/arm/boot/dts/marvell/armada-370-seagate-nas-4bay.dts @@ -46,29 +46,26 @@ }; }; - regulators { - regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "SATA2 power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&pca9554 6 GPIO_ACTIVE_HIGH>; - }; - regulator@4 { - compatible = "regulator-fixed"; - reg = <4>; - regulator-name = "SATA3 power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&pca9554 7 GPIO_ACTIVE_HIGH>; - }; + regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "SATA2 power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&pca9554 6 GPIO_ACTIVE_HIGH>; + }; + + regulator-4 { + compatible = "regulator-fixed"; + regulator-name = "SATA3 power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&pca9554 7 GPIO_ACTIVE_HIGH>; }; gpio-leds { diff --git a/arch/arm/boot/dts/marvell/armada-370-seagate-nas-xbay.dtsi b/arch/arm/boot/dts/marvell/armada-370-seagate-nas-xbay.dtsi index 822f10734946..ffb3179033e7 100644 --- a/arch/arm/boot/dts/marvell/armada-370-seagate-nas-xbay.dtsi +++ b/arch/arm/boot/dts/marvell/armada-370-seagate-nas-xbay.dtsi @@ -70,34 +70,26 @@ }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - - regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "SATA0 power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; - }; - regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "SATA1 power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; - }; + regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "SATA0 power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; + }; + + regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "SATA1 power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; }; gpio-fan { diff --git a/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud-2bay.dts b/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud-2bay.dts index 5ee572dc9242..45d8ec5dfeb7 100644 --- a/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud-2bay.dts +++ b/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud-2bay.dts @@ -32,17 +32,14 @@ }; }; - regulators { - regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "SATA1 power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; - }; + regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "SATA1 power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud.dtsi b/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud.dtsi index 124a8ba279e3..054124857235 100644 --- a/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud.dtsi +++ b/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud.dtsi @@ -53,32 +53,25 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "USB Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 27 GPIO_ACTIVE_LOW>; - }; - regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "SATA0 power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; - }; + regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 27 GPIO_ACTIVE_LOW>; + }; + + regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "SATA0 power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; }; gpio-keys { diff --git a/arch/arm/boot/dts/marvell/armada-370-synology-ds213j.dts b/arch/arm/boot/dts/marvell/armada-370-synology-ds213j.dts index f0893cc06607..b07d11d1f124 100644 --- a/arch/arm/boot/dts/marvell/armada-370-synology-ds213j.dts +++ b/arch/arm/boot/dts/marvell/armada-370-synology-ds213j.dts @@ -142,38 +142,32 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>; + sata1_regulator: sata1-regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "SATA1 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + startup-delay-us = <2000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&sata1_pwr_pin>; pinctrl-names = "default"; + }; - sata1_regulator: sata1-regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "SATA1 Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - startup-delay-us = <2000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; - }; - - sata2_regulator: sata2-regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "SATA2 Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - startup-delay-us = <4000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>; - }; + sata2_regulator: sata2-regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "SATA2 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + startup-delay-us = <4000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&sata2_pwr_pin>; + pinctrl-names = "default"; }; }; diff --git a/arch/arm/boot/dts/marvell/armada-382-rd-ac3x-48g4x2xl.dts b/arch/arm/boot/dts/marvell/armada-382-rd-ac3x-48g4x2xl.dts index 584f0d0398a5..6ab65d21861a 100644 --- a/arch/arm/boot/dts/marvell/armada-382-rd-ac3x-48g4x2xl.dts +++ b/arch/arm/boot/dts/marvell/armada-382-rd-ac3x-48g4x2xl.dts @@ -40,7 +40,7 @@ pinctrl-0 = <&i2c0_pins>; status = "okay"; - eeprom@53{ + eeprom@53 { compatible = "atmel,24c64"; reg = <0x53>; }; @@ -95,11 +95,11 @@ reg = <0x00000000 0x00500000>; label = "u-boot"; }; - partition@500000{ + partition@500000 { reg = <0x00500000 0x00400000>; label = "u-boot env"; }; - partition@900000{ + partition@900000 { reg = <0x00900000 0x3F700000>; label = "user"; }; diff --git a/arch/arm/boot/dts/marvell/armada-xp-synology-ds414.dts b/arch/arm/boot/dts/marvell/armada-xp-synology-ds414.dts index 5551bac1962c..1b65059794bf 100644 --- a/arch/arm/boot/dts/marvell/armada-xp-synology-ds414.dts +++ b/arch/arm/boot/dts/marvell/armada-xp-synology-ds414.dts @@ -109,65 +109,60 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin - &sata3_pwr_pin &sata4_pwr_pin>; + sata1_regulator: sata1-regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "SATA1 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + startup-delay-us = <2000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&sata1_pwr_pin>; pinctrl-names = "default"; + }; - sata1_regulator: sata1-regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "SATA1 Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - startup-delay-us = <2000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; - }; - - sata2_regulator: sata2-regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "SATA2 Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - startup-delay-us = <4000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; - }; + sata2_regulator: sata2-regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "SATA2 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + startup-delay-us = <4000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&sata2_pwr_pin>; + pinctrl-names = "default"; + }; - sata3_regulator: sata3-regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "SATA3 Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - startup-delay-us = <6000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>; - }; + sata3_regulator: sata3-regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "SATA3 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + startup-delay-us = <6000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&sata3_pwr_pin>; + pinctrl-names = "default"; + }; - sata4_regulator: sata4-regulator@4 { - compatible = "regulator-fixed"; - reg = <4>; - regulator-name = "SATA4 Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - startup-delay-us = <8000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; - }; + sata4_regulator: sata4-regulator-4 { + compatible = "regulator-fixed"; + regulator-name = "SATA4 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + startup-delay-us = <8000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&sata4_pwr_pin>; + pinctrl-names = "default"; }; }; diff --git a/arch/arm/boot/dts/marvell/dove-cm-a510.dtsi b/arch/arm/boot/dts/marvell/dove-cm-a510.dtsi index 1082fdfbfe60..621cb145a8f6 100644 --- a/arch/arm/boot/dts/marvell/dove-cm-a510.dtsi +++ b/arch/arm/boot/dts/marvell/dove-cm-a510.dtsi @@ -108,18 +108,12 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - wifi_power: regulator@1 { - compatible = "regulator-fixed"; - regulator-name = "WiFi Power"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>; - }; + wifi_power: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "WiFi Power"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/marvell/dove-cubox.dts b/arch/arm/boot/dts/marvell/dove-cubox.dts index dbba0c8cdab1..bfde99486a87 100644 --- a/arch/arm/boot/dts/marvell/dove-cubox.dts +++ b/arch/arm/boot/dts/marvell/dove-cubox.dts @@ -28,24 +28,17 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - usb_power: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "USB Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio0 1 0>; - pinctrl-0 = <&pmx_gpio_1>; - pinctrl-names = "default"; - }; + usb_power: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 1 0>; + pinctrl-0 = <&pmx_gpio_1>; + pinctrl-names = "default"; }; clocks { diff --git a/arch/arm/boot/dts/marvell/dove-d3plug.dts b/arch/arm/boot/dts/marvell/dove-d3plug.dts index 5aa5d4a7d51d..a451fd576990 100644 --- a/arch/arm/boot/dts/marvell/dove-d3plug.dts +++ b/arch/arm/boot/dts/marvell/dove-d3plug.dts @@ -37,24 +37,17 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - usb_power: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "USB Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio0 8 0>; - pinctrl-0 = <&pmx_gpio_8>; - pinctrl-names = "default"; - }; + usb_power: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 8 0>; + pinctrl-0 = <&pmx_gpio_8>; + pinctrl-names = "default"; }; }; diff --git a/arch/arm/boot/dts/marvell/dove-sbc-a510.dts b/arch/arm/boot/dts/marvell/dove-sbc-a510.dts index df021f9b0117..8585ee5533bf 100644 --- a/arch/arm/boot/dts/marvell/dove-sbc-a510.dts +++ b/arch/arm/boot/dts/marvell/dove-sbc-a510.dts @@ -76,22 +76,20 @@ stdout-path = &uart0; }; - regulators { - usb0_power: regulator@2 { - compatible = "regulator-fixed"; - regulator-name = "USB Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio_ext 0 GPIO_ACTIVE_HIGH>; - }; - - mmc_power: regulator@3 { - compatible = "regulator-fixed"; - regulator-name = "MMC Power"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio_ext 13 GPIO_ACTIVE_HIGH>; - }; + usb0_power: regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio_ext 0 GPIO_ACTIVE_HIGH>; + }; + + mmc_power: regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "MMC Power"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio_ext 13 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-l-50.dts b/arch/arm/boot/dts/marvell/kirkwood-l-50.dts index 9fd3581bb24b..dffb9f84e67c 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-l-50.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-l-50.dts @@ -62,7 +62,7 @@ status = "okay"; clock-frequency = <400000>; - gpio2: gpio-expander@20{ + gpio2: gpio-expander@20 { #gpio-cells = <2>; #interrupt-cells = <2>; compatible = "semtech,sx1505q"; @@ -76,7 +76,7 @@ * 5: mPCIE reset (active low) * 6: Express card reset (active low) */ - gpio3: gpio-expander@21{ + gpio3: gpio-expander@21 { #gpio-cells = <2>; #interrupt-cells = <2>; compatible = "semtech,sx1505q"; diff --git a/arch/arm/boot/dts/marvell/pxa168.dtsi b/arch/arm/boot/dts/marvell/pxa168.dtsi index 16212b912b94..22ed10cb5619 100644 --- a/arch/arm/boot/dts/marvell/pxa168.dtsi +++ b/arch/arm/boot/dts/marvell/pxa168.dtsi @@ -153,7 +153,7 @@ }; }; - soc_clocks: clocks{ + soc_clocks: clocks { compatible = "marvell,pxa168-clock"; reg = <0xd4050000 0x1000>, <0xd4282800 0x400>, diff --git a/arch/arm/boot/dts/marvell/pxa910.dtsi b/arch/arm/boot/dts/marvell/pxa910.dtsi index 352a39357810..bd64ac1ec66f 100644 --- a/arch/arm/boot/dts/marvell/pxa910.dtsi +++ b/arch/arm/boot/dts/marvell/pxa910.dtsi @@ -163,7 +163,7 @@ }; }; - soc_clocks: clocks{ + soc_clocks: clocks { compatible = "marvell,pxa910-clock"; reg = <0xd4050000 0x1000>, <0xd4282800 0x400>, diff --git a/arch/arm/boot/dts/microchip/Makefile b/arch/arm/boot/dts/microchip/Makefile index 0f5193d05a31..31e03747cdf4 100644 --- a/arch/arm/boot/dts/microchip/Makefile +++ b/arch/arm/boot/dts/microchip/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +# Enables support for device-tree overlays DTC_FLAGS_at91-sam9x60_curiosity := -@ DTC_FLAGS_at91-sam9x60ek := -@ DTC_FLAGS_at91-sama5d27_som1_ek := -@ @@ -54,21 +55,9 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \ at91sam9g35ek.dtb \ at91sam9x25ek.dtb \ at91sam9x35ek.dtb -# Enables support for device-tree overlays -DTC_FLAGS_at91-sam9x60_curiosity := -@ -DTC_FLAGS_at91-sam9x60ek := -@ dtb-$(CONFIG_SOC_SAM9X60) += \ at91-sam9x60_curiosity.dtb \ at91-sam9x60ek.dtb -# Enables support for device-tree overlays -DTC_FLAGS_at91-sama5d27_som1_ek := -@ -DTC_FLAGS_at91-sama5d27_wlsom1_ek := -@ -DTC_FLAGS_at91-sama5d2_icp := -@ -DTC_FLAGS_at91-sama5d2_ptc_ek := -@ -DTC_FLAGS_at91-sama5d2_xplained := -@ -DTC_FLAGS_at91-sama5d3_eds := -@ -DTC_FLAGS_at91-sama5d3_xplained := -@ -DTC_FLAGS_at91-sama5d4_xplained := -@ dtb-$(CONFIG_SOC_SAM_V7) += \ at91-kizbox2-2.dtb \ at91-kizbox3-hs.dtb \ @@ -95,8 +84,6 @@ dtb-$(CONFIG_SOC_SAM_V7) += \ at91-sama5d4_xplained.dtb \ at91-sama5d4ek.dtb \ at91-vinco.dtb -# Enables support for device-tree overlays -DTC_FLAGS_at91-sama7g5ek := -@ dtb-$(CONFIG_SOC_SAMA7G5) += \ at91-sama7g5ek.dtb diff --git a/arch/arm/boot/dts/microchip/at91-sama5d3_ksz9477_evb.dts b/arch/arm/boot/dts/microchip/at91-sama5d3_ksz9477_evb.dts index 14af1fd6d247..b66570080894 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d3_ksz9477_evb.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d3_ksz9477_evb.dts @@ -152,6 +152,7 @@ label = "cpu"; ethernet = <&macb0>; phy-mode = "rgmii-txid"; + tx-internal-delay-ps = <2000>; fixed-link { speed = <1000>; @@ -162,6 +163,18 @@ }; }; +&tcb0 { + timer0: timer@0 { + compatible = "atmel,tcb-timer"; + reg = <0>; + }; + + timer1: timer@1 { + compatible = "atmel,tcb-timer"; + reg = <1>; + }; +}; + &usb0 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usba_vbus>; diff --git a/arch/arm/boot/dts/microchip/at91-vinco.dts b/arch/arm/boot/dts/microchip/at91-vinco.dts index ebeaa6ab500e..ecbdacf48708 100644 --- a/arch/arm/boot/dts/microchip/at91-vinco.dts +++ b/arch/arm/boot/dts/microchip/at91-vinco.dts @@ -159,7 +159,7 @@ atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usba_vbus>; - status = "disable"; + status = "disabled"; }; usb1: ohci@500000 { @@ -168,7 +168,7 @@ &pioE 11 GPIO_ACTIVE_LOW &pioE 12 GPIO_ACTIVE_LOW >; - status = "disable"; + status = "disabled"; }; usb2: ehci@600000 { diff --git a/arch/arm/boot/dts/microchip/at91rm9200.dtsi b/arch/arm/boot/dts/microchip/at91rm9200.dtsi index 37b500f6f395..16c675e3a890 100644 --- a/arch/arm/boot/dts/microchip/at91rm9200.dtsi +++ b/arch/arm/boot/dts/microchip/at91rm9200.dtsi @@ -135,9 +135,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <0xfffa0000 0x100>; - interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 - 18 IRQ_TYPE_LEVEL_HIGH 0 - 19 IRQ_TYPE_LEVEL_HIGH 0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, + <18 IRQ_TYPE_LEVEL_HIGH 0>, + <19 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; @@ -147,9 +147,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <0xfffa4000 0x100>; - interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0 - 21 IRQ_TYPE_LEVEL_HIGH 0 - 22 IRQ_TYPE_LEVEL_HIGH 0>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>, + <21 IRQ_TYPE_LEVEL_HIGH 0>, + <22 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&slow_xtal>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; diff --git a/arch/arm/boot/dts/microchip/at91sam9260.dtsi b/arch/arm/boot/dts/microchip/at91sam9260.dtsi index 35a007365b6a..e56d5546554c 100644 --- a/arch/arm/boot/dts/microchip/at91sam9260.dtsi +++ b/arch/arm/boot/dts/microchip/at91sam9260.dtsi @@ -65,7 +65,7 @@ clock-frequency = <0>; }; - adc_op_clk: adc_op_clk{ + adc_op_clk: adc_op_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <5000000>; @@ -148,9 +148,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <0xfffa0000 0x100>; - interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 - 18 IRQ_TYPE_LEVEL_HIGH 0 - 19 IRQ_TYPE_LEVEL_HIGH 0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, + <18 IRQ_TYPE_LEVEL_HIGH 0>, + <19 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; @@ -160,9 +160,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <0xfffdc000 0x100>; - interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0 - 27 IRQ_TYPE_LEVEL_HIGH 0 - 28 IRQ_TYPE_LEVEL_HIGH 0>; + interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>, + <27 IRQ_TYPE_LEVEL_HIGH 0>, + <28 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; diff --git a/arch/arm/boot/dts/microchip/at91sam9261.dtsi b/arch/arm/boot/dts/microchip/at91sam9261.dtsi index 528ffc6f6f96..307b60658014 100644 --- a/arch/arm/boot/dts/microchip/at91sam9261.dtsi +++ b/arch/arm/boot/dts/microchip/at91sam9261.dtsi @@ -205,7 +205,7 @@ status = "disabled"; }; - usart2: serial@fffb8000{ + usart2: serial@fffb8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb8000 0x200>; atmel,usart-mode = <AT91_USART_MODE_SERIAL>; diff --git a/arch/arm/boot/dts/microchip/at91sam9g20ek_2mmc.dts b/arch/arm/boot/dts/microchip/at91sam9g20ek_2mmc.dts index 2db95e8ffc64..172af6ff4b18 100644 --- a/arch/arm/boot/dts/microchip/at91sam9g20ek_2mmc.dts +++ b/arch/arm/boot/dts/microchip/at91sam9g20ek_2mmc.dts @@ -12,7 +12,7 @@ compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9"; ahb { - apb{ + apb { mmc0: mmc@fffa8000 { /* clk already mux wuth slot0 */ pinctrl-0 = < diff --git a/arch/arm/boot/dts/microchip/at91sam9g45.dtsi b/arch/arm/boot/dts/microchip/at91sam9g45.dtsi index 7cccc606e36c..325c63a53118 100644 --- a/arch/arm/boot/dts/microchip/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/microchip/at91sam9g45.dtsi @@ -70,7 +70,7 @@ clock-frequency = <0>; }; - adc_op_clk: adc_op_clk{ + adc_op_clk: adc_op_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <300000>; diff --git a/arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts b/arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts index 7f45e81ca165..071db4f16313 100644 --- a/arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts +++ b/arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts @@ -164,7 +164,7 @@ }; }; - spi0: spi@fffa4000{ + spi0: spi@fffa4000 { status = "okay"; cs-gpios = <&pioB 3 0>, <0>, <0>, <0>; flash@0 { diff --git a/arch/arm/boot/dts/microchip/at91sam9rl.dtsi b/arch/arm/boot/dts/microchip/at91sam9rl.dtsi index 3d089ffbe162..7436b5c862b1 100644 --- a/arch/arm/boot/dts/microchip/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/microchip/at91sam9rl.dtsi @@ -67,7 +67,7 @@ clock-frequency = <0>; }; - adc_op_clk: adc_op_clk{ + adc_op_clk: adc_op_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1000000>; diff --git a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi index a1fed912f2ee..a7456c2191fa 100644 --- a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi @@ -68,7 +68,7 @@ clock-frequency = <0>; }; - adc_op_clk: adc_op_clk{ + adc_op_clk: adc_op_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1000000>; diff --git a/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts b/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts index 8804e8ba5370..3b7577e48b46 100644 --- a/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts +++ b/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts @@ -28,7 +28,7 @@ &gpio { miim_a_pins: mdio-pins { /* MDC, MDIO */ - pins = "GPIO_28", "GPIO_29"; + pins = "GPIO_28", "GPIO_29"; function = "miim_a"; }; diff --git a/arch/arm/boot/dts/microchip/sama5d2.dtsi b/arch/arm/boot/dts/microchip/sama5d2.dtsi index daeeb24e5f4d..5f8e297e19ed 100644 --- a/arch/arm/boot/dts/microchip/sama5d2.dtsi +++ b/arch/arm/boot/dts/microchip/sama5d2.dtsi @@ -382,9 +382,9 @@ macb0: ethernet@f8008000 { compatible = "atmel,sama5d2-gem"; reg = <0xf8008000 0x1000>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH 3 /* Queue 0 */ - 66 IRQ_TYPE_LEVEL_HIGH 3 /* Queue 1 */ - 67 IRQ_TYPE_LEVEL_HIGH 3>; /* Queue 2 */ + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 0 */ + <66 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 1 */ + <67 IRQ_TYPE_LEVEL_HIGH 3>; /* Queue 2 */ clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&pmc PMC_TYPE_PERIPHERAL 5>; clock-names = "hclk", "pclk"; status = "disabled"; diff --git a/arch/arm/boot/dts/microchip/sama5d3.dtsi b/arch/arm/boot/dts/microchip/sama5d3.dtsi index d9e66700d1c2..d4fc0c1dfc10 100644 --- a/arch/arm/boot/dts/microchip/sama5d3.dtsi +++ b/arch/arm/boot/dts/microchip/sama5d3.dtsi @@ -74,7 +74,7 @@ clock-frequency = <0>; }; - adc_op_clk: adc_op_clk{ + adc_op_clk: adc_op_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1000000>; diff --git a/arch/arm/boot/dts/microchip/sama5d4.dtsi b/arch/arm/boot/dts/microchip/sama5d4.dtsi index 41284e013f53..50650e2f4267 100644 --- a/arch/arm/boot/dts/microchip/sama5d4.dtsi +++ b/arch/arm/boot/dts/microchip/sama5d4.dtsi @@ -72,7 +72,7 @@ clock-frequency = <0>; }; - adc_op_clk: adc_op_clk{ + adc_op_clk: adc_op_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1000000>; diff --git a/arch/arm/boot/dts/microchip/sama7g5.dtsi b/arch/arm/boot/dts/microchip/sama7g5.dtsi index 9642a42d84e6..269e0a3ca269 100644 --- a/arch/arm/boot/dts/microchip/sama7g5.dtsi +++ b/arch/arm/boot/dts/microchip/sama7g5.dtsi @@ -366,8 +366,8 @@ compatible = "bosch,m_can"; reg = <0xe0828000 0x100>, <0x100000 0x7800>; reg-names = "m_can", "message_ram"; - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "int0", "int1"; clocks = <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>; clock-names = "hclk", "cclk"; @@ -382,8 +382,8 @@ compatible = "bosch,m_can"; reg = <0xe082c000 0x100>, <0x100000 0xbc00>; reg-names = "m_can", "message_ram"; - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "int0", "int1"; clocks = <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>; clock-names = "hclk", "cclk"; @@ -398,8 +398,8 @@ compatible = "bosch,m_can"; reg = <0xe0830000 0x100>, <0x100000 0x10000>; reg-names = "m_can", "message_ram"; - interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "int0", "int1"; clocks = <&pmc PMC_TYPE_PERIPHERAL 63>, <&pmc PMC_TYPE_GCK 63>; clock-names = "hclk", "cclk"; @@ -414,8 +414,8 @@ compatible = "bosch,m_can"; reg = <0xe0834000 0x100>, <0x110000 0x4400>; reg-names = "m_can", "message_ram"; - interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "int0", "int1"; clocks = <&pmc PMC_TYPE_PERIPHERAL 64>, <&pmc PMC_TYPE_GCK 64>; clock-names = "hclk", "cclk"; @@ -430,8 +430,8 @@ compatible = "bosch,m_can"; reg = <0xe0838000 0x100>, <0x110000 0x8800>; reg-names = "m_can", "message_ram"; - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "int0", "int1"; clocks = <&pmc PMC_TYPE_PERIPHERAL 65>, <&pmc PMC_TYPE_GCK 65>; clock-names = "hclk", "cclk"; @@ -446,8 +446,8 @@ compatible = "bosch,m_can"; reg = <0xe083c000 0x100>, <0x110000 0xcc00>; reg-names = "m_can", "message_ram"; - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "int0", "int1"; clocks = <&pmc PMC_TYPE_PERIPHERAL 66>, <&pmc PMC_TYPE_GCK 66>; clock-names = "hclk", "cclk"; @@ -845,12 +845,12 @@ gmac0: ethernet@e2800000 { compatible = "microchip,sama7g5-gem"; reg = <0xe2800000 0x1000>; - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>, <&pmc PMC_TYPE_GCK 53>; clock-names = "pclk", "hclk", "tx_clk", "tsu_clk"; assigned-clocks = <&pmc PMC_TYPE_GCK 51>; @@ -861,8 +861,8 @@ gmac1: ethernet@e2804000 { compatible = "microchip,sama7g5-emac"; reg = <0xe2804000 0x1000>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>; clock-names = "pclk", "hclk"; status = "disabled"; diff --git a/arch/arm/boot/dts/nspire/nspire-classic.dtsi b/arch/arm/boot/dts/nspire/nspire-classic.dtsi index 01e1bb7c3c6c..a6e9cbf51524 100644 --- a/arch/arm/boot/dts/nspire/nspire-classic.dtsi +++ b/arch/arm/boot/dts/nspire/nspire-classic.dtsi @@ -1,7 +1,5 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/boot/nspire-classic.dts - * * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> */ diff --git a/arch/arm/boot/dts/nspire/nspire-clp.dts b/arch/arm/boot/dts/nspire/nspire-clp.dts index f52f38c61588..c5773f770fd4 100644 --- a/arch/arm/boot/dts/nspire/nspire-clp.dts +++ b/arch/arm/boot/dts/nspire/nspire-clp.dts @@ -1,37 +1,82 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/boot/nspire-clp.dts - * * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> */ + /dts-v1/; +#include <dt-bindings/input/input.h> + /include/ "nspire-classic.dtsi" &keypad { linux,keymap = < - 0x0000001c 0x0001001c 0x00020039 - 0x0004002c 0x00050034 0x00060015 - 0x0007000b 0x0008002d 0x01000033 - 0x0101004e 0x01020011 0x01030004 - 0x0104002f 0x01050003 0x01060016 - 0x01070002 0x01080014 0x02000062 - 0x0201000c 0x0202001f 0x02030007 - 0x02040013 0x02050006 0x02060010 - 0x02070005 0x02080019 0x03000027 - 0x03010037 0x03020018 0x0303000a - 0x03040031 0x03050009 0x03060032 - 0x03070008 0x03080026 0x04000028 - 0x04010035 0x04020025 0x04040024 - 0x04060017 0x04080023 0x05000028 - 0x05020022 0x0503001b 0x05040021 - 0x0505001a 0x05060012 0x0507006f - 0x05080020 0x0509002a 0x0601001c - 0x0602002e 0x06030068 0x06040030 - 0x0605006d 0x0606001e 0x06070001 - 0x0608002b 0x0609000f 0x07000067 - 0x0702006a 0x0704006c 0x07060069 - 0x0707000e 0x0708001d 0x070a000d + MATRIX_KEY(0, 0, 0x1c) + MATRIX_KEY(0, 1, 0x1c) + MATRIX_KEY(0, 2, 0x39) + MATRIX_KEY(0, 4, 0x2c) + MATRIX_KEY(0, 5, 0x34) + MATRIX_KEY(0, 6, 0x15) + MATRIX_KEY(0, 7, 0x0b) + MATRIX_KEY(0, 8, 0x2d) + MATRIX_KEY(1, 0, 0x33) + MATRIX_KEY(1, 1, 0x4e) + MATRIX_KEY(1, 2, 0x11) + MATRIX_KEY(1, 3, 0x04) + MATRIX_KEY(1, 4, 0x2f) + MATRIX_KEY(1, 5, 0x03) + MATRIX_KEY(1, 6, 0x16) + MATRIX_KEY(1, 7, 0x02) + MATRIX_KEY(1, 8, 0x14) + MATRIX_KEY(2, 0, 0x62) + MATRIX_KEY(2, 1, 0x0c) + MATRIX_KEY(2, 2, 0x1f) + MATRIX_KEY(2, 3, 0x07) + MATRIX_KEY(2, 4, 0x13) + MATRIX_KEY(2, 5, 0x06) + MATRIX_KEY(2, 6, 0x10) + MATRIX_KEY(2, 7, 0x05) + MATRIX_KEY(2, 8, 0x19) + MATRIX_KEY(3, 0, 0x27) + MATRIX_KEY(3, 1, 0x37) + MATRIX_KEY(3, 2, 0x18) + MATRIX_KEY(3, 3, 0x0a) + MATRIX_KEY(3, 4, 0x31) + MATRIX_KEY(3, 5, 0x09) + MATRIX_KEY(3, 6, 0x32) + MATRIX_KEY(3, 7, 0x08) + MATRIX_KEY(3, 8, 0x26) + MATRIX_KEY(4, 0, 0x28) + MATRIX_KEY(4, 1, 0x35) + MATRIX_KEY(4, 2, 0x25) + MATRIX_KEY(4, 4, 0x24) + MATRIX_KEY(4, 6, 0x17) + MATRIX_KEY(4, 8, 0x23) + MATRIX_KEY(5, 0, 0x28) + MATRIX_KEY(5, 2, 0x22) + MATRIX_KEY(5, 3, 0x1b) + MATRIX_KEY(5, 4, 0x21) + MATRIX_KEY(5, 5, 0x1a) + MATRIX_KEY(5, 6, 0x12) + MATRIX_KEY(5, 7, 0x6f) + MATRIX_KEY(5, 8, 0x20) + MATRIX_KEY(5, 9, 0x2a) + MATRIX_KEY(6, 1, 0x1c) + MATRIX_KEY(6, 2, 0x2e) + MATRIX_KEY(6, 3, 0x68) + MATRIX_KEY(6, 4, 0x30) + MATRIX_KEY(6, 5, 0x6d) + MATRIX_KEY(6, 6, 0x1e) + MATRIX_KEY(6, 7, 0x01) + MATRIX_KEY(6, 8, 0x2b) + MATRIX_KEY(6, 9, 0x0f) + MATRIX_KEY(7, 0, 0x67) + MATRIX_KEY(7, 2, 0x6a) + MATRIX_KEY(7, 4, 0x6c) + MATRIX_KEY(7, 6, 0x69) + MATRIX_KEY(7, 7, 0x0e) + MATRIX_KEY(7, 8, 0x1d) + MATRIX_KEY(7, 10, 0x0d) >; }; diff --git a/arch/arm/boot/dts/nspire/nspire-cx.dts b/arch/arm/boot/dts/nspire/nspire-cx.dts index 590b7dff6ae5..29f0181e5b38 100644 --- a/arch/arm/boot/dts/nspire/nspire-cx.dts +++ b/arch/arm/boot/dts/nspire/nspire-cx.dts @@ -1,11 +1,12 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/boot/nspire-cx.dts - * * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> */ + /dts-v1/; +#include <dt-bindings/input/input.h> + /include/ "nspire.dtsi" &lcd { @@ -24,7 +25,7 @@ compatible = "arm,pl011", "arm,primecell"; clocks = <&uart_clk>, <&apb_pclk>; - clock-names = "uart_clk", "apb_pclk"; + clock-names = "uartclk", "apb_pclk"; }; &timer0 { @@ -45,28 +46,72 @@ &keypad { linux,keymap = < - 0x0000001c 0x0001001c 0x00040039 - 0x0005002c 0x00060015 0x0007000b - 0x0008000f 0x0100002d 0x01010011 - 0x0102002f 0x01030004 0x01040016 - 0x01050014 0x0106001f 0x01070002 - 0x010a006a 0x02000013 0x02010010 - 0x02020019 0x02030007 0x02040018 - 0x02050031 0x02060032 0x02070005 - 0x02080028 0x0209006c 0x03000026 - 0x03010025 0x03020024 0x0303000a - 0x03040017 0x03050023 0x03060022 - 0x03070008 0x03080035 0x03090069 - 0x04000021 0x04010012 0x04020020 - 0x0404002e 0x04050030 0x0406001e - 0x0407000d 0x04080037 0x04090067 - 0x05010038 0x0502000c 0x0503001b - 0x05040034 0x0505001a 0x05060006 - 0x05080027 0x0509000e 0x050a006f - 0x0600002b 0x0602004e 0x06030068 - 0x06040003 0x0605006d 0x06060009 - 0x06070001 0x0609000f 0x0708002a - 0x0709001d 0x070a0033 >; + MATRIX_KEY(0, 0, 0x1c) + MATRIX_KEY(0, 1, 0x1c) + MATRIX_KEY(0, 4, 0x39) + MATRIX_KEY(0, 5, 0x2c) + MATRIX_KEY(0, 6, 0x15) + MATRIX_KEY(0, 7, 0x0b) + MATRIX_KEY(0, 8, 0x0f) + MATRIX_KEY(1, 0, 0x2d) + MATRIX_KEY(1, 1, 0x11) + MATRIX_KEY(1, 2, 0x2f) + MATRIX_KEY(1, 3, 0x04) + MATRIX_KEY(1, 4, 0x16) + MATRIX_KEY(1, 5, 0x14) + MATRIX_KEY(1, 6, 0x1f) + MATRIX_KEY(1, 7, 0x02) + MATRIX_KEY(1, 10, 0x6a) + MATRIX_KEY(2, 0, 0x13) + MATRIX_KEY(2, 1, 0x10) + MATRIX_KEY(2, 2, 0x19) + MATRIX_KEY(2, 3, 0x07) + MATRIX_KEY(2, 4, 0x18) + MATRIX_KEY(2, 5, 0x31) + MATRIX_KEY(2, 6, 0x32) + MATRIX_KEY(2, 7, 0x05) + MATRIX_KEY(2, 8, 0x28) + MATRIX_KEY(2, 9, 0x6c) + MATRIX_KEY(3, 0, 0x26) + MATRIX_KEY(3, 1, 0x25) + MATRIX_KEY(3, 2, 0x24) + MATRIX_KEY(3, 3, 0x0a) + MATRIX_KEY(3, 4, 0x17) + MATRIX_KEY(3, 5, 0x23) + MATRIX_KEY(3, 6, 0x22) + MATRIX_KEY(3, 7, 0x08) + MATRIX_KEY(3, 8, 0x35) + MATRIX_KEY(3, 9, 0x69) + MATRIX_KEY(4, 0, 0x21) + MATRIX_KEY(4, 1, 0x12) + MATRIX_KEY(4, 2, 0x20) + MATRIX_KEY(4, 4, 0x2e) + MATRIX_KEY(4, 5, 0x30) + MATRIX_KEY(4, 6, 0x1e) + MATRIX_KEY(4, 7, 0x0d) + MATRIX_KEY(4, 8, 0x37) + MATRIX_KEY(4, 9, 0x67) + MATRIX_KEY(5, 1, 0x38) + MATRIX_KEY(5, 2, 0x0c) + MATRIX_KEY(5, 3, 0x1b) + MATRIX_KEY(5, 4, 0x34) + MATRIX_KEY(5, 5, 0x1a) + MATRIX_KEY(5, 6, 0x06) + MATRIX_KEY(5, 8, 0x27) + MATRIX_KEY(5, 9, 0x0e) + MATRIX_KEY(5, 10, 0x6f) + MATRIX_KEY(6, 0, 0x2b) + MATRIX_KEY(6, 2, 0x4e) + MATRIX_KEY(6, 3, 0x68) + MATRIX_KEY(6, 4, 0x03) + MATRIX_KEY(6, 5, 0x6d) + MATRIX_KEY(6, 6, 0x09) + MATRIX_KEY(6, 7, 0x01) + MATRIX_KEY(6, 9, 0x0f) + MATRIX_KEY(7, 8, 0x2a) + MATRIX_KEY(7, 9, 0x1d) + MATRIX_KEY(7, 10, 0x33) + >; }; &vbus_reg { diff --git a/arch/arm/boot/dts/nspire/nspire-tp.dts b/arch/arm/boot/dts/nspire/nspire-tp.dts index f7d0faacd4cc..3f0107f1c2c7 100644 --- a/arch/arm/boot/dts/nspire/nspire-tp.dts +++ b/arch/arm/boot/dts/nspire/nspire-tp.dts @@ -1,37 +1,82 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/boot/nspire-tp.dts - * * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> */ + /dts-v1/; +#include <dt-bindings/input/input.h> + /include/ "nspire-classic.dtsi" &keypad { linux,keymap = < - 0x0000001c 0x0001001c 0x00040039 - 0x0005002c 0x00060015 0x0007000b - 0x0008000f 0x0100002d 0x01010011 - 0x0102002f 0x01030004 0x01040016 - 0x01050014 0x0106001f 0x01070002 - 0x010a006a 0x02000013 0x02010010 - 0x02020019 0x02030007 0x02040018 - 0x02050031 0x02060032 0x02070005 - 0x02080028 0x0209006c 0x03000026 - 0x03010025 0x03020024 0x0303000a - 0x03040017 0x03050023 0x03060022 - 0x03070008 0x03080035 0x03090069 - 0x04000021 0x04010012 0x04020020 - 0x0404002e 0x04050030 0x0406001e - 0x0407000d 0x04080037 0x04090067 - 0x05010038 0x0502000c 0x0503001b - 0x05040034 0x0505001a 0x05060006 - 0x05080027 0x0509000e 0x050a006f - 0x0600002b 0x0602004e 0x06030068 - 0x06040003 0x0605006d 0x06060009 - 0x06070001 0x0609000f 0x0708002a - 0x0709001d 0x070a0033 >; + MATRIX_KEY(0, 0, 0x1c) + MATRIX_KEY(0, 1, 0x1c) + MATRIX_KEY(0, 4, 0x39) + MATRIX_KEY(0, 5, 0x2c) + MATRIX_KEY(0, 6, 0x15) + MATRIX_KEY(0, 7, 0x0b) + MATRIX_KEY(0, 8, 0x0f) + MATRIX_KEY(1, 0, 0x2d) + MATRIX_KEY(1, 1, 0x11) + MATRIX_KEY(1, 2, 0x2f) + MATRIX_KEY(1, 3, 0x04) + MATRIX_KEY(1, 4, 0x16) + MATRIX_KEY(1, 5, 0x14) + MATRIX_KEY(1, 6, 0x1f) + MATRIX_KEY(1, 7, 0x02) + MATRIX_KEY(1, 10, 0x6a) + MATRIX_KEY(2, 0, 0x13) + MATRIX_KEY(2, 1, 0x10) + MATRIX_KEY(2, 2, 0x19) + MATRIX_KEY(2, 3, 0x07) + MATRIX_KEY(2, 4, 0x18) + MATRIX_KEY(2, 5, 0x31) + MATRIX_KEY(2, 6, 0x32) + MATRIX_KEY(2, 7, 0x05) + MATRIX_KEY(2, 8, 0x28) + MATRIX_KEY(2, 9, 0x6c) + MATRIX_KEY(3, 0, 0x26) + MATRIX_KEY(3, 1, 0x25) + MATRIX_KEY(3, 2, 0x24) + MATRIX_KEY(3, 3, 0x0a) + MATRIX_KEY(3, 4, 0x17) + MATRIX_KEY(3, 5, 0x23) + MATRIX_KEY(3, 6, 0x22) + MATRIX_KEY(3, 7, 0x08) + MATRIX_KEY(3, 8, 0x35) + MATRIX_KEY(3, 9, 0x69) + MATRIX_KEY(4, 0, 0x21) + MATRIX_KEY(4, 1, 0x12) + MATRIX_KEY(4, 2, 0x20) + MATRIX_KEY(4, 4, 0x2e) + MATRIX_KEY(4, 5, 0x30) + MATRIX_KEY(4, 6, 0x1e) + MATRIX_KEY(4, 7, 0x0d) + MATRIX_KEY(4, 8, 0x37) + MATRIX_KEY(4, 9, 0x67) + MATRIX_KEY(5, 1, 0x38) + MATRIX_KEY(5, 2, 0x0c) + MATRIX_KEY(5, 3, 0x1b) + MATRIX_KEY(5, 4, 0x34) + MATRIX_KEY(5, 5, 0x1a) + MATRIX_KEY(5, 6, 0x06) + MATRIX_KEY(5, 8, 0x27) + MATRIX_KEY(5, 9, 0x0e) + MATRIX_KEY(5, 10, 0x6f) + MATRIX_KEY(6, 0, 0x2b) + MATRIX_KEY(6, 2, 0x4e) + MATRIX_KEY(6, 3, 0x68) + MATRIX_KEY(6, 4, 0x03) + MATRIX_KEY(6, 5, 0x6d) + MATRIX_KEY(6, 6, 0x09) + MATRIX_KEY(6, 7, 0x01) + MATRIX_KEY(6, 9, 0x0f) + MATRIX_KEY(7, 8, 0x2a) + MATRIX_KEY(7, 9, 0x1d) + MATRIX_KEY(7, 10, 0x33) + >; }; / { diff --git a/arch/arm/boot/dts/nspire/nspire.dtsi b/arch/arm/boot/dts/nspire/nspire.dtsi index 088bcc38589f..d56fef7250db 100644 --- a/arch/arm/boot/dts/nspire/nspire.dtsi +++ b/arch/arm/boot/dts/nspire/nspire.dtsi @@ -1,7 +1,5 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/boot/nspire.dtsi - * * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> */ @@ -11,8 +9,13 @@ interrupt-parent = <&intc>; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "arm,arm926ej-s"; + device_type = "cpu"; + reg = <0>; }; }; @@ -21,8 +24,15 @@ }; sram: sram@a4000000 { - device = "memory"; - reg = <0xa4000000 0x20000>; + compatible = "mmio-sram"; + reg = <0xa4000000 0x20000>; /* 128k */ + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xa4000000 0x20000>; + + sram@0 { + reg = <0x0 0x20000>; + }; }; timer_clk: timer_clk { @@ -59,7 +69,6 @@ compatible = "regulator-fixed"; regulator-name = "USB VBUS output"; - regulator-type = "voltage"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; @@ -172,7 +181,14 @@ }; misc: misc@900a0000 { + compatible = "ti,nspire-misc", "syscon", "simple-mfd"; reg = <0x900a0000 0x1000>; + + reboot { + compatible = "syscon-reboot"; + offset = <0x08>; + value = <0x02>; + }; }; pwr: pwr@900b0000 { diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts b/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts index 9e9eba8bad5e..9f64c85e1c20 100644 --- a/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts +++ b/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts @@ -525,7 +525,7 @@ clock-frequency = <100000>; status = "okay"; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; #address-cells = <1>; #size-cells = <0>; @@ -666,7 +666,7 @@ reg = <0x50>; }; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; #address-cells = <1>; #size-cells = <0>; @@ -727,7 +727,7 @@ clock-frequency = <100000>; status = "okay"; - i2c-switch@73 { + i2c-mux@73 { compatible = "nxp,pca9545"; #address-cells = <1>; #size-cells = <0>; @@ -763,7 +763,7 @@ clock-frequency = <100000>; status = "okay"; - i2c-switch@72 { + i2c-mux@72 { compatible = "nxp,pca9545"; #address-cells = <1>; #size-cells = <0>; @@ -812,7 +812,7 @@ clock-frequency = <100000>; status = "okay"; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; #address-cells = <1>; #size-cells = <0>; @@ -866,7 +866,7 @@ clock-frequency = <100000>; status = "okay"; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9545"; #address-cells = <1>; #size-cells = <0>; @@ -902,7 +902,7 @@ clock-frequency = <100000>; status = "okay"; - i2c-switch@76 { + i2c-mux@76 { compatible = "nxp,pca9545"; #address-cells = <1>; #size-cells = <0>; @@ -961,7 +961,7 @@ clock-frequency = <100000>; status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9545"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gsj.dts b/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gsj.dts index 2a394cc15284..9b1cc7f4adf0 100644 --- a/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gsj.dts +++ b/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gsj.dts @@ -303,7 +303,7 @@ &i2c15 { status = "okay"; - i2c-switch@75 { + i2c-mux@75 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-kudo.dts b/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-kudo.dts index f7b38bee039b..58329adbd918 100644 --- a/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-kudo.dts +++ b/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-kudo.dts @@ -494,7 +494,7 @@ &i2c1 { status = "okay"; - i2c-switch@75 { + i2c-mux@75 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -573,7 +573,7 @@ }; }; }; - i2c-switch@77 { + i2c-mux@77 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -613,7 +613,7 @@ &i2c4 { status = "okay"; - i2c-switch@77 { + i2c-mux@77 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -684,7 +684,7 @@ &i2c13 { status = "okay"; - i2c-switch@77 { + i2c-mux@77 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts index 87359ab05db3..209fa3400317 100644 --- a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts +++ b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts @@ -208,7 +208,7 @@ &i2c1 { status = "okay"; - i2c-switch@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -258,7 +258,7 @@ }; }; - i2c-switch@71 { + i2c-mux@71 { compatible = "nxp,pca9546"; reg = <0x71>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts index 84a3eb38e71d..763ab812eb87 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -271,6 +271,8 @@ }; serial@70006300 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra114-dalmore.dts b/arch/arm/boot/dts/nvidia/tegra114-dalmore.dts index a685fcb129d0..c06b52fe330a 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-dalmore.dts @@ -755,6 +755,8 @@ }; serial@70006300 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra114-roth.dts b/arch/arm/boot/dts/nvidia/tegra114-roth.dts index b9d00009d1f4..a89b16573b42 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-roth.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-roth.dts @@ -779,6 +779,8 @@ /* Usable on reworked devices only */ serial@70006300 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra114-tn7.dts b/arch/arm/boot/dts/nvidia/tegra114-tn7.dts index f02d8c79eee7..bfbdb345575a 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-tn7.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-tn7.dts @@ -50,6 +50,8 @@ }; serial@70006300 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi index 09996acad639..86f14e2fd29f 100644 --- a/arch/arm/boot/dts/nvidia/tegra114.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi @@ -315,7 +315,6 @@ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_UARTA>; resets = <&tegra_car 6>; - reset-names = "serial"; dmas = <&apbdma 8>, <&apbdma 8>; dma-names = "rx", "tx"; status = "disabled"; @@ -328,7 +327,6 @@ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_UARTB>; resets = <&tegra_car 7>; - reset-names = "serial"; dmas = <&apbdma 9>, <&apbdma 9>; dma-names = "rx", "tx"; status = "disabled"; @@ -341,7 +339,6 @@ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_UARTC>; resets = <&tegra_car 55>; - reset-names = "serial"; dmas = <&apbdma 10>, <&apbdma 10>; dma-names = "rx", "tx"; status = "disabled"; @@ -354,7 +351,6 @@ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_UARTD>; resets = <&tegra_car 65>; - reset-names = "serial"; dmas = <&apbdma 19>, <&apbdma 19>; dma-names = "rx", "tx"; status = "disabled"; diff --git a/arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts b/arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts index 2df2d8a6b552..0f3debeb294b 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts +++ b/arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts @@ -52,6 +52,8 @@ /* Apalis UART1 */ serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts b/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts index f4521fd15f6a..d13b8d25ca6a 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts +++ b/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts @@ -53,6 +53,8 @@ /* Apalis UART1 */ serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2.dtsi index 75cfe718737c..54b7da4b6920 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2.dtsi @@ -1557,16 +1557,19 @@ serial@70006040 { compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; serial@70006200 { compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; serial@70006300 { compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; diff --git a/arch/arm/boot/dts/nvidia/tegra124-apalis.dtsi b/arch/arm/boot/dts/nvidia/tegra124-apalis.dtsi index 554c8089491c..c5a0d6aebaec 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra124-apalis.dtsi @@ -1550,16 +1550,19 @@ serial@70006040 { compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; serial@70006200 { compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; serial@70006300 { compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; diff --git a/arch/arm/boot/dts/nvidia/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/nvidia/tegra124-jetson-tk1.dts index 4196f2401c90..f09109be1152 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/nvidia/tegra124-jetson-tk1.dts @@ -1385,6 +1385,7 @@ */ serial@70006000 { compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; status = "okay"; }; @@ -1398,12 +1399,15 @@ */ serial@70006040 { compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; status = "okay"; }; /* DB9 serial port */ serial@70006300 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi b/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi index 0c35ca2e9121..a2ee37180200 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi @@ -70,6 +70,8 @@ serial@70006000 { /* Debug connector on the bottom of the board near SD card. */ + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts b/arch/arm/boot/dts/nvidia/tegra124-venice2.dts index c697301c443c..3924ee385dee 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts +++ b/arch/arm/boot/dts/nvidia/tegra124-venice2.dts @@ -609,6 +609,8 @@ }; serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra124.dtsi b/arch/arm/boot/dts/nvidia/tegra124.dtsi index b3fbecf5c818..8f1fff373461 100644 --- a/arch/arm/boot/dts/nvidia/tegra124.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra124.dtsi @@ -380,7 +380,6 @@ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTA>; resets = <&tegra_car 6>; - reset-names = "serial"; dmas = <&apbdma 8>, <&apbdma 8>; dma-names = "rx", "tx"; status = "disabled"; @@ -393,7 +392,6 @@ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTB>; resets = <&tegra_car 7>; - reset-names = "serial"; dmas = <&apbdma 9>, <&apbdma 9>; dma-names = "rx", "tx"; status = "disabled"; @@ -406,7 +404,6 @@ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTC>; resets = <&tegra_car 55>; - reset-names = "serial"; dmas = <&apbdma 10>, <&apbdma 10>; dma-names = "rx", "tx"; status = "disabled"; @@ -419,7 +416,6 @@ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTD>; resets = <&tegra_car 65>; - reset-names = "serial"; dmas = <&apbdma 19>, <&apbdma 19>; dma-names = "rx", "tx"; status = "disabled"; diff --git a/arch/arm/boot/dts/nvidia/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/nvidia/tegra20-acer-a500-picasso.dts index 08b42952f4de..486fd244291e 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-acer-a500-picasso.dts +++ b/arch/arm/boot/dts/nvidia/tegra20-acer-a500-picasso.dts @@ -393,12 +393,14 @@ uartb: serial@70006040 { compatible = "nvidia,tegra20-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; /* GPS BCM4751 */ }; uartc: serial@70006200 { compatible = "nvidia,tegra20-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; status = "okay"; diff --git a/arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts b/arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts index c2a9c3fb5b33..a3757b7daeda 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts +++ b/arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts @@ -450,12 +450,14 @@ serial@70006040 { compatible = "nvidia,tegra20-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; /* GPS BCM4751 */ }; serial@70006200 { compatible = "nvidia,tegra20-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; status = "okay"; @@ -482,6 +484,8 @@ }; serial@70006300 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra20-colibri-eval-v3.dts b/arch/arm/boot/dts/nvidia/tegra20-colibri-eval-v3.dts index 612f4e54cb20..be2ead4147f2 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/nvidia/tegra20-colibri-eval-v3.dts @@ -102,6 +102,8 @@ /* Colibri UART-A */ serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra20-colibri-iris.dts b/arch/arm/boot/dts/nvidia/tegra20-colibri-iris.dts index 25a9f5dfe62d..1da202ad1ded 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-colibri-iris.dts +++ b/arch/arm/boot/dts/nvidia/tegra20-colibri-iris.dts @@ -102,6 +102,8 @@ /* Colibri UART-A */ serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi b/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi index 0e03910abbe6..16b374e6482f 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi @@ -453,11 +453,13 @@ serial@70006040 { compatible = "nvidia,tegra20-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; serial@70006300 { compatible = "nvidia,tegra20-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; diff --git a/arch/arm/boot/dts/nvidia/tegra20-harmony.dts b/arch/arm/boot/dts/nvidia/tegra20-harmony.dts index 11f21aeba8e9..5c31a6c8dabe 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-harmony.dts +++ b/arch/arm/boot/dts/nvidia/tegra20-harmony.dts @@ -273,6 +273,8 @@ }; serial@70006300 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra20-paz00.dts b/arch/arm/boot/dts/nvidia/tegra20-paz00.dts index e995f428dc2e..afb922bd79a7 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-paz00.dts +++ b/arch/arm/boot/dts/nvidia/tegra20-paz00.dts @@ -279,10 +279,14 @@ }; serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; serial@70006200 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; @@ -307,20 +311,19 @@ clock-frequency = <100000>; }; - nvec@7000c500 { + i2c@7000c500 { compatible = "nvidia,nvec"; - reg = <0x7000c500 0x100>; - interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; + + /delete-property/ #address-cells; + /delete-property/ #size-cells; + /delete-property/ dmas; + /delete-property/ dma-names; + clock-frequency = <80000>; request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; slave-addr = <138>; - clocks = <&tegra_car TEGRA20_CLK_I2C3>, - <&tegra_car TEGRA20_CLK_PLL_P_OUT3>; - clock-names = "div-clk", "fast-clk"; - resets = <&tegra_car 67>; - reset-names = "i2c"; + + status = "okay"; }; i2c@7000d000 { diff --git a/arch/arm/boot/dts/nvidia/tegra20-seaboard.dts b/arch/arm/boot/dts/nvidia/tegra20-seaboard.dts index bd4ff8b40b20..e944ae9b86c2 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/nvidia/tegra20-seaboard.dts @@ -324,6 +324,8 @@ }; serial@70006300 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra20-tamonten.dtsi b/arch/arm/boot/dts/nvidia/tegra20-tamonten.dtsi index ddb84e4a9f8b..5c214dd060bb 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra20-tamonten.dtsi @@ -288,6 +288,8 @@ }; serial@70006300 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra20-trimslice.dts b/arch/arm/boot/dts/nvidia/tegra20-trimslice.dts index 1944121e2dd6..7cae6ad57544 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/nvidia/tegra20-trimslice.dts @@ -276,6 +276,8 @@ }; serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra20-ventana.dts b/arch/arm/boot/dts/nvidia/tegra20-ventana.dts index 433575a6ad38..f3273941437c 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-ventana.dts +++ b/arch/arm/boot/dts/nvidia/tegra20-ventana.dts @@ -323,6 +323,8 @@ }; serial@70006300 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra20.dtsi b/arch/arm/boot/dts/nvidia/tegra20.dtsi index 4177d04265d8..8da75ccc4402 100644 --- a/arch/arm/boot/dts/nvidia/tegra20.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra20.dtsi @@ -442,7 +442,6 @@ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_UARTA>; resets = <&tegra_car 6>; - reset-names = "serial"; dmas = <&apbdma 8>, <&apbdma 8>; dma-names = "rx", "tx"; status = "disabled"; @@ -455,7 +454,6 @@ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_UARTB>; resets = <&tegra_car 7>; - reset-names = "serial"; dmas = <&apbdma 9>, <&apbdma 9>; dma-names = "rx", "tx"; status = "disabled"; @@ -468,7 +466,6 @@ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_UARTC>; resets = <&tegra_car 55>; - reset-names = "serial"; dmas = <&apbdma 10>, <&apbdma 10>; dma-names = "rx", "tx"; status = "disabled"; @@ -481,7 +478,6 @@ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_UARTD>; resets = <&tegra_car 65>; - reset-names = "serial"; dmas = <&apbdma 19>, <&apbdma 19>; dma-names = "rx", "tx"; status = "disabled"; @@ -494,7 +490,6 @@ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_UARTE>; resets = <&tegra_car 66>; - reset-names = "serial"; dmas = <&apbdma 20>, <&apbdma 20>; dma-names = "rx", "tx"; status = "disabled"; diff --git a/arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts b/arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts index 842b5faba285..fc284155cd76 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts +++ b/arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts @@ -59,6 +59,8 @@ /* Apalis UART1 */ serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts b/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts index ca277bf1df78..9d08e2b094b4 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts +++ b/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts @@ -60,6 +60,8 @@ /* Apalis UART1 */ serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1.dtsi b/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1.dtsi index a4b7fe5c3d23..1640763fd4af 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1.dtsi @@ -829,16 +829,19 @@ serial@70006040 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; serial@70006200 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; serial@70006300 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; diff --git a/arch/arm/boot/dts/nvidia/tegra30-apalis.dtsi b/arch/arm/boot/dts/nvidia/tegra30-apalis.dtsi index d73103884000..3b6fad273cab 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra30-apalis.dtsi @@ -820,16 +820,19 @@ serial@70006040 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; serial@70006200 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; serial@70006300 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; diff --git a/arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi b/arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi index c0062353c1f1..a9342e04b14b 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi @@ -798,12 +798,14 @@ uartb: serial@70006040 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; /* GPS BCM4751 */ }; uartc: serial@70006200 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; status = "okay"; @@ -1090,15 +1092,11 @@ display-panel { /* - * Nexus 7 supports two compatible panel models: - * - * 1. hydis,hv070wx2-1e0 - * 2. chunghwa,claa070wp03xg - * - * We want to use timing which is optimized for Nexus 7, - * hence we need to customize the timing. + * Some device variants come with a Hydis HV070WX2-1E0, but + * since they are all largely compatible, we'll go with the + * Chunghwa one here. */ - compatible = "panel-lvds"; + compatible = "chunghwa,claa070wp03xg", "panel-lvds"; width-mm = <94>; height-mm = <150>; diff --git a/arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi b/arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi index bdb898ad6262..ead95306840f 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi @@ -1088,6 +1088,7 @@ serial@70006040 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; status = "okay"; @@ -1096,6 +1097,7 @@ serial@70006200 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; status = "okay"; diff --git a/arch/arm/boot/dts/nvidia/tegra30-beaver.dts b/arch/arm/boot/dts/nvidia/tegra30-beaver.dts index 51769d5132ae..1d74179dde79 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-beaver.dts +++ b/arch/arm/boot/dts/nvidia/tegra30-beaver.dts @@ -1733,6 +1733,8 @@ }; serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra30-cardhu.dtsi b/arch/arm/boot/dts/nvidia/tegra30-cardhu.dtsi index 37a9c5a0ca30..0120859d6d72 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra30-cardhu.dtsi @@ -170,11 +170,14 @@ }; serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; serial@70006200 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/nvidia/tegra30-colibri-eval-v3.dts index 36615c5fda2c..1990bf8e122d 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/nvidia/tegra30-colibri-eval-v3.dts @@ -38,6 +38,8 @@ /* Colibri UART-A */ serial@70006000 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra30-colibri.dtsi b/arch/arm/boot/dts/nvidia/tegra30-colibri.dtsi index ed6106f1bea1..4eb526fe9c55 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra30-colibri.dtsi @@ -710,11 +710,13 @@ serial@70006040 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; serial@70006300 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; }; diff --git a/arch/arm/boot/dts/nvidia/tegra30-ouya.dts b/arch/arm/boot/dts/nvidia/tegra30-ouya.dts index eef27c82987b..7e3de26ca960 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-ouya.dts +++ b/arch/arm/boot/dts/nvidia/tegra30-ouya.dts @@ -2004,6 +2004,7 @@ uartc: serial@70006200 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; status = "okay"; @@ -2033,6 +2034,8 @@ }; uartd: serial@70006300 { + /delete-property/ dmas; + /delete-property/ dma-names; status = "okay"; }; diff --git a/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts b/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts index 8d10eb8b48b9..4012f9c799a8 100644 --- a/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts +++ b/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts @@ -1110,6 +1110,7 @@ uartb: serial@70006040 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; status = "okay"; @@ -1118,6 +1119,7 @@ uartc: serial@70006200 { compatible = "nvidia,tegra30-hsuart"; + reset-names = "serial"; /delete-property/ reg-shift; status = "okay"; @@ -2626,7 +2628,7 @@ }; display-panel { - compatible = "panel-lvds"; + compatible = "hannstar,hsd101pww2", "panel-lvds"; width-mm = <217>; height-mm = <136>; diff --git a/arch/arm/boot/dts/nvidia/tegra30.dtsi b/arch/arm/boot/dts/nvidia/tegra30.dtsi index 9cba67b54111..f866fa7b55a5 100644 --- a/arch/arm/boot/dts/nvidia/tegra30.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra30.dtsi @@ -563,7 +563,6 @@ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_UARTA>; resets = <&tegra_car 6>; - reset-names = "serial"; dmas = <&apbdma 8>, <&apbdma 8>; dma-names = "rx", "tx"; status = "disabled"; @@ -576,7 +575,6 @@ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_UARTB>; resets = <&tegra_car 7>; - reset-names = "serial"; dmas = <&apbdma 9>, <&apbdma 9>; dma-names = "rx", "tx"; status = "disabled"; @@ -589,7 +587,6 @@ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_UARTC>; resets = <&tegra_car 55>; - reset-names = "serial"; dmas = <&apbdma 10>, <&apbdma 10>; dma-names = "rx", "tx"; status = "disabled"; @@ -602,7 +599,6 @@ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_UARTD>; resets = <&tegra_car 65>; - reset-names = "serial"; dmas = <&apbdma 19>, <&apbdma 19>; dma-names = "rx", "tx"; status = "disabled"; @@ -615,7 +611,6 @@ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_UARTE>; resets = <&tegra_car 66>; - reset-names = "serial"; dmas = <&apbdma 20>, <&apbdma 20>; dma-names = "rx", "tx"; status = "disabled"; diff --git a/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts b/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts index 77b21aa7a146..1f11e9542a72 100644 --- a/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts +++ b/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts @@ -58,10 +58,8 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eth>; compatible = "davicom,dm9000"; - reg = < - 4 0x00c00000 0x2 - 4 0x00c00002 0x2 - >; + reg = <4 0x00c00000 0x2>, + <4 0x00c00002 0x2>; interrupt-parent = <&gpio2>; interrupts = <14 IRQ_TYPE_LEVEL_LOW>; fsl,weim-cs-timing = <0x0000c700 0x19190d01>; diff --git a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts index 7d4301b22b90..fc8a502fc957 100644 --- a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts +++ b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts @@ -30,22 +30,15 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_lcd_3v3: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_lcd_3v3>; - regulator-name = "lcd-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_lcd_3v3: regulator-0 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_lcd_3v3>; + regulator-name = "lcd-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; + enable-active-high; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx25-karo-tx25.dts b/arch/arm/boot/dts/nxp/imx/imx25-karo-tx25.dts index 0950eb66d3d9..458b94d3d4ed 100644 --- a/arch/arm/boot/dts/nxp/imx/imx25-karo-tx25.dts +++ b/arch/arm/boot/dts/nxp/imx/imx25-karo-tx25.dts @@ -14,20 +14,13 @@ stdout-path = &uart1; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_fec_phy: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "fec-phy"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio4 9 0>; - enable-active-high; - }; + reg_fec_phy: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "fec-phy"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 9 0>; + enable-active-high; }; memory@80000000 { @@ -39,46 +32,46 @@ &iomuxc { pinctrl_uart1: uart1grp { fsl,pins = < - MX25_PAD_UART1_TXD__UART1_TXD 0x80000000 - MX25_PAD_UART1_RXD__UART1_RXD 0x80000000 - MX25_PAD_UART1_CTS__UART1_CTS 0x80000000 - MX25_PAD_UART1_RTS__UART1_RTS 0x80000000 + MX25_PAD_UART1_TXD__UART1_TXD 0x00000020 + MX25_PAD_UART1_RXD__UART1_RXD 0x000000a0 + MX25_PAD_UART1_CTS__UART1_CTS 0x00000060 + MX25_PAD_UART1_RTS__UART1_RTS 0x000000e0 >; }; pinctrl_fec: fecgrp { fsl,pins = < - MX25_PAD_D11__GPIO_4_9 0x80000000 /* FEC PHY power on pin */ - MX25_PAD_D13__GPIO_4_7 0x80000000 /* FEC reset */ - MX25_PAD_FEC_MDC__FEC_MDC 0x80000000 - MX25_PAD_FEC_MDIO__FEC_MDIO 0x80000000 - MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000 - MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000 - MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 - MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000 - MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000 - MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 - MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000 + MX25_PAD_D11__GPIO_4_9 0x00000021 /* FEC PHY power on pin */ + MX25_PAD_D13__GPIO_4_7 0x000000a1 /* FEC reset */ + MX25_PAD_FEC_MDC__FEC_MDC 0x00000060 + MX25_PAD_FEC_MDIO__FEC_MDIO 0x000001f0 + MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x00000060 + MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x00000060 + MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x00000060 + MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x000000c1 + MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x000000c0 + MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x000000c0 + MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x000000c0 >; }; pinctrl_nfc: nfcgrp { fsl,pins = < - MX25_PAD_NF_CE0__NF_CE0 0x80000000 + MX25_PAD_NF_CE0__NF_CE0 0x00000001 MX25_PAD_NFWE_B__NFWE_B 0x80000000 MX25_PAD_NFRE_B__NFRE_B 0x80000000 MX25_PAD_NFALE__NFALE 0x80000000 MX25_PAD_NFCLE__NFCLE 0x80000000 MX25_PAD_NFWP_B__NFWP_B 0x80000000 - MX25_PAD_NFRB__NFRB 0x80000000 - MX25_PAD_D7__D7 0x80000000 - MX25_PAD_D6__D6 0x80000000 - MX25_PAD_D5__D5 0x80000000 - MX25_PAD_D4__D4 0x80000000 - MX25_PAD_D3__D3 0x80000000 - MX25_PAD_D2__D2 0x80000000 - MX25_PAD_D1__D1 0x80000000 - MX25_PAD_D0__D0 0x80000000 + MX25_PAD_NFRB__NFRB 0x000000e0 + MX25_PAD_D7__D7 0x00000080 + MX25_PAD_D6__D6 0x00000080 + MX25_PAD_D5__D5 0x00000080 + MX25_PAD_D4__D4 0x00000080 + MX25_PAD_D3__D3 0x00000080 + MX25_PAD_D2__D2 0x00000080 + MX25_PAD_D1__D1 0x00000000 + MX25_PAD_D0__D0 0x00000080 >; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx25-pdk.dts b/arch/arm/boot/dts/nxp/imx/imx25-pdk.dts index fb66884d8a2f..04f4b127a172 100644 --- a/arch/arm/boot/dts/nxp/imx/imx25-pdk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx25-pdk.dts @@ -16,45 +16,35 @@ reg = <0x80000000 0x4000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_fec_3v3: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "fec-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio2 3 0>; - enable-active-high; - }; + reg_fec_3v3: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "fec-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 3 0>; + enable-active-high; + }; - reg_2p5v: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "2P5V"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - }; + reg_2p5v: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; - reg_3p3v: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; + reg_3p3v: regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; - reg_can_3v3: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "can-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio4 6 0>; - }; + reg_can_3v3: regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "can-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 6 0>; }; sound { diff --git a/arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts b/arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts index 6f1e8ce9e76e..a21f1f7c24b8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts +++ b/arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts @@ -54,19 +54,12 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_max5821: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "max5821-reg"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-always-on; - }; + reg_max5821: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "max5821-reg"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts b/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts index 9c3ec82ec7e5..145e459625b3 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts +++ b/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts @@ -54,22 +54,15 @@ }; }; - regulators { - #address-cells = <1>; - #size-cells = <0>; - compatible = "simple-bus"; - - reg_lcd: regulator@0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcdreg>; - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "LCD"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 25 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_lcd: regulator-0 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdreg>; + regulator-name = "LCD"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 25 GPIO_ACTIVE_HIGH>; + enable-active-high; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts index 188639738dc3..25442eba21c1 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts @@ -33,19 +33,12 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3v3: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3v3: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts index 344e77790152..7f0cd4d3ec2d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts @@ -37,18 +37,15 @@ }; }; - regulators { - regulator@2 { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_csien>; - reg = <2>; - regulator-name = "CSI_EN"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio2 24 GPIO_ACTIVE_LOW>; - regulator-always-on; - }; + regulator-2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_csien>; + regulator-name = "CSI_EN"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 24 GPIO_ACTIVE_LOW>; + regulator-always-on; }; usbphy { diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi index 3d10273177e9..7191e10712b9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi @@ -15,26 +15,18 @@ reg = <0xa0000000 0x08000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3v3: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; + reg_3v3: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; - reg_5v0: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "5V0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; + reg_5v0: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "5V0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; }; usbphy { diff --git a/arch/arm/boot/dts/nxp/imx/imx27.dtsi b/arch/arm/boot/dts/nxp/imx/imx27.dtsi index e140307be2e7..faba12ee7465 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27.dtsi @@ -534,7 +534,7 @@ clock-names = "ipg", "ahb"; }; - clks: ccm@10027000{ + clks: ccm@10027000 { compatible = "fsl,imx27-ccm"; reg = <0x10027000 0x1000>; #clock-cells = <1>; diff --git a/arch/arm/boot/dts/nxp/imx/imx31.dtsi b/arch/arm/boot/dts/nxp/imx/imx31.dtsi index 95c05f17a6d5..e1ae7c175f7d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx31.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx31.dtsi @@ -232,7 +232,7 @@ reg = <0x53f00000 0x100000>; ranges; - clks: ccm@53f80000{ + clks: ccm@53f80000 { compatible = "fsl,imx31-ccm"; reg = <0x53f80000 0x4000>; interrupts = <31>, <53>; diff --git a/arch/arm/boot/dts/nxp/imx/imx50-evk.dts b/arch/arm/boot/dts/nxp/imx/imx50-evk.dts index 4ea5c23f181b..3f45c01d9cce 100644 --- a/arch/arm/boot/dts/nxp/imx/imx50-evk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx50-evk.dts @@ -23,7 +23,7 @@ cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>, <&gpio4 13 GPIO_ACTIVE_LOW>; status = "okay"; - flash: m25p32@1 { + flash: flash@1 { #address-cells = <1>; #size-cells = <1>; compatible = "m25p32", "jedec,spi-nor"; diff --git a/arch/arm/boot/dts/nxp/imx/imx50-kobo-aura.dts b/arch/arm/boot/dts/nxp/imx/imx50-kobo-aura.dts index 467db6b4ed7f..b1a6a9c58ac3 100644 --- a/arch/arm/boot/dts/nxp/imx/imx50-kobo-aura.dts +++ b/arch/arm/boot/dts/nxp/imx/imx50-kobo-aura.dts @@ -73,7 +73,7 @@ states = <3300000 0>; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - enable-gpio = <&gpio4 12 GPIO_ACTIVE_LOW>; + enable-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; startup-delay-us = <100000>; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx50.dtsi b/arch/arm/boot/dts/nxp/imx/imx50.dtsi index 3d9a9f37f672..c5b25d2f6264 100644 --- a/arch/arm/boot/dts/nxp/imx/imx50.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx50.dtsi @@ -335,7 +335,7 @@ #reset-cells = <1>; }; - clks: ccm@53fd4000{ + clks: ccm@53fd4000 { compatible = "fsl,imx50-ccm"; reg = <0x53fd4000 0x4000>; interrupts = <0 71 0x04 0 72 0x04>; diff --git a/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts b/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts index a1f9c6a72275..16ff543f3fbf 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts +++ b/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts @@ -173,22 +173,15 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_hub_reset: regulator@0 { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotgreg>; - reg = <0>; - regulator-name = "hub_reset"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_hub_reset: regulator-hub-reset { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotgreg>; + regulator-name = "hub_reset"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; + enable-active-high; }; sound { diff --git a/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts index b6d931e96a8f..aff380e999c7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts +++ b/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts @@ -45,21 +45,14 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_can: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "CAN_RST"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; - startup-delay-us = <20000>; - enable-active-high; - }; + reg_can: regulator-can { + compatible = "regulator-fixed"; + regulator-name = "CAN_RST"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; + startup-delay-us = <20000>; + enable-active-high; }; sound { diff --git a/arch/arm/boot/dts/nxp/imx/imx51.dtsi b/arch/arm/boot/dts/nxp/imx/imx51.dtsi index ba92a3ea6872..2b3195f5e32c 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx51.dtsi @@ -455,7 +455,7 @@ #reset-cells = <1>; }; - clks: ccm@73fd4000{ + clks: ccm@73fd4000 { compatible = "fsl,imx51-ccm"; reg = <0x73fd4000 0x4000>; interrupts = <0 71 0x04 0 72 0x04>; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-ard.dts b/arch/arm/boot/dts/nxp/imx/imx53-ard.dts index 23a7492e2929..165e1b00b721 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-ard.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-ard.dts @@ -43,19 +43,12 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; }; gpio-keys { diff --git a/arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi index fe5e0d308e99..00b8d7ca41a2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi @@ -15,28 +15,20 @@ <0xb0000000 0x20000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p2v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P2V"; - regulator-min-microvolt = <3200000>; - regulator-max-microvolt = <3200000>; - regulator-always-on; - }; + reg_3p2v: regulator-3p2v { + compatible = "regulator-fixed"; + regulator-name = "3P2V"; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3200000>; + regulator-always-on; + }; - reg_backlight: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "lcd-supply"; - regulator-min-microvolt = <3200000>; - regulator-max-microvolt = <3200000>; - regulator-always-on; - }; + reg_backlight: regulator-backlight { + compatible = "regulator-fixed"; + regulator-name = "lcd-supply"; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3200000>; + regulator-always-on; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts b/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts index 2bd2432d317f..c323b4dbe9f0 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts @@ -65,28 +65,20 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usbh1_vbus: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 2 0>; - }; + reg_usbh1_vbus: regulator-usbh1-vbus { + compatible = "regulator-fixed"; + regulator-name = "vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 2 0>; + }; - reg_usb_otg_vbus: regulator@4 { - compatible = "regulator-fixed"; - reg = <4>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 4 0>; - }; + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 4 0>; }; sound { diff --git a/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts b/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts index 09eee0dd44c1..6a37616cef1c 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts @@ -38,27 +38,19 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_backlight: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "lcd-supply"; - gpio = <&gpio2 5 0>; - startup-delay-us = <5000>; - }; + reg_backlight: regulator-backlight { + compatible = "regulator-fixed"; + regulator-name = "lcd-supply"; + gpio = <&gpio2 5 0>; + startup-delay-us = <5000>; + }; - reg_3p2v: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "3P2V"; - regulator-min-microvolt = <3200000>; - regulator-max-microvolt = <3200000>; - regulator-always-on; - }; + reg_3p2v: regulator-3p2v { + compatible = "regulator-fixed"; + regulator-name = "3P2V"; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3200000>; + regulator-always-on; }; sound { @@ -169,6 +161,7 @@ codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>; VDDA-supply = <®_3p2v>; VDDIO-supply = <®_3p2v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi index 50fef8dd3675..d80440446473 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi @@ -16,6 +16,13 @@ <0xb0000000 0x20000000>; }; + backlight_parallel: backlight-parallel { + compatible = "pwm-backlight"; + pwms = <&pwm2 0 5000000 0>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <7>; + }; + display0: disp0 { compatible = "fsl,imx-parallel-display"; pinctrl-names = "default"; @@ -80,6 +87,10 @@ panel { compatible = "sii,43wvf1g"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_display_power>; + backlight = <&backlight_parallel>; + enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; port { panel_in: endpoint { @@ -88,29 +99,21 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p2v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P2V"; - regulator-min-microvolt = <3200000>; - regulator-max-microvolt = <3200000>; - regulator-always-on; - }; + reg_3p2v: regulator-3p2v { + compatible = "regulator-fixed"; + regulator-name = "3P2V"; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3200000>; + regulator-always-on; + }; - reg_usb_vbus: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "usb_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio7 8 0>; - enable-active-high; - }; + reg_usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio7 8 0>; + enable-active-high; }; sound { @@ -202,6 +205,12 @@ >; }; + pinctrl_display_power: displaypowergrp { + fsl,pins = < + MX53_PAD_EIM_D24__GPIO3_24 0x1e4 + >; + }; + pinctrl_esdhc1: esdhc1grp { fsl,pins = < MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 @@ -292,6 +301,12 @@ >; }; + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX53_PAD_GPIO_1__PWM2_PWMO 0x5 + >; + }; + pinctrl_vga_sync: vgasync-grp { fsl,pins = < /* VGA_HSYNC, VSYNC with max drive strength */ @@ -367,6 +382,12 @@ status = "okay"; }; +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + &sata { status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-smd.dts b/arch/arm/boot/dts/nxp/imx/imx53-smd.dts index f8d17967a67e..55435dfdff8a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-smd.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-smd.dts @@ -67,10 +67,10 @@ reg = <0>; }; - flash: m25p32@1 { + flash: flash@1 { #address-cells = <1>; #size-cells = <1>; - compatible = "st,m25p32", "st,m25p", "jedec,spi-nor"; + compatible = "st,m25p32", "jedec,spi-nor"; spi-max-frequency = <20000000>; reg = <1>; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi index d930739674a1..294811bfc8d2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi @@ -15,19 +15,12 @@ reg = <0x70000000 0x40000000>; /* Up to 1GiB */ }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi index 24859d0c09c1..c0622cf7188c 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi @@ -15,29 +15,21 @@ <0xb0000000 0x20000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_usb_vbus: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "usb_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 31 0>; /* PEN */ - enable-active-high; - }; + reg_usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 31 0>; /* PEN */ + enable-active-high; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx53.dtsi b/arch/arm/boot/dts/nxp/imx/imx53.dtsi index 17dc13719639..0ebc35e6e985 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx53.dtsi @@ -595,7 +595,7 @@ #reset-cells = <1>; }; - clks: ccm@53fd4000{ + clks: ccm@53fd4000 { compatible = "fsl,imx53-ccm"; reg = <0x53fd4000 0x4000>; interrupts = <0 71 0x04 0 72 0x04>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b105pv2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-b105pv2.dts index 411aa72d344b..7d4ae113c381 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b105pv2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b105pv2.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 or MIT +// SPDX-License-Identifier: GPL-2.0 OR MIT // // Device Tree Source for General Electric B105Pv2 // diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b105v2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-b105v2.dts index d011127c635b..9c5938e16d99 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b105v2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b105v2.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 or MIT +// SPDX-License-Identifier: GPL-2.0 OR MIT // // Device Tree Source for General Electric B105v2 // diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b125pv2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-b125pv2.dts index ca840fa84052..01df7cffcef2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b125pv2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b125pv2.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 or MIT +// SPDX-License-Identifier: GPL-2.0 OR MIT // // Device Tree Source for General Electric B125Pv2 // diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b125v2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-b125v2.dts index 81e5a9cb8900..a015453daf10 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b125v2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b125v2.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 or MIT +// SPDX-License-Identifier: GPL-2.0 OR MIT // // Device Tree Source for General Electric B125v2 // diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b155v2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-b155v2.dts index c861937b30f6..b71ee6b79208 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b155v2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b155v2.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 or MIT +// SPDX-License-Identifier: GPL-2.0 OR MIT // // Device Tree Source for General Electric B155v2 // diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b1x5pv2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-b1x5pv2.dtsi index 37697fac9dea..9f1655540cb9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b1x5pv2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b1x5pv2.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 or MIT +// SPDX-License-Identifier: GPL-2.0 OR MIT // // Device Tree Source for General Electric B1x5Pv2 // patient monitor series @@ -257,7 +257,7 @@ simple-audio-card,bitclock-master = <&dailink_master>; simple-audio-card,frame-master = <&dailink_master>; simple-audio-card,widgets = "Speaker", "Ext Spk"; - simple-audio-card,audio-routing = "Ext Spk", "LINE"; + simple-audio-card,routing = "Ext Spk", "LINE"; simple-audio-card,cpu { sound-dai = <&ssi1>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b1x5v2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-b1x5v2.dtsi index f028b6a191df..590dcc0953cc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b1x5v2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b1x5v2.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 or MIT +// SPDX-License-Identifier: GPL-2.0 OR MIT // // Device Tree Source for General Electric B1x5v2 // patient monitor series diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-emcon-avari.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-emcon-avari.dts index 407ad8d43c84..77d7600b2675 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-emcon-avari.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-emcon-avari.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or MIT) +// SPDX-License-Identifier: (GPL-2.0 OR MIT) // // Copyright (C) 2018 emtrion GmbH // diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi index 05fd8ff4da1e..8a637fdff073 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 or MIT +// SPDX-License-Identifier: GPL-2.0 OR MIT // // Device Tree Source for i.MX6DL based congatec QMX6 // System on Module diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts index 0366d1037ef4..114739d10447 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts @@ -172,6 +172,7 @@ codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts b/arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts index 75586299d9ca..631d6d690959 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts @@ -17,29 +17,21 @@ reg = <0x10000000 0x80000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_usb_otg_vbus: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 0>; - enable-active-high; - }; + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>; + enable-active-high; }; leds { diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts b/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts index 8263bfef9bf8..02648806c275 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts @@ -314,7 +314,6 @@ }; sw3a_reg: sw3a { - compatible = "regulator-fixed"; regulator-name = "DDR_1V5a"; regulator-boot-on; regulator-always-on; @@ -322,7 +321,6 @@ }; sw3b_reg: sw3b { - compatible = "regulator-fixed"; regulator-name = "DDR_1V5b"; regulator-boot-on; regulator-always-on; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi index ead83091e193..99f4f6ac71d4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi @@ -228,6 +228,7 @@ sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&mclk>; VDDA-supply = <®_1p8v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-cm-fx6.dts b/arch/arm/boot/dts/nxp/imx/imx6q-cm-fx6.dts index ffb3b8eeae5d..95b49fc83f7b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-cm-fx6.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-cm-fx6.dts @@ -263,7 +263,7 @@ flash@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "st,m25p", "jedec,spi-nor"; + compatible = "jedec,spi-nor"; spi-max-frequency = <20000000>; reg = <0>; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts index 3815cb660ff7..9f7ac7158c46 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts @@ -28,40 +28,31 @@ reg = <0x10000000 0x80000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_usb_otg_switch: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "usb_otg_switch"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio7 12 0>; - regulator-boot-on; - regulator-always-on; - }; + reg_usb_otg_switch: regulator-usb-otg-switch { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_switch"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio7 12 0>; + regulator-boot-on; + regulator-always-on; + }; - reg_usb_host1: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "usb_host1_en"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 31 0>; - enable-active-high; - }; + reg_usb_host1: regulator-usb-host1 { + compatible = "regulator-fixed"; + regulator-name = "usb_host1_en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 31 0>; + enable-active-high; }; gpio-leds { diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts b/arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts index 137db38f0d27..d2d0a82ea178 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts @@ -96,6 +96,7 @@ sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&sys_mclk>; lrclk-strength = <0x3>; VDDA-supply = <®_1p8v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-emcon-avari.dts b/arch/arm/boot/dts/nxp/imx/imx6q-emcon-avari.dts index 0f582a9d4c0e..02813368a820 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-emcon-avari.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-emcon-avari.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or MIT) +// SPDX-License-Identifier: (GPL-2.0 OR MIT) // // Copyright (C) 2018 emtrion GmbH // diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts b/arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts index 2fda68f9d3f6..ce55c9558679 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts @@ -19,19 +19,12 @@ reg = <0x10000000 0x40000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; }; gpio-keys { diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts b/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts index 0ba802b891b5..c5c144879fa6 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts @@ -67,47 +67,37 @@ status = "okay"; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_1p0v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "1P0V"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; + reg_1p0v: regulator-1p0v { + compatible = "regulator-fixed"; + regulator-name = "1P0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; - reg_3p3v: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_usb_h1_vbus: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; + reg_usb_h1_vbus: regulator-usb-h1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; - reg_usb_otg_vbus: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; + enable-active-high; }; sound { @@ -320,6 +310,7 @@ codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <&sw4_reg>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-h100.dts b/arch/arm/boot/dts/nxp/imx/imx6q-h100.dts index 3fe4591e21f5..a603562ea49a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-h100.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-h100.dts @@ -179,6 +179,7 @@ sgtl5000: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_h100_sgtl5000>; clocks = <&clks IMX6QDL_CLK_CKO>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts b/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts index 109b46a22b5e..fb9f320103c6 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts @@ -196,6 +196,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1_sgtl5000>; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_1p8v>; VDDIO-supply = <®_1p8v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts b/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts index d8fa83effd63..3508a2cd928a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts @@ -359,8 +359,11 @@ keep-power-in-suspend; status = "okay"; - wifi { + #address-cells = <1>; + #size-cells = <0>; + wifi@2 { compatible = "ti,wl1271"; + reg = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wifi>; interrupts-extended = <&gpio1 30 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-tbs2910.dts b/arch/arm/boot/dts/nxp/imx/imx6q-tbs2910.dts index 2f576e2ce73f..7c298d9aa21e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-tbs2910.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-tbs2910.dts @@ -141,6 +141,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgtl5000>; reg = <0x0a>; + #sound-dai-cells = <0>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi index 2577eb4f535a..338d292553ad 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi @@ -181,6 +181,7 @@ codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_3p3v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi index 6b64b2fc3995..db1bc511e71f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi @@ -301,12 +301,12 @@ pinctrl-0 = <&pinctrl_i2c4>; status = "okay"; - eeprom@50{ + eeprom@50 { compatible = "atmel,24c64"; reg = <0x50>; }; - eeprom@57{ + eeprom@57 { compatible = "atmel,24c64"; reg = <0x57>; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi index 570995707504..11d9c7a2dacb 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi @@ -26,7 +26,7 @@ extcon_usbc_det: usbc-det { compatible = "linux,extcon-usb-gpio"; - id-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / USBC_DET */ + id-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / USBC_DET */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbc_det>; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi index 2c1d6f28e695..0a6c3a092b34 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi @@ -2,26 +2,18 @@ #include <dt-bindings/gpio/gpio.h> / { - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - dummy_reg: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "dummy-supply"; - }; + dummy_reg: regulator-dummy { + compatible = "regulator-fixed"; + regulator-name = "dummy-supply"; + }; - reg_usb_otg_vbus: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 0>; - enable-active-high; - }; + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>; + enable-active-high; }; chosen { diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon-avari.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon-avari.dtsi index c4e146f3341b..f1a41c76729c 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon-avari.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon-avari.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or MIT) +// SPDX-License-Identifier: (GPL-2.0 OR MIT) // // Copyright (C) 2018 emtrion GmbH // diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi index ee2dd75cead6..a63e73adc1fc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or MIT) +// SPDX-License-Identifier: (GPL-2.0 OR MIT) // // Copyright (C) 2018 emtrion GmbH // diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi index 47d9a8d08197..535679c27d6f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi @@ -455,6 +455,7 @@ codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_1p8v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi index fb1d29abe099..3e1c572af582 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi @@ -452,6 +452,7 @@ codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_1p8v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi index a642be45ffe2..0ffa0357a6fa 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi @@ -114,57 +114,47 @@ status = "okay"; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_1p0v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "1P0V"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; + reg_1p0v: regulator-1p0v { + compatible = "regulator-fixed"; + regulator-name = "1P0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; - reg_3p3v: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_can1_stby: regulator-can1-stby { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_can1>; - regulator-name = "can1_stby"; - gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; + reg_can1_stby: regulator-can1-stby { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_can1>; + regulator-name = "can1_stby"; + gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; - reg_usb_h1_vbus: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; + reg_usb_h1_vbus: regulator-usb-h1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; - reg_usb_otg_vbus: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; + enable-active-high; }; sound-analog { @@ -509,6 +499,7 @@ sgtl5000: audio-codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <&sw4_reg>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi index 7d032d1f3b47..da0f8dae1ea8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi @@ -36,21 +36,21 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpiobuttons>; - button1 { + button-1 { label = "s6"; linux,code = <KEY_F6>; gpios = <&gpio7 13 GPIO_ACTIVE_LOW>; wakeup-source; }; - button2 { + button-2 { label = "s7"; linux,code = <KEY_F7>; gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; wakeup-source; }; - button3 { + button-3 { label = "s8"; linux,code = <KEY_F8>; gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6a.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6a.dtsi index 27fec340c380..238f3af42822 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6a.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6a.dtsi @@ -15,6 +15,7 @@ lm75: temperature-sensor@49 { compatible = "national,lm75"; reg = <0x49>; + vs-supply = <®_mba6_3p3v>; }; m24c64_57: eeprom@57 { @@ -23,6 +24,7 @@ pagesize = <32>; #address-cells = <1>; #size-cells = <1>; + vcc-supply = <®_mba6_3p3v>; mba_mac_address: mac-address@20 { reg = <0x20 0x6>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6b.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6b.dtsi index 0a9f076eeb36..a587bc88f76f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6b.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6b.dtsi @@ -25,6 +25,7 @@ lm75: temperature-sensor@49 { compatible = "national,lm75"; reg = <0x49>; + vs-supply = <®_mba6_3p3v>; }; m24c64_57: eeprom@57 { @@ -33,6 +34,7 @@ pagesize = <32>; #address-cells = <1>; #size-cells = <1>; + vcc-supply = <®_mba6_3p3v>; mba_mac_address: mac-address@20 { reg = <0x20 0x6>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi index 6d4eab1942b9..f2542d725ce7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi @@ -15,51 +15,41 @@ reg = <0x10000000 0x20000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; + reg_2p5v: regulator-2p5v { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; - reg_2p5v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "2P5V"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-always-on; - }; - - reg_3p3v: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_usb_otg_vbus: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - reg_wlan_vmmc: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wlan_vmmc>; - regulator-name = "reg_wlan_vmmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>; - startup-delay-us = <70000>; - enable-active-high; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_wlan_vmmc: regulator-wlan-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wlan_vmmc>; + regulator-name = "reg_wlan_vmmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>; + startup-delay-us = <70000>; + enable-active-high; }; gpio-keys { @@ -236,6 +226,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgtl5000>; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi index 81a9a302aec1..763831dc0e24 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi @@ -15,83 +15,70 @@ reg = <0x10000000 0xF0000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; + reg_1p8v: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; - reg_1p8v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "1P8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; + reg_2p5v: regulator-2p5v { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; - reg_2p5v: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "2P5V"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_3p3v: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_usb_otg_vbus: regulator-usb-otg { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; - reg_usb_otg_vbus: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_usb_h1_vbus: regulator-usb-h1-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; - reg_usb_h1_vbus: regulator@4 { - compatible = "regulator-fixed"; - reg = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh1>; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - reg_wlan_vmmc: regulator@5 { - compatible = "regulator-fixed"; - reg = <5>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wlan_vmmc>; - regulator-name = "reg_wlan_vmmc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>; - startup-delay-us = <70000>; - enable-active-high; - }; - - reg_can_xcvr: regulator@6 { - compatible = "regulator-fixed"; - reg = <6>; - regulator-name = "CAN XCVR"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_can_xcvr>; - gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; - }; + reg_wlan_vmmc: regulator-wlan-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wlan_vmmc>; + regulator-name = "reg_wlan_vmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>; + startup-delay-us = <70000>; + enable-active-high; + }; + + reg_can_xcvr: regulator-can-xcvr { + compatible = "regulator-fixed"; + regulator-name = "CAN XCVR"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can_xcvr>; + gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; }; gpio-keys { @@ -378,6 +365,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgtl5000>; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi index 000e9dc97b1a..414196b75991 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi @@ -286,6 +286,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgtl5000>; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi index 731759bdd7f5..f278b14911ce 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi @@ -17,74 +17,62 @@ reg = <0x10000000 0x40000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; + reg_2p5v: regulator-2p5v { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; - reg_2p5v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "2P5V"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_3p3v: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_usb_otg_vbus: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 0>; - enable-active-high; - }; - - reg_can_xcvr: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "CAN XCVR"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_can_xcvr>; - gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; - }; - - reg_wlan_vmmc: regulator@4 { - compatible = "regulator-fixed"; - reg = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wlan_vmmc>; - regulator-name = "reg_wlan_vmmc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>; - startup-delay-us = <70000>; - enable-active-high; - }; - - reg_usb_h1_vbus: regulator@5 { - compatible = "regulator-fixed"; - reg = <5>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh1>; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>; + enable-active-high; + }; + + reg_can_xcvr: regulator-can-xcvr { + compatible = "regulator-fixed"; + regulator-name = "CAN XCVR"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can_xcvr>; + gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; + }; + + reg_wlan_vmmc: regulator-wlan-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wlan_vmmc>; + regulator-name = "reg_wlan_vmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>; + startup-delay-us = <70000>; + enable-active-high; + }; + + reg_usb_h1_vbus: regulator-usb-h1-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; + enable-active-high; }; gpio-keys { @@ -309,6 +297,7 @@ codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pbab01.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pbab01.dtsi index a41e47c06ef4..e40041871b28 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pbab01.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pbab01.dtsi @@ -10,22 +10,18 @@ stdout-path = &uart4; }; - regulators { - sound_1v8: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "i2s-audio-1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; + sound_1v8: regulator-sound-1v8 { + compatible = "regulator-fixed"; + regulator-name = "i2s-audio-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; - sound_3v3: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "i2s-audio-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; + sound_3v3: regulator-sound-3v3 { + compatible = "regulator-fixed"; + regulator-name = "i2s-audio-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; }; tlv320_mclk: oscillator { diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi index 80adb2a02cc9..113974520d54 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi @@ -14,32 +14,24 @@ reg = <0x10000000 0x80000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb_otg_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio4 15 0>; - enable-active-high; - }; + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio4 15 0>; + enable-active-high; + }; - reg_usb_h1_vbus: regulator@1 { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh1_vbus>; - reg = <1>; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 0 0>; - enable-active-high; - }; + reg_usb_h1_vbus: regulator-usb-h1-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1_vbus>; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 0 0>; + enable-active-high; }; gpio_leds: leds { @@ -464,3 +456,11 @@ vmmc-supply = <&vdd_sd0_reg>; status = "disabled"; }; + +&wdog1 { + /* + * Rely on PMIC reboot handler. Internal i.MX6 watchdog, that is also + * used for reboot, does not reset all external PMIC voltages on reset. + */ + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi index 28a805384668..86b4269e0e01 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi @@ -309,3 +309,11 @@ >; }; }; + +&wdog1 { + /* + * Rely on PMIC reboot handler. Internal i.MX6 watchdog, that is also + * used for reboot, does not reset all external PMIC voltages on reset. + */ + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi index f804ff95a6ad..eba698d04243 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi @@ -13,41 +13,32 @@ stdout-path = &uart1; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_usbh1_vbus: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - pinctrl-names = "default"; - regulator-name = "usbh1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_usbh1_vbus: regulator-usbh1-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + regulator-name = "usbh1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; - reg_usb_otg_vbus: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - pinctrl-names = "default"; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_usb_otg_vbus: regulator-otg-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; + enable-active-high; }; leds { @@ -120,6 +111,7 @@ codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_3p3v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi index 12573e1f917c..84c8a9531e18 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi @@ -24,88 +24,74 @@ reg = <0x10000000 0x40000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; + reg_2p5v: regulator-2p5v { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; - reg_2p5v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "2P5V"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_3p3v: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_usb_otg_vbus: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 0>; - enable-active-high; - }; - - reg_can_xcvr: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "CAN XCVR"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_can_xcvr>; - gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; - }; - - reg_1p5v: regulator@4 { - compatible = "regulator-fixed"; - reg = <4>; - regulator-name = "1P5V"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - }; - - reg_1p8v: regulator@5 { - compatible = "regulator-fixed"; - reg = <5>; - regulator-name = "1P8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - reg_2p8v: regulator@6 { - compatible = "regulator-fixed"; - reg = <6>; - regulator-name = "2P8V"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - }; - - reg_usb_h1_vbus: regulator@7 { - compatible = "regulator-fixed"; - reg = <7>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh1>; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>; + enable-active-high; + }; + + reg_can_xcvr: regulator-can-xcvr { + compatible = "regulator-fixed"; + regulator-name = "CAN XCVR"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can_xcvr>; + gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; + }; + + reg_1p5v: regulator-1p5v { + compatible = "regulator-fixed"; + regulator-name = "1P5V"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_2p8v: regulator-2p8v { + compatible = "regulator-fixed"; + regulator-name = "2P8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + reg_usb_h1_vbus: regulator-usb-h1-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; + enable-active-high; }; mipi_xclk: mipi_xclk { @@ -334,6 +320,7 @@ codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi index aff46f3040c1..68525f0205d3 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi @@ -30,6 +30,7 @@ sensor@48 { compatible = "national,lm75"; reg = <0x48>; + vs-supply = <®_3p3v>; }; eeprom@50 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi index a3f6543c3aaa..aeba0a273600 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi @@ -23,6 +23,7 @@ sensor@48 { compatible = "national,lm75"; reg = <0x48>; + vs-supply = <®_3p3v>; }; eeprom@50 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi index 1e0a041e9f60..e2db875b61c4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi @@ -235,6 +235,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgtl5000>; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_3p3v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi index 93a8123da27d..647ba5e623dd 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi @@ -59,29 +59,21 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb_h1_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */ - gpio = <&gpio7 12 0>; - }; + reg_usb_h1_vbus: regulator-usb-h1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */ + gpio = <&gpio7 12 0>; + }; - reg_panel: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "lcd_panel"; - enable-active-high; - gpio = <&gpio1 2 0>; - }; + reg_panel: regulator-panel { + compatible = "regulator-fixed"; + regulator-name = "lcd_panel"; + enable-active-high; + gpio = <&gpio1 2 0>; }; sound { diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi index e4f63423d8ee..38abb6b50f6c 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi @@ -119,6 +119,7 @@ pinctrl-0 = <&pinctrl_mclk>; compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts b/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts index a2c79bcf9a11..cd9cbc9ccc9e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts @@ -72,7 +72,6 @@ pinctrl-0 = <&pinctrl_reg_wlan>; compatible = "regulator-fixed"; clocks = <&clks IMX6SX_CLK_CKO>; - clock-names = "slow"; regulator-name = "wlan-en"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -196,6 +195,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgtl5000>; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks IMX6SX_CLK_CKO2>; VDDA-supply = <®_1p8v>; VDDIO-supply = <®_1p8v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi index a05069d49cb8..f6b35923ad83 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -221,7 +221,7 @@ clocks = <&clks IMX6SX_CLK_APBH_DMA>; }; - gpmi: nand-controller@1806000{ + gpmi: nand-controller@1806000 { compatible = "fsl,imx6sx-gpmi-nand"; #address-cells = <1>; #size-cells = <1>; @@ -1311,6 +1311,10 @@ <&clks IMX6SX_CLK_LCDIF_APB>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pix", "axi", "disp_axi"; + assigned-clocks = <&clks IMX6SX_CLK_LCDIF1_PRE_SEL>, + <&clks IMX6SX_CLK_LCDIF1_SEL>; + assigned-clock-parents = <&clks IMX6SX_CLK_PLL5_VIDEO_DIV>, + <&clks IMX6SX_CLK_LCDIF1_PODF>; power-domains = <&pd_disp>; status = "disabled"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi index 155515fe13fa..2ac40d69425b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi @@ -442,14 +442,14 @@ >; }; - pinctrl_flexcan1: flexcan1grp{ + pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 >; }; - pinctrl_flexcan2: flexcan2grp{ + pinctrl_flexcan2: flexcan2grp { fsl,pins = < MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcexpress.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcexpress.dts index 3792679c0c90..ad7f63ca521a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcexpress.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcexpress.dts @@ -145,7 +145,7 @@ >; }; - pinctrl_flexcan1: flexcan1grp{ + pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x1b020 MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x1b020 diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts index 3ec042bfccba..1762bc47e18d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts @@ -291,20 +291,20 @@ >; }; - pinctrl_flexcan1: flexcan1grp{ + pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 >; }; - pinctrl_flexcan2: flexcan2grp{ + pinctrl_flexcan2: flexcan2grp { fsl,pins = < MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 >; }; - pinctrl_goodix_touch: goodixgrp{ + pinctrl_goodix_touch: goodixgrp { fsl,pins = < MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1020 >; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsom.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsom.dtsi index 7d1a391431bd..4a03ea6d24dc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsom.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsom.dtsi @@ -114,7 +114,6 @@ }; vdda_adc_3v3: vldo1 { - compatible = "regulator-fixed"; regulator-name = "vref-adc-3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts index a0097da03f38..875ae699c5cb 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts @@ -148,7 +148,6 @@ reg = <0x0a>; #sound-dai-cells = <0>; clocks = <&clks IMX6UL_CLK_OSC>; - clock-names = "mclk"; VDDA-supply = <®_3p3v>; VDDIO-supply = <®_3p3v>; VDDD-supply = <®_1p8v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi index 43868311f48a..33d5f27285a4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi @@ -272,7 +272,7 @@ >; }; - pinctrl_flexcan2: flexcan2grp{ + pinctrl_flexcan2: flexcan2grp { fsl,pins = < MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-pico-dwarf.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-pico-dwarf.dts index 5a74c7f68eb6..fb206c1d8aca 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-pico-dwarf.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-pico-dwarf.dts @@ -40,6 +40,7 @@ sgtl5000: audio-codec@a { reg = <0x0a>; compatible = "fsl,sgtl5000"; + #sound-dai-cells = <0>; clocks = <&sys_mclk>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-pico-hobbit.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-pico-hobbit.dts index 09f7ffa9ad8c..bf7dbb4f1f3e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-pico-hobbit.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-pico-hobbit.dts @@ -51,6 +51,7 @@ sgtl5000: codec@a { reg = <0x0a>; compatible = "fsl,sgtl5000"; + #sound-dai-cells = <0>; clocks = <&sys_mclk>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-pico-pi.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-pico-pi.dts index 6cd7d5877d20..6cfc943a8fa3 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-pico-pi.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-pico-pi.dts @@ -51,6 +51,7 @@ sgtl5000: codec@a { reg = <0x0a>; compatible = "fsl,sgtl5000"; + #sound-dai-cells = <0>; clocks = <&sys_mclk>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts index 92ac0edcb608..ef76ece21010 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts @@ -133,7 +133,7 @@ pinctrl-0 = <&pinctrl_disp0_3>; }; -®_usbotg_vbus{ +®_usbotg_vbus { status = "disabled"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index 0174f3edbd16..3b87d980e9f4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -179,7 +179,7 @@ gpmi: nand-controller@1806000 { compatible = "fsl,imx6q-gpmi-nand"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; reg = <0x01806000 0x2000>, <0x01808000 0x2000>; reg-names = "gpmi-nand", "bch"; interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi index fde8a19aac0f..ec3c1e7301f4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi @@ -102,7 +102,6 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "+V3.3_ETH"; - regulator-type = "voltage"; vin-supply = <®_module_3v3>; clocks = <&clks IMX6UL_CLK_ENET2_REF_125M>; startup-delay-us = <150000>; diff --git a/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi index 104580d51d74..9fe51884af79 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi @@ -29,7 +29,7 @@ extcon_usbc_det: usbc-det { compatible = "linux,extcon-usb-gpio"; - id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / USBC_DET */ + id-gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / USBC_DET */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbc_det>; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-pico-dwarf.dts b/arch/arm/boot/dts/nxp/imx/imx7d-pico-dwarf.dts index fdc10563f147..12361fcbe24a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-pico-dwarf.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-pico-dwarf.dts @@ -40,6 +40,7 @@ sgtl5000: audio-codec@a { reg = <0x0a>; compatible = "fsl,sgtl5000"; + #sound-dai-cells = <0>; clocks = <&sys_mclk>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-pico-nymph.dts b/arch/arm/boot/dts/nxp/imx/imx7d-pico-nymph.dts index 5afb1674e012..af26284297a2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-pico-nymph.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-pico-nymph.dts @@ -51,6 +51,7 @@ sgtl5000: audio-codec@a { reg = <0x0a>; compatible = "fsl,sgtl5000"; + #sound-dai-cells = <0>; clocks = <&sys_mclk>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi b/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi index 73d90845e85c..c5eefe89cd99 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi @@ -509,7 +509,7 @@ >; }; - pinctrl_pwm4: pwm4grp{ + pinctrl_pwm4: pwm4grp { fsl,pins = < MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x7f >; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts b/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts index 75f1cd14bea1..0462e43ec09b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts @@ -10,6 +10,11 @@ model = "Freescale i.MX7 SabreSD Board"; compatible = "fsl,imx7d-sdb", "fsl,imx7d"; + aliases { + ethernet0 = &fec1; + ethernet1 = &fec2; + }; + chosen { stdout-path = &uart1; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx7s.dtsi b/arch/arm/boot/dts/nxp/imx/imx7s.dtsi index 6ffb428dc939..e152d08f27d4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7s.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7s.dtsi @@ -1275,7 +1275,7 @@ clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>; }; - gpmi: nand-controller@33002000{ + gpmi: nand-controller@33002000 { compatible = "fsl,imx7d-gpmi-nand"; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi b/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi index e3b2d23068f7..ebf97fcdd8ea 100644 --- a/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi @@ -277,10 +277,9 @@ reg = <0x41>; interrupts = <21 IRQ_TYPE_EDGE_FALLING>; interrupt-parent = <&gpio4>; - interrupt-controller; status = "disabled"; - stmpe_touchscreen { + touchscreen { compatible = "st,stmpe-ts"; st,adc-freq = <1>; /* 3.25 MHz ADC clock speed */ st,ave-ctrl = <3>; /* 8 sample average control */ diff --git a/arch/arm/boot/dts/nxp/ls/Makefile b/arch/arm/boot/dts/nxp/ls/Makefile index 3cb1d516f6fb..14759331dba2 100644 --- a/arch/arm/boot/dts/nxp/ls/Makefile +++ b/arch/arm/boot/dts/nxp/ls/Makefile @@ -3,5 +3,6 @@ dtb-$(CONFIG_SOC_LS1021A) += \ ls1021a-iot.dtb \ ls1021a-moxa-uc-8410a.dtb \ ls1021a-qds.dtb \ + ls1021a-tqmls1021a-mbls1021a.dtb \ ls1021a-tsn.dtb \ ls1021a-twr.dtb diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-iot.dts b/arch/arm/boot/dts/nxp/ls/ls1021a-iot.dts index ce8e26d7791f..e13ccae629a7 100644 --- a/arch/arm/boot/dts/nxp/ls/ls1021a-iot.dts +++ b/arch/arm/boot/dts/nxp/ls/ls1021a-iot.dts @@ -62,19 +62,19 @@ }; }; -&can0{ +&can0 { status = "disabled"; }; -&can1{ +&can1 { status = "disabled"; }; -&can2{ +&can2 { status = "disabled"; }; -&can3{ +&can3 { status = "okay"; }; @@ -125,7 +125,7 @@ status = "okay"; }; -&esdhc{ +&esdhc { status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a.dts b/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a.dts new file mode 100644 index 000000000000..34636fcdfd6a --- /dev/null +++ b/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a.dts @@ -0,0 +1,405 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR X11) +/* + * Copyright 2013-2014 Freescale Semiconductor, Inc. + * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, + * D-82229 Seefeld, Germany. + * Author: Alexander Stein + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/leds/leds-pca9532.h> +#include <dt-bindings/net/ti-dp83867.h> + +#include "ls1021a-tqmls1021a.dtsi" + +/ { + model = "TQMLS102xA SOM on MBLS102xA"; + compatible = "tq,ls1021a-tqmls1021a-mbls102xa", "tq,ls1021a-tqmls1021a", "fsl,ls1021a"; + + audio_mclk: audio-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + backlight_dcu: backlight { + compatible = "gpio-backlight"; + gpios = <&pca9530 0 GPIO_ACTIVE_LOW>; + status = "disabled"; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + + switch-1 { + label = "S6"; + linux,code = <BTN_0>; + gpios = <&pca9554_0 0 GPIO_ACTIVE_LOW>; + }; + + btn2: switch-2 { + label = "S7"; + linux,code = <BTN_1>; + gpios = <&pca9554_0 1 GPIO_ACTIVE_LOW>; + }; + + switch-3 { + label = "S8"; + linux,code = <BTN_2>; + gpios = <&pca9554_0 2 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_leds: gpio-leds { + compatible = "gpio-leds"; + + led-0 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_STATUS; + function-enumerator = <0>; + gpios = <&pca9554_2 4 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + + led-1 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_STATUS; + function-enumerator = <1>; + gpios = <&pca9554_2 5 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + + led-2 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_STATUS; + function-enumerator = <2>; + gpios = <&pca9554_2 6 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + + led-3 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_HEARTBEAT; + function-enumerator = <0>; + gpios = <&pca9554_2 7 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; + }; + + lvds_encoder: lvds-encoder { + compatible = "ti,sn75lvds83", "lvds-encoder"; + power-supply = <®_3p3v>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lvds_encoder_in: endpoint {}; + }; + + port@1 { + reg = <1>; + + lvds_encoder_out: endpoint {}; + }; + }; + }; + + reg_1p2v: regulator-1p2v { + compatible = "regulator-fixed"; + regulator-name = "1P2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + vin-supply = <®_3p3v>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + hdmi_out: hdmi { + compatible = "hdmi-connector"; + type = "a"; + ddc-i2c-bus = <&i2c0>; + status = "disabled"; + + port { + hdmi_in: endpoint { + remote-endpoint = <&sii9022a_out>; + }; + }; + }; + + display: panel { + backlight = <&backlight_dcu>; + enable-gpios = <&pca9554_1 3 GPIO_ACTIVE_HIGH>; + status = "disabled"; + + port { + panel_in: endpoint {}; + }; + }; + + sound { + compatible = "fsl,imx-audio-tlv320aic32x4"; + model = "ls1021a-mbls1021a-tlv320aic32"; + ssi-controller = <&sai1>; + audio-codec = <&tlv320aic32x4>; + }; + +}; + +&can0 { + xceiver-supply = <®_3p3v>; + status = "okay"; +}; + +&can1 { + xceiver-supply = <®_3p3v>; + status = "okay"; +}; + +&dspi0 { + status = "okay"; +}; + +&enet0 { + phy-handle = <&rgmii_phy0c>; + phy-mode = "rgmii-id"; + mac-address = [ 00 00 00 00 00 00 ]; + status = "okay"; +}; + +&enet1 { + tbi-handle = <&tbi1>; + phy-handle = <&sgmii_phy03>; + phy-mode = "sgmii"; + mac-address = [ 00 00 00 00 00 00 ]; + status = "okay"; +}; + +&enet2 { + phy-handle = <&rgmii_phy04>; + phy-mode = "rgmii-id"; + mac-address = [ 00 00 00 00 00 00 ]; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + tlv320aic32x4: audio-codec@18 { + compatible = "ti,tlv320aic32x4"; + reg = <0x18>; + clocks = <&audio_mclk>; + clock-names = "mclk"; + ldoin-supply = <®_3p3v>; + iov-supply = <®_3p3v>; + }; + + pca9554_0: gpio-expander@20 { + compatible = "nxp,pca9554"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <24 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + vcc-supply = <®_3p3v>; + gpio-line-names = "BUTTON0", "BUTTON1", + "BUTTON2", "EMMC_SEL", + "DIP2", "DIP3", + "EXT_TOUCH_INT", "GPIO_1"; + }; + + pca9554_1: gpio-expander@21 { + compatible = "nxp,pca9554"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + vcc-supply = <®_3p3v>; + gpio-line-names = "PCIE_PWR_EN", "MPCIE_DISABLE#", + "MPCIE_WAKE#", "LCD_BLT_EN", + "LCD_PWR_EN", "EC1_PHY_PWDN", + "EC3_PHY_PWDN", "SGMII_PHY_PWDN"; + }; + + pca9554_2: gpio-expander@22 { + compatible = "nxp,pca9554"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&extirq>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + vcc-supply = <®_3p3v>; + gpio-line-names = "MUX_SEL0", "MUX_SEL1", + "MUX_SEL2", "MUX_SEL3", + "V95", "V96", "V97", "V98"; + }; + + sii9022a: hdmi-transmitter@3b { + compatible = "sil,sii9022"; + reg = <0x3b>; + iovcc-supply = <®_3p3v>; + cvcc12-supply = <®_1p2v>; + interrupts = <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>; + #sound-dai-cells = <0>; + sil,i2s-data-lanes = <0>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + sii9022a_in: endpoint {}; + }; + + port@1 { + reg = <1>; + + sii9022a_out: endpoint { + remote-endpoint = <&hdmi_in>; + }; + }; + }; + }; + + stmpe811: port-expander@41 { + compatible = "st,stmpe811"; + reg = <0x41>; + interrupt-parent = <&gpio0>; + interrupts = <23 IRQ_TYPE_EDGE_FALLING>; + vcc-supply = <®_3p3v>; + vio-supply = <®_3p3v>; + + gpio { + compatible = "st,stmpe-gpio"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + /* GPIO 5-7 used for touch */ + st,norequest-mask = <0xf0>; + gpio-line-names = "GPIO_ADC_I2C1_1", + "GPIO_ADC_I2C1_2", + "GPIO_ADC_I2C1_3", + "GPIO_ADC_I2C1_4"; + }; + + touchscreen { + compatible = "st,stmpe-ts"; + status = "disabled"; + }; + }; + + pca9530: leds@60 { + compatible = "nxp,pca9530"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "PWM_0", "PWM_1"; + + led-0 { + type = <PCA9532_TYPE_GPIO>; + }; + + led-1 { + type = <PCA9532_TYPE_GPIO>; + }; + }; + +}; + +&i2c1 { + status = "okay"; +}; + +&lpuart0 { + linux,rs485-enabled-at-boot-time; + status = "okay"; +}; + +&mdio0 { + sgmii_phy03: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x03>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; + ti,dp83867-rxctrl-strap-quirk; + }; + + rgmii_phy04: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x04>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>; + ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; + }; + + rgmii_phy0c: ethernet-phy@c { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0c>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>; + ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; + }; +}; + +&pwm6 { + status = "okay"; +}; + +&pwm7 { + status = "okay"; +}; + +&sai1 { + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&usb3 { + /* + * Although DR connector, VBUS is always driven, so + * restrict to host mode. + */ + dr_mode = "host"; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a.dtsi b/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a.dtsi new file mode 100644 index 000000000000..1b13851ad997 --- /dev/null +++ b/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a.dtsi @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR X11) +/* + * Copyright 2013-2014 Freescale Semiconductor, Inc. + * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, + * D-82229 Seefeld, Germany. + * Author: Alexander Stein + */ + +#include "ls1021a.dtsi" + +/ { + model = "TQMLS102xA SOM"; + compatible = "tq,ls1021a-tqmls1021a", "fsl,ls1021a"; + + reg_3p3v_som: regulator-3p3v-som { + compatible = "regulator-fixed"; + regulator-name = "3P3V_SOM"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; +}; + +&esdhc { + /* e-MMC over 8 data lines */ + bus-width = <8>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + /* MC34VR500 DC/DC regulator at 0x8, managed by PMIC */ + /* On-board PMC at 0x11 */ + + sa56004: temperature-sensor@4c { + compatible = "nxp,sa56004"; + reg = <0x4c>; + vcc-supply = <®_3p3v_som>; + }; + + rtc0: rtc@51 { + compatible = "nxp,pcf85063a"; + reg = <0x51>; + quartz-load-femtofarads = <12500>; + }; + + m24c64_54: eeprom@54 { + compatible = "atmel,24c64"; + reg = <0x54>; + pagesize = <32>; + read-only; + vcc-supply = <®_3p3v_som>; + }; +}; + +&mdio0 { + tbi1: tbi-phy@8 { + reg = <0x8>; + device_type = "tbi-phy"; + }; +}; + +&qspi { + status = "okay"; + + qflash0: flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <20000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + uboot@0 { + label = "U-Boot-PBL"; + reg = <0x0 0xe0000>; + }; + + env@e0000 { + label = "U-Boot Environment"; + reg = <0xe0000 0x10000>; + }; + + dtb@f0000 { + label = "DTB"; + reg = <0xf0000 0x10000>; + }; + + linux@100000 { + label = "Linux"; + reg = <0x100000 0x700000>; + }; + + rootfs@800000 { + label = "RootFS"; + reg = <0x800000 0x3800000>; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/nxp/mxs/imx23-olinuxino.dts b/arch/arm/boot/dts/nxp/mxs/imx23-olinuxino.dts index 0729e72f2283..229e727b222e 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx23-olinuxino.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx23-olinuxino.dts @@ -101,21 +101,14 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb0_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb0_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - startup-delay-us = <300>; /* LAN9215 requires a POR of 200us minimum */ - gpio = <&gpio0 17 0>; - }; + reg_usb0_vbus: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "usb0_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + startup-delay-us = <300>; /* LAN9215 requires a POR of 200us minimum */ + gpio = <&gpio0 17 0>; }; leds { diff --git a/arch/arm/boot/dts/nxp/mxs/imx23-stmp378x_devb.dts b/arch/arm/boot/dts/nxp/mxs/imx23-stmp378x_devb.dts index da4b88f32eaa..69124ba6a666 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx23-stmp378x_devb.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx23-stmp378x_devb.dts @@ -59,18 +59,11 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_vddio_sd0: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "vddio-sd0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio1 29 0>; - }; + reg_vddio_sd0: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "vddio-sd0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 29 0>; }; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx23.dtsi b/arch/arm/boot/dts/nxp/mxs/imx23.dtsi index a3668a0827fc..5eca942a52fd 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx23.dtsi +++ b/arch/arm/boot/dts/nxp/mxs/imx23.dtsi @@ -62,8 +62,8 @@ dma_apbh: dma-controller@80004000 { compatible = "fsl,imx23-dma-apbh"; reg = <0x80004000 0x2000>; - interrupts = <0 14 20 0 - 13 13 13 13>; + interrupts = <0>, <14>, <20>, <0>, + <13>, <13>, <13>, <13>; #dma-cells = <1>; dma-channels = <8>; clocks = <&clks 15>; @@ -415,10 +415,10 @@ dma_apbx: dma-apbx@80024000 { compatible = "fsl,imx23-dma-apbx"; reg = <0x80024000 0x2000>; - interrupts = <7 5 9 26 - 19 0 25 23 - 60 58 9 0 - 0 0 0 0>; + interrupts = <7>, <5>, <9>, <26>, + <19>, <0>, <25>, <23>, + <60>, <58>, <9>, <0>, + <0>, <0>, <0>, <0>; interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c", "saif0", "empty", "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx", "saif1", "empty", @@ -431,7 +431,7 @@ dcp: crypto@80028000 { compatible = "fsl,imx23-dcp"; reg = <0x80028000 0x2000>; - interrupts = <53 54>; + interrupts = <53>, <54>; status = "okay"; }; @@ -456,7 +456,7 @@ lcdif@80030000 { compatible = "fsl,imx23-lcdif"; reg = <0x80030000 2000>; - interrupts = <46 45>; + interrupts = <46>, <45>; clocks = <&clks 38>; status = "disabled"; }; @@ -525,7 +525,8 @@ lradc: lradc@80050000 { compatible = "fsl,imx23-lradc"; reg = <0x80050000 0x2000>; - interrupts = <36 37 38 39 40 41 42 43 44>; + interrupts = <36>, <37>, <38>, <39>, <40>, + <41>, <42>, <43>, <44>; status = "disabled"; clocks = <&clks 26>; #io-channel-cells = <1>; @@ -568,7 +569,7 @@ timrot@80068000 { compatible = "fsl,imx23-timrot", "fsl,timrot"; reg = <0x80068000 0x2000>; - interrupts = <28 29 30 31>; + interrupts = <28>, <29>, <30>, <31>; clocks = <&clks 28>; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-apf28dev.dts b/arch/arm/boot/dts/nxp/mxs/imx28-apf28dev.dts index 4704b6141836..fd6fee63ad2f 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-apf28dev.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-apf28dev.dts @@ -10,28 +10,20 @@ model = "Armadeus Systems APF28Dev docking/development board"; compatible = "armadeus,imx28-apf28dev", "armadeus,imx28-apf28", "fsl,imx28"; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb0_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb0_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 23 1>; - enable-active-high; - }; + reg_usb0_vbus: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "usb0_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 23 1>; + enable-active-high; + }; - reg_can0_vcc: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "can0_vcc"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; + reg_can0_vcc: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "can0_vcc"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; }; leds { diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10037.dts b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10037.dts index d3e9a731525b..c72fe2d392f1 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10037.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10037.dts @@ -64,20 +64,13 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb1_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&usb_pins_cfa10037>; - regulator-name = "usb1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio0 7 1>; - }; + reg_usb1_vbus: regulator-0 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&usb_pins_cfa10037>; + regulator-name = "usb1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio0 7 1>; }; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10049.dts b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10049.dts index c5a7f56d83db..953e3162d2d2 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10049.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10049.dts @@ -78,21 +78,14 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb1_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&usb_pins_cfa10049>; - regulator-name = "usb1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio0 7 1>; - }; + reg_usb1_vbus: regulator-0 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&usb_pins_cfa10049>; + regulator-name = "usb1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio0 7 1>; }; spi-2 { diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10057.dts b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10057.dts index 27602c01f162..0be7356941ee 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10057.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10057.dts @@ -14,21 +14,14 @@ model = "Crystalfontz CFA-10057 Board"; compatible = "crystalfontz,cfa10057", "crystalfontz,cfa10036", "fsl,imx28"; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb1_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&usb_pins_cfa10057>; - regulator-name = "usb1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio0 7 1>; - }; + reg_usb1_vbus: regulator-0 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&usb_pins_cfa10057>; + regulator-name = "usb1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio0 7 1>; }; backlight { diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10058.dts b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10058.dts index 931c4d089b26..aae0f1801461 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10058.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10058.dts @@ -14,21 +14,14 @@ model = "Crystalfontz CFA-10058 Board"; compatible = "crystalfontz,cfa10058", "crystalfontz,cfa10036", "fsl,imx28"; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb1_vbus: regulator@0 { - pinctrl-names = "default"; - pinctrl-0 = <&usb_pins_cfa10058>; - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio0 7 1>; - }; + reg_usb1_vbus: regulator-0 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&usb_pins_cfa10058>; + regulator-name = "usb1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio0 7 1>; }; backlight { diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx283lc.dts b/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx283lc.dts index 29f8a3a245d4..7ae2d4ca8ef0 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx283lc.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx283lc.dts @@ -47,7 +47,7 @@ status = "okay"; }; -&pinctrl{ +&pinctrl { pinctrl-names = "default"; pinctrl-0 = <&hog_pins_cpuimx283>; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi b/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi index b285a946e2c2..6633cde305e5 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi +++ b/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi @@ -69,55 +69,45 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_lcd_3v3: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - pinctrl-names = "default"; - pinctrl-0 = <®_lcd_3v3_pins_mbmx28lc>; - regulator-name = "lcd-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_lcd_3v3: regulator-1 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <®_lcd_3v3_pins_mbmx28lc>; + regulator-name = "lcd-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; - reg_usb0_vbus: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - pinctrl-names = "default"; - pinctrl-0 = <®_usb0_vbus_pins_mbmx28lc>; - regulator-name = "usb0_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_usb0_vbus: regulator-2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <®_usb0_vbus_pins_mbmx28lc>; + regulator-name = "usb0_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; - reg_usb1_vbus: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - pinctrl-names = "default"; - pinctrl-0 = <®_usb1_vbus_pins_mbmx28lc>; - regulator-name = "usb1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 19 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_usb1_vbus: regulator-3 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <®_usb1_vbus_pins_mbmx28lc>; + regulator-name = "usb1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 19 GPIO_ACTIVE_HIGH>; + enable-active-high; }; sound { diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-m28.dtsi b/arch/arm/boot/dts/nxp/mxs/imx28-m28.dtsi index c08b14ad7cd5..66facef10ba9 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-m28.dtsi +++ b/arch/arm/boot/dts/nxp/mxs/imx28-m28.dtsi @@ -14,19 +14,12 @@ reg = <0x40000000 0x08000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; }; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-m28cu3.dts b/arch/arm/boot/dts/nxp/mxs/imx28-m28cu3.dts index 6b01de9efd02..8241c2d159fa 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-m28cu3.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-m28cu3.dts @@ -40,47 +40,37 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_vddio_sd0: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "vddio-sd0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 29 0>; - }; + reg_vddio_sd0: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "vddio-sd0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 29 0>; + }; - reg_vddio_sd1: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "vddio-sd1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio2 19 0>; - }; + reg_vddio_sd1: regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "vddio-sd1"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 19 0>; + }; - reg_usb1_vbus: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "usb1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 8 0>; - enable-active-high; - }; + reg_usb1_vbus: regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "usb1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 8 0>; + enable-active-high; }; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-m28evk.dts b/arch/arm/boot/dts/nxp/mxs/imx28-m28evk.dts index e350d57a4cec..6bf26f386a5e 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-m28evk.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-m28evk.dts @@ -18,33 +18,28 @@ default-brightness-level = <6>; }; - regulators { - reg_vddio_sd0: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "vddio-sd0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 28 0>; - }; + reg_vddio_sd0: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "vddio-sd0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 28 0>; + }; - reg_usb0_vbus: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "usb0_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 12 0>; - }; + reg_usb0_vbus: regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "usb0_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 12 0>; + }; - reg_usb1_vbus: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "usb1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 13 0>; - }; + reg_usb1_vbus: regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "usb1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 13 0>; }; sound { diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts b/arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts index 5d74a68c56ff..0f01dded4e3d 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts @@ -15,19 +15,12 @@ reg = <0x40000000 0x08000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb0_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb0_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 9 0>; - }; + reg_usb0_vbus: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "usb0_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 9 0>; }; leds { diff --git a/arch/arm/boot/dts/nxp/mxs/imx28.dtsi b/arch/arm/boot/dts/nxp/mxs/imx28.dtsi index 29e37b1fae66..763adeb995ee 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28.dtsi +++ b/arch/arm/boot/dts/nxp/mxs/imx28.dtsi @@ -81,10 +81,10 @@ dma_apbh: dma-controller@80004000 { compatible = "fsl,imx28-dma-apbh"; reg = <0x80004000 0x2000>; - interrupts = <82 83 84 85 - 88 88 88 88 - 88 88 88 88 - 87 86 0 0>; + interrupts = <82>, <83>, <84>, <85>, + <88>, <88>, <88>, <88>, + <88>, <88>, <88>, <88>, + <87>, <86>, <0>, <0>; #dma-cells = <1>; dma-channels = <16>; clocks = <&clks 25>; @@ -993,10 +993,10 @@ dma_apbx: dma-apbx@80024000 { compatible = "fsl,imx28-dma-apbx"; reg = <0x80024000 0x2000>; - interrupts = <78 79 66 0 - 80 81 68 69 - 70 71 72 73 - 74 75 76 77>; + interrupts = <78>, <79>, <66>, <0>, + <80>, <81>, <68>, <69>, + <70>, <71>, <72>, <73>, + <74>, <75>, <76>, <77>; #dma-cells = <1>; dma-channels = <16>; clocks = <&clks 26>; @@ -1005,7 +1005,7 @@ dcp: crypto@80028000 { compatible = "fsl,imx28-dcp", "fsl,imx23-dcp"; reg = <0x80028000 0x2000>; - interrupts = <52 53 54>; + interrupts = <52>, <53>, <54>; status = "okay"; }; @@ -1136,8 +1136,8 @@ lradc: lradc@80050000 { compatible = "fsl,imx28-lradc"; reg = <0x80050000 0x2000>; - interrupts = <10 14 15 16 17 18 19 - 20 21 22 23 24 25>; + interrupts = <10>, <14>, <15>, <16>, <17>, <18>, <19>, + <20>, <21>, <22>, <23>, <24>, <25>; status = "disabled"; clocks = <&clks 41>; #io-channel-cells = <1>; @@ -1193,7 +1193,7 @@ timer: timrot@80068000 { compatible = "fsl,imx28-timrot", "fsl,timrot"; reg = <0x80068000 0x2000>; - interrupts = <48 49 50 51>; + interrupts = <48>, <49>, <50>, <51>; clocks = <&clks 26>; }; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-twr.dts b/arch/arm/boot/dts/nxp/vf/vf610-twr.dts index 6c246d5aa032..876c14ecceb6 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-twr.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-twr.dts @@ -30,27 +30,20 @@ clock-frequency = <50000000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; - reg_vcc_3v3_mcu: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "vcc_3v3_mcu"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; + reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3_mcu"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; }; sound { diff --git a/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi b/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi index 3f7dc787938e..d1095b700c56 100644 --- a/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi +++ b/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi @@ -569,7 +569,7 @@ <20000000>; }; - esdhc0: esdhc@400b1000 { + esdhc0: mmc@400b1000 { compatible = "fsl,imx53-esdhc"; reg = <0x400b1000 0x1000>; interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; @@ -580,7 +580,7 @@ status = "disabled"; }; - esdhc1: esdhc@400b2000 { + esdhc1: mmc@400b2000 { compatible = "fsl,imx53-esdhc"; reg = <0x400b2000 0x1000>; interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi index b4d286a6fab1..7c545c50847b 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi @@ -233,6 +233,22 @@ }; }; + gsbi4_uart_pin_a: gsbi4-uart-pin-active-state { + rx-pins { + pins = "gpio11"; + function = "gsbi4"; + drive-strength = <2>; + bias-disable; + }; + + tx-pins { + pins = "gpio10"; + function = "gsbi4"; + drive-strength = <4>; + bias-disable; + }; + }; + gsbi6_uart_2pins: gsbi6_uart_2pins { mux { pins = "gpio14", "gpio15"; diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi index d2289205ff81..516f0d2495e2 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi @@ -226,46 +226,6 @@ hwlocks = <&sfpb_mutex 3>; }; - smd { - compatible = "qcom,smd"; - - modem-edge { - interrupts = <0 37 IRQ_TYPE_EDGE_RISING>; - - qcom,ipc = <&l2cc 8 3>; - qcom,smd-edge = <0>; - - status = "disabled"; - }; - - q6-edge { - interrupts = <0 90 IRQ_TYPE_EDGE_RISING>; - - qcom,ipc = <&l2cc 8 15>; - qcom,smd-edge = <1>; - - status = "disabled"; - }; - - dsps-edge { - interrupts = <0 138 IRQ_TYPE_EDGE_RISING>; - - qcom,ipc = <&sps_sic_non_secure 0x4080 0>; - qcom,smd-edge = <3>; - - status = "disabled"; - }; - - riva-edge { - interrupts = <0 198 IRQ_TYPE_EDGE_RISING>; - - qcom,ipc = <&l2cc 8 25>; - qcom,smd-edge = <6>; - - status = "disabled"; - }; - }; - smsm { compatible = "qcom,smsm"; @@ -555,6 +515,18 @@ #size-cells = <1>; ranges; + gsbi4_serial: serial@16340000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16340000 0x100>, + <0x16300000 0x3>; + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&gsbi4_uart_pin_a>; + pinctrl-names = "default"; + clocks = <&gcc GSBI4_UART_CLK>, <&gcc GSBI4_H_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + gsbi4_i2c: i2c@16380000 { compatible = "qcom,i2c-qup-v1.1.1"; pinctrl-0 = <&i2c4_pins>; diff --git a/arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts index e0679436000b..6d1b2439ae3a 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts @@ -156,6 +156,11 @@ }; }; +&pm8941_resin { + linux,code = <KEY_VOLUMEDOWN>; + status = "okay"; +}; + &pm8941_wled { qcom,cs-out; qcom,switching-freq = <3200>; diff --git a/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi index 8f178bc87e1d..2b1f9d0fb510 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi @@ -784,10 +784,10 @@ }; }; - smd { - compatible = "qcom,smd"; + rpm: remoteproc { + compatible = "qcom,apq8084-rpm-proc", "qcom,rpm-proc"; - rpm { + smd-edge { interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; qcom,ipc = <&apcs 8 0>; qcom,smd-edge = <15>; diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi index d90b4f4c63af..da67d55fa557 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi @@ -262,10 +262,11 @@ &usb3 { status = "okay"; - dwc3@8a00000 { - phys = <&usb3_hs_phy>; - phy-names = "usb2-phy"; }; + +&usb3_dwc { + phys = <&usb3_hs_phy>; + phy-names = "usb2-phy"; }; &usb2_hs_phy { diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi index f0ef86fadc9d..9844e0b7cff9 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -230,9 +230,12 @@ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; bus-width = <8>; - clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>, - <&gcc GCC_DCD_XO_CLK>; - clock-names = "iface", "core", "xo"; + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>, + <&xo>; + clock-names = "iface", + "core", + "xo"; status = "disabled"; }; @@ -416,10 +419,10 @@ pcie0: pci@40000000 { compatible = "qcom,pcie-ipq4019"; - reg = <0x40000000 0xf1d - 0x40000f20 0xa8 - 0x80000 0x2000 - 0x40100000 0x1000>; + reg = <0x40000000 0xf1d>, + <0x40000f20 0xa8>, + <0x80000 0x2000>, + <0x40100000 0x1000>; reg-names = "dbi", "elbi", "parf", "config"; device_type = "pci"; linux,pci-domain = <0>; @@ -543,9 +546,9 @@ <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi0", "msi1", "msi2", "msi3", - "msi4", "msi5", "msi6", "msi7", - "msi8", "msi9", "msi10", "msi11", + interrupt-names = "msi0", "msi1", "msi2", "msi3", + "msi4", "msi5", "msi6", "msi7", + "msi8", "msi9", "msi10", "msi11", "msi12", "msi13", "msi14", "msi15", "legacy"; status = "disabled"; @@ -585,9 +588,9 @@ <GIC_SPI 62 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 63 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi0", "msi1", "msi2", "msi3", - "msi4", "msi5", "msi6", "msi7", - "msi8", "msi9", "msi10", "msi11", + interrupt-names = "msi0", "msi1", "msi2", "msi3", + "msi4", "msi5", "msi6", "msi7", + "msi8", "msi9", "msi10", "msi11", "msi12", "msi13", "msi14", "msi15", "legacy"; status = "disabled"; @@ -621,7 +624,7 @@ }; }; - usb3_ss_phy: ssphy@9a000 { + usb3_ss_phy: usb-phy@9a000 { compatible = "qcom,usb-ss-ipq4019-phy"; #phy-cells = <0>; reg = <0x9a000 0x800>; @@ -631,7 +634,7 @@ status = "disabled"; }; - usb3_hs_phy: hsphy@a6000 { + usb3_hs_phy: usb-phy@a6000 { compatible = "qcom,usb-hs-ipq4019-phy"; #phy-cells = <0>; reg = <0xa6000 0x40>; @@ -641,7 +644,7 @@ status = "disabled"; }; - usb3: usb3@8af8800 { + usb3: usb@8af8800 { compatible = "qcom,ipq4019-dwc3", "qcom,dwc3"; reg = <0x8af8800 0x100>; #address-cells = <1>; @@ -653,7 +656,7 @@ ranges; status = "disabled"; - dwc3@8a00000 { + usb3_dwc: usb@8a00000 { compatible = "snps,dwc3"; reg = <0x8a00000 0xf8000>; interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; @@ -663,7 +666,7 @@ }; }; - usb2_hs_phy: hsphy@a8000 { + usb2_hs_phy: usb-phy@a8000 { compatible = "qcom,usb-hs-ipq4019-phy"; #phy-cells = <0>; reg = <0xa8000 0x40>; @@ -673,7 +676,7 @@ status = "disabled"; }; - usb2: usb2@60f8800 { + usb2: usb@60f8800 { compatible = "qcom,ipq4019-dwc3", "qcom,dwc3"; reg = <0x60f8800 0x100>; #address-cells = <1>; @@ -685,7 +688,7 @@ ranges; status = "disabled"; - dwc3@6000000 { + usb@6000000 { compatible = "snps,dwc3"; reg = <0x6000000 0xf8000>; interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts index 104eb729c2d6..1796ded31d17 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts @@ -282,7 +282,6 @@ spi4: spi@1a280000 { status = "okay"; - spi-max-frequency = <50000000>; pinctrl-0 = <&spi_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8064-v1.0.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8064-v1.0.dtsi index c5abe7151f14..17f65e140e02 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq8064-v1.0.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-v1.0.dtsi @@ -30,7 +30,6 @@ spi4: spi@1a280000 { status = "okay"; - spi-max-frequency = <50000000>; pinctrl-0 = <&spi_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi index b40c52ddf9b4..fc4f52f9e9f7 100644 --- a/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi @@ -10,6 +10,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-mdm9615.h> +#include <dt-bindings/clock/qcom,lcc-msm8960.h> #include <dt-bindings/reset/qcom,gcc-mdm9615.h> #include <dt-bindings/mfd/qcom-rpm.h> #include <dt-bindings/soc/qcom,gsbi.h> @@ -39,7 +40,7 @@ }; clocks { - cxo_board { + cxo_board: cxo_board { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <19200000>; @@ -106,6 +107,8 @@ #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x900000 0x4000>; + clocks = <&cxo_board>, + <&lcc PLL4>; }; lcc: clock-controller@28000000 { @@ -113,6 +116,20 @@ reg = <0x28000000 0x1000>; #clock-cells = <1>; #reset-cells = <1>; + clocks = <&cxo_board>, + <&gcc PLL4_VOTE>, + <0>, + <0>, <0>, + <0>, <0>, + <0>; + clock-names = "cxo", + "pll4_vote", + "mi2s_codec_clk", + "codec_i2s_mic_codec_clk", + "spare_i2s_mic_codec_clk", + "codec_i2s_spkr_codec_clk", + "spare_i2s_spkr_codec_clk", + "pcm_codec_clk"; }; l2cc: clock-controller@2011000 { diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi index 313a726f4704..44f3f0127fd7 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi @@ -53,26 +53,10 @@ IRQ_TYPE_LEVEL_HIGH)>; }; - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - smem_region: smem@3000000 { - reg = <0x3000000 0x100000>; - no-map; - }; + rpm: remoteproc { + compatible = "qcom,msm8226-rpm-proc", "qcom,rpm-proc"; - adsp_region: adsp@dc00000 { - reg = <0x0dc00000 0x1900000>; - no-map; - }; - }; - - smd { - compatible = "qcom,smd"; - - rpm { + smd-edge { interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; qcom,ipc = <&apcs 8 0>; qcom,smd-edge = <15>; @@ -120,6 +104,22 @@ }; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + smem_region: smem@3000000 { + reg = <0x3000000 0x100000>; + no-map; + }; + + adsp_region: adsp@dc00000 { + reg = <0x0dc00000 0x1900000>; + no-map; + }; + }; + smem { compatible = "qcom,smem"; @@ -784,6 +784,23 @@ }; }; + sram@fdd00000 { + compatible = "qcom,msm8226-ocmem"; + reg = <0xfdd00000 0x2000>, + <0xfec00000 0x20000>; + reg-names = "ctrl", "mem"; + ranges = <0 0xfec00000 0x20000>; + clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>; + clock-names = "core"; + + #address-cells = <1>; + #size-cells = <1>; + + gmu_sram: gmu-sram@0 { + reg = <0x0 0x20000>; + }; + }; + sram@fe805000 { compatible = "qcom,msm8226-imem", "syscon", "simple-mfd"; reg = <0xfe805000 0x1000>; @@ -797,6 +814,133 @@ mode-recovery = <0x77665502>; }; }; + + mdss: display-subsystem@fd900000 { + compatible = "qcom,mdss"; + reg = <0xfd900000 0x100>, <0xfd924000 0x1000>; + reg-names = "mdss_phys", "vbif_phys"; + + power-domains = <&mmcc MDSS_GDSC>; + + clocks = <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_AXI_CLK>, + <&mmcc MDSS_VSYNC_CLK>; + clock-names = "iface", + "bus", + "vsync"; + + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + + interrupt-controller; + #interrupt-cells = <1>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + status = "disabled"; + + mdss_mdp: display-controller@fd900000 { + compatible = "qcom,msm8226-mdp5", "qcom,mdp5"; + reg = <0xfd900100 0x22000>; + reg-names = "mdp_phys"; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + clocks = <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_AXI_CLK>, + <&mmcc MDSS_MDP_CLK>, + <&mmcc MDSS_VSYNC_CLK>; + clock-names = "iface", + "bus", + "core", + "vsync"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss_mdp_intf1_out: endpoint { + remote-endpoint = <&mdss_dsi0_in>; + }; + }; + }; + }; + + mdss_dsi0: dsi@fd922800 { + compatible = "qcom,msm8226-dsi-ctrl", + "qcom,mdss-dsi-ctrl"; + reg = <0xfd922800 0x1f8>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + assigned-clocks = <&mmcc BYTE0_CLK_SRC>, + <&mmcc PCLK0_CLK_SRC>; + assigned-clock-parents = <&mdss_dsi0_phy 0>, + <&mdss_dsi0_phy 1>; + + clocks = <&mmcc MDSS_MDP_CLK>, + <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_AXI_CLK>, + <&mmcc MDSS_BYTE0_CLK>, + <&mmcc MDSS_PCLK0_CLK>, + <&mmcc MDSS_ESC0_CLK>, + <&mmcc MMSS_MISC_AHB_CLK>; + clock-names = "mdp_core", + "iface", + "bus", + "byte", + "pixel", + "core", + "core_mmss"; + + phys = <&mdss_dsi0_phy>; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss_dsi0_in: endpoint { + remote-endpoint = <&mdss_mdp_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + mdss_dsi0_out: endpoint { + }; + }; + }; + }; + + mdss_dsi0_phy: phy@fd922a00 { + compatible = "qcom,dsi-phy-28nm-8226"; + reg = <0xfd922a00 0xd4>, + <0xfd922b00 0x280>, + <0xfd922d80 0x30>; + reg-names = "dsi_pll", + "dsi_phy", + "dsi_phy_regulator"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&mmcc MDSS_AHB_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "iface", + "ref"; + }; + }; }; thermal-zones { diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi index fa2013388d99..d13080fcbeea 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi @@ -364,7 +364,6 @@ #size-cells = <0>; reg = <0x16080000 0x1000>; interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; - spi-max-frequency = <24000000>; cs-gpios = <&msmgpio 8 0>; clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>; diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi index aeca504918a0..706fef53767e 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi @@ -113,6 +113,28 @@ interrupts = <GIC_PPI 7 0xf04>; }; + rpm: remoteproc { + compatible = "qcom,msm8974-rpm-proc", "qcom,rpm-proc"; + + smd-edge { + interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; + qcom,ipc = <&apcs 8 0>; + qcom,smd-edge = <15>; + + rpm_requests: rpm-requests { + compatible = "qcom,rpm-msm8974"; + qcom,smd-channels = "rpm_requests"; + + rpmcc: clock-controller { + compatible = "qcom,rpmcc-msm8974", "qcom,rpmcc"; + #clock-cells = <1>; + clocks = <&xo_board>; + clock-names = "xo"; + }; + }; + }; + }; + reserved-memory { #address-cells = <1>; #size-cells = <1>; @@ -293,28 +315,6 @@ }; }; - smd { - compatible = "qcom,smd"; - - rpm { - interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; - qcom,ipc = <&apcs 8 0>; - qcom,smd-edge = <15>; - - rpm_requests: rpm-requests { - compatible = "qcom,rpm-msm8974"; - qcom,smd-channels = "rpm_requests"; - - rpmcc: clock-controller { - compatible = "qcom,rpmcc-msm8974", "qcom,rpmcc"; - #clock-cells = <1>; - clocks = <&xo_board>; - clock-names = "xo"; - }; - }; - }; - }; - soc: soc { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts index f531d2679f6c..42d253b75dad 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts @@ -414,7 +414,7 @@ wcnss_pin_a: wcnss-pin-active-state { wlan-pins { - pins = "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"; + pins = "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"; function = "wlan"; drive-strength = <6>; diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts index 154639d56f35..11468d1409f7 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -125,15 +125,15 @@ syna,startup-delay-ms = <100>; - rmi-f01@1 { + rmi4-f01@1 { reg = <0x1>; - syna,nosleep = <1>; + syna,nosleep-mode = <1>; }; - rmi-f11@11 { + rmi4-f11@11 { reg = <0x11>; - syna,f11-flip-x = <1>; syna,sensor-type = <1>; + touchscreen-inverted-x; }; }; }; diff --git a/arch/arm/boot/dts/qcom/qcom-pm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-pm8226.dtsi index 3b8ad28cecb0..2413778f3715 100644 --- a/arch/arm/boot/dts/qcom/qcom-pm8226.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-pm8226.dtsi @@ -102,27 +102,27 @@ #size-cells = <0>; #io-channel-cells = <1>; - adc-chan@7 { + channel@7 { reg = <VADC_VSYS>; qcom,pre-scaling = <1 3>; label = "vph_pwr"; }; - adc-chan@8 { + channel@8 { reg = <VADC_DIE_TEMP>; label = "die_temp"; }; - adc-chan@9 { + channel@9 { reg = <VADC_REF_625MV>; label = "ref_625mv"; }; - adc-chan@a { + channel@a { reg = <VADC_REF_1250MV>; label = "ref_1250mv"; }; - adc-chan@e { + channel@e { reg = <VADC_GND_REF>; }; - adc-chan@f { + channel@f { reg = <VADC_VDD_VADC>; }; }; diff --git a/arch/arm/boot/dts/qcom/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom/qcom-pm8941.dtsi index b3e246bacd78..ed0ba591c755 100644 --- a/arch/arm/boot/dts/qcom/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-pm8941.dtsi @@ -50,12 +50,24 @@ interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; }; - pwrkey@800 { - compatible = "qcom,pm8941-pwrkey"; + pon@800 { + compatible = "qcom,pm8941-pon"; reg = <0x800>; - interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; - debounce = <15625>; - bias-pull-up; + + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + }; + + pm8941_resin: resin { + compatible = "qcom,pm8941-resin"; + interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + status = "disabled"; + }; }; usb_id: usb-detect@900 { @@ -133,31 +145,31 @@ #io-channel-cells = <1>; - adc-chan@6 { + channel@6 { reg = <VADC_VBAT_SNS>; }; - adc-chan@8 { + channel@8 { reg = <VADC_DIE_TEMP>; }; - adc-chan@9 { + channel@9 { reg = <VADC_REF_625MV>; }; - adc-chan@a { + channel@a { reg = <VADC_REF_1250MV>; }; - adc-chan@e { + channel@e { reg = <VADC_GND_REF>; }; - adc-chan@f { + channel@f { reg = <VADC_VDD_VADC>; }; - adc-chan@30 { + channel@30 { reg = <VADC_LR_MUX1_BAT_THERM>; }; }; diff --git a/arch/arm/boot/dts/qcom/qcom-pma8084.dtsi b/arch/arm/boot/dts/qcom/qcom-pma8084.dtsi index 2dd4c6aa71c9..2985f4805b93 100644 --- a/arch/arm/boot/dts/qcom/qcom-pma8084.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-pma8084.dtsi @@ -64,27 +64,27 @@ #size-cells = <0>; #io-channel-cells = <1>; - adc-chan@8 { + channel@8 { reg = <VADC_DIE_TEMP>; }; - adc-chan@9 { + channel@9 { reg = <VADC_REF_625MV>; }; - adc-chan@a { + channel@a { reg = <VADC_REF_1250MV>; }; - adc-chan@c { + channel@c { reg = <VADC_SPARE1>; }; - adc-chan@e { + channel@e { reg = <VADC_GND_REF>; }; - adc-chan@f { + channel@f { reg = <VADC_VDD_VADC>; }; }; diff --git a/arch/arm/boot/dts/qcom/qcom-pmx55.dtsi b/arch/arm/boot/dts/qcom/qcom-pmx55.dtsi index e1b869480bbd..da0851173c69 100644 --- a/arch/arm/boot/dts/qcom/qcom-pmx55.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-pmx55.dtsi @@ -40,25 +40,25 @@ #io-channel-cells = <1>; interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - ref-gnd@0 { + channel@0 { reg = <ADC5_REF_GND>; qcom,pre-scaling = <1 1>; label = "ref_gnd"; }; - vref-1p25@1 { + channel@1 { reg = <ADC5_1P25VREF>; qcom,pre-scaling = <1 1>; label = "vref_1p25"; }; - die-temp@6 { + channel@6 { reg = <ADC5_DIE_TEMP>; qcom,pre-scaling = <1 1>; label = "die_temp"; }; - chg-temp@9 { + channel@9 { reg = <ADC5_CHG_TEMP>; qcom,pre-scaling = <1 1>; label = "chg_temp"; diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi index df3cd9c4ffb9..55ce87b75253 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi @@ -603,7 +603,7 @@ resets = <&gcc GCC_USB30_BCR>; - usb_dwc3: dwc3@a600000 { + usb_dwc3: usb@a600000 { compatible = "snps,dwc3"; reg = <0x0a600000 0xcd00>; interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts index 02d8d6e241ae..fcf1c51c5e7a 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts +++ b/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts @@ -7,7 +7,7 @@ #include "qcom-sdx65.dtsi" #include <dt-bindings/regulator/qcom,rpmh-regulator.h> #include <arm64/qcom/pmk8350.dtsi> -#include <arm64/qcom/pm8150b.dtsi> +#include <arm64/qcom/pm7250b.dtsi> #include "qcom-pmx65.dtsi" / { diff --git a/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts index fa09295052c6..d21e00e1f401 100644 --- a/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts +++ b/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts @@ -58,7 +58,7 @@ regulator-max-microvolt = <3300000>; vin-supply = <&vcc_sdhi0>; - enable-gpio = <&pfc 74 GPIO_ACTIVE_HIGH>; + enable-gpios = <&pfc 74 GPIO_ACTIVE_HIGH>; gpios = <&pfc 17 GPIO_ACTIVE_HIGH>; states = <3300000 0>, <1800000 1>; diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts index c18bbd7141c4..31cdca3e623c 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts @@ -67,7 +67,7 @@ status = "okay"; }; -&pinctrl{ +&pinctrl { pins_can0: pins_can0 { pinmux = <RZN1_PINMUX(162, RZN1_FUNC_CAN)>, /* CAN0_TXD */ <RZN1_PINMUX(163, RZN1_FUNC_CAN)>; /* CAN0_RXD */ diff --git a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts index 3340fc3f0739..3d587602e13a 100644 --- a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts +++ b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts @@ -20,6 +20,35 @@ chosen { stdout-path = "serial2:1500000n8"; }; + + vcc12v_dcin: vcc12v-dcin-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + v3v3_sys: v3v3-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "v3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; }; &gmac { diff --git a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi index cc64ba4be344..7ea8d7d16f5f 100644 --- a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi @@ -11,15 +11,6 @@ mmc0 = &emmc; }; - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - vccio_flash: vccio-flash-regulator { compatible = "regulator-fixed"; enable-active-high; @@ -52,7 +43,7 @@ bus-width = <8>; non-removable; pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_rstnout>; + pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk>; rockchip,default-sample-phase = <90>; vmmc-supply = <&vcc_3v3>; vqmmc-supply = <&vccio_flash>; @@ -301,6 +292,22 @@ status = "okay"; }; +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspi_pins>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + }; +}; + &sdio { bus-width = <4>; cap-sd-highspeed; diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi index b77021772781..554353e0a758 100644 --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi @@ -59,6 +59,24 @@ <0 RK_PD5 2 &pcfg_pull_up_drv_level_2>; }; }; + fspi { + /omit-if-no-ref/ + fspi_pins: fspi-pins { + rockchip,pins = + /* fspi_clk */ + <1 RK_PA3 3 &pcfg_pull_down>, + /* fspi_cs0n */ + <0 RK_PD4 3 &pcfg_pull_up>, + /* fspi_d0 */ + <1 RK_PA0 3 &pcfg_pull_up>, + /* fspi_d1 */ + <1 RK_PA1 3 &pcfg_pull_up>, + /* fspi_d2 */ + <0 RK_PD6 3 &pcfg_pull_up>, + /* fspi_d3 */ + <1 RK_PA2 3 &pcfg_pull_up>; + }; + }; i2c0 { /omit-if-no-ref/ i2c0_xfer: i2c0-xfer { @@ -249,5 +267,13 @@ /* uart5_tx_m0 */ <3 RK_PA6 4 &pcfg_pull_up>; }; + /omit-if-no-ref/ + uart5m2_xfer: uart5m2-xfer { + rockchip,pins = + /* uart5_rx_m2 */ + <2 RK_PA1 3 &pcfg_pull_up>, + /* uart5_tx_m2 */ + <2 RK_PA0 3 &pcfg_pull_up>; + }; }; }; diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi index 1f07d0a4fa73..9c918420ecd5 100644 --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi @@ -83,6 +83,11 @@ clock-frequency = <24000000>; }; + display_subsystem { + compatible = "rockchip,display-subsystem"; + ports = <&vop_out>; + }; + xin24m: oscillator { compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -125,6 +130,26 @@ reg = <0xfe86c000 0x20>; }; + qos_iep: qos@fe8a0000 { + compatible = "rockchip,rv1126-qos", "syscon"; + reg = <0xfe8a0000 0x20>; + }; + + qos_rga_rd: qos@fe8a0080 { + compatible = "rockchip,rv1126-qos", "syscon"; + reg = <0xfe8a0080 0x20>; + }; + + qos_rga_wr: qos@fe8a0100 { + compatible = "rockchip,rv1126-qos", "syscon"; + reg = <0xfe8a0100 0x20>; + }; + + qos_vop: qos@fe8a0180 { + compatible = "rockchip,rv1126-qos", "syscon"; + reg = <0xfe8a0180 0x20>; + }; + gic: interrupt-controller@feff0000 { compatible = "arm,gic-400"; interrupt-controller; @@ -170,6 +195,25 @@ pm_qos = <&qos_sdio>; #power-domain-cells = <0>; }; + + power-domain@RV1126_PD_VO { + reg = <RV1126_PD_VO>; + clocks = <&cru ACLK_RGA>, + <&cru HCLK_RGA>, + <&cru CLK_RGA_CORE>, + <&cru ACLK_VOP>, + <&cru HCLK_VOP>, + <&cru DCLK_VOP>, + <&cru PCLK_DSIHOST>, + <&cru ACLK_IEP>, + <&cru HCLK_IEP>, + <&cru CLK_IEP_CORE>; + pm_qos = <&qos_rga_rd>, + <&qos_rga_wr>, + <&qos_vop>, + <&qos_iep>; + #power-domain-cells = <0>; + }; }; }; @@ -332,6 +376,43 @@ clock-names = "pclk", "timer"; }; + vop: vop@ffb00000 { + compatible = "rockchip,rv1126-vop"; + reg = <0xffb00000 0x200>, <0xffb00a00 0x400>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>; + reset-names = "axi", "ahb", "dclk"; + resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>; + iommus = <&vop_mmu>; + power-domains = <&power RV1126_PD_VO>; + status = "disabled"; + + vop_out: port { + #address-cells = <1>; + #size-cells = <0>; + + vop_out_rgb: endpoint@0 { + reg = <0>; + }; + + vop_out_dsi: endpoint@1 { + reg = <1>; + }; + }; + }; + + vop_mmu: iommu@ffb00f00 { + compatible = "rockchip,iommu"; + reg = <0xffb00f00 0x100>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "aclk", "iface"; + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; + #iommu-cells = <0>; + power-domains = <&power RV1126_PD_VO>; + status = "disabled"; + }; + gmac: ethernet@ffc40000 { compatible = "rockchip,rv1126-gmac", "snps,dwmac-4.20a"; reg = <0xffc40000 0x4000>; @@ -419,6 +500,18 @@ status = "disabled"; }; + sfc: spi@ffc90000 { + compatible = "rockchip,sfc"; + reg = <0xffc90000 0x4000>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + assigned-clocks = <&cru SCLK_SFC>; + assigned-clock-rates = <80000000>; + clock-names = "clk_sfc", "hclk_sfc"; + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; + power-domains = <&power RV1126_PD_NVM>; + status = "disabled"; + }; + pinctrl: pinctrl { compatible = "rockchip,rv1126-pinctrl"; rockchip,grf = <&grf>; diff --git a/arch/arm/boot/dts/samsung/Makefile b/arch/arm/boot/dts/samsung/Makefile index c8d067abdd59..7becf36656b1 100644 --- a/arch/arm/boot/dts/samsung/Makefile +++ b/arch/arm/boot/dts/samsung/Makefile @@ -9,6 +9,9 @@ dtb-$(CONFIG_ARCH_EXYNOS4) += \ exynos4210-smdkv310.dtb \ exynos4210-trats.dtb \ exynos4210-universal_c210.dtb \ + exynos4212-tab3-3g8.dtb \ + exynos4212-tab3-lte8.dtb \ + exynos4212-tab3-wifi8.dtb \ exynos4412-i9300.dtb \ exynos4412-i9305.dtb \ exynos4412-itop-elite.dtb \ diff --git a/arch/arm/boot/dts/samsung/exynos4210-i9100.dts b/arch/arm/boot/dts/samsung/exynos4210-i9100.dts index 37cd4dde53e4..a9ec1f6c1dea 100644 --- a/arch/arm/boot/dts/samsung/exynos4210-i9100.dts +++ b/arch/arm/boot/dts/samsung/exynos4210-i9100.dts @@ -207,8 +207,8 @@ power-on-delay = <10>; reset-delay = <10>; - panel-width-mm = <90>; - panel-height-mm = <154>; + panel-width-mm = <56>; + panel-height-mm = <93>; display-timings { timing { diff --git a/arch/arm/boot/dts/samsung/exynos4210-trats.dts b/arch/arm/boot/dts/samsung/exynos4210-trats.dts index bfb04b31e11b..95e0e01b6ff6 100644 --- a/arch/arm/boot/dts/samsung/exynos4210-trats.dts +++ b/arch/arm/boot/dts/samsung/exynos4210-trats.dts @@ -20,10 +20,10 @@ memory@40000000 { device_type = "memory"; - reg = <0x40000000 0x10000000 - 0x50000000 0x10000000 - 0x60000000 0x10000000 - 0x70000000 0x10000000>; + reg = <0x40000000 0x10000000 + 0x50000000 0x10000000 + 0x60000000 0x10000000 + 0x70000000 0x10000000>; }; aliases { diff --git a/arch/arm/boot/dts/samsung/exynos4210-universal_c210.dts b/arch/arm/boot/dts/samsung/exynos4210-universal_c210.dts index c84af3d27c1c..bdc30f8cf748 100644 --- a/arch/arm/boot/dts/samsung/exynos4210-universal_c210.dts +++ b/arch/arm/boot/dts/samsung/exynos4210-universal_c210.dts @@ -20,8 +20,8 @@ memory@40000000 { device_type = "memory"; - reg = <0x40000000 0x10000000 - 0x50000000 0x10000000>; + reg = <0x40000000 0x10000000 + 0x50000000 0x10000000>; }; aliases { diff --git a/arch/arm/boot/dts/samsung/exynos4212-tab3-3g8.dts b/arch/arm/boot/dts/samsung/exynos4212-tab3-3g8.dts new file mode 100644 index 000000000000..d96b2dd44608 --- /dev/null +++ b/arch/arm/boot/dts/samsung/exynos4212-tab3-3g8.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos4212 based Galaxy Tab 3 8.0 3G board device tree + * source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +/dts-v1/; +#include "exynos4212-tab3.dtsi" + +/ { + model = "Samsung Galaxy Tab 3 8.0 3G (SM-T311) based on Exynos4212"; + compatible = "samsung,t311", "samsung,tab3", "samsung,exynos4212", "samsung,exynos4"; + chassis-type = "tablet"; +}; + +/* Pin control sleep state overrides */ +&sleep0 { + PIN_SLP(gpb-5, INPUT, UP); +}; + +&sleep1 { + PIN_SLP(gpl0-0, OUT0, NONE); + PIN_SLP(gpl1-0, OUT0, NONE); + PIN_SLP(gpl2-4, OUT0, NONE); + PIN_SLP(gpm3-3, OUT1, NONE); +}; diff --git a/arch/arm/boot/dts/samsung/exynos4212-tab3-lte8.dts b/arch/arm/boot/dts/samsung/exynos4212-tab3-lte8.dts new file mode 100644 index 000000000000..bbb398eca7b0 --- /dev/null +++ b/arch/arm/boot/dts/samsung/exynos4212-tab3-lte8.dts @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos4212 based Galaxy Tab 3 8.0 LTE board device tree + * source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +/dts-v1/; +#include "exynos4212-tab3.dtsi" + +/ { + model = "Samsung Galaxy Tab 3 8.0 LTE (SM-T315) based on Exynos4212"; + compatible = "samsung,t315", "samsung,tab3", "samsung,exynos4212", "samsung,exynos4"; + chassis-type = "tablet"; +}; + +/* Pin control sleep state overrides */ +&sleep0 { + PIN_SLP(gpa0-4, INPUT, UP); + PIN_SLP(gpa0-5, INPUT, UP); + + PIN_SLP(gpb-5, INPUT, UP); + + PIN_SLP(gpc0-0, PREV, NONE); + PIN_SLP(gpc1-3, INPUT, NONE); + + PIN_SLP(gpf1-6, INPUT, NONE); + PIN_SLP(gpf2-2, PREV, NONE); +}; + +&sleep1 { + PIN_SLP(gpl0-0, PREV, NONE); + + PIN_SLP(gpl1-0, PREV, NONE); + + PIN_SLP(gpl2-1, INPUT, DOWN); + PIN_SLP(gpl2-2, INPUT, DOWN); + PIN_SLP(gpl2-4, OUT0, NONE); + PIN_SLP(gpl2-5, PREV, NONE); + + PIN_SLP(gpm3-3, OUT1, NONE); +}; diff --git a/arch/arm/boot/dts/samsung/exynos4212-tab3-wifi8.dts b/arch/arm/boot/dts/samsung/exynos4212-tab3-wifi8.dts new file mode 100644 index 000000000000..54cb01703b60 --- /dev/null +++ b/arch/arm/boot/dts/samsung/exynos4212-tab3-wifi8.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos4212 based Galaxy Tab 3 8.0 WiFi board device tree + * source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +/dts-v1/; +#include "exynos4212-tab3.dtsi" + +/ { + model = "Samsung Galaxy Tab 3 8.0 WiFi (SM-T310) based on Exynos4212"; + compatible = "samsung,t310", "samsung,tab3", "samsung,exynos4212", "samsung,exynos4"; + chassis-type = "tablet"; +}; + +&i2c_lightsensor { + status = "okay"; + + lightsensor@10 { + compatible = "capella,cm3323"; + reg = <0x10>; + }; +}; diff --git a/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi new file mode 100644 index 000000000000..ce81e42bf5eb --- /dev/null +++ b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi @@ -0,0 +1,1310 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos4212 based Galaxy Tab 3 board common source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +/dts-v1/; +#include "exynos4212.dtsi" +#include "exynos4412-ppmu-common.dtsi" +#include "exynos-mfc-reserved-memory.dtsi" +#include <dt-bindings/clock/samsung,s2mps11.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/input/gpio-keys.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include "exynos-pinctrl.h" + +/ { + compatible = "samsung,tab3", "samsung,exynos4212", "samsung,exynos4"; + + memory@40000000 { + device_type = "memory"; + + /* + * Technically 1.5GB is available, but the latter 512MB is handled + * in a special way by downstream (every second page is skipped), + * and thus doesn't initialize correctly on mainline. Only 1020M is + * used for now. + */ + reg = <0x40000000 0x3fc00000>; + }; + + aliases { + mmc0 = &mshc_0; /* Internal storage */ + mmc1 = &sdhci_2; /* SD card */ + mmc2 = &sdhci_3; /* WiFi */ + }; + + chosen { + stdout-path = &serial_2; + + /* Default S-BOOT bootloader loads initramfs here */ + linux,initrd-start = <0x42000000>; + linux,initrd-end = <0x42800000>; + }; + + firmware@204f000 { + compatible = "samsung,secure-firmware"; + reg = <0x0204F000 0x1000>; + }; + + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <0>; + }; + + xusbxti { + compatible = "samsung,clock-xusbxti"; + clock-frequency = <24000000>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys>; + + key-power { + gpios = <&gpx2 7 GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + label = "power"; + debounce-interval = <10>; + wakeup-source; + }; + + key-up { + gpios = <&gpx2 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEUP>; + label = "volume down"; + debounce-interval = <10>; + }; + + key-down { + gpios = <&gpx3 3 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEDOWN>; + label = "volume up"; + debounce-interval = <10>; + }; + + key-home { + gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_HOME>; + label = "home"; + debounce-interval = <10>; + }; + + switch-hall-sensor { + gpios = <&gpx2 4 GPIO_ACTIVE_LOW>; + linux,input-type = <EV_SW>; + linux,code = <SW_LID>; + linux,can-disable; + label = "hall effect sensor"; + debounce-interval = <10>; + wakeup-source; + }; + }; + + led-touchkeys { + compatible = "regulator-led"; + vled-supply = <&ldo20_reg>; + default-state = "off"; + function = LED_FUNCTION_KBD_BACKLIGHT; + color = <LED_COLOR_ID_WHITE>; + }; + + i2c_max77693: i2c-gpio-1 { + compatible = "i2c-gpio"; + sda-gpios = <&gpm2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpm2 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@66 { + compatible = "maxim,max77693"; + reg = <0x66>; + interrupt-parent = <&gpx1>; + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&max77693_irq>; + + regulators { + esafeout1_reg: ESAFEOUT1 { + regulator-name = "ESAFEOUT1"; + regulator-boot-on; + }; + + esafeout2_reg: ESAFEOUT2 { + regulator-name = "ESAFEOUT2"; + }; + + charger_reg: CHARGER { + regulator-name = "CHARGER"; + regulator-min-microamp = <60000>; + regulator-max-microamp = <2580000>; + regulator-boot-on; + }; + }; + + charger { + compatible = "maxim,max77693-charger"; + + maxim,constant-microvolt = <4350000>; + maxim,min-system-microvolt = <3600000>; + maxim,thermal-regulation-celsius = <100>; + maxim,battery-overcurrent-microamp = <3500000>; + maxim,charge-input-threshold-microvolt = <4300000>; + }; + }; + }; + + i2c_max77693_fuel: i2c-gpio-2 { + compatible = "i2c-gpio"; + sda-gpios = <&gpy0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpy0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + + fuel-gauge@36 { + compatible = "maxim,max17050"; + reg = <0x36>; + interrupt-parent = <&gpx2>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&max77693_fuel_irq>; + + maxim,over-heat-temp = <500>; + maxim,over-volt = <4500>; + }; + }; + + i2c_magnetometer: i2c-gpio-3 { + compatible = "i2c-gpio"; + sda-gpios = <&gpy2 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpy2 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + + magnetometer@2e { + compatible = "yamaha,yas532"; + reg = <0x2e>; + iovdd-supply = <&ldo3_reg>; + mount-matrix = "-1", "0", "0", + "0", "1", "0", + "0", "0", "-1"; + }; + }; + + i2c_lightsensor: i2c-gpio-4 { + compatible = "i2c-gpio"; + sda-gpios = <&gpl0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpl0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + /* WiFi model uses CM3323, 3G/LTE use CM36653 */ + }; + + i2c_bl: i2c-gpio-5 { + compatible = "i2c-gpio"; + sda-gpios = <&gpm4 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpm4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + #address-cells = <1>; + #size-cells = <0>; + + backlight: backlight@2c { + compatible = "ti,lp8556"; + reg = <0x2c>; + + bl-name = "lcd-bl"; + dev-ctrl = /bits/ 8 <0x80>; + init-brt = /bits/ 8 <0x78>; /* 120 */ + + power-supply = <&vbatt_reg>; + enable-supply = <&backlight_reset_supply>; + + pwms = <&pwm 1 78770 0>; + pwm-names = "lp8556"; + + rom-a3h { + rom-addr = /bits/ 8 <0xa3>; + rom-val = /bits/ 8 <0x5e>; + }; + + rom-a5h { + rom-addr = /bits/ 8 <0xa5>; + rom-val = /bits/ 8 <0x34>; + }; + + rom-a7h { + rom-addr = /bits/ 8 <0xa7>; + rom-val = /bits/ 8 <0xfa>; + }; + }; + }; + + vbatt_reg: voltage-regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "VBATT"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + backlight_reset_supply: voltage-regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "BACKLIGHT_ENVDDIO"; + pinctrl-names = "default"; + pinctrl-0 = <&backlight_reset>; + gpio = <&gpm0 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + display_3v3_supply: voltage-regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "DISPLAY_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_en>; + gpio = <&gpc0 1 GPIO_ACTIVE_HIGH>; /* LCD_EN */ + enable-active-high; + }; + + mic_bias_reg: voltage-regulator-4 { + compatible = "regulator-fixed"; + regulator-name = "MICBIAS_LDO_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + submic_bias_reg: voltage-regulator-5 { + compatible = "regulator-fixed"; + regulator-name = "SUB_MICBIAS_LDO_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + sound: sound { + compatible = "samsung,midas-audio"; + model = "TAB3"; + mic-bias-supply = <&mic_bias_reg>; + submic-bias-supply = <&submic_bias_reg>; + + samsung,audio-routing = + "HP", "HPOUT1L", + "HP", "HPOUT1R", + + "SPK", "SPKOUTLN", + "SPK", "SPKOUTLP", + "SPK", "SPKOUTRN", + "SPK", "SPKOUTRP", + + "RCV", "HPOUT2N", + "RCV", "HPOUT2P", + + "LINE", "LINEOUT2N", + "LINE", "LINEOUT2P", + + "HDMI", "LINEOUT1N", + "HDMI", "LINEOUT1P", + + "IN2LP:VXRN", "MICBIAS1", + "IN2LN", "MICBIAS1", + "Main Mic", "MICBIAS1", + + "IN1RP", "MICBIAS2", + "IN1RN", "MICBIAS2", + "Sub Mic", "MICBIAS2", + + "IN1LP", "Headset Mic", + "IN1LN", "Headset Mic"; + + cpu { + sound-dai = <&i2s0 0>; + }; + + codec { + sound-dai = <&wm1811>; + }; + }; + + wlan_pwrseq: sdhci3-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpm3 5 GPIO_ACTIVE_LOW>; + clocks = <&s5m8767_osc S2MPS11_CLK_BT>; + clock-names = "ext_clock"; + }; +}; + +&bus_acp { + devfreq = <&bus_dmc>; + status = "okay"; +}; + +&bus_c2c { + devfreq = <&bus_dmc>; + status = "okay"; +}; + +&bus_display { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_dmc { + devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; + vdd-supply = <&buck1_reg>; + status = "okay"; +}; + +&bus_fsys { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_leftbus { + devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>; + vdd-supply = <&buck3_reg>; + status = "okay"; +}; + +&bus_mfc { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_peri { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_rightbus { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&cpu0 { + cpu0-supply = <&buck2_reg>; +}; + +&cpu_thermal { + cooling-maps { + map0 { + /* Corresponds to 800MHz at freq_table */ + cooling-device = <&cpu0 7 7>, <&cpu1 7 7>; + }; + map1 { + /* Corresponds to 200MHz at freq_table */ + cooling-device = <&cpu0 13 13>, <&cpu1 13 13>; + }; + }; +}; + +&dsi_0 { + vddcore-supply = <&ldo8_reg>; + vddio-supply = <&ldo10_reg>; + samsung,burst-clock-frequency = <500000000>; + samsung,esc-clock-frequency = <20000000>; + samsung,pll-clock-frequency = <24000000>; + status = "okay"; + + panel@0 { + compatible = "samsung,lsl080al02", "samsung,s6d7aa0"; + reg = <0>; + power-supply = <&display_3v3_supply>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_nrst>; + reset-gpios = <&gpf0 4 GPIO_ACTIVE_LOW>; + backlight = <&backlight>; + }; +}; + +&exynos_usbphy { + vbus-supply = <&esafeout1_reg>; + status = "okay"; +}; + +&fimd { + status = "okay"; +}; + +&gpu { + mali-supply = <&buck4_reg>; + status = "okay"; +}; + +&hsotg { + vusb_d-supply = <&ldo15_reg>; + vusb_a-supply = <&ldo12_reg>; + dr_mode = "otg"; + status = "okay"; +}; + +&i2c_1 { + pinctrl-0 = <&i2c1_bus>; + pinctrl-names = "default"; + status = "okay"; + + lis3dh: accelerometer@19 { + /* K2DH seems to be the same as lis2dh12 in terms of registers */ + compatible = "st,lis2dh12-accel"; + reg = <0x19>; + + interrupt-parent = <&gpx0>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + + vdd-supply = <&ldo17_reg>; + vddio-supply = <&ldo3_reg>; + + mount-matrix = "-1", "0", "0", + "0", "1", "0", + "0", "0", "-1"; + }; +}; + +&i2c_3 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-slave-addr = <0x10>; + samsung,i2c-max-bus-freq = <400000>; + pinctrl-0 = <&i2c3_bus>; + pinctrl-names = "default"; + status = "okay"; + + touchscreen@48 { + /* MELFAS MMS252, using MMS114 compatible for now */ + compatible = "melfas,mms114"; + reg = <0x48>; + interrupt-parent = <&gpb>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <800>; + touchscreen-size-y = <1280>; + avdd-supply = <&ldo21_reg>; + vdd-supply = <&ldo25_reg>; + linux,keycodes = <KEY_MENU KEY_BACK>; + }; +}; + +&i2c_4 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-slave-addr = <0x10>; + samsung,i2c-max-bus-freq = <100000>; + pinctrl-0 = <&i2c4_bus>; + pinctrl-names = "default"; + status = "okay"; + + wm1811: audio-codec@1a { + compatible = "wlf,wm1811"; + reg = <0x1a>; + clocks = <&pmu_system_controller 0>; + clock-names = "MCLK1"; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gpx3>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; + + gpio-controller; + #gpio-cells = <2>; + #sound-dai-cells = <0>; + + wlf,gpio-cfg = <0x3 0x0 0x0 0x0 0x0 0x0 + 0x0 0x8000 0x0 0x0 0x0>; + wlf,micbias-cfg = <0x25 0x2f>; + + wlf,lineout1-feedback; + wlf,lineout1-se; + wlf,lineout2-se; + wlf,ldoena-always-driven; + + AVDD2-supply = <&ldo3_reg>; + CPVDD-supply = <&ldo3_reg>; + DBVDD1-supply = <&ldo3_reg>; + DBVDD2-supply = <&ldo3_reg>; + DBVDD3-supply = <&ldo3_reg>; + SPKVDD1-supply = <&vbatt_reg>; + SPKVDD2-supply = <&vbatt_reg>; + wlf,ldo1ena-gpios = <&gpm4 4 GPIO_ACTIVE_HIGH>; + wlf,ldo2ena-gpios = <&gpm4 4 GPIO_ACTIVE_HIGH>; + }; +}; + +&i2c_7 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-slave-addr = <0x10>; + samsung,i2c-max-bus-freq = <100000>; + pinctrl-0 = <&i2c7_bus>; + pinctrl-names = "default"; + status = "okay"; + + s5m8767: pmic@66 { + compatible = "samsung,s5m8767-pmic"; + reg = <0x66>; + interrupt-parent = <&gpx0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&s5m8767_irq &s5m8767_dvs &s5m8767_ds>; + wakeup-source; + + s5m8767,pmic-buck-default-dvs-idx = <1>; + + s5m8767,pmic-buck-dvs-gpios = <&gpm3 0 GPIO_ACTIVE_HIGH>, + <&gpm3 1 GPIO_ACTIVE_HIGH>, + <&gpm3 2 GPIO_ACTIVE_HIGH>; + + s5m8767,pmic-buck-ds-gpios = <&gpf3 1 GPIO_ACTIVE_HIGH>, + <&gpf3 2 GPIO_ACTIVE_HIGH>, + <&gpf3 3 GPIO_ACTIVE_HIGH>; + + s5m8767,pmic-buck2-dvs-voltage = <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>; + + s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>; + + s5m8767,pmic-buck4-dvs-voltage = <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "VALIVE_1.0V_AP"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo2_reg: LDO2 { + regulator-name = "VM1M2_1.2V_AP"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo3_reg: LDO3 { + regulator-name = "VCC_1.8V_AP"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + op_mode = <1>; + }; + + ldo5_reg: LDO5 { + regulator-name = "VCC_3.3V_MHL"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + op_mode = <1>; + }; + + ldo8_reg: LDO8 { + regulator-name = "VMIPI_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + op_mode = <3>; + }; + + ldo9_reg: LDO9 { + regulator-name = "VSIL_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + op_mode = <1>; + }; + + ldo10_reg: LDO10 { + regulator-name = "VMIPI_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + op_mode = <3>; + }; + + ldo12_reg: LDO12 { + regulator-name = "VUOTG_3.0V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + op_mode = <1>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo13_reg: LDO13 { + regulator-name = "VCC_1.8V_MHL"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + op_mode = <1>; + }; + + ldo15_reg: LDO15 { + regulator-name = "VHSIC_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + op_mode = <1>; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo17_reg: LDO17 { + regulator-name = "VCC_2.8V_AP"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + op_mode = <1>; + regulator-always-on; + }; + + ldo19_reg: LDO19 { + regulator-name = "VLED_IC_1.9V"; + regulator-min-microvolt = <1900000>; + regulator-max-microvolt = <1900000>; + op_mode = <1>; + regulator-always-on; + }; + + ldo20_reg: LDO20 { + regulator-name = "VTOUCH_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + op_mode = <1>; + }; + + ldo21_reg: LDO21 { + regulator-name = "TSP_VDD_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + op_mode = <1>; + }; + + ldo22_reg: LDO22 { + regulator-name = "5M_AF_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + op_mode = <1>; + }; + + ldo23_reg: LDO23 { + regulator-name = "VTF_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + op_mode = <3>; + }; + + ldo24_reg: LDO24 { + regulator-name = "LEDA_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + op_mode = <1>; + }; + + ldo25_reg: LDO25 { + regulator-name = "TSP_VDD_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + op_mode = <1>; + }; + + ldo26_reg: LDO26 { + regulator-name = "CAM_IO_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + op_mode = <1>; + }; + + ldo27_reg: LDO27 { + regulator-name = "VTCAM_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + op_mode = <1>; + }; + + buck1_reg: BUCK1 { + regulator-name = "VDD_MIF"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + op_mode = <3>; + }; + + buck2_reg: BUCK2 { + regulator-name = "VDD_ARM"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + op_mode = <3>; + }; + + buck3_reg: BUCK3 { + regulator-name = "VDD_INT"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + op_mode = <3>; + }; + + buck4_reg: BUCK4 { + regulator-name = "VDD_G3D"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1150000>; + regulator-boot-on; + op_mode = <3>; + }; + + buck5_reg: BUCK5 { + regulator-name = "VMEM_1.2V_AP"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + buck6_reg: BUCK6 { + regulator-name = "CAM_ISP_CORE_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + op_mode = <1>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + s5m8767_osc: clocks { + compatible = "samsung,s5m8767-clk"; + #clock-cells = <1>; + clock-output-names = "en32khz_ap", + "en32khz_cp", + "en32khz_bt"; + }; + }; +}; + +&i2s0 { + pinctrl-0 = <&i2s0_bus>; + pinctrl-names = "default"; + status = "okay"; +}; + +&mshc_0 { + broken-cd; + non-removable; + card-detect-delay = <200>; + vmmc-supply = <&ldo22_reg>; + clock-frequency = <400000000>; + samsung,dw-mshc-ciu-div = <0>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; + pinctrl-names = "default"; + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + status = "okay"; +}; + +&pinctrl_0 { + pinctrl-names = "default"; + pinctrl-0 = <&sleep0>; + + lcd_en: lcd-en-pins { + samsung,pins = "gpc0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + lcd_nrst: lcd-nrst-pins { + samsung,pins = "gpf0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + s5m8767_ds: s5m8767-ds-pins { + samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + sleep0: sleep-state { + PIN_SLP(gpa0-0, INPUT, NONE); + PIN_SLP(gpa0-1, OUT0, NONE); + PIN_SLP(gpa0-2, INPUT, NONE); + PIN_SLP(gpa0-3, INPUT, UP); + PIN_SLP(gpa0-4, INPUT, DOWN); + PIN_SLP(gpa0-5, INPUT, DOWN); + PIN_SLP(gpa0-6, INPUT, DOWN); + PIN_SLP(gpa0-7, INPUT, DOWN); + + PIN_SLP(gpa1-0, INPUT, DOWN); + PIN_SLP(gpa1-1, INPUT, DOWN); + PIN_SLP(gpa1-2, INPUT, DOWN); + PIN_SLP(gpa1-3, INPUT, DOWN); + PIN_SLP(gpa1-4, INPUT, DOWN); + PIN_SLP(gpa1-5, INPUT, DOWN); + + PIN_SLP(gpb-0, INPUT, NONE); + PIN_SLP(gpb-1, INPUT, NONE); + PIN_SLP(gpb-2, INPUT, NONE); + PIN_SLP(gpb-3, INPUT, NONE); + PIN_SLP(gpb-4, INPUT, DOWN); + PIN_SLP(gpb-5, INPUT, DOWN); + PIN_SLP(gpb-6, INPUT, DOWN); + PIN_SLP(gpb-7, INPUT, DOWN); + + PIN_SLP(gpc0-0, INPUT, DOWN); + PIN_SLP(gpc0-1, INPUT, DOWN); + PIN_SLP(gpc0-2, INPUT, NONE); + PIN_SLP(gpc0-3, INPUT, NONE); + PIN_SLP(gpc0-4, INPUT, NONE); + + PIN_SLP(gpc1-0, INPUT, DOWN); + PIN_SLP(gpc1-1, INPUT, DOWN); + PIN_SLP(gpc1-2, INPUT, DOWN); + PIN_SLP(gpc1-3, INPUT, DOWN); + PIN_SLP(gpc1-4, INPUT, DOWN); + + PIN_SLP(gpd0-0, INPUT, DOWN); + PIN_SLP(gpd0-1, OUT0, NONE); + PIN_SLP(gpd0-2, INPUT, NONE); + PIN_SLP(gpd0-3, INPUT, NONE); + + PIN_SLP(gpd1-0, INPUT, DOWN); + PIN_SLP(gpd1-1, INPUT, DOWN); + PIN_SLP(gpd1-2, INPUT, NONE); + PIN_SLP(gpd1-3, INPUT, NONE); + + PIN_SLP(gpf0-0, INPUT, DOWN); + PIN_SLP(gpf0-1, INPUT, DOWN); + PIN_SLP(gpf0-2, INPUT, DOWN); + PIN_SLP(gpf0-3, INPUT, DOWN); + PIN_SLP(gpf0-4, OUT0, NONE); + PIN_SLP(gpf0-5, OUT0, NONE); + PIN_SLP(gpf0-6, INPUT, DOWN); + PIN_SLP(gpf0-7, INPUT, DOWN); + + PIN_SLP(gpf1-0, INPUT, DOWN); + PIN_SLP(gpf1-1, INPUT, DOWN); + PIN_SLP(gpf1-2, INPUT, DOWN); + PIN_SLP(gpf1-3, INPUT, DOWN); + PIN_SLP(gpf1-4, INPUT, DOWN); + PIN_SLP(gpf1-5, INPUT, DOWN); + PIN_SLP(gpf1-6, INPUT, DOWN); + PIN_SLP(gpf1-7, INPUT, DOWN); + + PIN_SLP(gpf2-0, INPUT, DOWN); + PIN_SLP(gpf2-1, INPUT, DOWN); + PIN_SLP(gpf2-2, INPUT, DOWN); + PIN_SLP(gpf2-3, INPUT, DOWN); + PIN_SLP(gpf2-4, INPUT, DOWN); + PIN_SLP(gpf2-5, INPUT, DOWN); + PIN_SLP(gpf2-6, INPUT, DOWN); + PIN_SLP(gpf2-7, INPUT, DOWN); + + PIN_SLP(gpf3-0, INPUT, DOWN); + PIN_SLP(gpf3-1, INPUT, DOWN); + PIN_SLP(gpf3-2, INPUT, DOWN); + PIN_SLP(gpf3-3, INPUT, DOWN); + PIN_SLP(gpf3-4, PREV, NONE); + PIN_SLP(gpf3-5, OUT0, DOWN); + + PIN_SLP(gpj0-0, INPUT, DOWN); + PIN_SLP(gpj0-1, INPUT, DOWN); + PIN_SLP(gpj0-2, INPUT, DOWN); + PIN_SLP(gpj0-3, OUT0, NONE); + PIN_SLP(gpj0-4, INPUT, DOWN); + PIN_SLP(gpj0-5, INPUT, DOWN); + PIN_SLP(gpj0-6, OUT0, NONE); + PIN_SLP(gpj0-7, OUT0, NONE); + + PIN_SLP(gpj1-0, OUT0, NONE); + PIN_SLP(gpj1-1, INPUT, DOWN); + PIN_SLP(gpj1-2, PREV, NONE); + PIN_SLP(gpj1-3, INPUT, DOWN); + PIN_SLP(gpj1-4, INPUT, DOWN); + }; +}; + +&pinctrl_1 { + pinctrl-names = "default"; + pinctrl-0 = <&sleep1>; + + bt_shutdown: bt-shutdown-pins { + samsung,pins = "gpl0-6"; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + bt_host_wakeup: bt-host-wakeup-pins { + samsung,pins = "gpx2-6"; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + bt_device_wakeup: bt-device-wakeup-pins { + samsung,pins = "gpx3-1"; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + backlight_reset: backlight-reset-pins { + samsung,pins = "gpm0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + gpio_keys: gpio-keys-pins { + samsung,pins = "gpx1-2", "gpx2-2", "gpx2-4", "gpx2-7", "gpx3-3"; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + max77693_irq: max77693-irq-pins { + samsung,pins = "gpx1-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + max77693_fuel_irq: max77693-fuel-irq-pins { + samsung,pins = "gpx2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + sdhci2_cd: sdhci2-cd-irq-pins { + samsung,pins = "gpx3-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + s5m8767_dvs: s5m8767-dvs-pins { + samsung,pins = "gpm3-0", "gpm3-1", "gpm3-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + s5m8767_irq: s5m8767-irq-pins { + samsung,pins = "gpx0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + sleep1: sleep-state { + PIN_SLP(gpk0-0, PREV, NONE); + PIN_SLP(gpk0-1, PREV, NONE); + PIN_SLP(gpk0-2, PREV, NONE); + PIN_SLP(gpk0-3, PREV, NONE); + PIN_SLP(gpk0-4, PREV, NONE); + PIN_SLP(gpk0-5, PREV, NONE); + PIN_SLP(gpk0-6, PREV, NONE); + + PIN_SLP(gpk1-0, INPUT, DOWN); + PIN_SLP(gpk1-1, INPUT, DOWN); + PIN_SLP(gpk1-2, INPUT, DOWN); + PIN_SLP(gpk1-3, PREV, NONE); + PIN_SLP(gpk1-4, PREV, NONE); + PIN_SLP(gpk1-5, PREV, NONE); + PIN_SLP(gpk1-6, PREV, NONE); + + PIN_SLP(gpk2-0, INPUT, DOWN); + PIN_SLP(gpk2-1, INPUT, DOWN); + PIN_SLP(gpk2-2, INPUT, DOWN); + PIN_SLP(gpk2-3, INPUT, DOWN); + PIN_SLP(gpk2-4, INPUT, DOWN); + PIN_SLP(gpk2-5, INPUT, DOWN); + PIN_SLP(gpk2-6, INPUT, DOWN); + + PIN_SLP(gpk3-0, OUT0, NONE); + PIN_SLP(gpk3-1, INPUT, NONE); + PIN_SLP(gpk3-2, INPUT, DOWN); + PIN_SLP(gpk3-3, INPUT, NONE); + PIN_SLP(gpk3-4, INPUT, NONE); + PIN_SLP(gpk3-5, INPUT, NONE); + PIN_SLP(gpk3-6, INPUT, NONE); + + PIN_SLP(gpl0-0, INPUT, DOWN); + PIN_SLP(gpl0-1, INPUT, NONE); + PIN_SLP(gpl0-2, INPUT, NONE); + PIN_SLP(gpl0-3, INPUT, DOWN); + PIN_SLP(gpl0-4, INPUT, DOWN); + PIN_SLP(gpl0-6, PREV, NONE); + + PIN_SLP(gpl1-0, INPUT, DOWN); + PIN_SLP(gpl1-1, OUT0, NONE); + PIN_SLP(gpl2-0, INPUT, DOWN); + PIN_SLP(gpl2-1, PREV, NONE); + PIN_SLP(gpl2-2, PREV, NONE); + PIN_SLP(gpl2-3, INPUT, DOWN); + PIN_SLP(gpl2-4, INPUT, DOWN); + PIN_SLP(gpl2-5, INPUT, DOWN); + PIN_SLP(gpl2-6, INPUT, DOWN); + PIN_SLP(gpl2-7, INPUT, DOWN); + + PIN_SLP(gpm0-0, PREV, NONE); + PIN_SLP(gpm0-1, OUT0, NONE); + PIN_SLP(gpm0-2, INPUT, DOWN); + PIN_SLP(gpm0-3, INPUT, DOWN); + PIN_SLP(gpm0-4, INPUT, DOWN); + PIN_SLP(gpm0-5, INPUT, DOWN); + PIN_SLP(gpm0-6, INPUT, DOWN); + PIN_SLP(gpm0-7, INPUT, DOWN); + + PIN_SLP(gpm1-0, INPUT, DOWN); + PIN_SLP(gpm1-1, INPUT, DOWN); + PIN_SLP(gpm1-2, INPUT, NONE); + PIN_SLP(gpm1-3, INPUT, NONE); + PIN_SLP(gpm1-4, INPUT, NONE); + PIN_SLP(gpm1-5, INPUT, NONE); + PIN_SLP(gpm1-6, OUT0, NONE); + + PIN_SLP(gpm2-0, INPUT, NONE); + PIN_SLP(gpm2-1, INPUT, NONE); + PIN_SLP(gpm2-2, OUT0, NONE); + PIN_SLP(gpm2-3, INPUT, DOWN); + PIN_SLP(gpm2-4, INPUT, DOWN); + + PIN_SLP(gpm3-0, PREV, NONE); + PIN_SLP(gpm3-1, PREV, NONE); + PIN_SLP(gpm3-2, PREV, NONE); + PIN_SLP(gpm3-3, INPUT, DOWN); + PIN_SLP(gpm3-4, INPUT, DOWN); + PIN_SLP(gpm3-5, PREV, NONE); + PIN_SLP(gpm3-6, INPUT, DOWN); + PIN_SLP(gpm3-7, OUT0, NONE); + + PIN_SLP(gpm4-0, INPUT, DOWN); + PIN_SLP(gpm4-1, INPUT, DOWN); + PIN_SLP(gpm4-2, INPUT, DOWN); + PIN_SLP(gpm4-3, INPUT, DOWN); + PIN_SLP(gpm4-4, PREV, NONE); + PIN_SLP(gpm4-5, INPUT, NONE); + PIN_SLP(gpm4-6, INPUT, DOWN); + PIN_SLP(gpm4-7, INPUT, DOWN); + + PIN_SLP(gpy0-0, INPUT, DOWN); + PIN_SLP(gpy0-1, INPUT, DOWN); + PIN_SLP(gpy0-2, INPUT, NONE); + PIN_SLP(gpy0-3, INPUT, NONE); + PIN_SLP(gpy0-4, INPUT, DOWN); + PIN_SLP(gpy0-5, INPUT, DOWN); + + PIN_SLP(gpy1-0, INPUT, DOWN); + PIN_SLP(gpy1-1, INPUT, DOWN); + PIN_SLP(gpy1-2, INPUT, DOWN); + PIN_SLP(gpy1-3, INPUT, DOWN); + + PIN_SLP(gpy2-0, PREV, NONE); + PIN_SLP(gpy2-1, INPUT, DOWN); + PIN_SLP(gpy2-2, INPUT, NONE); + PIN_SLP(gpy2-3, INPUT, NONE); + PIN_SLP(gpy2-4, INPUT, NONE); + PIN_SLP(gpy2-5, INPUT, NONE); + + PIN_SLP(gpy3-0, INPUT, DOWN); + PIN_SLP(gpy3-1, INPUT, DOWN); + PIN_SLP(gpy3-2, INPUT, DOWN); + PIN_SLP(gpy3-3, INPUT, DOWN); + PIN_SLP(gpy3-4, INPUT, DOWN); + PIN_SLP(gpy3-5, INPUT, DOWN); + PIN_SLP(gpy3-6, INPUT, DOWN); + PIN_SLP(gpy3-7, INPUT, DOWN); + + PIN_SLP(gpy4-0, INPUT, DOWN); + PIN_SLP(gpy4-1, INPUT, DOWN); + PIN_SLP(gpy4-2, INPUT, DOWN); + PIN_SLP(gpy4-3, INPUT, DOWN); + PIN_SLP(gpy4-4, INPUT, DOWN); + PIN_SLP(gpy4-5, INPUT, DOWN); + PIN_SLP(gpy4-6, INPUT, DOWN); + PIN_SLP(gpy4-7, INPUT, DOWN); + + PIN_SLP(gpy5-0, INPUT, DOWN); + PIN_SLP(gpy5-1, INPUT, DOWN); + PIN_SLP(gpy5-2, INPUT, DOWN); + PIN_SLP(gpy5-3, INPUT, DOWN); + PIN_SLP(gpy5-4, INPUT, DOWN); + PIN_SLP(gpy5-5, INPUT, DOWN); + PIN_SLP(gpy5-6, INPUT, DOWN); + PIN_SLP(gpy5-7, INPUT, DOWN); + + PIN_SLP(gpy6-0, INPUT, DOWN); + PIN_SLP(gpy6-1, INPUT, DOWN); + PIN_SLP(gpy6-2, INPUT, DOWN); + PIN_SLP(gpy6-3, INPUT, DOWN); + PIN_SLP(gpy6-4, INPUT, DOWN); + PIN_SLP(gpy6-5, INPUT, DOWN); + PIN_SLP(gpy6-6, INPUT, DOWN); + PIN_SLP(gpy6-7, INPUT, DOWN); + }; +}; + +&pinctrl_2 { + pinctrl-names = "default"; + pinctrl-0 = <&sleep2>; + + sleep2: sleep-state { + PIN_SLP(gpz-0, INPUT, DOWN); + PIN_SLP(gpz-1, INPUT, DOWN); + PIN_SLP(gpz-2, INPUT, DOWN); + PIN_SLP(gpz-3, INPUT, DOWN); + PIN_SLP(gpz-4, INPUT, DOWN); + PIN_SLP(gpz-5, INPUT, DOWN); + PIN_SLP(gpz-6, INPUT, DOWN); + }; +}; + +&pinctrl_3 { + pinctrl-names = "default"; + pinctrl-0 = <&sleep3>; + + sleep3: sleep-state { + PIN_SLP(gpv0-0, INPUT, DOWN); + PIN_SLP(gpv0-1, INPUT, DOWN); + PIN_SLP(gpv0-2, INPUT, DOWN); + PIN_SLP(gpv0-3, INPUT, DOWN); + PIN_SLP(gpv0-4, INPUT, DOWN); + PIN_SLP(gpv0-5, INPUT, DOWN); + PIN_SLP(gpv0-6, INPUT, DOWN); + PIN_SLP(gpv0-7, INPUT, DOWN); + + PIN_SLP(gpv1-0, INPUT, DOWN); + PIN_SLP(gpv1-1, INPUT, DOWN); + PIN_SLP(gpv1-2, INPUT, DOWN); + PIN_SLP(gpv1-3, INPUT, DOWN); + PIN_SLP(gpv1-4, INPUT, DOWN); + PIN_SLP(gpv1-5, INPUT, DOWN); + PIN_SLP(gpv1-6, INPUT, DOWN); + PIN_SLP(gpv1-7, INPUT, DOWN); + + PIN_SLP(gpv2-0, INPUT, DOWN); + PIN_SLP(gpv2-1, INPUT, DOWN); + PIN_SLP(gpv2-2, INPUT, DOWN); + PIN_SLP(gpv2-3, INPUT, DOWN); + PIN_SLP(gpv2-4, INPUT, DOWN); + PIN_SLP(gpv2-5, INPUT, DOWN); + PIN_SLP(gpv2-6, INPUT, DOWN); + PIN_SLP(gpv2-7, INPUT, DOWN); + + PIN_SLP(gpv3-0, INPUT, DOWN); + PIN_SLP(gpv3-1, INPUT, DOWN); + PIN_SLP(gpv3-2, INPUT, DOWN); + PIN_SLP(gpv3-3, INPUT, DOWN); + PIN_SLP(gpv3-4, INPUT, DOWN); + PIN_SLP(gpv3-5, INPUT, DOWN); + PIN_SLP(gpv3-6, INPUT, DOWN); + PIN_SLP(gpv3-7, INPUT, DOWN); + + PIN_SLP(gpv4-0, INPUT, DOWN); + PIN_SLP(gpv4-1, INPUT, DOWN); + }; +}; + +&pmu_system_controller { + assigned-clocks = <&pmu_system_controller 0>; + assigned-clock-parents = <&clock CLK_XUSBXTI>; +}; + +&pwm { + pinctrl-0 = <&pwm1_out>; + pinctrl-names = "default"; + samsung,pwm-outputs = <1>; + status = "okay"; +}; + +/* + * The internal RTC does not work; instead, the RTC provided by the + * S5M8766 PMIC is used. Disable the RTC to make sure the working + * one gets used. + * + * We add this node to avoid DTB check warnings, as the Exynos4 RTC + * requires two clocks, and only one is set up by default. + */ +&rtc { + clocks = <&clock CLK_RTC>, <&s5m8767_osc S2MPS11_CLK_AP>; + clock-names = "rtc", "rtc_src"; + status = "disabled"; +}; + +&sdhci_2 { + bus-width = <4>; + cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sdhci2_cd>; + pinctrl-names = "default"; + vmmc-supply = <&ldo23_reg>; + status = "okay"; +}; + +&sdhci_3 { + #address-cells = <1>; + #size-cells = <0>; + non-removable; + bus-width = <4>; + + mmc-pwrseq = <&wlan_pwrseq>; + pinctrl-names = "default"; + pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>; + status = "okay"; + + brcmf: wifi@1 { + compatible = "brcm,bcm4334-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + + interrupt-parent = <&gpx2>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host-wake"; + }; +}; + +&serial_0 { + pinctrl-0 = <&uart0_data &uart0_fctl>; + pinctrl-names = "default"; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm4330-bt"; /* BCM4334B0 */ + pinctrl-0 = <&bt_shutdown &bt_device_wakeup &bt_host_wakeup>; + pinctrl-names = "default"; + max-speed = <3000000>; + shutdown-gpios = <&gpl0 6 GPIO_ACTIVE_HIGH>; + device-wakeup-gpios = <&gpx3 1 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>; + clocks = <&s5m8767_osc S2MPS11_CLK_BT>; + }; +}; + +&serial_1 { + status = "okay"; +}; + +&serial_2 { + status = "okay"; +}; + +&serial_3 { + status = "okay"; +}; + +&tmu { + vtmu-supply = <&ldo10_reg>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi b/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi index e6b949c1a00f..7daf25865551 100644 --- a/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi +++ b/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi @@ -182,6 +182,38 @@ pinctrl-0 = <&max77693_irq>; reg = <0x66>; + muic { + compatible = "maxim,max77693-muic"; + + connector { + compatible = "samsung,usb-connector-11pin", + "usb-b-connector"; + label = "micro-USB"; + type = "micro"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + muic_to_usb: endpoint { + remote-endpoint = <&usb_to_muic>; + }; + }; + + port@3 { + reg = <3>; + + muic_to_mhl: endpoint { + remote-endpoint = <&mhl_to_muic>; + }; + }; + }; + }; + }; + regulators { esafeout1_reg: ESAFEOUT1 { regulator-name = "ESAFEOUT1"; @@ -287,6 +319,14 @@ remote-endpoint = <&hdmi_to_mhl>; }; }; + + port@1 { + reg = <1>; + + mhl_to_muic: endpoint { + remote-endpoint = <&muic_to_mhl>; + }; + }; }; }; }; @@ -545,8 +585,16 @@ &hsotg { vusb_d-supply = <&ldo15_reg>; vusb_a-supply = <&ldo12_reg>; - dr_mode = "peripheral"; + dr_mode = "otg"; + role-switch-default-mode = "peripheral"; + usb-role-switch; status = "okay"; + + port { + usb_to_muic: endpoint { + remote-endpoint = <&muic_to_usb>; + }; + }; }; &i2c_0 { @@ -990,7 +1038,7 @@ &pmu_system_controller { assigned-clocks = <&pmu_system_controller 0>; - assigned-clock-parents = <&clock CLK_XUSBXTI>; + assigned-clock-parents = <&clock CLK_XUSBXTI>; }; &pinctrl_0 { diff --git a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi index c82e2762e07c..65b000df176e 100644 --- a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi +++ b/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi @@ -60,12 +60,9 @@ i2c-arbitrator { compatible = "i2c-arb-gpio-challenge"; - #address-cells = <1>; - #size-cells = <0>; - i2c-parent = <&i2c_4>; - our-claim-gpio = <&gpf0 3 GPIO_ACTIVE_LOW>; + our-claim-gpios = <&gpf0 3 GPIO_ACTIVE_LOW>; their-claim-gpios = <&gpe0 4 GPIO_ACTIVE_LOW>; slew-delay-us = <10>; wait-retry-us = <3000>; @@ -75,8 +72,7 @@ pinctrl-0 = <&arb_our_claim &arb_their_claim>; /* Use ID 104 as a hint that we're on physical bus 4 */ - i2c_104: i2c@0 { - reg = <0>; + i2c_104: i2c-arb { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/samsung/s3c6410-mini6410.dts b/arch/arm/boot/dts/samsung/s3c6410-mini6410.dts index 17097da36f5e..0b07b3c31960 100644 --- a/arch/arm/boot/dts/samsung/s3c6410-mini6410.dts +++ b/arch/arm/boot/dts/samsung/s3c6410-mini6410.dts @@ -51,7 +51,7 @@ ethernet@18000000 { compatible = "davicom,dm9000"; - reg = <0x18000000 0x2 0x18000004 0x2>; + reg = <0x18000000 0x2>, <0x18000004 0x2>; interrupt-parent = <&gpn>; interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; davicom,no-eeprom; diff --git a/arch/arm/boot/dts/samsung/s5pv210-pinctrl.dtsi b/arch/arm/boot/dts/samsung/s5pv210-pinctrl.dtsi index af740abd9e0f..6ecdd504e5f4 100644 --- a/arch/arm/boot/dts/samsung/s5pv210-pinctrl.dtsi +++ b/arch/arm/boot/dts/samsung/s5pv210-pinctrl.dtsi @@ -832,12 +832,12 @@ }; lcd_data24: lcd-data-width24-pins { - samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7", - "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", - "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7", - "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", - "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7", - "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; + samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7", + "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", + "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7", + "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", + "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7", + "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; samsung,pin-function = <S5PV210_PIN_FUNC_2>; samsung,pin-pud = <S5PV210_PIN_PULL_NONE>; samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; diff --git a/arch/arm/boot/dts/samsung/s5pv210-smdkv210.dts b/arch/arm/boot/dts/samsung/s5pv210-smdkv210.dts index 6e26c67e0a26..901e7197b136 100644 --- a/arch/arm/boot/dts/samsung/s5pv210-smdkv210.dts +++ b/arch/arm/boot/dts/samsung/s5pv210-smdkv210.dts @@ -41,7 +41,7 @@ ethernet@a8000000 { compatible = "davicom,dm9000"; - reg = <0xA8000000 0x2 0xA8000002 0x2>; + reg = <0xa8000000 0x2>, <0xa8000002 0x2>; interrupt-parent = <&gph1>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; local-mac-address = [00 00 de ad be ef]; diff --git a/arch/arm/boot/dts/st/Makefile b/arch/arm/boot/dts/st/Makefile index b3e9d29390e3..44b264c399ec 100644 --- a/arch/arm/boot/dts/st/Makefile +++ b/arch/arm/boot/dts/st/Makefile @@ -56,6 +56,8 @@ dtb-$(CONFIG_ARCH_STM32) += \ stm32mp157c-ev1.dtb \ stm32mp157c-ev1-scmi.dtb \ stm32mp157c-lxa-mc1.dtb \ + stm32mp157c-lxa-tac-gen1.dtb \ + stm32mp157c-lxa-tac-gen2.dtb \ stm32mp157c-odyssey.dtb \ stm32mp157c-phycore-stm32mp1-3.dtb dtb-$(CONFIG_ARCH_U8500) += \ diff --git a/arch/arm/boot/dts/st/spear1340.dtsi b/arch/arm/boot/dts/st/spear1340.dtsi index d54e10629a7d..51f6ffd08b42 100644 --- a/arch/arm/boot/dts/st/spear1340.dtsi +++ b/arch/arm/boot/dts/st/spear1340.dtsi @@ -63,8 +63,8 @@ compatible = "snps,designware-i2s"; reg = <0xb2400000 0x10000>; interrupt-names = "play_irq"; - interrupts = <0 98 0x4 - 0 99 0x4>; + interrupts = <0 98 0x4>, + <0 99 0x4>; play; channel = <8>; status = "disabled"; @@ -74,8 +74,8 @@ compatible = "snps,designware-i2s"; reg = <0xb2000000 0x10000>; interrupt-names = "record_irq"; - interrupts = <0 100 0x4 - 0 101 0x4>; + interrupts = <0 100 0x4>, + <0 101 0x4>; record; channel = <8>; status = "disabled"; diff --git a/arch/arm/boot/dts/st/spear13xx.dtsi b/arch/arm/boot/dts/st/spear13xx.dtsi index 913553367687..3b6897084e26 100644 --- a/arch/arm/boot/dts/st/spear13xx.dtsi +++ b/arch/arm/boot/dts/st/spear13xx.dtsi @@ -39,8 +39,8 @@ pmu { compatible = "arm,cortex-a9-pmu"; - interrupts = <0 6 0x04 - 0 7 0x04>; + interrupts = <0 6 0x04>, + <0 7 0x04>; }; L2: cache-controller { @@ -141,10 +141,10 @@ 0xb0820000 0x0010 /* NAND Base ADDR */ 0xb0810000 0x0010>; /* NAND Base CMD */ reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; - interrupts = <0 20 0x4 - 0 21 0x4 - 0 22 0x4 - 0 23 0x4>; + interrupts = <0 20 0x4>, + <0 21 0x4>, + <0 22 0x4>, + <0 23 0x4>; st,mode = <2>; status = "disabled"; }; @@ -152,8 +152,8 @@ gmac0: eth@e2000000 { compatible = "st,spear600-gmac"; reg = <0xe2000000 0x8000>; - interrupts = <0 33 0x4 - 0 34 0x4>; + interrupts = <0 33 0x4>, + <0 34 0x4>; interrupt-names = "macirq", "eth_wake_irq"; status = "disabled"; }; @@ -263,8 +263,8 @@ compatible = "st,designware-i2s"; reg = <0xe0180000 0x1000>; interrupt-names = "play_irq", "record_irq"; - interrupts = <0 10 0x4 - 0 11 0x4 >; + interrupts = <0 10 0x4>, + <0 11 0x4>; status = "disabled"; }; @@ -272,8 +272,8 @@ compatible = "st,designware-i2s"; reg = <0xe0200000 0x1000>; interrupt-names = "play_irq", "record_irq"; - interrupts = <0 26 0x4 - 0 53 0x4>; + interrupts = <0 26 0x4>, + <0 53 0x4>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi index 9f65403295ca..65480a9f5cc4 100644 --- a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi @@ -171,6 +171,16 @@ }; }; + i2c3_pins_a: i2c3-0 { + pins { + pinmux = <STM32_PINMUX('H', 8, AF4)>, /* I2C3_SDA */ + <STM32_PINMUX('H', 7, AF4)>; /* I2C3_SCL */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */ @@ -365,6 +375,41 @@ bias-pull-up; }; }; + + + ltdc_pins_a: ltdc-0 { + pins { + pinmux = <STM32_PINMUX('E', 4, AF14)>, /* LCD_B0 */ + <STM32_PINMUX('G',12, AF9)>, /* LCD_B4 */ + <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */ + <STM32_PINMUX('I',10, AF14)>, /* LCD_HSYNC */ + <STM32_PINMUX('I',14, AF14)>, /* LCD_CLK */ + <STM32_PINMUX('I',15, AF14)>, /* LCD_R0 */ + <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */ + <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */ + <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */ + <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */ + <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */ + <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */ + <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */ + <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */ + <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */ + <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */ + <STM32_PINMUX('J',10, AF14)>, /* LCD_G3 */ + <STM32_PINMUX('J',11, AF14)>, /* LCD_G4 */ + <STM32_PINMUX('J',13, AF14)>, /* LCD_B1 */ + <STM32_PINMUX('J',14, AF14)>, /* LCD_B2 */ + <STM32_PINMUX('J',15, AF14)>, /* LCD_B3 */ + <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */ + <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */ + <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */ + <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */ + <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */ + <STM32_PINMUX('K', 6, AF14)>, /* LCD_B7 */ + <STM32_PINMUX('K', 7, AF14)>; /* LCD_DE */ + slew-rate = <2>; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/st/stm32f746-disco.dts b/arch/arm/boot/dts/st/stm32f746-disco.dts index c11616ed5fc6..37e3a905fc3c 100644 --- a/arch/arm/boot/dts/st/stm32f746-disco.dts +++ b/arch/arm/boot/dts/st/stm32f746-disco.dts @@ -43,8 +43,9 @@ /dts-v1/; #include "stm32f746.dtsi" #include "stm32f746-pinctrl.dtsi" -#include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> / { model = "STMicroelectronics STM32F746-DISCO board"; @@ -60,6 +61,19 @@ reg = <0xC0000000 0x800000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + no-map; + size = <0x80000>; + linux,dma-default; + }; + }; + aliases { serial0 = &usart1; }; @@ -79,12 +93,31 @@ regulator-always-on; }; - mmc_vcard: mmc_vcard { + vcc_3v3: vcc-3v3 { compatible = "regulator-fixed"; - regulator-name = "mmc_vcard"; + regulator-name = "vcc_3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; + + backlight: backlight { + compatible = "gpio-backlight"; + gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + panel_rgb: panel-rgb { + compatible = "rocktech,rk043fn48h"; + power-supply = <&vcc_3v3>; + backlight = <&backlight>; + enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>; + status = "okay"; + port { + panel_in_rgb: endpoint { + remote-endpoint = <<dc_out_rgb>; + }; + }; + }; }; &clk_hse { @@ -99,9 +132,37 @@ status = "okay"; }; +&i2c3 { + pinctrl-0 = <&i2c3_pins_a>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; + + touchscreen@38 { + compatible = "edt,edt-ft5306"; + reg = <0x38>; + interrupt-parent = <&gpioi>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <480>; + touchscreen-size-y = <272>; + }; +}; + +<dc { + pinctrl-0 = <<dc_pins_a>; + pinctrl-names = "default"; + status = "okay"; + + port { + ltdc_out_rgb: endpoint { + remote-endpoint = <&panel_in_rgb>; + }; + }; +}; + &sdio1 { status = "okay"; - vmmc-supply = <&mmc_vcard>; + vmmc-supply = <&vcc_3v3>; cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "opendrain"; pinctrl-0 = <&sdio_pins_a>; diff --git a/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi index 781197ef42d6..139f72b790c0 100644 --- a/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi @@ -8,4 +8,48 @@ &pinctrl { compatible = "st,stm32f746-pinctrl"; + + gpioa: gpio@40020000 { + gpio-ranges = <&pinctrl 0 0 16>; + }; + + gpiob: gpio@40020400 { + gpio-ranges = <&pinctrl 0 16 16>; + }; + + gpioc: gpio@40020800 { + gpio-ranges = <&pinctrl 0 32 16>; + }; + + gpiod: gpio@40020c00 { + gpio-ranges = <&pinctrl 0 48 16>; + }; + + gpioe: gpio@40021000 { + gpio-ranges = <&pinctrl 0 64 16>; + }; + + gpiof: gpio@40021400 { + gpio-ranges = <&pinctrl 0 80 16>; + }; + + gpiog: gpio@40021800 { + gpio-ranges = <&pinctrl 0 96 16>; + }; + + gpioh: gpio@40021c00 { + gpio-ranges = <&pinctrl 0 112 16>; + }; + + gpioi: gpio@40022000 { + gpio-ranges = <&pinctrl 0 128 16>; + }; + + gpioj: gpio@40022400 { + gpio-ranges = <&pinctrl 0 144 16>; + }; + + gpiok: gpio@40022800 { + gpio-ranges = <&pinctrl 0 160 8>; + }; }; diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi index d1802efd067c..53a8e2dec9a4 100644 --- a/arch/arm/boot/dts/st/stm32f746.dtsi +++ b/arch/arm/boot/dts/st/stm32f746.dtsi @@ -257,6 +257,23 @@ status = "disabled"; }; + can3: can@40003400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40003400 0x200>; + interrupts = <104>, <105>, <106>, <107>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN3)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; + st,gcan = <&gcan3>; + status = "disabled"; + }; + + gcan3: gcan@40003600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40003600 0x200>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; + }; + usart2: serial@40004400 { compatible = "st,stm32f7-uart"; reg = <0x40004400 0x400>; @@ -337,6 +354,36 @@ status = "disabled"; }; + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; + st,can-primary; + st,gcan = <&gcan1>; + status = "disabled"; + }; + + gcan1: gcan@40006600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40006600 0x200>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; + }; + + can2: can@40006800 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006800 0x200>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>; + st,can-secondary; + st,gcan = <&gcan1>; + status = "disabled"; + }; + cec: cec@40006c00 { compatible = "st,stm32-cec"; reg = <0x40006C00 0x400>; @@ -507,6 +554,16 @@ }; }; + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + interrupts = <88>, <89>; + resets = <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks = <&rcc 1 CLK_LCD>; + clock-names = "lcd"; + status = "disabled"; + }; + pwrcfg: power-config@40007000 { compatible = "st,stm32-power-config", "syscon"; reg = <0x40007000 0x400>; diff --git a/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi index c26abc04e2ce..02c2a8b08468 100644 --- a/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi @@ -8,4 +8,48 @@ &pinctrl { compatible = "st,stm32f769-pinctrl"; + + gpioa: gpio@40020000 { + gpio-ranges = <&pinctrl 0 0 16>; + }; + + gpiob: gpio@40020400 { + gpio-ranges = <&pinctrl 0 16 16>; + }; + + gpioc: gpio@40020800 { + gpio-ranges = <&pinctrl 0 32 16>; + }; + + gpiod: gpio@40020c00 { + gpio-ranges = <&pinctrl 0 48 16>; + }; + + gpioe: gpio@40021000 { + gpio-ranges = <&pinctrl 0 64 16>; + }; + + gpiof: gpio@40021400 { + gpio-ranges = <&pinctrl 0 80 16>; + }; + + gpiog: gpio@40021800 { + gpio-ranges = <&pinctrl 0 96 16>; + }; + + gpioh: gpio@40021c00 { + gpio-ranges = <&pinctrl 0 112 16>; + }; + + gpioi: gpio@40022000 { + gpio-ranges = <&pinctrl 0 128 16>; + }; + + gpioj: gpio@40022400 { + gpio-ranges = <&pinctrl 0 144 16>; + }; + + gpiok: gpio@40022800 { + gpio-ranges = <&pinctrl 0 160 8>; + }; }; diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index d163c267e34c..ac90fcbf0c09 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -33,6 +33,8 @@ optee { method = "smc"; compatible = "linaro,optee-tz"; + interrupt-parent = <&intc>; + interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; }; scmi: scmi { @@ -40,7 +42,6 @@ #address-cells = <1>; #size-cells = <0>; linaro,optee-channel-id = <0>; - shmem = <&scmi_shm>; scmi_clk: protocol@14 { reg = <0x14>; @@ -51,6 +52,28 @@ reg = <0x16>; #reset-cells = <1>; }; + + scmi_voltd: protocol@17 { + reg = <0x17>; + + scmi_regu: regulators { + #address-cells = <1>; + #size-cells = <0>; + + scmi_reg11: regulator@0 { + reg = <VOLTD_SCMI_REG11>; + regulator-name = "reg11"; + }; + scmi_reg18: regulator@1 { + reg = <VOLTD_SCMI_REG18>; + regulator-name = "reg18"; + }; + scmi_usb33: regulator@2 { + reg = <VOLTD_SCMI_USB33>; + regulator-name = "usb33"; + }; + }; + }; }; }; @@ -77,28 +100,6 @@ always-on; }; - /* PWR 1v1, 1v8 and 3v3 regulators defined as fixed, waiting for SCMI */ - reg11: reg11 { - compatible = "regulator-fixed"; - regulator-name = "reg11"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - }; - - reg18: reg18 { - compatible = "regulator-fixed"; - regulator-name = "reg18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - usb33: usb33 { - compatible = "regulator-fixed"; - regulator-name = "usb33"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - soc { compatible = "simple-bus"; #address-cells = <1>; @@ -106,19 +107,6 @@ interrupt-parent = <&intc>; ranges; - scmi_sram: sram@2ffff000 { - compatible = "mmio-sram"; - reg = <0x2ffff000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x2ffff000 0x1000>; - - scmi_shm: scmi-sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0 0x80>; - }; - }; - timers2: timer@40000000 { #address-cells = <1>; #size-cells = <0>; @@ -813,7 +801,7 @@ g-tx-fifo-size = <256 16 16 16 16 16 16 16>; dr_mode = "otg"; otg-rev = <0x200>; - usb33d-supply = <&usb33>; + usb33d-supply = <&scmi_usb33>; status = "disabled"; }; @@ -1343,8 +1331,8 @@ reg = <0x5a006000 0x1000>; clocks = <&rcc USBPHY_K>; resets = <&rcc USBPHY_R>; - vdda1v1-supply = <®11>; - vdda1v8-supply = <®18>; + vdda1v1-supply = <&scmi_reg11>; + vdda1v8-supply = <&scmi_reg18>; status = "disabled"; usbphyc_port0: usb-phy@0 { diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts index f0900ca672b5..eea740d097c7 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -9,6 +9,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/leds/common.h> +#include <dt-bindings/regulator/st,stm32mp13-regulator.h> #include "stm32mp135.dtsi" #include "stm32mp13xf.dtsi" #include "stm32mp13-pinctrl.dtsi" @@ -65,45 +66,13 @@ default-state = "off"; }; }; - - v3v3_sw: v3v3-sw { - compatible = "regulator-fixed"; - regulator-name = "v3v3_sw"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_adc: vdd-adc { - compatible = "regulator-fixed"; - regulator-name = "vdd_adc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_sd: vdd-sd { - compatible = "regulator-fixed"; - regulator-name = "vdd_sd"; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - regulator-always-on; - }; - - vdd_usb: vdd-usb { - compatible = "regulator-fixed"; - regulator-name = "vdd_usb"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; }; &adc_1 { pinctrl-names = "default"; pinctrl-0 = <&adc1_usb_cc_pins_a>; - vdda-supply = <&vdd_adc>; - vref-supply = <&vdd_adc>; + vdda-supply = <&scmi_vdd_adc>; + vref-supply = <&scmi_vdd_adc>; status = "okay"; adc1: adc@0 { status = "okay"; @@ -195,6 +164,29 @@ status = "okay"; }; +&scmi_regu { + scmi_vdd_adc: regulator@10 { + reg = <VOLTD_SCMI_STPMIC1_LDO1>; + regulator-name = "vdd_adc"; + }; + scmi_vdd_usb: regulator@13 { + reg = <VOLTD_SCMI_STPMIC1_LDO4>; + regulator-name = "vdd_usb"; + }; + scmi_vdd_sd: regulator@14 { + reg = <VOLTD_SCMI_STPMIC1_LDO5>; + regulator-name = "vdd_sd"; + }; + scmi_v1v8_periph: regulator@15 { + reg = <VOLTD_SCMI_STPMIC1_LDO6>; + regulator-name = "v1v8_periph"; + }; + scmi_v3v3_sw: regulator@19 { + reg = <VOLTD_SCMI_STPMIC1_PWR_SW2>; + regulator-name = "v3v3_sw"; + }; +}; + &sdmmc1 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>; @@ -204,7 +196,7 @@ disable-wp; st,neg-edge; bus-width = <4>; - vmmc-supply = <&vdd_sd>; + vmmc-supply = <&scmi_vdd_sd>; status = "okay"; }; @@ -321,7 +313,7 @@ hub@1 { compatible = "usb424,2514"; reg = <1>; - vdd-supply = <&v3v3_sw>; + vdd-supply = <&scmi_v3v3_sw>; }; }; @@ -342,7 +334,7 @@ }; &usbphyc_port0 { - phy-supply = <&vdd_usb>; + phy-supply = <&scmi_vdd_usb>; st,current-boost-microamp = <1000>; st,decrease-hs-slew-rate; st,tune-hs-dc-level = <2>; @@ -356,7 +348,7 @@ }; &usbphyc_port1 { - phy-supply = <&vdd_usb>; + phy-supply = <&scmi_vdd_usb>; st,current-boost-microamp = <1000>; st,decrease-hs-slew-rate; st,tune-hs-dc-level = <2>; diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 05c9c4f8064c..098153ee99a3 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -6,6 +6,17 @@ #include <dt-bindings/pinctrl/stm32-pinfunc.h> &pinctrl { + adc1_ain_pins_a: adc1-ain-0 { + pins { + pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */ + <STM32_PINMUX('B', 1, ANALOG)>, /* ADC1_INP5 */ + <STM32_PINMUX('B', 0, ANALOG)>, /* ADC1_INP9 */ + <STM32_PINMUX('C', 0, ANALOG)>, /* ADC1_INP10 */ + <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1_INP13 */ + <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1_INP15 */ + }; + }; + adc1_in6_pins_a: adc1-in6-0 { pins { pinmux = <STM32_PINMUX('F', 12, ANALOG)>; @@ -391,6 +402,46 @@ }; }; + ethernet0_rgmii_pins_e: rgmii-4 { + pins1 { + pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ + <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ + <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ + <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ + <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ + <STM32_PINMUX('B', 11, AF11)>; /* ETH_RGMII_TX_CTL */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + pins2 { + pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ + <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ + <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ + <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */ + <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ + <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ + bias-disable; + }; + }; + + ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 { + pins1 { + pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ + <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ + <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ + <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ + <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ + <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ + <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ + <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ + <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ + <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */ + <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ + <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ + }; + }; + ethernet0_rmii_pins_a: rmii-0 { pins1 { pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */ @@ -1154,6 +1205,20 @@ }; }; + pwm1_pins_c: pwm1-2 { + pins { + pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */ + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm1_sleep_pins_c: pwm1-sleep-2 { + pins { + pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */ + }; + }; + pwm2_pins_a: pwm2-0 { pins { pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */ @@ -1280,6 +1345,26 @@ }; }; + pwm8_pins_b: pwm8-1 { + pins { + pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */ + <STM32_PINMUX('I', 6, AF3)>, /* TIM8_CH2 */ + <STM32_PINMUX('I', 7, AF3)>, /* TIM8_CH3 */ + <STM32_PINMUX('C', 9, AF3)>; /* TIM8_CH4 */ + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm8_sleep_pins_b: pwm8-sleep-1 { + pins { + pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */ + <STM32_PINMUX('I', 6, ANALOG)>, /* TIM8_CH2 */ + <STM32_PINMUX('I', 7, ANALOG)>, /* TIM8_CH3 */ + <STM32_PINMUX('C', 9, ANALOG)>; /* TIM8_CH4 */ + }; + }; + pwm12_pins_a: pwm12-0 { pins { pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */ @@ -2074,6 +2159,20 @@ }; }; + spi2_pins_c: spi2-2 { + pins1 { + pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */ + <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */ + bias-disable; + drive-push-pull; + }; + + pins2 { + pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */ + bias-pull-down; + }; + }; + spi4_pins_a: spi4-0 { pins { pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */ @@ -2088,6 +2187,21 @@ }; }; + spi5_pins_a: spi5-0 { + pins1 { + pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */ + <STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */ + bias-disable; + }; + }; + stusb1600_pins_a: stusb1600-0 { pins { pinmux = <STM32_PINMUX('I', 11, GPIO)>; @@ -2578,6 +2692,21 @@ }; }; + usart3_pins_f: usart3-5 { + pins1 { + pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ + <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ + <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ + bias-disable; + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */ diff --git a/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi b/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi index 543f24c2f4f6..dc3b09f2f2af 100644 --- a/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi @@ -16,7 +16,6 @@ #address-cells = <1>; #size-cells = <0>; linaro,optee-channel-id = <0>; - shmem = <&scmi_shm>; scmi_clk: protocol@14 { reg = <0x14>; @@ -35,22 +34,21 @@ #address-cells = <1>; #size-cells = <0>; - scmi_reg11: reg11@0 { + scmi_reg11: regulator@0 { reg = <0>; regulator-name = "reg11"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; }; - scmi_reg18: reg18@1 { - voltd-name = "reg18"; + scmi_reg18: regulator@1 { reg = <1>; regulator-name = "reg18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - scmi_usb33: usb33@2 { + scmi_usb33: regulator@2 { reg = <2>; regulator-name = "usb33"; regulator-min-microvolt = <3300000>; @@ -60,21 +58,6 @@ }; }; }; - - soc { - scmi_sram: sram@2ffff000 { - compatible = "mmio-sram"; - reg = <0x2ffff000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x2ffff000 0x1000>; - - scmi_shm: scmi-sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0 0x80>; - }; - }; - }; }; ®11 { diff --git a/arch/arm/boot/dts/st/stm32mp151a-prtt1c.dts b/arch/arm/boot/dts/st/stm32mp151a-prtt1c.dts index 7ecf31263abc..c90d815f906b 100644 --- a/arch/arm/boot/dts/st/stm32mp151a-prtt1c.dts +++ b/arch/arm/boot/dts/st/stm32mp151a-prtt1c.dts @@ -23,6 +23,18 @@ clock-frequency = <25000000>; }; + pse_t1l1: ethernet-pse-1 { + compatible = "podl-pse-regulator"; + pse-supply = <®_t1l1>; + #pse-cells = <0>; + }; + + pse_t1l2: ethernet-pse-2 { + compatible = "podl-pse-regulator"; + pse-supply = <®_t1l2>; + #pse-cells = <0>; + }; + mdio0: mdio { compatible = "virtual,mdio-gpio"; #address-cells = <1>; @@ -32,6 +44,24 @@ }; + reg_t1l1: regulator-pse-t1l1 { + compatible = "regulator-fixed"; + regulator-name = "pse-t1l1"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + gpio = <&gpiog 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_t1l2: regulator-pse-t1l2 { + compatible = "regulator-fixed"; + regulator-name = "pse-t1l2"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + gpio = <&gpiog 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + wifi_pwrseq: wifi-pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&gpiod 8 GPIO_ACTIVE_LOW>; @@ -92,6 +122,7 @@ reset-gpios = <&gpiog 12 GPIO_ACTIVE_LOW>; reset-assert-us = <10>; reset-deassert-us = <35>; + pses = <&pse_t1l1>; }; /* TI DP83TD510E */ @@ -102,6 +133,7 @@ reset-gpios = <&gpiog 11 GPIO_ACTIVE_LOW>; reset-assert-us = <10>; reset-deassert-us = <35>; + pses = <&pse_t1l2>; }; /* Micrel KSZ9031 */ diff --git a/arch/arm/boot/dts/st/stm32mp157.dtsi b/arch/arm/boot/dts/st/stm32mp157.dtsi index 5e733cd16ff9..6197d878894d 100644 --- a/arch/arm/boot/dts/st/stm32mp157.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157.dtsi @@ -22,9 +22,27 @@ reg = <0x5a000000 0x800>; clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>; clock-names = "pclk", "ref", "px_clk"; + phy-dsi-supply = <®18>; resets = <&rcc DSI_R>; reset-names = "apb"; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi_in: endpoint { + }; + }; + + port@1 { + reg = <1>; + dsi_out: endpoint { + }; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts index 4279b26547df..df97e03d2a5a 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts +++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts @@ -46,26 +46,14 @@ &dsi { status = "okay"; - phy-dsi-supply = <®18>; - - ports { - #address-cells = <1>; - #size-cells = <0>; +}; - port@0 { - reg = <0>; - dsi_in: endpoint { - remote-endpoint = <<dc_ep0_out>; - }; - }; +&dsi_in { + remote-endpoint = <<dc_ep0_out>; +}; - port@1 { - reg = <1>; - dsi_out: endpoint { - remote-endpoint = <&bridge_in>; - }; - }; - }; +&dsi_out { + remote-endpoint = <&bridge_in>; }; &i2c6 { diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts index efba54289820..f8e404346396 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts +++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts @@ -46,26 +46,14 @@ &dsi { status = "okay"; - phy-dsi-supply = <®18>; - - ports { - #address-cells = <1>; - #size-cells = <0>; +}; - port@0 { - reg = <0>; - dsi_in_ltdc: endpoint { - remote-endpoint = <<dc_out_dsi>; - }; - }; +&dsi_in { + remote-endpoint = <<dc_out_dsi>; +}; - port@1 { - reg = <1>; - dsi_out_bridge: endpoint { - remote-endpoint = <&bridge_in_dsi>; - }; - }; - }; +&dsi_out { + remote-endpoint = <&bridge_in_dsi>; }; &i2c6 { @@ -88,7 +76,7 @@ port@0 { reg = <0>; bridge_in_dsi: endpoint { - remote-endpoint = <&dsi_out_bridge>; + remote-endpoint = <&dsi_out>; data-lanes = <1 2>; }; }; @@ -108,7 +96,7 @@ port { ltdc_out_dsi: endpoint { - remote-endpoint = <&dsi_in_ltdc>; + remote-endpoint = <&dsi_in>; }; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts index 4bef2300ed7c..510cca5acb79 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts @@ -34,26 +34,6 @@ #address-cells = <1>; #size-cells = <0>; status = "okay"; - phy-dsi-supply = <®18>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dsi_in: endpoint { - remote-endpoint = <<dc_ep1_out>; - }; - }; - - port@1 { - reg = <1>; - dsi_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; - }; panel@0 { compatible = "orisetech,otm8009a"; @@ -70,6 +50,14 @@ }; }; +&dsi_in { + remote-endpoint = <<dc_ep1_out>; +}; + +&dsi_out { + remote-endpoint = <&panel_in>; +}; + &i2c1 { touchscreen@38 { compatible = "focaltech,ft6236"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-emsbc-argon.dts b/arch/arm/boot/dts/st/stm32mp157c-emsbc-argon.dts index 33b3f11d24bb..a19c488cf7c8 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-emsbc-argon.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-emsbc-argon.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or MIT) +// SPDX-License-Identifier: (GPL-2.0 OR MIT) // // Copyright (c) 2021 emtrion GmbH // Author: Reinhold Müller <reinhold.mueller@emtrion.de>. diff --git a/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi b/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi index 94e38141af67..f928cfb80b87 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or MIT) +// SPDX-License-Identifier: (GPL-2.0 OR MIT) // // Copyright (c) 2021 emtrion GmbH // Author: Reinhold Müller <reinhold.mueller@emtrion.de>. @@ -310,7 +310,6 @@ vref_ddr: vref_ddr { regulator-name = "vref_ddr"; regulator-always-on; - regulator-over-current-protection; }; bst_out: boost { @@ -321,7 +320,7 @@ vbus_otg: pwr_sw1 { regulator-name = "vbus_otg"; interrupts = <IT_OCP_OTG 0>; - regulator-active-discharge; + regulator-active-discharge = <1>; }; vbus_usbh: pwr_sw2 { @@ -368,8 +367,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; interrupt-names = "wdg"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts index af3800501875..cd9c3ff5378b 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts @@ -100,30 +100,10 @@ }; &dsi { - phy-dsi-supply = <®18>; #address-cells = <1>; #size-cells = <0>; status = "okay"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dsi_in: endpoint { - remote-endpoint = <<dc_ep0_out>; - }; - }; - - port@1 { - reg = <1>; - dsi_out: endpoint { - remote-endpoint = <&dsi_panel_in>; - }; - }; - }; - panel@0 { compatible = "raydium,rm68200"; reg = <0>; @@ -140,6 +120,14 @@ }; }; +&dsi_in { + remote-endpoint = <<dc_ep0_out>; +}; + +&dsi_out { + remote-endpoint = <&dsi_panel_in>; +}; + ðernet0 { status = "okay"; pinctrl-0 = <ðernet0_rgmii_pins_a>; diff --git a/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts new file mode 100644 index 000000000000..81f254fb88b0 --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix + * Copyright (C) 2023 Leonard Göhrs, Pengutronix + */ + +/dts-v1/; + +#include "stm32mp157.dtsi" +#include "stm32mp15xc-lxa-tac.dtsi" + +/ { + model = "Linux Automation Test Automation Controller (TAC) Gen 1"; + compatible = "lxa,stm32mp157c-tac-gen1", "oct,stm32mp15xx-osd32", "st,stm32mp157"; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&v3v3>; + + brightness-levels = <0 31 63 95 127 159 191 223 255>; + default-brightness-level = <7>; + pwms = <&backlight_pwm 1 1000000 0>; + }; + + reg_iobus_12v: regulator-iobus-12v { + compatible = "regulator-fixed"; + vin-supply = <®_12v>; + + gpio = <&gpioh 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-max-microvolt = <12000000>; + regulator-min-microvolt = <12000000>; + regulator-name = "12V_IOBUS"; + }; +}; + +&gpioa { + gpio-line-names = "", "", "STACK_CS2", "", "STACK_CS3", /* 0 */ + "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */ + "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */ + ""; /* 15 */ +}; + +&gpioc { + gpio-line-names = "", "STACK_CS1", "", "", "", /* 0 */ + "", "", "", "", "", /* 5 */ + "", ""; /* 10 */ +}; + +&gpu { + status = "disabled"; +}; + +&i2c1 { + powerboard_gpio: gpio@24 { + compatible = "nxp,pca9570"; + reg = <0x24>; + + #gpio-cells = <2>; + gpio-controller; + gpio-line-names = "DUT_PWR_EN", "DUT_PWR_DISCH", "DUT_PWR_ADCRST", ""; + }; +}; + +&spi2 { + adc@0 { + compatible = "ti,lmp92064"; + reg = <0>; + spi-max-frequency = <5000000>; + vdd-supply = <®_pb_3v3>; + vdig-supply = <®_pb_3v3>; + reset-gpios = <&powerboard_gpio 2 GPIO_ACTIVE_HIGH>; + + shunt-resistor-micro-ohms = <15000>; + }; +}; + +&timers1 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; + + backlight_pwm: pwm { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pwm1_pins_c>; + pinctrl-1 = <&pwm1_sleep_pins_c>; + + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts new file mode 100644 index 000000000000..8a34d15e9005 --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix + * Copyright (C) 2023 Leonard Göhrs, Pengutronix + */ + +/dts-v1/; + +#include "stm32mp157.dtsi" +#include "stm32mp15xc-lxa-tac.dtsi" + +/ { + model = "Linux Automation Test Automation Controller (TAC) Gen 2"; + compatible = "lxa,stm32mp157c-tac-gen2", "oct,stm32mp15xx-osd32", "st,stm32mp157"; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&v3v3>; + + brightness-levels = <0 31 63 95 127 159 191 223 255>; + default-brightness-level = <7>; + pwms = <&led_pwm 3 1000000 0>; + }; + + reg_iobus_12v: regulator-iobus-12v { + compatible = "regulator-fixed"; + vin-supply = <®_12v>; + gpio = <&gpioh 13 GPIO_ACTIVE_LOW>; + regulator-max-microvolt = <12000000>; + regulator-min-microvolt = <12000000>; + regulator-name = "12V_IOBUS"; + }; + + led-controller-1 { + compatible = "pwm-leds-multicolor"; + + multi-led { + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_STATUS; + max-brightness = <65535>; + + led-red { + active-low; + color = <LED_COLOR_ID_RED>; + pwms = <&led_pwm 0 1000000 0>; + }; + + led-green { + active-low; + color = <LED_COLOR_ID_GREEN>; + pwms = <&led_pwm 2 1000000 0>; + }; + + led-blue { + active-low; + color = <LED_COLOR_ID_BLUE>; + pwms = <&led_pwm 1 1000000 0>; + }; + }; + }; + + led-controller-2 { + compatible = "gpio-leds"; + + led-5 { + label = "tac:green:iobus"; + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>; + }; + + led-6 { + label = "tac:green:can"; + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>; + }; + + led-7 { + label = "tac:green:out0"; + gpios = <&gpiob 8 GPIO_ACTIVE_HIGH>; + }; + + led-8 { + label = "tac:green:out1"; + gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>; + }; + + led-9 { + label = "tac:green:uarttx"; + gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>; + }; + + led-10 { + label = "tac:green:uartrx"; + gpios = <&gpiof 6 GPIO_ACTIVE_HIGH>; + }; + + led-11 { + label = "tac:green:usbh1"; + gpios = <&gpioc 8 GPIO_ACTIVE_HIGH>; + }; + + led-12 { + label = "tac:green:usbh2"; + gpios = <&gpiod 6 GPIO_ACTIVE_HIGH>; + }; + + led-13 { + label = "tac:green:usbh3"; + gpios = <&gpiob 9 GPIO_ACTIVE_HIGH>; + }; + + led-14 { + label = "tac:green:usbg"; + gpios = <&gpiod 14 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "usb-gadget"; + }; + + led-15 { + label = "tac:green:dutpwr"; + gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gpioa { + gpio-line-names = "", "", "DUT_PWR_EN", "", "STACK_CS3", /* 0 */ + "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */ + "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */ + ""; /* 15 */ +}; + +&gpioc { + gpio-line-names = "", "DUT_PWR_DISCH", "", "", "", /* 0 */ + "", "", "", "", "", /* 5 */ + "", ""; /* 10 */ +}; + +&gpu { + status = "disabled"; +}; + +&m_can2 { + termination-gpios = <&gpioe 4 GPIO_ACTIVE_HIGH>; + termination-ohms = <120>; +}; + +&spi2 { + adc@0 { + compatible = "ti,lmp92064"; + reg = <0>; + + reset-gpios = <&gpioa 4 GPIO_ACTIVE_HIGH>; + shunt-resistor-micro-ohms = <15000>; + spi-max-frequency = <5000000>; + vdd-supply = <®_pb_3v3>; + vdig-supply = <®_pb_3v3>; + }; +}; + +&timers8 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; + + led_pwm: pwm { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pwm8_pins_b>; + pinctrl-1 = <&pwm8_sleep_pins_b>; + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi b/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi index e22871dc580c..cf7485251490 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi @@ -230,8 +230,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; diff --git a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi new file mode 100644 index 000000000000..184b8bb4ebbf --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi @@ -0,0 +1,610 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix + * Copyright (C) 2023 Leonard Göhrs, Pengutronix + */ + +#include "stm32mp15xc.dtsi" +#include "stm32mp15xx-osd32.dtsi" +#include "stm32mp15xxac-pinctrl.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pwm/pwm.h> + +/ { + aliases { + ethernet0 = ðernet0; + ethernet1 = &port_uplink; + ethernet2 = &port_dut; + mmc1 = &sdmmc2; + serial0 = &uart4; + serial1 = &usart3; + }; + + chosen { + stdout-path = &uart4; + }; + + led-controller-0 { + compatible = "gpio-leds"; + + led-0 { + label = "tac:green:user1"; + gpios = <&gpiof 10 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-1 { + label = "tac:green:user2"; + gpios = <&gpiog 7 GPIO_ACTIVE_HIGH>; + }; + + led-2 { + label = "tac:green:statusdut"; + gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; + }; + + /* led-3 and led-4 are internally connected antiparallel to one + * another inside the ethernet jack like this: + * GPIOA14 ---+---|led-3|>--+--- GPIOD15 + * +--<|led-4|---+ + * E.g. only one of the LEDs can be illuminated at a time while + * the other output must be driven low. + * This should likely be implemented using a multi color LED + * driver for antiparallel LEDs. + */ + led-3 { + label = "tac:green:statuslab"; + gpios = <&gpioa 14 GPIO_ACTIVE_HIGH>; + }; + + led-4 { + label = "tac:orange:statuslab"; + gpios = <&gpiod 15 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-lower { + label = "USER_BTN2"; + linux,code = <KEY_ESC>; + gpios = <&gpioe 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + + button-upper { + label = "USER_BTN"; + linux,code = <KEY_HOME>; + gpios = <&gpioi 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + }; + + /* supplied by either barrel connector or PoE */ + reg_12v: regulator-12v { + compatible = "regulator-fixed"; + regulator-name = "12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible = "regulator-fixed"; + regulator-name = "5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_12v>; + }; + + reg_1v2: regulator-1v2 { + compatible = "regulator-fixed"; + regulator-name = "1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + vin-supply = <®_5v>; + }; + + reg_pb_5v: regulator-pb-5v { + compatible = "regulator-fixed"; + regulator-name = "5V_POWERBOARD"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_5v>; + }; + + reg_pb_3v3: regulator-pb-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3V3_POWERBOARD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <®_pb_5v>; + }; + + output-iobus-12v { + compatible = "regulator-output"; + vout-supply = <®_iobus_12v>; + }; + + output-vuart { + compatible = "regulator-output"; + vout-supply = <&v3v3_hdmi>; + }; +}; + +baseboard_eeprom: &sip_eeprom { +}; + +&adc { + pinctrl-names = "default"; + pinctrl-0 = <&adc1_ain_pins_a>; + vdd-supply = <&vdd>; + vdda-supply = <&vdda>; + vref-supply = <&vrefbuf>; + status = "okay"; + + adc1: adc@0 { + st,adc-channels = <0 1 2 5 9 10 13 15>; + st,min-sample-time-nsecs = <5000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + channel@0 { + reg = <0>; + label = "HOST_2_CURR_FB"; + }; + + channel@1 { + reg = <1>; + label = "HOST_3_CURR_FB"; + }; + + channel@2 { + reg = <2>; + label = "OUT_0_FB"; + }; + + channel@5 { + reg = <5>; + label = "IOBUS_CURR_FB"; + }; + + channel@9 { + reg = <9>; + label = "IOBUS_VOLT_FB"; + }; + + channel@10 { + reg = <10>; + label = "OUT_1_FB"; + }; + + channel@13 { + reg = <13>; + label = "HOST_CURR_FB"; + }; + + channel@15 { + reg = <15>; + label = "HOST_1_CURR_FB"; + }; + }; + + adc2: adc@100 { + st,adc-channels = <12>; + st,min-sample-time-nsecs = <500000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + channel@12 { + reg = <12>; + label = "TEMP_INTERNAL"; + }; + }; +}; + +&crc1 { + status = "okay"; +}; + +&cryp1 { + status = "okay"; +}; + +&dts { + status = "okay"; +}; + +ðernet0 { + assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL4_P>; + assigned-clock-parents = <&rcc PLL4_P>; + assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF */ + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <ðernet0_rgmii_pins_e>; + pinctrl-1 = <ðernet0_rgmii_sleep_pins_e>; + + st,eth-clk-sel; + phy-mode = "rgmii-id"; + + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +ðernet0_rgmii_pins_e { + pins1 { + /* Reduce EMI emission by reducing RGMII drive strength */ + slew-rate = <1>; + }; +}; + +&gpiob { + gpio-line-names = "", "", "", "", "", /* 0 */ + "", "USB_RESET", "", "", "", /* 5 */ + "", "", "", "", "", /* 10 */ + ""; /* 15 */ +}; + +&gpiod { + gpio-line-names = "", "", "", "", "TP38", /* 0 */ + "TP39", "", "", "TP41", "TP42", /* 5 */ + "OLED_DC", "", "", "ETH_CS", "", /* 10 */ + "ETH_LAB_LEDRN"; /* 15 */ +}; + +&gpioe { + gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */ + "", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */ + "UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */ + "TP27"; /* 15 */ +}; + +&gpiof { + gpio-line-names = "TP36", "TP37", "", "", "OLED_CS", /* 0 */ + "", "", "", "", "", /* 5 */ + "USER_LED1", "", "STACK_CS0", "", "", /* 10 */ + ""; /* 15 */ +}; + +&gpiog { + gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */ + "IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */ + "TP49", "", "", "", "", /* 10 */ + ""; /* 15 */ +}; + +&gpioh { + gpio-line-names = "", "", "OUT_1", "OUT_0", "OLED_RESET", /* 0 */ + "", "", "", "", "", /* 5 */ + "ETH1_PPS_B", "ETH_GPIO2", "", "IOBUS_PWR_EN", "", /* 10 */ + "TP33"; /* 15 */ +}; + +&gpioi { + gpio-line-names = "TIM_RTS", "", "", "", "DEVICE_DATA_EN", /* 0 */ + "", "", "", "ETH_WOL", "TP43", /* 5 */ + "", "USER_BTN"; /* 10 */ +}; + +&gpioz { + gpio-line-names = "HWID0", "HWID1", "HWID2", "HWID3", "", /* 0 */ + "", "HWID4", "HWID5"; /* 5 */ +}; + +&hash1 { + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_pins_b>; + pinctrl-1 = <&i2c1_sleep_pins_b>; + status = "okay"; + + powerboard_eeprom: eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + vcc-supply = <&v3v3>; + }; + + temperature-sensor@48 { + compatible = "national,lm75a"; + reg = <0x48>; + status = "disabled"; + }; +}; + +&i2c5 { + /delete-property/dmas; + /delete-property/dma-names; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c5_pins_b>; + pinctrl-1 = <&i2c5_sleep_pins_b>; + + status = "okay"; + + usbhub: usbhub@2c { + compatible ="microchip,usb2514b"; + reg = <0x2c>; + vdd-supply = <&v3v3>; + reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>; + }; +}; + +&iwdg2 { + timeout-sec = <8>; + status = "okay"; +}; + +&m_can1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&m_can1_pins_b>; + pinctrl-1 = <&m_can1_sleep_pins_b>; + status = "okay"; +}; + +&m_can2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&m_can2_pins_a>; + pinctrl-1 = <&m_can2_sleep_pins_a>; + status = "okay"; +}; + +&pmic { + regulators { + buck1-supply = <®_5v>; /* VIN */ + buck2-supply = <®_5v>; /* VIN */ + buck3-supply = <®_5v>; /* VIN */ + buck4-supply = <®_5v>; /* VIN */ + ldo2-supply = <®_5v>; /* PMIC_LDO25IN */ + ldo4-supply = <®_5v>; /* VIN */ + ldo5-supply = <®_5v>; /* PMIC_LDO25IN */ + vref_ddr-supply = <®_5v>; /* VIN */ + boost-supply = <®_5v>; /* PMIC_BSTIN */ + pwr_sw2-supply = <&bst_out>; /* PMIC_SWIN */ + }; +}; + +&pwr_regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; +}; + +&rtc { + status = "okay"; +}; + +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>; + vmmc-supply = <&v3v3>; + + bus-width = <8>; + mmc-ddr-3_3v; + no-1-8-v; + non-removable; + no-sd; + no-sdio; + st,neg-edge; + + status = "okay"; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_c>; + cs-gpios = <&gpiof 12 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&spi4 { + pinctrl-names = "default"; + pinctrl-0 = <&spi4_pins_a>; + cs-gpios = <&gpiof 4 GPIO_ACTIVE_LOW>; + status = "okay"; + + lcd: display@0 { + compatible = "shineworld,lh133k", "panel-mipi-dbi-spi"; + reg = <0>; + power-supply = <&v3v3>; + io-supply = <&v3v3>; + backlight = <&backlight>; + dc-gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpioh 4 GPIO_ACTIVE_HIGH>; + spi-3wire; + spi-max-frequency = <32000000>; + + width-mm = <23>; + height-mm = <23>; + rotation = <180>; + + panel-timing { + hactive = <240>; + vactive = <240>; + hback-porch = <0>; + vback-porch = <0>; + + clock-frequency = <0>; + hfront-porch = <0>; + hsync-len = <0>; + vfront-porch = <0>; + vsync-len = <0>; + }; + }; +}; + +&spi5 { + pinctrl-names = "default"; + pinctrl-0 = <&spi5_pins_a>; + + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + cs-gpios = <&gpiod 13 GPIO_ACTIVE_LOW>; + + status = "okay"; + + switch: switch@0 { + compatible = "microchip,ksz9563"; + reg = <0>; + + reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; + spi-max-frequency = <44000000>; + + interrupt-parent = <&gpioa>; + interrupts = <6 IRQ_TYPE_EDGE_RISING>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port_dut: port@0 { + reg = <0>; + label = "dut"; + }; + + port_uplink: port@1 { + reg = <1>; + label = "uplink"; + }; + + port_cpu: port@2 { + reg = <2>; + label = "cpu"; + + ethernet = <ðernet0>; + + phy-mode = "rgmii-id"; + rx-internal-delay-ps = <2000>; + tx-internal-delay-ps = <2000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; +}; + +&timers2 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; + + timer@1 { + status = "okay"; + }; +}; + +&timers3 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; + + timer@2 { + status = "okay"; + }; +}; + +&timers4 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; + + timer@3 { + status = "okay"; + }; +}; + +&uart4 { + label = "debug"; + + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_a>; + + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; +}; + +&usart3 { + label = "dut"; + uart-has-rtscts; + + pinctrl-names = "default"; + pinctrl-0 = <&usart3_pins_f>; + + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; +}; + +&usbh_ehci { + phys = <&usbphyc_port0>; + phy-names = "usb"; + + status = "okay"; +}; + +&usbotg_hs { + phys = <&usbphyc_port1 0>; + phy-names = "usb2-phy"; + + vusb_d-supply = <&vdd_usb>; + vusb_a-supply = <®18>; + + dr_mode = "peripheral"; + + status = "okay"; +}; + +&usbphyc { + status = "okay"; +}; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; +}; + +&v3v3_hdmi { + /delete-property/regulator-always-on; +}; + +&vrefbuf { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + vdda-supply = <&vdda>; + + status = "okay"; +}; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi index e61df23d361a..74a11ccc5333 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi @@ -416,8 +416,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi index bba19f21e527..89881a26c614 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi @@ -227,8 +227,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; diff --git a/arch/arm/boot/dts/ti/davinci/da850-evm.dts b/arch/arm/boot/dts/ti/davinci/da850-evm.dts index 111708d992ca..6c5936278e75 100644 --- a/arch/arm/boot/dts/ti/davinci/da850-evm.dts +++ b/arch/arm/boot/dts/ti/davinci/da850-evm.dts @@ -161,7 +161,7 @@ &pmx_core { status = "okay"; - mcasp0_pins: pinmux_mcasp0_pins { + mcasp0_pins: mcasp0-pins { pinctrl-single,bits = < /* * AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR, @@ -172,7 +172,7 @@ 0x04 0x00011000 0x000ff000 >; }; - nand_pins: nand_pins { + nand_pins: nand-pins { pinctrl-single,bits = < /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */ 0x1c 0x10110110 0xf0ff0ff0 diff --git a/arch/arm/boot/dts/ti/davinci/da850-lcdk.dts b/arch/arm/boot/dts/ti/davinci/da850-lcdk.dts index e379d6e7ad49..8390d71b000a 100644 --- a/arch/arm/boot/dts/ti/davinci/da850-lcdk.dts +++ b/arch/arm/boot/dts/ti/davinci/da850-lcdk.dts @@ -199,7 +199,7 @@ &pmx_core { status = "okay"; - mcasp0_pins: pinmux_mcasp0_pins { + mcasp0_pins: mcasp0-pins { pinctrl-single,bits = < /* AHCLKX AFSX ACLKX */ 0x00 0x00101010 0x00f0f0f0 @@ -208,7 +208,7 @@ >; }; - nand_pins: nand_pins { + nand_pins: nand-pins { pinctrl-single,bits = < /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */ 0x1c 0x10110010 0xf0ff00f0 diff --git a/arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts b/arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts index afd04a423856..4df10379ff22 100644 --- a/arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts +++ b/arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts @@ -234,7 +234,7 @@ &pmx_core { status = "okay"; - ev3_lcd_pins: pinmux_lcd { + ev3_lcd_pins: lcd-pins { pinctrl-single,bits = < /* SIMO, CLK */ 0x14 0x00100100 0x00f00f00 @@ -391,7 +391,7 @@ pinctrl-names = "default"; cs-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; - display@0{ + display@0 { compatible = "lego,ev3-lcd"; reg = <0>; spi-max-frequency = <10000000>; diff --git a/arch/arm/boot/dts/ti/davinci/da850.dtsi b/arch/arm/boot/dts/ti/davinci/da850.dtsi index e46e4d22db39..f759fdfe1b10 100644 --- a/arch/arm/boot/dts/ti/davinci/da850.dtsi +++ b/arch/arm/boot/dts/ti/davinci/da850.dtsi @@ -170,55 +170,55 @@ #pinctrl-single,gpio-range-cells = <3>; }; - serial0_rtscts_pins: pinmux_serial0_rtscts_pins { + serial0_rtscts_pins: serial0-rtscts-pins { pinctrl-single,bits = < /* UART0_RTS UART0_CTS */ 0x0c 0x22000000 0xff000000 >; }; - serial0_rxtx_pins: pinmux_serial0_rxtx_pins { + serial0_rxtx_pins: serial0-rxtx-pins { pinctrl-single,bits = < /* UART0_TXD UART0_RXD */ 0x0c 0x00220000 0x00ff0000 >; }; - serial1_rtscts_pins: pinmux_serial1_rtscts_pins { + serial1_rtscts_pins: serial1-rtscts-pins { pinctrl-single,bits = < /* UART1_CTS UART1_RTS */ 0x00 0x00440000 0x00ff0000 >; }; - serial1_rxtx_pins: pinmux_serial1_rxtx_pins { + serial1_rxtx_pins: serial1-rxtx-pins { pinctrl-single,bits = < /* UART1_TXD UART1_RXD */ 0x10 0x22000000 0xff000000 >; }; - serial2_rtscts_pins: pinmux_serial2_rtscts_pins { + serial2_rtscts_pins: serial2-rtscts-pins { pinctrl-single,bits = < /* UART2_CTS UART2_RTS */ 0x00 0x44000000 0xff000000 >; }; - serial2_rxtx_pins: pinmux_serial2_rxtx_pins { + serial2_rxtx_pins: serial2-rxtx-pins { pinctrl-single,bits = < /* UART2_TXD UART2_RXD */ 0x10 0x00220000 0x00ff0000 >; }; - i2c0_pins: pinmux_i2c0_pins { + i2c0_pins: i2c0-pins { pinctrl-single,bits = < /* I2C0_SDA,I2C0_SCL */ 0x10 0x00002200 0x0000ff00 >; }; - i2c1_pins: pinmux_i2c1_pins { + i2c1_pins: i2c1-pins { pinctrl-single,bits = < /* I2C1_SDA, I2C1_SCL */ 0x10 0x00440000 0x00ff0000 >; }; - mmc0_pins: pinmux_mmc_pins { + mmc0_pins: mmc-pins { pinctrl-single,bits = < /* MMCSD0_DAT[3] MMCSD0_DAT[2] * MMCSD0_DAT[1] MMCSD0_DAT[0] @@ -227,85 +227,85 @@ 0x28 0x00222222 0x00ffffff >; }; - ehrpwm0a_pins: pinmux_ehrpwm0a_pins { + ehrpwm0a_pins: ehrpwm0a-pins { pinctrl-single,bits = < /* EPWM0A */ 0xc 0x00000002 0x0000000f >; }; - ehrpwm0b_pins: pinmux_ehrpwm0b_pins { + ehrpwm0b_pins: ehrpwm0b-pins { pinctrl-single,bits = < /* EPWM0B */ 0xc 0x00000020 0x000000f0 >; }; - ehrpwm1a_pins: pinmux_ehrpwm1a_pins { + ehrpwm1a_pins: ehrpwm1a-pins { pinctrl-single,bits = < /* EPWM1A */ 0x14 0x00000002 0x0000000f >; }; - ehrpwm1b_pins: pinmux_ehrpwm1b_pins { + ehrpwm1b_pins: ehrpwm1b-pins { pinctrl-single,bits = < /* EPWM1B */ 0x14 0x00000020 0x000000f0 >; }; - ecap0_pins: pinmux_ecap0_pins { + ecap0_pins: ecap0-pins { pinctrl-single,bits = < /* ECAP0_APWM0 */ 0x8 0x20000000 0xf0000000 >; }; - ecap1_pins: pinmux_ecap1_pins { + ecap1_pins: ecap1-pins { pinctrl-single,bits = < /* ECAP1_APWM1 */ 0x4 0x40000000 0xf0000000 >; }; - ecap2_pins: pinmux_ecap2_pins { + ecap2_pins: ecap2-pins { pinctrl-single,bits = < /* ECAP2_APWM2 */ 0x4 0x00000004 0x0000000f >; }; - spi0_pins: pinmux_spi0_pins { + spi0_pins: spi0-pins { pinctrl-single,bits = < /* SIMO, SOMI, CLK */ 0xc 0x00001101 0x0000ff0f >; }; - spi0_cs0_pin: pinmux_spi0_cs0 { + spi0_cs0_pin: spi0-cs0-pins { pinctrl-single,bits = < /* CS0 */ 0x10 0x00000010 0x000000f0 >; }; - spi0_cs3_pin: pinmux_spi0_cs3_pin { + spi0_cs3_pin: spi0-cs3-pins { pinctrl-single,bits = < /* CS3 */ 0xc 0x01000000 0x0f000000 >; }; - spi1_pins: pinmux_spi1_pins { + spi1_pins: spi1-pins { pinctrl-single,bits = < /* SIMO, SOMI, CLK */ 0x14 0x00110100 0x00ff0f00 >; }; - spi1_cs0_pin: pinmux_spi1_cs0 { + spi1_cs0_pin: spi1-cs0-pins { pinctrl-single,bits = < /* CS0 */ 0x14 0x00000010 0x000000f0 >; }; - mdio_pins: pinmux_mdio_pins { + mdio_pins: mdio-pins { pinctrl-single,bits = < /* MDIO_CLK, MDIO_D */ 0x10 0x00000088 0x000000ff >; }; - mii_pins: pinmux_mii_pins { + mii_pins: mii-pins { pinctrl-single,bits = < /* * MII_TXEN, MII_TXCLK, MII_COL @@ -321,7 +321,7 @@ 0xc 0x88888888 0xffffffff >; }; - lcd_pins: pinmux_lcd_pins { + lcd_pins: lcd-pins { pinctrl-single,bits = < /* * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5], @@ -342,7 +342,7 @@ 0x4c 0x02000022 0x0f0000ff >; }; - vpif_capture_pins: vpif_capture_pins { + vpif_capture_pins: vpif-capture-pins { pinctrl-single,bits = < /* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */ 0x38 0x11111111 0xffffffff @@ -352,7 +352,7 @@ 0x40 0x00000011 0x000000ff >; }; - vpif_display_pins: vpif_display_pins { + vpif_display_pins: vpif-display-pins { pinctrl-single,bits = < /* VP_DOUT[2..7] */ 0x40 0x11111100 0xffffff00 @@ -421,7 +421,7 @@ /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */ reg = <0x0 0x8000>; reg-names = "edma3_cc"; - interrupts = <11 12>; + interrupts = <11>, <12>; interrupt-names = "edma3_ccint", "edma3_ccerrint"; #dma-cells = <2>; @@ -447,7 +447,7 @@ /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */ reg = <0x230000 0x8000>; reg-names = "edma3_cc"; - interrupts = <93 94>; + interrupts = <93>, <94>; interrupt-names = "edma3_ccint", "edma3_ccerrint"; #dma-cells = <2>; @@ -494,8 +494,7 @@ rtc0: rtc@23000 { compatible = "ti,da830-rtc"; reg = <0x23000 0x1000>; - interrupts = <19 - 19>; + interrupts = <19>, <19>; clocks = <&pll0_auxclk>; clock-names = "int-clk"; status = "disabled"; @@ -725,11 +724,7 @@ ti,davinci-ctrl-ram-offset = <0>; ti,davinci-ctrl-ram-size = <0x2000>; local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <33 - 34 - 35 - 36 - >; + interrupts = <33>, <34>, <35>,<36>; clocks = <&psc1 5>; power-domains = <&psc1 5>; status = "disabled"; @@ -748,7 +743,7 @@ gpio-controller; #gpio-cells = <2>; reg = <0x226000 0x1000>; - interrupts = <42 43 44 45 46 47 48 49 50>; + interrupts = <42>, <43>, <44>, <45>, <46>, <47>, <48>, <49>, <50>; ti,ngpio = <144>; ti,davinci-gpio-unbanked = <0>; clocks = <&psc1 3>; diff --git a/arch/arm/boot/dts/ti/keystone/keystone-k2l.dtsi b/arch/arm/boot/dts/ti/keystone/keystone-k2l.dtsi index 8949578e62e8..2062fe561642 100644 --- a/arch/arm/boot/dts/ti/keystone/keystone-k2l.dtsi +++ b/arch/arm/boot/dts/ti/keystone/keystone-k2l.dtsi @@ -137,7 +137,7 @@ >; }; - dfesync_rp1_pins: dfesync-rp1-pins{ + dfesync_rp1_pins: dfesync-rp1-pins { pinctrl-single,bits = < /* DFESYNC_RP1_SEL */ 0x0 0x0 0x2 diff --git a/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts b/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts index b956e2f60fe0..16b567e3cb47 100644 --- a/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts +++ b/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts @@ -20,7 +20,8 @@ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed * to support 1GHz OPP so enable it for PG 2.0 on this board. */ - oppnitro-1000000000 { + opp-1000000000 { + /* OPP Nitro */ opp-supported-hw = <0x06 0x0100>; }; }; diff --git a/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi b/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi index 9863bf499a39..93a3af83feac 100644 --- a/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi +++ b/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi @@ -28,7 +28,8 @@ * the HW OPP table, the silicon looks like it is Revision 1.0 (ie the * EFUSE_SMA register reads as all zeros). */ - oppnitro-1000000000 { + opp-1000000000 { + /* OPP Nitro */ opp-supported-hw = <0x06 0x0100>; }; }; diff --git a/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi b/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi index 7e50fe633d8a..d6a143abae5f 100644 --- a/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi @@ -455,8 +455,8 @@ rtc: rtc@0 { compatible = "ti,am3352-rtc", "ti,da830-rtc"; reg = <0x0 0x1000>; - interrupts = <75 - 76>; + interrupts = <75>, + <76>; }; }; @@ -739,7 +739,7 @@ * c0_tx_pend * c0_misc_pend */ - interrupts = <40 41 42 43>; + interrupts = <40>, <41>, <42>, <43>; ranges = <0 0 0x8000>; syscon = <&scm_conf>; status = "disabled"; @@ -779,7 +779,7 @@ syscon = <&scm_conf>; status = "disabled"; - interrupts = <40 41 42 43>; + interrupts = <40>, <41>, <42>, <43>; interrupt-names = "rx_thresh", "rx", "tx", "misc"; ethernet-ports { @@ -899,7 +899,7 @@ pruss_intc: interrupt-controller@20000 { compatible = "ti,pruss-intc"; reg = <0x20000 0x2000>; - interrupts = <20 21 22 23 24 25 26 27>; + interrupts = <20>, <21>, <22>, <23>, <24>, <25>, <26>, <27>; interrupt-names = "host_intr0", "host_intr1", "host_intr2", "host_intr3", "host_intr4", "host_intr5", diff --git a/arch/arm/boot/dts/ti/omap/am33xx.dtsi b/arch/arm/boot/dts/ti/omap/am33xx.dtsi index 32d397b3950b..1a2cd5baf402 100644 --- a/arch/arm/boot/dts/ti/omap/am33xx.dtsi +++ b/arch/arm/boot/dts/ti/omap/am33xx.dtsi @@ -80,64 +80,74 @@ * because the can not be enabled simultaneously on a * single SoC. */ - opp50-300000000 { + opp-50-300000000{ + /* OPP50 */ opp-hz = /bits/ 64 <300000000>; opp-microvolt = <950000 931000 969000>; opp-supported-hw = <0x06 0x0010>; opp-suspend; }; - opp100-275000000 { + opp-100-275000000{ + /* OPP100-1 */ opp-hz = /bits/ 64 <275000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x01 0x00FF>; opp-suspend; }; - opp100-300000000 { + opp-100-300000000{ + /* OPP100-2 */ opp-hz = /bits/ 64 <300000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x06 0x0020>; opp-suspend; }; - opp100-500000000 { + opp-100-500000000{ + /* OPP100-3 */ opp-hz = /bits/ 64 <500000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x01 0xFFFF>; }; - opp100-600000000 { + opp-100-600000000 { + /* OPP100-4 */ opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0x06 0x0040>; }; - opp120-600000000 { + opp-120-600000000 { + /* OPP120-1 */ opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1200000 1176000 1224000>; opp-supported-hw = <0x01 0xFFFF>; }; - opp120-720000000 { + opp-120-720000000 { + /* OPP120-2 */ opp-hz = /bits/ 64 <720000000>; opp-microvolt = <1200000 1176000 1224000>; opp-supported-hw = <0x06 0x0080>; }; - oppturbo-720000000 { + opp-720000000 { + /* OPP Turbo-1 */ opp-hz = /bits/ 64 <720000000>; opp-microvolt = <1260000 1234800 1285200>; opp-supported-hw = <0x01 0xFFFF>; }; - oppturbo-800000000 { + opp-800000000 { + /* OPP Turbo-2 */ opp-hz = /bits/ 64 <800000000>; opp-microvolt = <1260000 1234800 1285200>; opp-supported-hw = <0x06 0x0100>; }; - oppnitro-1000000000 { + opp-1000000000 { + /* OPP Nitro */ opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <1325000 1298500 1351500>; opp-supported-hw = <0x04 0x0200>; diff --git a/arch/arm/boot/dts/ti/omap/am3517.dtsi b/arch/arm/boot/dts/ti/omap/am3517.dtsi index 823f63502e9f..fbfc956f4e4d 100644 --- a/arch/arm/boot/dts/ti/omap/am3517.dtsi +++ b/arch/arm/boot/dts/ti/omap/am3517.dtsi @@ -34,14 +34,16 @@ * appear to operate at 300MHz as well. Since AM3517 only * lists one operating voltage, it will remain fixed at 1.2V */ - opp50-300000000 { + opp-50-300000000 { + /* OPP50 */ opp-hz = /bits/ 64 <300000000>; opp-microvolt = <1200000>; opp-supported-hw = <0xffffffff 0xffffffff>; opp-suspend; }; - opp100-600000000 { + opp-100-600000000 { + /* OPP100 */ opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1200000>; opp-supported-hw = <0xffffffff 0xffffffff>; diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi b/arch/arm/boot/dts/ti/omap/am4372.dtsi index 8613355bbd5e..9d2c064534f7 100644 --- a/arch/arm/boot/dts/ti/omap/am4372.dtsi +++ b/arch/arm/boot/dts/ti/omap/am4372.dtsi @@ -70,32 +70,37 @@ compatible = "operating-points-v2-ti-cpu"; syscon = <&scm_conf>; - opp50-300000000 { + opp-50-300000000 { + /* OPP50 */ opp-hz = /bits/ 64 <300000000>; opp-microvolt = <950000 931000 969000>; opp-supported-hw = <0xFF 0x01>; opp-suspend; }; - opp100-600000000 { + opp-100-600000000 { + /* OPP100 */ opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1100000 1078000 1122000>; opp-supported-hw = <0xFF 0x04>; }; - opp120-720000000 { + opp-120-720000000 { + /* OPP120 */ opp-hz = /bits/ 64 <720000000>; opp-microvolt = <1200000 1176000 1224000>; opp-supported-hw = <0xFF 0x08>; }; - oppturbo-800000000 { + opp-800000000{ + /* OPP Turbo */ opp-hz = /bits/ 64 <800000000>; opp-microvolt = <1260000 1234800 1285200>; opp-supported-hw = <0xFF 0x10>; }; - oppnitro-1000000000 { + opp-1000000000 { + /* OPP Nitro */ opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <1325000 1298500 1351500>; opp-supported-hw = <0xFF 0x20>; diff --git a/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts b/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts index 863552393c07..00682ce7e14c 100644 --- a/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts +++ b/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts @@ -58,7 +58,7 @@ vin-supply = <&vdd_corereg>; }; - v1_8dreg: fixed-regulator-v1_8dreg{ + v1_8dreg: fixed-regulator-v1_8dreg { compatible = "regulator-fixed"; regulator-name = "V1_8DREG"; regulator-min-microvolt = <1800000>; @@ -68,7 +68,7 @@ vin-supply = <&v24_0d>; }; - v1_8d: fixed-regulator-v1_8d{ + v1_8d: fixed-regulator-v1_8d { compatible = "regulator-fixed"; regulator-name = "V1_8D"; regulator-min-microvolt = <1800000>; @@ -78,7 +78,7 @@ vin-supply = <&v1_8dreg>; }; - v1_5dreg: fixed-regulator-v1_5dreg{ + v1_5dreg: fixed-regulator-v1_5dreg { compatible = "regulator-fixed"; regulator-name = "V1_5DREG"; regulator-min-microvolt = <1500000>; @@ -88,7 +88,7 @@ vin-supply = <&v24_0d>; }; - v1_5d: fixed-regulator-v1_5d{ + v1_5d: fixed-regulator-v1_5d { compatible = "regulator-fixed"; regulator-name = "V1_5D"; regulator-min-microvolt = <1500000>; @@ -527,11 +527,13 @@ * Supply voltage supervisor on board will not allow opp50 so * disable it and set opp100 as suspend OPP. */ - opp50-300000000 { + opp-50-300000000 { + /* opp50-300000000 */ status = "disabled"; }; - opp100-600000000 { + opp-100-600000000 { + /* opp100-600000000 */ opp-suspend; }; }; diff --git a/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi b/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi index 415210b034ef..824b9415ebbe 100644 --- a/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi +++ b/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi @@ -442,8 +442,8 @@ compatible = "ti,am4372-rtc", "ti,am3352-rtc", "ti,da830-rtc"; reg = <0x0 0x1000>; - interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_32768_ck>; clock-names = "int-clk"; system-power-controller; @@ -549,10 +549,10 @@ syscon = <&scm_conf>; status = "disabled"; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "rx_thresh", "rx", "tx", "misc"; ethernet-ports { diff --git a/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts b/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts index 149cfafb90bf..9a234dc1431d 100644 --- a/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts +++ b/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts @@ -677,12 +677,6 @@ clock-frequency = <100000>; }; -&cpu0_opp_table { - opp_slow-500000000 { - opp-shared; - }; -}; - &ipu2 { status = "okay"; memory-region = <&ipu2_memory_region>; diff --git a/arch/arm/boot/dts/ti/omap/dra7.dtsi b/arch/arm/boot/dts/ti/omap/dra7.dtsi index 97ce0c4f1df7..3f3e52e3b375 100644 --- a/arch/arm/boot/dts/ti/omap/dra7.dtsi +++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi @@ -101,7 +101,8 @@ compatible = "operating-points-v2-ti-cpu"; syscon = <&scm_wkup>; - opp_nom-1000000000 { + opp-1000000000 { + /* OPP NOM */ opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <1060000 850000 1150000>, <1060000 850000 1150000>; @@ -109,7 +110,8 @@ opp-suspend; }; - opp_od-1176000000 { + opp-1176000000 { + /* OPP OD */ opp-hz = /bits/ 64 <1176000000>; opp-microvolt = <1160000 885000 1160000>, <1160000 885000 1160000>; @@ -117,7 +119,8 @@ opp-supported-hw = <0xFF 0x02>; }; - opp_high@1500000000 { + opp-1500000000 { + /* OPP High */ opp-hz = /bits/ 64 <1500000000>; opp-microvolt = <1210000 950000 1250000>, <1210000 950000 1250000>; diff --git a/arch/arm/boot/dts/ti/omap/dra76x.dtsi b/arch/arm/boot/dts/ti/omap/dra76x.dtsi index 931db7932c11..1045eb24aa0d 100644 --- a/arch/arm/boot/dts/ti/omap/dra76x.dtsi +++ b/arch/arm/boot/dts/ti/omap/dra76x.dtsi @@ -130,7 +130,8 @@ }; &cpu0_opp_table { - opp_plus@1800000000 { + opp-1800000000 { + /* OPP Plus */ opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1250000 950000 1250000>, <1250000 950000 1250000>; diff --git a/arch/arm/boot/dts/ti/omap/omap34xx.dtsi b/arch/arm/boot/dts/ti/omap/omap34xx.dtsi index 9dbf62797f0f..fc7233ac183a 100644 --- a/arch/arm/boot/dts/ti/omap/omap34xx.dtsi +++ b/arch/arm/boot/dts/ti/omap/omap34xx.dtsi @@ -25,7 +25,7 @@ compatible = "operating-points-v2-ti-cpu"; syscon = <&scm_conf>; - opp1-125000000 { + opp-125000000 { opp-hz = /bits/ 64 <125000000>; /* * we currently only select the max voltage from table @@ -40,32 +40,32 @@ opp-supported-hw = <0xffffffff 3>; }; - opp2-250000000 { + opp-250000000 { opp-hz = /bits/ 64 <250000000>; opp-microvolt = <1075000 1075000 1075000>; opp-supported-hw = <0xffffffff 3>; opp-suspend; }; - opp3-500000000 { + opp-500000000 { opp-hz = /bits/ 64 <500000000>; opp-microvolt = <1200000 1200000 1200000>; opp-supported-hw = <0xffffffff 3>; }; - opp4-550000000 { + opp-550000000 { opp-hz = /bits/ 64 <550000000>; opp-microvolt = <1275000 1275000 1275000>; opp-supported-hw = <0xffffffff 3>; }; - opp5-600000000 { + opp-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1350000 1350000 1350000>; opp-supported-hw = <0xffffffff 3>; }; - opp6-720000000 { + opp-720000000 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <1350000 1350000 1350000>; /* only high-speed grade omap3530 devices */ diff --git a/arch/arm/boot/dts/ti/omap/omap36xx.dtsi b/arch/arm/boot/dts/ti/omap/omap36xx.dtsi index fff9c3d34193..e6d8070c1bf8 100644 --- a/arch/arm/boot/dts/ti/omap/omap36xx.dtsi +++ b/arch/arm/boot/dts/ti/omap/omap36xx.dtsi @@ -30,7 +30,8 @@ compatible = "operating-points-v2-ti-cpu"; syscon = <&scm_conf>; - opp50-300000000 { + opp-50-300000000 { + /* OPP50 */ opp-hz = /bits/ 64 <300000000>; /* * we currently only select the max voltage from table @@ -48,21 +49,24 @@ opp-suspend; }; - opp100-600000000 { + opp-100-600000000 { + /* OPP100 */ opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1200000 1200000 1200000>, <1200000 1200000 1200000>; opp-supported-hw = <0xffffffff 3>; }; - opp130-800000000 { + opp-130-800000000 { + /* OPP130 */ opp-hz = /bits/ 64 <800000000>; opp-microvolt = <1325000 1325000 1325000>, <1325000 1325000 1325000>; opp-supported-hw = <0xffffffff 3>; }; - opp1g-1000000000 { + opp-1000000000 { + /* OPP1G */ opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <1375000 1375000 1375000>, <1375000 1375000 1375000>; @@ -71,7 +75,7 @@ }; }; - opp_supply_mpu_iva: opp_supply { + opp_supply_mpu_iva: opp-supply { compatible = "ti,omap-opp-supply"; ti,absolute-max-voltage-uv = <1375000>; }; diff --git a/arch/arm/boot/dts/ti/omap/omap5-board-common.dtsi b/arch/arm/boot/dts/ti/omap/omap5-board-common.dtsi index 6f46f1ecf1e5..8946b5580cd9 100644 --- a/arch/arm/boot/dts/ti/omap/omap5-board-common.dtsi +++ b/arch/arm/boot/dts/ti/omap/omap5-board-common.dtsi @@ -415,9 +415,9 @@ gpadc: gpadc { compatible = "ti,palmas-gpadc"; - interrupts = <18 0 - 16 0 - 17 0>; + interrupts = <18 0>, + <16 0>, + <17 0>; #io-channel-cells = <1>; ti,channel0-current-microamp = <5>; ti,channel3-current-microamp = <10>; |