summaryrefslogtreecommitdiff
path: root/arch/arm/mach-omap2/sleep44xx.S
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-omap2/sleep44xx.S')
-rw-r--r--arch/arm/mach-omap2/sleep44xx.S18
1 files changed, 7 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index c7a3b4aab4b5..f09c9197808b 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -1,18 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
* OMAP44xx sleep code.
*
* Copyright (C) 2011 Texas Instruments, Inc.
* Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software,you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/smp_scu.h>
-#include <asm/memory.h>
+#include <asm/page.h>
#include <asm/hardware/cache-l2x0.h>
#include "omap-secure.h"
@@ -21,8 +18,11 @@
#include "omap44xx.h"
#include "omap4-sar-layout.h"
+ .arch armv7-a
+
#if defined(CONFIG_SMP) && defined(CONFIG_PM)
+ .arch_extension sec
.macro DO_SMC
dsb
smc #0
@@ -90,12 +90,7 @@ skip_secure_l1_clean:
mcr p15, 0, r0, c1, c0, 0
isb
- /*
- * Invalidate L1 data cache. Even though only invalidate is
- * necessary exported flush API is used here. Doing clean
- * on already clean cache would be almost NOP.
- */
- bl v7_flush_dcache_all
+ bl v7_invalidate_l1
/*
* Switch the CPU from Symmetric Multiprocessing (SMP) mode
@@ -385,6 +380,7 @@ ppa_zero_params_offset:
ENDPROC(omap_do_wfi)
.data
+ .align 2
ppa_zero_params:
.word 0