diff options
Diffstat (limited to 'arch/arm/mach-omap2')
91 files changed, 460 insertions, 2027 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 3b53dda9ec79..821727eefd5a 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -255,17 +255,6 @@ config MACH_NOKIA_N8X0 select MACH_NOKIA_N810 select MACH_NOKIA_N810_WIMAX -config OMAP3_SDRC_AC_TIMING - bool "Enable SDRC AC timing register changes" - depends on ARCH_OMAP3 - help - If you know that none of your system initiators will attempt to - access SDRAM during CORE DVFS, select Y here. This should boost - SDRAM performance at lower CORE OPPs. There are relatively few - users who will wish to say yes at this point - almost everyone will - wish to say no. Selecting yes without understanding what is - going on could result in system crashes; - endmenu endif diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 2feb9f6630af..daf21127c82f 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -7,7 +7,7 @@ obj-y := id.o io.o control.o devices.o fb.o pm.o \ common.o dma.o omap-headsmp.o sram.o -hwmod-common = omap_hwmod.o omap_hwmod_reset.o \ +hwmod-common = omap_hwmod.o \ omap_hwmod_common_data.o \ omap_hwmod_common_ipblock_data.o \ omap_device.o display.o hdq1w.o \ @@ -80,7 +80,6 @@ obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-pm-common) obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-pm-common) ifeq ($(CONFIG_PM),y) -obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o omap-4-5-pm-common += pm44xx.o diff --git a/arch/arm/mach-omap2/am33xx-restart.c b/arch/arm/mach-omap2/am33xx-restart.c index ef2f18a56b65..3cdf223addcc 100644 --- a/arch/arm/mach-omap2/am33xx-restart.c +++ b/arch/arm/mach-omap2/am33xx-restart.c @@ -2,14 +2,48 @@ /* * am33xx-restart.c - Code common to all AM33xx machines. */ +#include <dt-bindings/pinctrl/am33xx.h> +#include <linux/delay.h> #include <linux/kernel.h> #include <linux/reboot.h> #include "common.h" +#include "control.h" #include "prm.h" +/* + * Advisory 1.0.36 EMU0 and EMU1: Terminals Must be Pulled High Before + * ICEPick Samples + * + * If EMU0/EMU1 pins have been used as GPIO outputs and actively driving low + * level, the device might not reboot in normal mode. We are in a bad position + * to override GPIO state here, so just switch the pins into EMU input mode + * (that's what reset will do anyway) and wait a bit, because the state will be + * latched 190 ns after reset. + */ +static void am33xx_advisory_1_0_36(void) +{ + u32 emu0 = omap_ctrl_readl(AM335X_PIN_EMU0); + u32 emu1 = omap_ctrl_readl(AM335X_PIN_EMU1); + + /* If both pins are in EMU mode, nothing to do */ + if (!(emu0 & 7) && !(emu1 & 7)) + return; + + /* Switch GPIO3_7/GPIO3_8 into EMU0/EMU1 modes respectively */ + omap_ctrl_writel(emu0 & ~7, AM335X_PIN_EMU0); + omap_ctrl_writel(emu1 & ~7, AM335X_PIN_EMU1); + + /* + * Give pull-ups time to load the pin/PCB trace capacity. + * 5 ms shall be enough to load 1 uF (would be huge capacity for these + * pins) with TI-recommended 4k7 external pull-ups. + */ + mdelay(5); +} + /** - * am3xx_restart - trigger a software restart of the SoC + * am33xx_restart - trigger a software restart of the SoC * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c * @cmd: passed from the userspace program rebooting the system (if provided) * @@ -18,7 +52,10 @@ */ void am33xx_restart(enum reboot_mode mode, const char *cmd) { - /* TODO: Handle mode and cmd if necessary */ + am33xx_advisory_1_0_36(); + + /* TODO: Handle cmd if necessary */ + prm_reboot_mode = mode; omap_prm_reset_system(); } diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 1610c567a6a3..68e0baad2bbf 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -9,10 +9,10 @@ * to support the OMAP2+ device tree boards with an unique board file. */ #include <linux/io.h> -#include <linux/of_irq.h> -#include <linux/of_platform.h> #include <linux/irqdomain.h> #include <linux/clocksource.h> +#include <linux/clockchips.h> +#include <linux/mod_devicetable.h> #include <asm/setup.h> #include <asm/mach/arch.h> @@ -246,6 +246,12 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") .init_time = omap_init_time_of, .dt_compat = am33xx_boards_compat, .restart = am33xx_restart, + /* + * Historically am33xx supported only REBOOT_WARM even though default + * reboot_mode was REBOOT_COLD. Reflect legacy de-facto behaviour in + * SYSFS. + */ + .reboot_mode = REBOOT_WARM, MACHINE_END #endif diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 5e86145db0e2..969265d5d5c6 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -10,7 +10,8 @@ #include <linux/clk.h> #include <linux/delay.h> -#include <linux/gpio.h> +#include <linux/gpio/machine.h> +#include <linux/gpio/consumer.h> #include <linux/init.h> #include <linux/io.h> #include <linux/irq.h> @@ -22,20 +23,18 @@ #include <linux/platform_data/spi-omap2-mcspi.h> #include <linux/platform_data/mmc-omap.h> #include <linux/mfd/menelaus.h> -#include <sound/tlv320aic3x.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> #include "common.h" #include "mmc.h" +#include "usb-tusb6010.h" #include "soc.h" #include "common-board-devices.h" #define TUSB6010_ASYNC_CS 1 #define TUSB6010_SYNC_CS 4 -#define TUSB6010_GPIO_INT 58 -#define TUSB6010_GPIO_ENABLE 0 #define TUSB6010_DMACHAN 0x3f #define NOKIA_N810_WIMAX (1 << 2) @@ -62,37 +61,6 @@ static void board_check_revision(void) } #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010) -/* - * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and - * 1.5 V voltage regulators of PM companion chip. Companion chip will then - * provide then PGOOD signal to TUSB6010 which will release it from reset. - */ -static int tusb_set_power(int state) -{ - int i, retval = 0; - - if (state) { - gpio_set_value(TUSB6010_GPIO_ENABLE, 1); - msleep(1); - - /* Wait until TUSB6010 pulls INT pin down */ - i = 100; - while (i && gpio_get_value(TUSB6010_GPIO_INT)) { - msleep(1); - i--; - } - - if (!i) { - printk(KERN_ERR "tusb: powerup failed\n"); - retval = -ENODEV; - } - } else { - gpio_set_value(TUSB6010_GPIO_ENABLE, 0); - msleep(10); - } - - return retval; -} static struct musb_hdrc_config musb_config = { .multipoint = 1, @@ -103,39 +71,34 @@ static struct musb_hdrc_config musb_config = { static struct musb_hdrc_platform_data tusb_data = { .mode = MUSB_OTG, - .set_power = tusb_set_power, .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */ .power = 100, /* Max 100 mA VBUS for host mode */ .config = &musb_config, }; +static struct gpiod_lookup_table tusb_gpio_table = { + .dev_id = "musb-tusb", + .table = { + GPIO_LOOKUP("gpio-0-31", 0, "enable", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("gpio-32-63", 26, "int", GPIO_ACTIVE_HIGH), + { } + }, +}; + static void __init n8x0_usb_init(void) { int ret = 0; - static const char announce[] __initconst = KERN_INFO "TUSB 6010\n"; - - /* PM companion chip power control pin */ - ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW, - "TUSB6010 enable"); - if (ret != 0) { - printk(KERN_ERR "Could not get TUSB power GPIO%i\n", - TUSB6010_GPIO_ENABLE); - return; - } - tusb_set_power(0); + gpiod_add_lookup_table(&tusb_gpio_table); ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2, - TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS, - TUSB6010_GPIO_INT, TUSB6010_DMACHAN); + TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS, + TUSB6010_DMACHAN); if (ret != 0) - goto err; + return; - printk(announce); + pr_info("TUSB 6010\n"); return; - -err: - gpio_free(TUSB6010_GPIO_ENABLE); } #else @@ -171,22 +134,31 @@ static struct spi_board_info n800_spi_board_info[] __initdata = { * GPIO23 and GPIO9 slot 2 EMMC on N810 * */ -#define N8X0_SLOT_SWITCH_GPIO 96 -#define N810_EMMC_VSD_GPIO 23 -#define N810_EMMC_VIO_GPIO 9 - static int slot1_cover_open; static int slot2_cover_open; static struct device *mmc_device; -static int n8x0_mmc_switch_slot(struct device *dev, int slot) -{ -#ifdef CONFIG_MMC_DEBUG - dev_dbg(dev, "Choose slot %d\n", slot + 1); -#endif - gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot); - return 0; -} +static struct gpiod_lookup_table nokia800_mmc_gpio_table = { + .dev_id = "mmci-omap.0", + .table = { + /* Slot switch, GPIO 96 */ + GPIO_LOOKUP("gpio-96-127", 0, "switch", GPIO_ACTIVE_HIGH), + { } + }, +}; + +static struct gpiod_lookup_table nokia810_mmc_gpio_table = { + .dev_id = "mmci-omap.0", + .table = { + /* Slot switch, GPIO 96 */ + GPIO_LOOKUP("gpio-96-127", 0, "switch", GPIO_ACTIVE_HIGH), + /* Slot index 1, VSD power, GPIO 23 */ + GPIO_LOOKUP_IDX("gpio-0-31", 23, "vsd", 1, GPIO_ACTIVE_HIGH), + /* Slot index 1, VIO power, GPIO 9 */ + GPIO_LOOKUP_IDX("gpio-0-31", 9, "vio", 1, GPIO_ACTIVE_HIGH), + { } + }, +}; static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, int power_on, int vdd) @@ -195,7 +167,7 @@ static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, #ifdef CONFIG_MMC_DEBUG dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, - power_on ? "on" : "off", vdd); + str_on_off(power_on), vdd); #endif if (slot == 0) { if (!power_on) @@ -257,31 +229,13 @@ static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, return 0; } -static void n810_set_power_emmc(struct device *dev, - int power_on) -{ - dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off"); - - if (power_on) { - gpio_set_value(N810_EMMC_VSD_GPIO, 1); - msleep(1); - gpio_set_value(N810_EMMC_VIO_GPIO, 1); - msleep(1); - } else { - gpio_set_value(N810_EMMC_VIO_GPIO, 0); - msleep(50); - gpio_set_value(N810_EMMC_VSD_GPIO, 0); - msleep(50); - } -} - static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on, int vdd) { if (board_is_n800() || slot == 0) return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd); - n810_set_power_emmc(dev, power_on); + /* The n810 power will be handled by GPIO code in the driver */ return 0; } @@ -419,13 +373,6 @@ static void n8x0_mmc_shutdown(struct device *dev) static void n8x0_mmc_cleanup(struct device *dev) { menelaus_unregister_mmc_callback(); - - gpio_free(N8X0_SLOT_SWITCH_GPIO); - - if (board_is_n810()) { - gpio_free(N810_EMMC_VSD_GPIO); - gpio_free(N810_EMMC_VIO_GPIO); - } } /* @@ -434,7 +381,6 @@ static void n8x0_mmc_cleanup(struct device *dev) */ static struct omap_mmc_platform_data mmc1_data = { .nr_slots = 0, - .switch_slot = n8x0_mmc_switch_slot, .init = n8x0_mmc_late_init, .cleanup = n8x0_mmc_cleanup, .shutdown = n8x0_mmc_shutdown, @@ -464,15 +410,8 @@ static struct omap_mmc_platform_data mmc1_data = { static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC]; -static struct gpio n810_emmc_gpios[] __initdata = { - { N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" }, - { N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" }, -}; - static void __init n8x0_mmc_init(void) { - int err; - if (board_is_n810()) { mmc1_data.slots[0].name = "external"; @@ -484,20 +423,9 @@ static void __init n8x0_mmc_init(void) */ mmc1_data.slots[1].name = "internal"; mmc1_data.slots[1].ban_openended = 1; - } - - err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW, - "MMC slot switch"); - if (err) - return; - - if (board_is_n810()) { - err = gpio_request_array(n810_emmc_gpios, - ARRAY_SIZE(n810_emmc_gpios)); - if (err) { - gpio_free(N8X0_SLOT_SWITCH_GPIO); - return; - } + gpiod_add_lookup_table(&nokia810_mmc_gpio_table); + } else { + gpiod_add_lookup_table(&nokia800_mmc_gpio_table); } mmc1_data.nr_slots = 2; @@ -505,7 +433,7 @@ static void __init n8x0_mmc_init(void) } #else static struct omap_mmc_platform_data mmc1_data; -void __init n8x0_mmc_init(void) +static void __init n8x0_mmc_init(void) { } #endif /* CONFIG_MMC_OMAP */ @@ -567,8 +495,13 @@ struct menelaus_platform_data n8x0_menelaus_platform_data = { .late_init = n8x0_menelaus_late_init, }; -struct aic3x_pdata n810_aic33_data = { - .gpio_reset = 118, +static struct gpiod_lookup_table nokia810_asoc_gpio_table = { + .dev_id = "soc-audio", + .table = { + GPIO_LOOKUP("gpio-0-15", 10, "headset", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("gpio-80-111", 21, "speaker", GPIO_ACTIVE_HIGH), + { } + }, }; static int __init n8x0_late_initcall(void) @@ -578,6 +511,7 @@ static int __init n8x0_late_initcall(void) n8x0_mmc_init(); n8x0_usb_init(); + gpiod_add_lookup_table(&nokia810_asoc_gpio_table); return 0; } diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c index 8a9983cb4733..93f6d3cd9525 100644 --- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c +++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c @@ -20,6 +20,7 @@ #include <linux/kernel.h> #include <linux/errno.h> #include <linux/clk.h> +#include <linux/clk/ti.h> #include <linux/io.h> #include "clock.h" diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index edf046b470ba..96c5cdc718c8 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c @@ -39,6 +39,8 @@ #include "sdrc.h" #include "sram.h" +static u16 cpu_mask; + const struct prcm_config *curr_prcm_set; const struct prcm_config *rate_table; @@ -55,7 +57,7 @@ static unsigned long sys_ck_rate; * * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set. */ -unsigned long omap2_table_mpu_recalc(struct clk_hw *clk, +static unsigned long omap2_table_mpu_recalc(struct clk_hw *clk, unsigned long parent_rate) { return curr_prcm_set->mpu_speed; @@ -68,8 +70,8 @@ unsigned long omap2_table_mpu_recalc(struct clk_hw *clk, * Some might argue L3-DDR, others ARM, others IVA. This code is simple and * just uses the ARM rates. */ -long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int omap2_determine_rate_to_table(struct clk_hw *hw, + struct clk_rate_request *req) { const struct prcm_config *ptr; long highest_rate; @@ -85,15 +87,17 @@ long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate, highest_rate = ptr->mpu_speed; /* Can check only after xtal frequency check */ - if (ptr->mpu_speed <= rate) + if (ptr->mpu_speed <= req->rate) break; } - return highest_rate; + req->rate = highest_rate; + + return 0; } /* Sets basic clocks based on the specified rate */ -int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) +static int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) { u32 cur_rate, done_rate, bypass = 0; const struct prcm_config *prcm; @@ -160,14 +164,14 @@ int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, } /** - * omap2xxx_clkt_vps_check_bootloader_rate - determine which of the rate + * omap2xxx_clkt_vps_check_bootloader_rates - determine which of the rate * table sets matches the current CORE DPLL hardware rate * * Check the MPU rate set by bootloader. Sets the 'curr_prcm_set' * global to point to the active rate set when found; otherwise, sets * it to NULL. No return value; */ -void omap2xxx_clkt_vps_check_bootloader_rates(void) +static void omap2xxx_clkt_vps_check_bootloader_rates(void) { const struct prcm_config *prcm = NULL; unsigned long rate; @@ -193,7 +197,7 @@ void omap2xxx_clkt_vps_check_bootloader_rates(void) * sys_ck rate, but before the virt_prcm_set clock rate is * recalculated. No return value. */ -void omap2xxx_clkt_vps_late_init(void) +static void omap2xxx_clkt_vps_late_init(void) { struct clk *c; @@ -213,7 +217,7 @@ void omap2xxx_clkt_vps_late_init(void) static const struct clk_ops virt_prcm_set_ops = { .recalc_rate = &omap2_table_mpu_recalc, .set_rate = &omap2_select_table_rate, - .round_rate = &omap2_round_to_table_rate, + .determine_rate = &omap2_determine_rate_to_table, }; /** diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 3c1d12dc8ff3..83fae51722a9 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -36,8 +36,6 @@ #include "cm-regbits-34xx.h" #include "common.h" -u16 cpu_mask; - /* DPLL valid Fint frequency band limits - from 34xx TRM Section 4.7.6.2 */ #define OMAP3430_DPLL_FINT_BAND1_MIN 750000 #define OMAP3430_DPLL_FINT_BAND1_MAX 2100000 diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index bbe4b32891bb..41391fa1418a 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -63,13 +63,6 @@ extern struct ti_clk_ll_ops omap_clk_ll_ops; -extern u16 cpu_mask; - -extern const struct clkops clkops_omap2_dflt_wait; -extern const struct clkops clkops_omap2_dflt; - -extern struct clk_functions omap2_clk_functions; - int __init omap2_clk_setup_ll_ops(void); void __init ti_clk_init_features(void); diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h index a8408f9d0f33..73c011dadfd2 100644 --- a/arch/arm/mach-omap2/clock2xxx.h +++ b/arch/arm/mach-omap2/clock2xxx.h @@ -12,35 +12,6 @@ #include <linux/clk-provider.h> #include "clock.h" -unsigned long omap2_table_mpu_recalc(struct clk_hw *clk, - unsigned long parent_rate); -int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate); -long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate); -unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk, - unsigned long parent_rate); -unsigned long omap2_osc_clk_recalc(struct clk_hw *clk, - unsigned long parent_rate); -void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw); unsigned long omap2xxx_clk_get_core_rate(void); -u32 omap2xxx_get_sysclkdiv(void); -void omap2xxx_clk_prepare_for_reboot(void); -void omap2xxx_clkt_vps_check_bootloader_rates(void); -void omap2xxx_clkt_vps_late_init(void); - -#ifdef CONFIG_SOC_OMAP2420 -int omap2420_clk_init(void); -#else -#define omap2420_clk_init() do { } while(0) -#endif - -#ifdef CONFIG_SOC_OMAP2430 -int omap2430_clk_init(void); -#else -#define omap2430_clk_init() do { } while(0) -#endif - -extern struct clk_hw *dclk_hw; #endif diff --git a/arch/arm/mach-omap2/clock3xxx.h b/arch/arm/mach-omap2/clock3xxx.h deleted file mode 100644 index 10a9f577dc1a..000000000000 --- a/arch/arm/mach-omap2/clock3xxx.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * OMAP3-common clock function prototypes and macros - * - * Copyright (C) 2007-2010 Texas Instruments, Inc. - * Copyright (C) 2007-2010 Nokia Corporation - */ - -#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H -#define __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H - -int omap3xxx_clk_init(void); -int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate, - unsigned long parent_rate); - -extern struct clk *sdrc_ick_p; -extern struct clk *arm_fck_p; - -extern const struct clkops clkops_noncore_dpll_ops; - -#endif diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 1feb0098705e..69dc5b839335 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -831,7 +831,7 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) * -EINVAL if @clkdm is NULL or if clockdomain does not support * software-initiated sleep; 0 upon success. */ -int clkdm_sleep_nolock(struct clockdomain *clkdm) +static int clkdm_sleep_nolock(struct clockdomain *clkdm) { int ret; @@ -885,7 +885,7 @@ int clkdm_sleep(struct clockdomain *clkdm) * -EINVAL if @clkdm is NULL or if the clockdomain does not support * software-controlled wakeup; 0 upon success. */ -int clkdm_wakeup_nolock(struct clockdomain *clkdm) +static int clkdm_wakeup_nolock(struct clockdomain *clkdm) { int ret; @@ -990,7 +990,7 @@ void clkdm_allow_idle(struct clockdomain *clkdm) } /** - * clkdm_deny_idle - disable hwsup idle transitions for clkdm + * clkdm_deny_idle_nolock - disable hwsup idle transitions for clkdm * @clkdm: struct clockdomain * * * Prevent the hardware from automatically switching the clockdomain @@ -1043,46 +1043,6 @@ void clkdm_deny_idle(struct clockdomain *clkdm) pwrdm_unlock(clkdm->pwrdm.ptr); } -/** - * clkdm_in_hwsup - is clockdomain @clkdm have hardware-supervised idle enabled? - * @clkdm: struct clockdomain * - * - * Returns true if clockdomain @clkdm currently has - * hardware-supervised idle enabled, or false if it does not or if - * @clkdm is NULL. It is only valid to call this function after - * clkdm_init() has been called. This function does not actually read - * bits from the hardware; it instead tests an in-memory flag that is - * changed whenever the clockdomain code changes the auto-idle mode. - */ -bool clkdm_in_hwsup(struct clockdomain *clkdm) -{ - bool ret; - - if (!clkdm) - return false; - - ret = (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false; - - return ret; -} - -/** - * clkdm_missing_idle_reporting - can @clkdm enter autoidle even if in use? - * @clkdm: struct clockdomain * - * - * Returns true if clockdomain @clkdm has the - * CLKDM_MISSING_IDLE_REPORTING flag set, or false if not or @clkdm is - * null. More information is available in the documentation for the - * CLKDM_MISSING_IDLE_REPORTING macro. - */ -bool clkdm_missing_idle_reporting(struct clockdomain *clkdm) -{ - if (!clkdm) - return false; - - return (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) ? true : false; -} - /* Public autodep handling functions (deprecated) */ /** @@ -1150,7 +1110,7 @@ void clkdm_del_autodeps(struct clockdomain *clkdm) /** * clkdm_clk_enable - add an enabled downstream clock to this clkdm * @clkdm: struct clockdomain * - * @clk: struct clk * of the enabled downstream clock + * @unused: struct clk * of the enabled downstream clock * * Increment the usecount of the clockdomain @clkdm and ensure that it * is awake before @clk is enabled. Intended to be called by diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 68550b23c938..86a2f9e5d0ef 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -48,6 +48,7 @@ #define CLKDM_NO_AUTODEPS (1 << 4) #define CLKDM_ACTIVE_WITH_MPU (1 << 5) #define CLKDM_MISSING_IDLE_REPORTING (1 << 6) +#define CLKDM_STANDBY_FORCE_WAKEUP BIT(7) #define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO) #define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP) @@ -203,12 +204,8 @@ void clkdm_allow_idle_nolock(struct clockdomain *clkdm); void clkdm_allow_idle(struct clockdomain *clkdm); void clkdm_deny_idle_nolock(struct clockdomain *clkdm); void clkdm_deny_idle(struct clockdomain *clkdm); -bool clkdm_in_hwsup(struct clockdomain *clkdm); -bool clkdm_missing_idle_reporting(struct clockdomain *clkdm); -int clkdm_wakeup_nolock(struct clockdomain *clkdm); int clkdm_wakeup(struct clockdomain *clkdm); -int clkdm_sleep_nolock(struct clockdomain *clkdm); int clkdm_sleep(struct clockdomain *clkdm); int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk); diff --git a/arch/arm/mach-omap2/clockdomains33xx_data.c b/arch/arm/mach-omap2/clockdomains33xx_data.c index 87f4e927eb18..c05a3c07d448 100644 --- a/arch/arm/mach-omap2/clockdomains33xx_data.c +++ b/arch/arm/mach-omap2/clockdomains33xx_data.c @@ -19,7 +19,7 @@ static struct clockdomain l4ls_am33xx_clkdm = { .pwrdm = { .name = "per_pwrdm" }, .cm_inst = AM33XX_CM_PER_MOD, .clkdm_offs = AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, + .flags = CLKDM_CAN_SWSUP | CLKDM_STANDBY_FORCE_WAKEUP, }; static struct clockdomain l3s_am33xx_clkdm = { diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c index 0827acb60584..1c6d69f4bf49 100644 --- a/arch/arm/mach-omap2/cm2xxx.c +++ b/arch/arm/mach-omap2/cm2xxx.c @@ -95,103 +95,6 @@ void omap2xxx_cm_set_dpll_auto_low_power_stop(void) _omap2xxx_set_dpll_autoidle(DPLL_AUTOIDLE_DISABLE); } -/* - * APLL control - */ - -static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask) -{ - u32 v; - - v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); - v &= ~mask; - v |= m << __ffs(mask); - omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE); -} - -void omap2xxx_cm_set_apll54_disable_autoidle(void) -{ - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP, - OMAP24XX_AUTO_54M_MASK); -} - -void omap2xxx_cm_set_apll54_auto_low_power_stop(void) -{ - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE, - OMAP24XX_AUTO_54M_MASK); -} - -void omap2xxx_cm_set_apll96_disable_autoidle(void) -{ - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP, - OMAP24XX_AUTO_96M_MASK); -} - -void omap2xxx_cm_set_apll96_auto_low_power_stop(void) -{ - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE, - OMAP24XX_AUTO_96M_MASK); -} - -/* Enable an APLL if off */ -static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit) -{ - u32 v, m; - - m = EN_APLL_LOCKED << enable_bit; - - v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); - if (v & m) - return 0; /* apll already enabled */ - - v |= m; - omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN); - - omap2xxx_cm_wait_module_ready(0, PLL_MOD, 1, status_bit); - - /* - * REVISIT: Should we return an error code if - * omap2xxx_cm_wait_module_ready() fails? - */ - return 0; -} - -/* Stop APLL */ -static void _omap2xxx_apll_disable(u8 enable_bit) -{ - u32 v; - - v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); - v &= ~(EN_APLL_LOCKED << enable_bit); - omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN); -} - -/* Enable an APLL if off */ -int omap2xxx_cm_apll54_enable(void) -{ - return _omap2xxx_apll_enable(OMAP24XX_EN_54M_PLL_SHIFT, - OMAP24XX_ST_54M_APLL_SHIFT); -} - -/* Enable an APLL if off */ -int omap2xxx_cm_apll96_enable(void) -{ - return _omap2xxx_apll_enable(OMAP24XX_EN_96M_PLL_SHIFT, - OMAP24XX_ST_96M_APLL_SHIFT); -} - -/* Stop APLL */ -void omap2xxx_cm_apll54_disable(void) -{ - _omap2xxx_apll_disable(OMAP24XX_EN_54M_PLL_SHIFT); -} - -/* Stop APLL */ -void omap2xxx_cm_apll96_disable(void) -{ - _omap2xxx_apll_disable(OMAP24XX_EN_96M_PLL_SHIFT); -} - /** * omap2xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components * @idlest_reg: CM_IDLEST* virtual address @@ -242,8 +145,8 @@ static int omap2xxx_cm_split_idlest_reg(struct clk_omap_reg *idlest_reg, * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon * success or -EBUSY if the module doesn't enable in time. */ -int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id, - u8 idlest_shift) +static int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id, + u8 idlest_shift) { int ena = 0, i = 0; u8 cm_idlest_reg; diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h index 004016d7459e..7cbeff15ffb0 100644 --- a/arch/arm/mach-omap2/cm2xxx.h +++ b/arch/arm/mach-omap2/cm2xxx.h @@ -46,13 +46,6 @@ extern void omap2xxx_cm_set_dpll_disable_autoidle(void); extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void); -extern void omap2xxx_cm_set_apll54_disable_autoidle(void); -extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void); -extern void omap2xxx_cm_set_apll96_disable_autoidle(void); -extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void); - -int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id, - u8 idlest_shift); extern int omap2xxx_cm_fclks_active(void); extern int omap2xxx_cm_mpu_retention_allowed(void); extern u32 omap2xxx_cm_get_core_clk_src(void); diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h index 70944b94cc09..6dfc09383160 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h @@ -93,11 +93,6 @@ static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx); } -extern int omap2xxx_cm_apll54_enable(void); -extern void omap2xxx_cm_apll54_disable(void); -extern int omap2xxx_cm_apll96_enable(void); -extern void omap2xxx_cm_apll96_disable(void); - #endif /* CM register bits shared between 24XX and 3430 */ diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index d61fa06117b4..a4dd42abda89 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c @@ -5,7 +5,7 @@ * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/ * Vaibhav Hiremath <hvaibhav@ti.com> * - * Reference taken from from OMAP4 cminst44xx.c + * Reference taken from OMAP4 cminst44xx.c */ #include <linux/kernel.h> @@ -20,6 +20,9 @@ #include "cm-regbits-34xx.h" #include "cm-regbits-33xx.h" #include "prm33xx.h" +#if IS_ENABLED(CONFIG_SUSPEND) +#include <linux/suspend.h> +#endif /* * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: @@ -328,8 +331,17 @@ static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm) { bool hwsup = false; +#if IS_ENABLED(CONFIG_SUSPEND) + /* + * In case of standby, Don't put the l4ls clk domain to sleep. + * Since CM3 PM FW doesn't wake-up/enable the l4ls clk domain + * upon wake-up, CM3 PM FW fails to wake-up th MPU. + */ + if (pm_suspend_target_state == PM_SUSPEND_STANDBY && + (clkdm->flags & CLKDM_STANDBY_FORCE_WAKEUP)) + return 0; +#endif hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); - if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) am33xx_clkdm_sleep(clkdm); @@ -357,7 +369,7 @@ static int am33xx_clkdm_save_context(struct clockdomain *clkdm) } /** - * am33xx_restore_save_context - Restore the clockdomain transition context + * am33xx_clkdm_restore_context - Restore the clockdomain transition context * @clkdm: The clockdomain pointer whose context needs to be restored * * Restore the clockdomain transition context. diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 46670521b278..49483a888046 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -237,7 +237,7 @@ static void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs) } /** - * omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle + * omap4_cminst_clkdm_force_wakeup - try to take a clockdomain out of idle * @part: PRCM partition ID that the clockdomain registers exist in * @inst: CM instance register offset (*_INST macro) * @cdoffs: Clockdomain register offset (*_CDOFFS macro) diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h index b23962c38fb2..69694af71475 100644 --- a/arch/arm/mach-omap2/common-board-devices.h +++ b/arch/arm/mach-omap2/common-board-devices.h @@ -2,12 +2,10 @@ #ifndef __OMAP_COMMON_BOARD_DEVICES__ #define __OMAP_COMMON_BOARD_DEVICES__ -#include <sound/tlv320aic3x.h> #include <linux/mfd/menelaus.h> void *n8x0_legacy_init(void); extern struct menelaus_platform_data n8x0_menelaus_platform_data; -extern struct aic3x_pdata n810_aic33_data; #endif /* __OMAP_COMMON_BOARD_DEVICES__ */ diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index bd5981945239..9d60799e9752 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -38,24 +38,12 @@ #include <asm/hardware/cache-l2x0.h> #include "i2c.h" -#include "serial.h" - -#include "usb.h" #define OMAP_INTC_START NR_IRQS extern int (*omap_pm_soc_init)(void); int omap_pm_nop_init(void); -#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) -int omap2_pm_init(void); -#else -static inline int omap2_pm_init(void) -{ - return 0; -} -#endif - #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) int omap3_pm_init(void); #else @@ -90,12 +78,6 @@ static inline int amx3_common_pm_init(void) } #endif -extern void omap2_init_common_infrastructure(void); - -extern void omap_init_time(void); -extern void omap3_secure_sync32k_timer_init(void); -extern void omap3_gptimer_timer_init(void); -extern void omap4_local_timer_init(void); #ifdef CONFIG_CACHE_L2X0 int omap_l2_cache_init(void); #define OMAP_L2C_AUX_CTRL (L2C_AUX_CTRL_SHARED_OVERRIDE | \ @@ -123,9 +105,7 @@ static inline void omap5_realtime_timer_init(void) void omap2420_init_early(void); void omap2430_init_early(void); void omap3430_init_early(void); -void omap35xx_init_early(void); void omap3630_init_early(void); -void omap3_init_early(void); /* Do not use this one */ void am33xx_init_early(void); void am35xx_init_early(void); void ti814x_init_early(void); @@ -136,12 +116,9 @@ void omap4430_init_early(void); void omap5_init_early(void); void omap3_init_late(void); void omap4430_init_late(void); -void omap2420_init_late(void); -void omap2430_init_late(void); void ti81xx_init_late(void); void am33xx_init_late(void); void omap5_init_late(void); -int omap2_common_pm_late_init(void); void dra7xx_init_early(void); void dra7xx_init_late(void); @@ -235,11 +212,6 @@ void __init ti81xx_map_io(void); } \ }) -extern struct device *omap2_get_mpuss_device(void); -extern struct device *omap2_get_iva_device(void); -extern struct device *omap2_get_l3_device(void); -extern struct device *omap4_get_dsp_device(void); - void omap_gic_of_init(void); #ifdef CONFIG_CACHE_L2X0 @@ -284,11 +256,13 @@ extern u32 omap4_get_cpu1_ns_pa_addr(void); #if defined(CONFIG_SMP) && defined(CONFIG_PM) extern int omap4_mpuss_init(void); -extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); +extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state, + bool rcuidle); extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); #else static inline int omap4_enter_lowpower(unsigned int cpu, - unsigned int power_state) + unsigned int power_state, + bool rcuidle) { cpu_do_idle(); return 0; diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index c514a9602269..79860b23030d 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -226,68 +226,7 @@ void omap3_ctrl_write_boot_mode(u8 bootmode) #endif -/** - * omap_ctrl_write_dsp_boot_addr - set boot address for a remote processor - * @bootaddr: physical address of the boot loader - * - * Set boot address for the boot loader of a supported processor - * when a power ON sequence occurs. - */ -void omap_ctrl_write_dsp_boot_addr(u32 bootaddr) -{ - u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTADDR : - cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTADDR : - cpu_is_omap44xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR : - soc_is_omap54xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR : - 0; - - if (!offset) { - pr_err("%s: unsupported omap type\n", __func__); - return; - } - - omap_ctrl_writel(bootaddr, offset); -} - -/** - * omap_ctrl_write_dsp_boot_mode - set boot mode for a remote processor - * @bootmode: 8-bit value to pass to some boot code - * - * Sets boot mode for the boot loader of a supported processor - * when a power ON sequence occurs. - */ -void omap_ctrl_write_dsp_boot_mode(u8 bootmode) -{ - u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTMOD : - cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTMOD : - 0; - - if (!offset) { - pr_err("%s: unsupported omap type\n", __func__); - return; - } - - omap_ctrl_writel(bootmode, offset); -} - #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) -/* - * Clears the scratchpad contents in case of cold boot- - * called during bootup - */ -void omap3_clear_scratchpad_contents(void) -{ - u32 max_offset = OMAP343X_SCRATCHPAD_ROM_OFFSET; - void __iomem *v_addr; - u32 offset = 0; - - v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM); - if (omap3xxx_prm_clear_global_cold_reset()) { - for ( ; offset <= max_offset; offset += 0x4) - writel_relaxed(0x0, (v_addr + offset)); - } -} - /* Populate the scratchpad structure with restore structure */ void omap3_save_scratchpad_contents(void) { @@ -846,15 +785,3 @@ of_node_put: return ret; } - -/** - * omap3_control_legacy_iomap_init - legacy iomap init for clock providers - * - * Legacy iomap init for clock provider. Needed only by legacy boot mode, - * where the base addresses are not parsed from DT, but still required - * by the clock driver to be setup properly. - */ -void __init omap3_control_legacy_iomap_init(void) -{ - omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap2_ctrl_base); -} diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index c4ca30ba1790..7e7440533bf9 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -512,8 +512,6 @@ extern void omap_ctrl_writeb(u8 val, u16 offset); extern void omap_ctrl_writew(u16 val, u16 offset); extern void omap_ctrl_writel(u32 val, u16 offset); -extern void omap3_save_scratchpad_contents(void); -extern void omap3_clear_scratchpad_contents(void); extern void omap3_restore(void); extern void omap3_restore_es3(void); extern void omap3_restore_3630(void); @@ -521,14 +519,11 @@ extern u32 omap3_arm_context[128]; extern void omap3_control_save_context(void); extern void omap3_control_restore_context(void); extern void omap3_ctrl_write_boot_mode(u8 bootmode); -extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr); -extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); extern void omap3630_ctrl_disable_rta(void); extern int omap3_ctrl_save_padconf(void); void omap3_ctrl_init(void); int omap2_control_base_init(void); int omap_control_init(void); -void __init omap3_control_legacy_iomap_init(void); #else #define omap_ctrl_readb(x) 0 #define omap_ctrl_readw(x) 0 diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 090a8aafb25e..2ab5dcbfb7f6 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -133,7 +133,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev, } /* Execute ARM wfi */ - omap_sram_idle(); + omap_sram_idle(true); /* * Call idle CPU PM enter notifier chain to restore @@ -265,6 +265,7 @@ static struct cpuidle_driver omap3_idle_driver = { .owner = THIS_MODULE, .states = { { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 2 + 2, .target_residency = 5, @@ -272,6 +273,7 @@ static struct cpuidle_driver omap3_idle_driver = { .desc = "MPU ON + CORE ON", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 10 + 10, .target_residency = 30, @@ -279,6 +281,7 @@ static struct cpuidle_driver omap3_idle_driver = { .desc = "MPU ON + CORE ON", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 50 + 50, .target_residency = 300, @@ -286,6 +289,7 @@ static struct cpuidle_driver omap3_idle_driver = { .desc = "MPU RET + CORE ON", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 1500 + 1800, .target_residency = 4000, @@ -293,6 +297,7 @@ static struct cpuidle_driver omap3_idle_driver = { .desc = "MPU OFF + CORE ON", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 2500 + 7500, .target_residency = 12000, @@ -300,6 +305,7 @@ static struct cpuidle_driver omap3_idle_driver = { .desc = "MPU RET + CORE RET", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 3000 + 8500, .target_residency = 15000, @@ -307,6 +313,7 @@ static struct cpuidle_driver omap3_idle_driver = { .desc = "MPU OFF + CORE RET", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 10000 + 30000, .target_residency = 30000, @@ -328,6 +335,7 @@ static struct cpuidle_driver omap3430_idle_driver = { .owner = THIS_MODULE, .states = { { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 110 + 162, .target_residency = 5, @@ -335,6 +343,7 @@ static struct cpuidle_driver omap3430_idle_driver = { .desc = "MPU ON + CORE ON", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 106 + 180, .target_residency = 309, @@ -342,6 +351,7 @@ static struct cpuidle_driver omap3430_idle_driver = { .desc = "MPU ON + CORE ON", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 107 + 410, .target_residency = 46057, @@ -349,6 +359,7 @@ static struct cpuidle_driver omap3430_idle_driver = { .desc = "MPU RET + CORE ON", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 121 + 3374, .target_residency = 46057, @@ -356,6 +367,7 @@ static struct cpuidle_driver omap3430_idle_driver = { .desc = "MPU OFF + CORE ON", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 855 + 1146, .target_residency = 46057, @@ -363,6 +375,7 @@ static struct cpuidle_driver omap3430_idle_driver = { .desc = "MPU RET + CORE RET", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 7580 + 4134, .target_residency = 484329, @@ -370,6 +383,7 @@ static struct cpuidle_driver omap3430_idle_driver = { .desc = "MPU OFF + CORE RET", }, { + .flags = CPUIDLE_FLAG_RCU_IDLE, .enter = omap3_enter_idle_bm, .exit_latency = 7505 + 15274, .target_residency = 484329, diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index de37027ad758..df106524d695 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -105,7 +105,7 @@ static int omap_enter_idle_smp(struct cpuidle_device *dev, } raw_spin_unlock_irqrestore(&mpu_lock, flag); - omap4_enter_lowpower(dev->cpu, cx->cpu_state); + omap4_enter_lowpower(dev->cpu, cx->cpu_state, true); raw_spin_lock_irqsave(&mpu_lock, flag); if (cx->mpu_state_vote == num_online_cpus()) @@ -151,10 +151,10 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, (cx->mpu_logic_state == PWRDM_POWER_OFF); /* Enter broadcast mode for periodic timers */ - RCU_NONIDLE(tick_broadcast_enable()); + tick_broadcast_enable(); /* Enter broadcast mode for one-shot timers */ - RCU_NONIDLE(tick_broadcast_enter()); + tick_broadcast_enter(); /* * Call idle CPU PM enter notifier chain so that @@ -166,7 +166,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, if (dev->cpu == 0) { pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state); - RCU_NONIDLE(omap_set_pwrdm_state(mpu_pd, cx->mpu_state)); + omap_set_pwrdm_state(mpu_pd, cx->mpu_state); /* * Call idle CPU cluster PM enter notifier chain @@ -178,13 +178,13 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, index = 0; cx = state_ptr + index; pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state); - RCU_NONIDLE(omap_set_pwrdm_state(mpu_pd, cx->mpu_state)); + omap_set_pwrdm_state(mpu_pd, cx->mpu_state); mpuss_can_lose_context = 0; } } } - omap4_enter_lowpower(dev->cpu, cx->cpu_state); + omap4_enter_lowpower(dev->cpu, cx->cpu_state, true); cpu_done[dev->cpu] = true; /* Wakeup CPU1 only if it is not offlined */ @@ -194,9 +194,9 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, mpuss_can_lose_context) gic_dist_disable(); - RCU_NONIDLE(clkdm_deny_idle(cpu_clkdm[1])); - RCU_NONIDLE(omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON)); - RCU_NONIDLE(clkdm_allow_idle(cpu_clkdm[1])); + clkdm_deny_idle(cpu_clkdm[1]); + omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON); + clkdm_allow_idle(cpu_clkdm[1]); if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) && mpuss_can_lose_context) { @@ -222,7 +222,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, cpu_pm_exit(); cpu_pm_out: - RCU_NONIDLE(tick_broadcast_exit()); + tick_broadcast_exit(); fail: cpuidle_coupled_parallel_barrier(dev, &abort_barrier); @@ -247,7 +247,8 @@ static struct cpuidle_driver omap4_idle_driver = { /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */ .exit_latency = 328 + 440, .target_residency = 960, - .flags = CPUIDLE_FLAG_COUPLED, + .flags = CPUIDLE_FLAG_COUPLED | + CPUIDLE_FLAG_RCU_IDLE, .enter = omap_enter_idle_coupled, .name = "C2", .desc = "CPUx OFF, MPUSS CSWR", @@ -256,7 +257,8 @@ static struct cpuidle_driver omap4_idle_driver = { /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */ .exit_latency = 460 + 518, .target_residency = 1100, - .flags = CPUIDLE_FLAG_COUPLED, + .flags = CPUIDLE_FLAG_COUPLED | + CPUIDLE_FLAG_RCU_IDLE, .enter = omap_enter_idle_coupled, .name = "C3", .desc = "CPUx OFF, MPUSS OSWR", @@ -282,7 +284,8 @@ static struct cpuidle_driver omap5_idle_driver = { /* C2 - CPU0 RET + CPU1 RET + MPU CSWR */ .exit_latency = 48 + 60, .target_residency = 100, - .flags = CPUIDLE_FLAG_TIMER_STOP, + .flags = CPUIDLE_FLAG_TIMER_STOP | + CPUIDLE_FLAG_RCU_IDLE, .enter = omap_enter_idle_smp, .name = "C2", .desc = "CPUx CSWR, MPUSS CSWR", diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 5a2e198e7db1..8e6d4116d49c 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -14,7 +14,6 @@ #include <linux/err.h> #include <linux/slab.h> #include <linux/of.h> -#include <linux/pinctrl/machine.h> #include <asm/mach-types.h> #include <asm/mach/map.h> diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 59755b5a1ad7..7f387706368a 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -117,7 +117,7 @@ static struct omap_id omap_ids[] __initdata = { static void __iomem *tap_base; static u16 tap_prod_id; -void omap_get_die_id(struct omap_die_id *odi) +static void omap_get_die_id(struct omap_die_id *odi) { if (soc_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0); @@ -793,11 +793,16 @@ void __init omap_soc_device_init(void) soc_dev_attr->machine = soc_name; soc_dev_attr->family = omap_get_family(); + if (!soc_dev_attr->family) { + kfree(soc_dev_attr); + return; + } soc_dev_attr->revision = soc_rev; soc_dev_attr->custom_attr_group = omap_soc_groups[0]; soc_dev = soc_device_register(soc_dev_attr); if (IS_ERR(soc_dev)) { + kfree(soc_dev_attr->family); kfree(soc_dev_attr); return; } diff --git a/arch/arm/mach-omap2/id.h b/arch/arm/mach-omap2/id.h index d1735f4497e3..ded7392f0526 100644 --- a/arch/arm/mach-omap2/id.h +++ b/arch/arm/mach-omap2/id.h @@ -14,6 +14,4 @@ struct omap_die_id { u32 id_3; }; -void omap_get_die_id(struct omap_die_id *odi); - #endif diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index fba0c7aa398c..14ec3f78000b 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -32,11 +32,8 @@ #include "clockdomain.h" #include "common.h" #include "clock.h" -#include "clock2xxx.h" -#include "clock3xxx.h" #include "sdrc.h" #include "control.h" -#include "serial.h" #include "sram.h" #include "cm2xxx.h" #include "cm3xxx.h" @@ -438,11 +435,6 @@ void __init omap2420_init_early(void) omap_clk_soc_init = omap2420_dt_clk_init; rate_table = omap2420_rate_table; } - -void __init omap2420_init_late(void) -{ - omap_pm_soc_init = omap2_pm_init; -} #endif #ifdef CONFIG_SOC_OMAP2430 @@ -462,11 +454,6 @@ void __init omap2430_init_early(void) omap_clk_soc_init = omap2430_dt_clk_init; rate_table = omap2430_rate_table; } - -void __init omap2430_init_late(void) -{ - omap_pm_soc_init = omap2_pm_init; -} #endif /* @@ -474,7 +461,7 @@ void __init omap2430_init_late(void) * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT. */ #ifdef CONFIG_ARCH_OMAP3 -void __init omap3_init_early(void) +static void __init omap3_init_early(void) { omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000)); omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), @@ -497,12 +484,6 @@ void __init omap3430_init_early(void) omap_clk_soc_init = omap3430_dt_clk_init; } -void __init omap35xx_init_early(void) -{ - omap3_init_early(); - omap_clk_soc_init = omap3430_dt_clk_init; -} - void __init omap3630_init_early(void) { omap3_init_early(); diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index 9fba98c2313a..f18ef45e2fe1 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c @@ -33,6 +33,7 @@ * and first to wake-up when MPUSS low power states are excercised */ +#include <linux/cpuidle.h> #include <linux/kernel.h> #include <linux/io.h> #include <linux/errno.h> @@ -214,6 +215,7 @@ static void __init save_l2x0_context(void) * of OMAP4 MPUSS subsystem * @cpu : CPU ID * @power_state: Low power state. + * @rcuidle: RCU needs to be idled * * MPUSS states for the context save: * save_state = @@ -222,7 +224,8 @@ static void __init save_l2x0_context(void) * 2 - CPUx L1 and logic lost + GIC lost: MPUSS OSWR * 3 - CPUx L1 and logic lost + GIC + L2 lost: DEVICE OFF */ -int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) +__cpuidle int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state, + bool rcuidle) { struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu); unsigned int save_state = 0, cpu_logic_state = PWRDM_POWER_RET; @@ -268,6 +271,10 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) cpu_clear_prev_logic_pwrst(cpu); pwrdm_set_next_pwrst(pm_info->pwrdm, power_state); pwrdm_set_logic_retst(pm_info->pwrdm, cpu_logic_state); + + if (rcuidle) + ct_cpuidle_enter(); + set_cpu_wakeup_addr(cpu, __pa_symbol(omap_pm_ops.resume)); omap_pm_ops.scu_prepare(cpu, power_state); l2x0_pwrst_prepare(cpu, save_state); @@ -283,6 +290,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) && cpu) gic_dist_enable(); + if (rcuidle) + ct_cpuidle_exit(); + /* * Restore the CPUx power state to ON otherwise CPUx * power domain can transitions to programmed low power @@ -323,7 +333,7 @@ int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) omap_pm_ops.scu_prepare(cpu, power_state); /* - * CPU never retuns back if targeted power state is OFF mode. + * CPU never returns back if targeted power state is OFF mode. * CPU ONLINE follows normal CPU ONLINE ptah via * omap4_secondary_startup(). */ diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c index fb9c114b9dd7..c2e1aecd07cc 100644 --- a/arch/arm/mach-omap2/omap-secure.c +++ b/arch/arm/mach-omap2/omap-secure.c @@ -47,7 +47,7 @@ static void __init omap_optee_init_check(void) } /** - * omap_sec_dispatcher: Routine to dispatch low power secure + * omap_secure_dispatcher - Routine to dispatch low power secure * service routines * @idx: The HAL API index * @flag: The flag indicating criticality of operation @@ -118,11 +118,6 @@ int __init omap_secure_ram_reserve_memblock(void) return 0; } -phys_addr_t omap_secure_ram_mempool_base(void) -{ - return omap_secure_memblock_base; -} - #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) u32 omap3_save_secure_ram(void *addr, int size) { @@ -157,7 +152,7 @@ u32 omap3_save_secure_ram(void *addr, int size) * NOTE: rx51_secure_dispatcher differs from omap_secure_dispatcher because * it calling omap_smc3() instead omap_smc2() and param[0] is nargs+1 */ -u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs, +static u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs, u32 arg1, u32 arg2, u32 arg3, u32 arg4) { static u32 param[5]; @@ -188,7 +183,7 @@ u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs, /** * rx51_secure_update_aux_cr: Routine to modify the contents of Auxiliary Control Register * @set_bits: bits to set in ACR - * @clr_bits: bits to clear in ACR + * @clear_bits: bits to clear in ACR * * Return the non-zero error value on failure. */ diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h index 9e67d4efdd0c..04b4ba0f59ab 100644 --- a/arch/arm/mach-omap2/omap-secure.h +++ b/arch/arm/mach-omap2/omap-secure.h @@ -68,15 +68,12 @@ extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2, u32 arg3, u32 arg4); extern void omap_smccc_smc(u32 fn, u32 arg); extern void omap_smc1(u32 fn, u32 arg); -extern u32 omap_smc2(u32 id, u32 falg, u32 pargs); +extern u32 omap_smc2(u32 id, u32 flag, u32 pargs); extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs); -extern phys_addr_t omap_secure_ram_mempool_base(void); extern int omap_secure_ram_reserve_memblock(void); extern u32 save_secure_ram_context(u32 args_pa); extern u32 omap3_save_secure_ram(void *save_regs, int size); -extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs, - u32 arg1, u32 arg2, u32 arg3, u32 arg4); extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits); extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag); diff --git a/arch/arm/mach-omap2/omap-smc.S b/arch/arm/mach-omap2/omap-smc.S index 7376f528034d..fe3b5478200a 100644 --- a/arch/arm/mach-omap2/omap-smc.S +++ b/arch/arm/mach-omap2/omap-smc.S @@ -32,7 +32,7 @@ ENTRY(_omap_smc1) ENDPROC(_omap_smc1) /** - * u32 omap_smc2(u32 id, u32 falg, u32 pargs) + * u32 omap_smc2(u32 id, u32 flag, u32 pargs) * Low level common routine for secure HAL and PPA APIs. * @id: Application ID of HAL APIs * @flag: Flag to indicate the criticality of operation diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c index 8d21e3a3c05f..a66b1dc61571 100644 --- a/arch/arm/mach-omap2/omap-wakeupgen.c +++ b/arch/arm/mach-omap2/omap-wakeupgen.c @@ -374,6 +374,7 @@ static void irq_restore_context(void) static void irq_save_secure_context(void) { u32 ret; + ret = omap_secure_dispatcher(OMAP4_HAL_SAVEGIC_INDEX, FLAG_START_CRITICAL, 0, 0, 0, 0, 0); @@ -584,9 +585,8 @@ static int __init wakeupgen_init(struct device_node *node, wakeupgen_ops = &am43xx_wakeupgen_ops; } - domain = irq_domain_add_hierarchy(parent_domain, 0, max_irqs, - node, &wakeupgen_domain_ops, - NULL); + domain = irq_domain_create_hierarchy(parent_domain, 0, max_irqs, of_fwnode_handle(node), + &wakeupgen_domain_ops, NULL); if (!domain) { iounmap(wakeupgen_base); return -ENOMEM; diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 6d1eb4eefefe..5d924b85b694 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -12,10 +12,9 @@ #include <linux/io.h> #include <linux/irq.h> #include <linux/irqchip.h> -#include <linux/platform_device.h> #include <linux/memblock.h> +#include <linux/of.h> #include <linux/of_irq.h> -#include <linux/of_platform.h> #include <linux/export.h> #include <linux/irqchip/arm-gic.h> #include <linux/of_address.h> @@ -140,6 +139,7 @@ static int __init omap4_sram_init(void) __func__); else sram_sync = (void __iomem *)gen_pool_alloc(sram_pool, PAGE_SIZE); + of_node_put(np); return 0; } diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c index 8b3701901991..800980057373 100644 --- a/arch/arm/mach-omap2/omap_device.c +++ b/arch/arm/mach-omap2/omap_device.c @@ -39,6 +39,12 @@ #include "omap_device.h" #include "omap_hwmod.h" +static struct omap_device *omap_device_alloc(struct platform_device *pdev, + struct omap_hwmod **ohs, int oh_cnt); +static void omap_device_delete(struct omap_device *od); +static struct dev_pm_domain omap_device_fail_pm_domain; +static struct dev_pm_domain omap_device_pm_domain; + /* Private functions */ static void _add_clkdev(struct omap_device *od, const char *clk_alias, @@ -238,7 +244,6 @@ static int _omap_device_notifier_call(struct notifier_block *nb, case BUS_NOTIFY_ADD_DEVICE: if (pdev->dev.of_node) omap_device_build_from_dt(pdev); - omap_auxdata_legacy_init(dev); fallthrough; default: od = to_omap_device(pdev); @@ -286,34 +291,6 @@ static int _omap_device_idle_hwmods(struct omap_device *od) /* Public functions for use by core code */ /** - * omap_device_get_context_loss_count - get lost context count - * @pdev: The platform device to update. - * - * Using the primary hwmod, query the context loss count for this - * device. - * - * Callers should consider context for this device lost any time this - * function returns a value different than the value the caller got - * the last time it called this function. - * - * If any hwmods exist for the omap_device associated with @pdev, - * return the context loss counter for that hwmod, otherwise return - * zero. - */ -int omap_device_get_context_loss_count(struct platform_device *pdev) -{ - struct omap_device *od; - u32 ret = 0; - - od = to_omap_device(pdev); - - if (od->hwmods_cnt) - ret = omap_hwmod_get_context_loss_count(od->hwmods[0]); - - return ret; -} - -/** * omap_device_alloc - allocate an omap_device * @pdev: platform_device that will be included in this omap_device * @ohs: ptr to the omap_hwmod for this omap_device @@ -324,7 +301,7 @@ int omap_device_get_context_loss_count(struct platform_device *pdev) * * Returns an struct omap_device pointer or ERR_PTR() on error; */ -struct omap_device *omap_device_alloc(struct platform_device *pdev, +static struct omap_device *omap_device_alloc(struct platform_device *pdev, struct omap_hwmod **ohs, int oh_cnt) { int ret = -ENOMEM; @@ -338,7 +315,7 @@ struct omap_device *omap_device_alloc(struct platform_device *pdev, od->hwmods_cnt = oh_cnt; - hwmods = kmemdup(ohs, sizeof(struct omap_hwmod *) * oh_cnt, GFP_KERNEL); + hwmods = kmemdup_array(ohs, oh_cnt, sizeof(*hwmods), GFP_KERNEL); if (!hwmods) goto oda_exit2; @@ -361,7 +338,7 @@ oda_exit1: return ERR_PTR(ret); } -void omap_device_delete(struct omap_device *od) +static void omap_device_delete(struct omap_device *od) { if (!od) return; @@ -453,14 +430,14 @@ static int _od_resume_noirq(struct device *dev) #define _od_resume_noirq NULL #endif -struct dev_pm_domain omap_device_fail_pm_domain = { +static struct dev_pm_domain omap_device_fail_pm_domain = { .ops = { SET_RUNTIME_PM_OPS(_od_fail_runtime_suspend, _od_fail_runtime_resume, NULL) } }; -struct dev_pm_domain omap_device_pm_domain = { +static struct dev_pm_domain omap_device_pm_domain = { .ops = { SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume, NULL) @@ -592,38 +569,6 @@ int omap_device_deassert_hardreset(struct platform_device *pdev, return ret; } -/** - * omap_device_get_by_hwmod_name() - convert a hwmod name to - * device pointer. - * @oh_name: name of the hwmod device - * - * Returns back a struct device * pointer associated with a hwmod - * device represented by a hwmod_name - */ -struct device *omap_device_get_by_hwmod_name(const char *oh_name) -{ - struct omap_hwmod *oh; - - if (!oh_name) { - WARN(1, "%s: no hwmod name!\n", __func__); - return ERR_PTR(-EINVAL); - } - - oh = omap_hwmod_lookup(oh_name); - if (!oh) { - WARN(1, "%s: no hwmod for %s\n", __func__, - oh_name); - return ERR_PTR(-ENODEV); - } - if (!oh->od) { - WARN(1, "%s: no omap_device for %s\n", __func__, - oh_name); - return ERR_PTR(-ENODEV); - } - - return &oh->od->pdev->dev; -} - static struct notifier_block platform_nb = { .notifier_call = _omap_device_notifier_call, }; diff --git a/arch/arm/mach-omap2/omap_device.h b/arch/arm/mach-omap2/omap_device.h index d607532cf5e0..aa8096ecb23c 100644 --- a/arch/arm/mach-omap2/omap_device.h +++ b/arch/arm/mach-omap2/omap_device.h @@ -25,9 +25,6 @@ #include "omap_hwmod.h" -extern struct dev_pm_domain omap_device_pm_domain; -extern struct dev_pm_domain omap_device_fail_pm_domain; - /* omap_device._state values */ #define OMAP_DEVICE_STATE_UNKNOWN 0 #define OMAP_DEVICE_STATE_ENABLED 1 @@ -66,17 +63,6 @@ struct omap_device { int omap_device_enable(struct platform_device *pdev); int omap_device_idle(struct platform_device *pdev); -/* Core code interface */ - -struct omap_device *omap_device_alloc(struct platform_device *pdev, - struct omap_hwmod **ohs, int oh_cnt); -void omap_device_delete(struct omap_device *od); - -struct device *omap_device_get_by_hwmod_name(const char *oh_name); - -/* OMAP PM interface */ -int omap_device_get_context_loss_count(struct platform_device *pdev); - /* Other */ int omap_device_assert_hardreset(struct platform_device *pdev, diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 31d1a21f6041..111677878d9c 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -706,9 +706,7 @@ static const struct of_device_id ti_clkctrl_match_table[] __initconst = { static int __init _setup_clkctrl_provider(struct device_node *np) { - const __be32 *addrp; struct clkctrl_provider *provider; - u64 size; int i; provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES); @@ -717,8 +715,7 @@ static int __init _setup_clkctrl_provider(struct device_node *np) provider->node = np; - provider->num_addrs = - of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2; + provider->num_addrs = of_address_count(np); provider->addr = memblock_alloc(sizeof(void *) * provider->num_addrs, @@ -733,11 +730,11 @@ static int __init _setup_clkctrl_provider(struct device_node *np) return -ENOMEM; for (i = 0; i < provider->num_addrs; i++) { - addrp = of_get_address(np, i, &size, NULL); - provider->addr[i] = (u32)of_translate_address(np, addrp); - provider->size[i] = size; - pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i], - provider->addr[i] + provider->size[i]); + struct resource res; + of_address_to_resource(np, i, &res); + provider->addr[i] = res.start; + provider->size[i] = resource_size(&res); + pr_debug("%s: %pOF: %pR\n", __func__, np, &res); } list_add(&provider->link, &clkctrl_providers); @@ -903,7 +900,7 @@ static int _init_interface_clks(struct omap_hwmod *oh) } /** - * _init_opt_clk - get a struct clk * for the hwmod's optional clocks + * _init_opt_clks - get a struct clk * for the hwmod's optional clocks * @oh: struct omap_hwmod * * * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk @@ -2197,23 +2194,8 @@ int omap_hwmod_parse_module_range(struct omap_hwmod *oh, struct resource *res) { struct property *prop; - const __be32 *ranges; const char *name; - u32 nr_addr, nr_size; - u64 base, size; - int len, error; - - if (!res) - return -EINVAL; - - ranges = of_get_property(np, "ranges", &len); - if (!ranges) - return -ENOENT; - - len /= sizeof(*ranges); - - if (len < 3) - return -EINVAL; + int err; of_property_for_each_string(np, "compatible", prop, name) if (!strncmp("ti,sysc-", name, 8)) @@ -2222,26 +2204,12 @@ int omap_hwmod_parse_module_range(struct omap_hwmod *oh, if (!name) return -ENOENT; - error = of_property_read_u32(np, "#address-cells", &nr_addr); - if (error) - return -ENOENT; - - error = of_property_read_u32(np, "#size-cells", &nr_size); - if (error) - return -ENOENT; + err = of_range_to_resource(np, 0, res); + if (err) + return err; - if (nr_addr != 1 || nr_size != 1) { - pr_err("%s: invalid range for %s->%pOFn\n", __func__, - oh->name, np); - return -EINVAL; - } - - ranges++; - base = of_translate_address(np, ranges++); - size = be32_to_cpup(ranges); - - pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n", - oh->name, np, base, size); + pr_debug("omap_hwmod: %s %pOFn at %pR\n", + oh->name, np, res); if (oh && oh->mpu_rt_idx) { omap_hwmod_fix_mpu_rt_idx(oh, np, res); @@ -2249,10 +2217,6 @@ int omap_hwmod_parse_module_range(struct omap_hwmod *oh, return 0; } - res->start = base; - res->end = base + size - 1; - res->flags = IORESOURCE_MEM; - return 0; } @@ -2322,18 +2286,18 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, static void __init parse_module_flags(struct omap_hwmod *oh, struct device_node *np) { - if (of_find_property(np, "ti,no-reset-on-init", NULL)) + if (of_property_read_bool(np, "ti,no-reset-on-init")) oh->flags |= HWMOD_INIT_NO_RESET; - if (of_find_property(np, "ti,no-idle-on-init", NULL)) + if (of_property_read_bool(np, "ti,no-idle-on-init")) oh->flags |= HWMOD_INIT_NO_IDLE; - if (of_find_property(np, "ti,no-idle", NULL)) + if (of_property_read_bool(np, "ti,no-idle")) oh->flags |= HWMOD_NO_IDLE; } /** * _init - initialize internal data for the hwmod @oh * @oh: struct omap_hwmod * - * @n: (unused) + * @data: (unused) * * Look up the clocks and the address space used by the MPU to access * registers belonging to the hwmod @oh. @oh must already be @@ -2529,7 +2493,7 @@ static void _setup_postsetup(struct omap_hwmod *oh) /** * _setup - prepare IP block hardware for use * @oh: struct omap_hwmod * - * @n: (unused, pass NULL) + * @data: (unused, pass NULL) * * Configure the IP block represented by @oh. This may include * enabling the IP block, resetting it, and placing it into a @@ -3054,6 +3018,8 @@ int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) return 0; } +static int __init omap_hwmod_setup_one(const char *oh_name); + /** * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up * @oh: pointer to the hwmod currently being set up (usually not the MPU) @@ -3084,7 +3050,7 @@ static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh) * registered omap_hwmod. Also calls _setup() on each hwmod. Returns * -EINVAL upon error or 0 upon success. */ -int __init omap_hwmod_setup_one(const char *oh_name) +static int __init omap_hwmod_setup_one(const char *oh_name) { struct omap_hwmod *oh; @@ -3401,8 +3367,9 @@ static int omap_hwmod_check_module(struct device *dev, * omap_hwmod_allocate_module - allocate new module * @dev: struct device * @oh: module + * @data: module data * @sysc_fields: sysc register bits - * @clockdomain: clockdomain + * @clkdm: clockdomain * @rev_offs: revision register offset * @sysc_offs: sysconfig register offset * @syss_offs: sysstatus register offset @@ -3455,7 +3422,7 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, } if (list_empty(&oh->slave_ports)) { - oi = kcalloc(1, sizeof(*oi), GFP_KERNEL); + oi = kzalloc(sizeof(*oi), GFP_KERNEL); if (!oi) goto out_free_class; @@ -3764,55 +3731,6 @@ int omap_hwmod_shutdown(struct omap_hwmod *oh) */ /** - * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain - * @oh: struct omap_hwmod * - * - * Return the powerdomain pointer associated with the OMAP module - * @oh's main clock. If @oh does not have a main clk, return the - * powerdomain associated with the interface clock associated with the - * module's MPU port. (XXX Perhaps this should use the SDMA port - * instead?) Returns NULL on error, or a struct powerdomain * on - * success. - */ -struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) -{ - struct clk *c; - struct omap_hwmod_ocp_if *oi; - struct clockdomain *clkdm; - struct clk_hw_omap *clk; - struct clk_hw *hw; - - if (!oh) - return NULL; - - if (oh->clkdm) - return oh->clkdm->pwrdm.ptr; - - if (oh->_clk) { - c = oh->_clk; - } else { - oi = _find_mpu_rt_port(oh); - if (!oi) - return NULL; - c = oi->_clk; - } - - hw = __clk_get_hw(c); - if (!hw) - return NULL; - - clk = to_clk_hw_omap(hw); - if (!clk) - return NULL; - - clkdm = clk->clkdm; - if (!clkdm) - return NULL; - - return clkdm->pwrdm.ptr; -} - -/** * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU) * @oh: struct omap_hwmod * * @@ -3978,32 +3896,6 @@ ohsps_unlock: } /** - * omap_hwmod_get_context_loss_count - get lost context count - * @oh: struct omap_hwmod * - * - * Returns the context loss count of associated @oh - * upon success, or zero if no context loss data is available. - * - * On OMAP4, this queries the per-hwmod context loss register, - * assuming one exists. If not, or on OMAP2/3, this queries the - * enclosing powerdomain context loss count. - */ -int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) -{ - struct powerdomain *pwrdm; - int ret = 0; - - if (soc_ops.get_context_lost) - return soc_ops.get_context_lost(oh); - - pwrdm = omap_hwmod_get_pwrdm(oh); - if (pwrdm) - ret = pwrdm_get_context_loss_count(pwrdm); - - return ret; -} - -/** * omap_hwmod_init - initialize the hwmod code * * Sets up some function pointers needed by the hwmod code to operate on the @@ -4054,18 +3946,3 @@ void __init omap_hwmod_init(void) inited = true; } - -/** - * omap_hwmod_get_main_clk - get pointer to main clock name - * @oh: struct omap_hwmod * - * - * Returns the main clock name assocated with @oh upon success, - * or NULL if @oh is NULL. - */ -const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh) -{ - if (!oh) - return NULL; - - return oh->main_clk; -} diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index 6962a8d267e7..dcab7a01c10e 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -615,7 +615,6 @@ struct omap_hwmod *omap_hwmod_lookup(const char *name); int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), void *data); -int __init omap_hwmod_setup_one(const char *name); int omap_hwmod_parse_module_range(struct omap_hwmod *oh, struct device_node *np, struct resource *res); @@ -638,12 +637,6 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); int omap_hwmod_softreset(struct omap_hwmod *oh); -int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags); -int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); -int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type, - const char *name, struct resource *res); - -struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh); void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh); int omap_hwmod_for_each_by_class(const char *classname, @@ -652,12 +645,9 @@ int omap_hwmod_for_each_by_class(const char *classname, void *user); int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state); -int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh); extern void __init omap_hwmod_init(void); -const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh); - #else /* CONFIG_OMAP_HWMOD */ static inline int @@ -670,25 +660,14 @@ omap_hwmod_for_each_by_class(const char *classname, #endif /* CONFIG_OMAP_HWMOD */ /* - * - */ - -void omap_hwmod_rtc_unlock(struct omap_hwmod *oh); -void omap_hwmod_rtc_lock(struct omap_hwmod *oh); - -/* * Chip variant-specific hwmod init routines - XXX should be converted * to use initcalls once the initial boot ordering is straightened out */ extern int omap2420_hwmod_init(void); extern int omap2430_hwmod_init(void); extern int omap3xxx_hwmod_init(void); -extern int omap44xx_hwmod_init(void); -extern int am33xx_hwmod_init(void); extern int dm814x_hwmod_init(void); extern int dm816x_hwmod_init(void); -extern int dra7xx_hwmod_init(void); -int am43xx_hwmod_init(void); extern int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois); diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 558fae4375ba..dbd9dc9f0962 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -22,7 +22,6 @@ #include "prm-regbits-24xx.h" #include "i2c.h" #include "mmc.h" -#include "serial.h" #include "wd_timer.h" /* diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c index 2581b8a5f866..67f1f38909d9 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c @@ -62,7 +62,7 @@ struct omap_hwmod_class iva_hwmod_class = { .name = "iva", }; -struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc = { +static struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc = { .rev_offs = 0x0, .sysc_offs = 0x14, .syss_offs = 0x18, diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c index 518e877bb2a1..761d34914ed9 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c @@ -13,7 +13,6 @@ #include "omap_hwmod.h" #include "l3_2xxx.h" #include "l4_2xxx.h" -#include "serial.h" #include "omap_hwmod_common_data.h" diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index 9156f2bfbc8d..4982e04ead53 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -30,7 +30,7 @@ static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = { .sysc_fields = &omap_hwmod_sysc_type1, }; -struct omap_hwmod_class omap2_dispc_hwmod_class = { +static struct omap_hwmod_class omap2_dispc_hwmod_class = { .name = "dispc", .sysc = &omap2_dispc_sysc, }; @@ -47,7 +47,7 @@ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { .sysc_fields = &omap_hwmod_sysc_type1, }; -struct omap_hwmod_class omap2xxx_timer_hwmod_class = { +static struct omap_hwmod_class omap2xxx_timer_hwmod_class = { .name = "timer", .sysc = &omap2xxx_timer_sysc, }; @@ -67,7 +67,7 @@ static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = { .sysc_fields = &omap_hwmod_sysc_type1, }; -struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = { +static struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = { .name = "wd_timer", .sysc = &omap2xxx_wd_timer_sysc, .pre_shutdown = &omap2_wd_timer_disable, @@ -189,12 +189,6 @@ struct omap_hwmod omap2xxx_mpu_hwmod = { .main_clk = "mpu_ck", }; -/* IVA2 */ -struct omap_hwmod omap2xxx_iva_hwmod = { - .name = "iva", - .class = &iva_hwmod_class, -}; - /* timer3 */ struct omap_hwmod omap2xxx_timer3_hwmod = { .name = "timer3", diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index b6c7d98a9eff..5cbdf58ad59f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -27,7 +27,6 @@ #include "i2c.h" #include "wd_timer.h" -#include "serial.h" /* * OMAP3xxx hardware module integration data @@ -1135,65 +1134,6 @@ static struct omap_hwmod omap34xx_mcspi4 = { .class = &omap34xx_mcspi_class, }; -/* usbhsotg */ -static struct omap_hwmod_class_sysconfig omap3xxx_usbhsotg_sysc = { - .rev_offs = 0x0400, - .sysc_offs = 0x0404, - .syss_offs = 0x0408, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE| - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class usbotg_class = { - .name = "usbotg", - .sysc = &omap3xxx_usbhsotg_sysc, -}; - -/* usb_otg_hs */ - -static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { - .name = "usb_otg_hs", - .main_clk = "hsotgusb_ick", - .prcm = { - .omap2 = { - .module_offs = CORE_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT, - }, - }, - .class = &usbotg_class, - - /* - * Erratum ID: i479 idle_req / idle_ack mechanism potentially - * broken when autoidle is enabled - * workaround is to disable the autoidle bit at module level. - * - * Enabling the device in any other MIDLEMODE setting but force-idle - * causes core_pwrdm not enter idle states at least on OMAP3630. - * Note that musb has OTG_FORCESTDBY register that controls MSTANDBY - * signal when MIDLEMODE is set to force-idle. - */ - .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE | - HWMOD_FORCE_MSTANDBY | HWMOD_RECONFIG_IO_CHAIN, -}; - -/* usb_otg_hs */ - -static struct omap_hwmod_class am35xx_usbotg_class = { - .name = "am35xx_usbotg", -}; - -static struct omap_hwmod am35xx_usbhsotg_hwmod = { - .name = "am35x_otg_hs", - .main_clk = "hsotgusb_fck", - .class = &am35xx_usbotg_class, - .flags = HWMOD_NO_IDLEST, -}; - /* MMC/SD/SDIO common */ static struct omap_hwmod_class_sysconfig omap34xx_mmc_sysc = { .rev_offs = 0x1fc, @@ -1561,22 +1501,6 @@ static struct omap_hwmod_ocp_if omap3xxx_dss__l3 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l3_core -> usbhsotg interface */ -static struct omap_hwmod_ocp_if omap3xxx_usbhsotg__l3 = { - .master = &omap3xxx_usbhsotg_hwmod, - .slave = &omap3xxx_l3_main_hwmod, - .clk = "core_l3_ick", - .user = OCP_USER_MPU, -}; - -/* l3_core -> am35xx_usbhsotg interface */ -static struct omap_hwmod_ocp_if am35xx_usbhsotg__l3 = { - .master = &am35xx_usbhsotg_hwmod, - .slave = &omap3xxx_l3_main_hwmod, - .clk = "hsotgusb_ick", - .user = OCP_USER_MPU, -}; - /* l3_core -> sad2d interface */ static struct omap_hwmod_ocp_if omap3xxx_sad2d__l3 = { .master = &omap3xxx_sad2d_hwmod, @@ -1758,24 +1682,6 @@ static struct omap_hwmod_ocp_if omap36xx_l4_core__sr2 = { .user = OCP_USER_MPU, }; - -/* l4_core -> usbhsotg */ -static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &omap3xxx_usbhsotg_hwmod, - .clk = "l4_ick", - .user = OCP_USER_MPU, -}; - - -/* l4_core -> usbhsotg */ -static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = { - .master = &omap3xxx_l4_core_hwmod, - .slave = &am35xx_usbhsotg_hwmod, - .clk = "hsotgusb_ick", - .user = OCP_USER_MPU, -}; - /* L4_WKUP -> L4_SEC interface */ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__l4_sec = { .master = &omap3xxx_l4_wkup_hwmod, @@ -1945,7 +1851,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, - .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP , + .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP, .flags = OMAP_FIREWALL_L4, }, }, @@ -2266,7 +2172,7 @@ static struct omap_hwmod am35xx_emac_hwmod = { /* * According to Mark Greer, the MPU will not return from WFI * when the EMAC signals an interrupt. - * http://www.spinics.net/lists/arm-kernel/msg174734.html + * https://lore.kernel.org/all/1336770778-23044-3-git-send-email-mgreer@animalcreek.com/ */ .flags = (HWMOD_NO_IDLEST | HWMOD_BLOCK_WFI), }; @@ -2440,13 +2346,12 @@ static struct omap_hwmod_ocp_if *omap36xx_sham_hwmod_ocp_ifs[] __initdata = { NULL }; - /* * Apparently the SHA/MD5 and AES accelerator IP blocks are * only present on some AM35xx chips, and no one knows which - * ones. See - * http://www.spinics.net/lists/arm-kernel/msg215466.html So - * if you need these IP blocks on an AM35xx, try uncommenting + * ones. + * See https://lore.kernel.org/all/20130108203853.GB1876@animalcreek.com/ + * So if you need these IP blocks on an AM35xx, try uncommenting * the following lines. */ static struct omap_hwmod_ocp_if *am35xx_sham_hwmod_ocp_ifs[] __initdata = { @@ -2465,8 +2370,6 @@ static struct omap_hwmod_ocp_if *omap3430es1_hwmod_ocp_ifs[] __initdata = { static struct omap_hwmod_ocp_if *omap3430es2plus_hwmod_ocp_ifs[] __initdata = { &omap3xxx_dss__l3, &omap3xxx_l4_core__dss, - &omap3xxx_usbhsotg__l3, - &omap3xxx_l4_core__usbhsotg, &omap3xxx_usb_host_hs__l3_main_2, &omap3xxx_l4_core__usb_host_hs, &omap3xxx_l4_core__usb_tll_hs, @@ -2509,8 +2412,6 @@ static struct omap_hwmod_ocp_if *omap36xx_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__dss, &omap36xx_l4_core__sr1, &omap36xx_l4_core__sr2, - &omap3xxx_usbhsotg__l3, - &omap3xxx_l4_core__usbhsotg, &omap3xxx_l4_core__mailbox, &omap3xxx_usb_host_hs__l3_main_2, &omap3xxx_l4_core__usb_host_hs, @@ -2528,8 +2429,6 @@ static struct omap_hwmod_ocp_if *omap36xx_hwmod_ocp_ifs[] __initdata = { static struct omap_hwmod_ocp_if *am35xx_hwmod_ocp_ifs[] __initdata = { &omap3xxx_dss__l3, &omap3xxx_l4_core__dss, - &am35xx_usbhsotg__l3, - &am35xx_l4_core__usbhsotg, &am35xx_l4_core__uart4, &omap3xxx_usb_host_hs__l3_main_2, &omap3xxx_l4_core__usb_host_hs, diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c index 246f1e5da99f..439232233c39 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c @@ -20,7 +20,7 @@ #include "omap_hwmod_common_data.h" -/** +/* * struct omap_hwmod_sysc_type1 - TYPE1 sysconfig scheme. * * To be used by hwmod structure to specify the sysconfig offsets @@ -36,7 +36,7 @@ struct sysc_regbits omap_hwmod_sysc_type1 = { .autoidle_shift = SYSC_TYPE1_AUTOIDLE_SHIFT, }; -/** +/* * struct omap_hwmod_sysc_type2 - TYPE2 sysconfig scheme. * * To be used by hwmod structure to specify the sysconfig offsets if the @@ -50,7 +50,7 @@ struct sysc_regbits omap_hwmod_sysc_type2 = { .dmadisable_shift = SYSC_TYPE2_DMADISABLE_SHIFT, }; -/** +/* * struct omap_hwmod_sysc_type3 - TYPE3 sysconfig scheme. * Used by some IPs on AM33xx */ diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index 0045e6680a63..69dddc53e1d8 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -20,7 +20,6 @@ extern struct omap_hwmod omap2xxx_l3_main_hwmod; extern struct omap_hwmod omap2xxx_l4_core_hwmod; extern struct omap_hwmod omap2xxx_l4_wkup_hwmod; extern struct omap_hwmod omap2xxx_mpu_hwmod; -extern struct omap_hwmod omap2xxx_iva_hwmod; extern struct omap_hwmod omap2xxx_timer3_hwmod; extern struct omap_hwmod omap2xxx_timer4_hwmod; extern struct omap_hwmod omap2xxx_timer5_hwmod; @@ -60,7 +59,6 @@ extern struct omap_hwmod_ocp_if omap2_l4_core__uart2; extern struct omap_hwmod_ocp_if omap2_l4_core__uart3; extern struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1; extern struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2; -extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2; extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3; extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4; extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5; @@ -86,14 +84,10 @@ extern struct omap_hwmod_class mpu_hwmod_class; extern struct omap_hwmod_class iva_hwmod_class; extern struct omap_hwmod_class omap2_uart_class; extern struct omap_hwmod_class omap2_dss_hwmod_class; -extern struct omap_hwmod_class omap2_dispc_hwmod_class; extern struct omap_hwmod_class omap2_rfbi_hwmod_class; extern struct omap_hwmod_class omap2_venc_hwmod_class; -extern struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc; extern struct omap_hwmod_class omap2_hdq1w_class; -extern struct omap_hwmod_class omap2xxx_timer_hwmod_class; -extern struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class; extern struct omap_hwmod_class omap2xxx_gpio_hwmod_class; extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class; extern struct omap_hwmod_class omap2xxx_mcspi_class; diff --git a/arch/arm/mach-omap2/omap_hwmod_reset.c b/arch/arm/mach-omap2/omap_hwmod_reset.c deleted file mode 100644 index 143623bb056d..000000000000 --- a/arch/arm/mach-omap2/omap_hwmod_reset.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * OMAP IP block custom reset and preprogramming stubs - * - * Copyright (C) 2012 Texas Instruments, Inc. - * Paul Walmsley - * - * A small number of IP blocks need custom reset and preprogramming - * functions. The stubs in this file provide a standard way for the - * hwmod code to call these functions, which are to be located under - * drivers/. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA - * 02110-1301 USA - */ -#include <linux/kernel.h> -#include <linux/errno.h> - -#include "omap_hwmod.h" -#include "common.h" - -#define OMAP_RTC_STATUS_REG 0x44 -#define OMAP_RTC_KICK0_REG 0x6c -#define OMAP_RTC_KICK1_REG 0x70 - -#define OMAP_RTC_KICK0_VALUE 0x83E70B13 -#define OMAP_RTC_KICK1_VALUE 0x95A4F1E0 -#define OMAP_RTC_STATUS_BUSY BIT(0) -#define OMAP_RTC_MAX_READY_TIME 50 - -/** - * omap_rtc_wait_not_busy - Wait for the RTC BUSY flag - * @oh: struct omap_hwmod * - * - * For updating certain RTC registers, the MPU must wait - * for the BUSY status in OMAP_RTC_STATUS_REG to become zero. - * Once the BUSY status is zero, there is a 15 microseconds access - * period in which the MPU can program. - */ -static void omap_rtc_wait_not_busy(struct omap_hwmod *oh) -{ - int i; - - /* BUSY may stay active for 1/32768 second (~30 usec) */ - omap_test_timeout(omap_hwmod_read(oh, OMAP_RTC_STATUS_REG) - & OMAP_RTC_STATUS_BUSY, OMAP_RTC_MAX_READY_TIME, i); - /* now we have ~15 microseconds to read/write various registers */ -} - -/** - * omap_hwmod_rtc_unlock - Unlock the Kicker mechanism. - * @oh: struct omap_hwmod * - * - * RTC IP have kicker feature. This prevents spurious writes to its registers. - * In order to write into any of the RTC registers, KICK values has te be - * written in respective KICK registers. This is needed for hwmod to write into - * sysconfig register. - */ -void omap_hwmod_rtc_unlock(struct omap_hwmod *oh) -{ - unsigned long flags; - - local_irq_save(flags); - omap_rtc_wait_not_busy(oh); - omap_hwmod_write(OMAP_RTC_KICK0_VALUE, oh, OMAP_RTC_KICK0_REG); - omap_hwmod_write(OMAP_RTC_KICK1_VALUE, oh, OMAP_RTC_KICK1_REG); - local_irq_restore(flags); -} - -/** - * omap_hwmod_rtc_lock - Lock the Kicker mechanism. - * @oh: struct omap_hwmod * - * - * RTC IP have kicker feature. This prevents spurious writes to its registers. - * Once the RTC registers are written, KICK mechanism needs to be locked, - * in order to prevent any spurious writes. This function locks back the RTC - * registers once hwmod completes its write into sysconfig register. - */ -void omap_hwmod_rtc_lock(struct omap_hwmod *oh) -{ - unsigned long flags; - - local_irq_save(flags); - omap_rtc_wait_not_busy(oh); - omap_hwmod_write(0x0, oh, OMAP_RTC_KICK0_REG); - omap_hwmod_write(0x0, oh, OMAP_RTC_KICK1_REG); - local_irq_restore(flags); -} diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h index 88375ab38e31..ed84fe95e857 100644 --- a/arch/arm/mach-omap2/omap_opp_data.h +++ b/arch/arm/mach-omap2/omap_opp_data.h @@ -71,11 +71,6 @@ struct omap_opp_def { .vp_errgain = _errgain \ } -/* Use this to initialize the default table */ -extern int __init omap_init_opp_table(struct omap_opp_def *opp_def, - u32 opp_def_size); - - extern struct omap_volt_data omap34xx_vddmpu_volt_data[]; extern struct omap_volt_data omap34xx_vddcore_volt_data[]; extern struct omap_volt_data omap36xx_vddmpu_volt_data[]; diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index 6f6a6a66c981..a1d001170a68 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-or-later /* - * This file configures the internal USB PHY in OMAP4430. Used - * with TWL6030 transceiver and MUSB on OMAP4430. - * - * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com - * Author: Hema HK <hemahk@ti.com> - */ + * This file configures the internal USB PHY in OMAP4430. Used + * with TWL6030 transceiver and MUSB on OMAP4430. + * + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com + * Author: Hema HK <hemahk@ti.com> + */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt @@ -19,7 +19,6 @@ #include "soc.h" #include "control.h" -#include "usb.h" #define CONTROL_DEV_CONF 0x300 #define PHY_PD 0x1 @@ -52,89 +51,3 @@ static int __init omap4430_phy_power_down(void) return 0; } omap_early_initcall(omap4430_phy_power_down); - -void am35x_musb_reset(void) -{ - u32 regval; - - /* Reset the musb interface */ - regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); - - regval |= AM35XX_USBOTGSS_SW_RST; - omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); - - regval &= ~AM35XX_USBOTGSS_SW_RST; - omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); - - regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); -} - -void am35x_musb_phy_power(u8 on) -{ - unsigned long timeout = jiffies + msecs_to_jiffies(100); - u32 devconf2; - - if (on) { - /* - * Start the on-chip PHY and its PLL. - */ - devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); - - devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN); - devconf2 |= CONF2_PHY_PLLON; - - omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); - - pr_info("Waiting for PHY clock good...\n"); - while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2) - & CONF2_PHYCLKGD)) { - cpu_relax(); - - if (time_after(jiffies, timeout)) { - pr_err("musb PHY clock good timed out\n"); - break; - } - } - } else { - /* - * Power down the on-chip PHY. - */ - devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); - - devconf2 &= ~CONF2_PHY_PLLON; - devconf2 |= CONF2_PHYPWRDN | CONF2_OTGPWRDN; - omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); - } -} - -void am35x_musb_clear_irq(void) -{ - u32 regval; - - regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); - regval |= AM35XX_USBOTGSS_INT_CLR; - omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR); - regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); -} - -void am35x_set_mode(u8 musb_mode) -{ - u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); - - devconf2 &= ~CONF2_OTGMODE; - switch (musb_mode) { - case MUSB_HOST: /* Force VBUS valid, ID = 0 */ - devconf2 |= CONF2_FORCE_HOST; - break; - case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */ - devconf2 |= CONF2_FORCE_DEVICE; - break; - case MUSB_OTG: /* Don't override the VBUS/ID comparators */ - devconf2 |= CONF2_NO_OVERRIDE; - break; - default: - pr_info("Unsupported mode %u\n", musb_mode); - } - - omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); -} diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 5b99d602c87b..b947bacf23a3 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -6,11 +6,11 @@ */ #include <linux/clk.h> #include <linux/davinci_emac.h> -#include <linux/gpio.h> +#include <linux/gpio/machine.h> +#include <linux/gpio/consumer.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/of_platform.h> -#include <linux/wl12xx.h> #include <linux/mmc/card.h> #include <linux/mmc/host.h> #include <linux/power/smartreflex.h> @@ -41,7 +41,6 @@ struct pdata_init { }; static struct of_dev_auxdata omap_auxdata_lookup[]; -static struct twl4030_gpio_platform_data twl_gpio_auxdata; #ifdef CONFIG_MACH_NOKIA_N8X0 static void __init omap2420_n8x0_legacy_init(void) @@ -98,52 +97,43 @@ static struct iommu_platform_data omap3_iommu_isp_pdata = { }; #endif -static int omap3_sbc_t3730_twl_callback(struct device *dev, - unsigned gpio, - unsigned ngpio) +static void __init omap3_sbc_t3x_usb_hub_init(char *hub_name, int idx) { - int res; + struct gpio_desc *d; - res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH, - "wlan pwr"); - if (res) - return res; - - gpio_export(gpio, 0); - - return 0; -} - -static void __init omap3_sbc_t3x_usb_hub_init(int gpio, char *hub_name) -{ - int err = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, hub_name); - - if (err) { - pr_err("SBC-T3x: %s reset gpio request failed: %d\n", - hub_name, err); + /* This asserts the RESET line (reverse polarity) */ + d = gpiod_get_index(NULL, "reset", idx, GPIOD_OUT_HIGH); + if (IS_ERR(d)) { + pr_err("Unable to get T3x USB reset GPIO descriptor\n"); return; } - - gpio_export(gpio, 0); - + gpiod_set_consumer_name(d, hub_name); + gpiod_export(d, 0); udelay(10); - gpio_set_value(gpio, 1); + /* De-assert RESET */ + gpiod_set_value(d, 0); msleep(1); } -static void __init omap3_sbc_t3730_twl_init(void) -{ - twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback; -} +static struct gpiod_lookup_table omap3_sbc_t3x_usb_gpio_table = { + .dev_id = NULL, + .table = { + GPIO_LOOKUP_IDX("gpio-160-175", 7, "reset", 0, + GPIO_ACTIVE_LOW), + { } + }, +}; static void __init omap3_sbc_t3730_legacy_init(void) { - omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub"); + gpiod_add_lookup_table(&omap3_sbc_t3x_usb_gpio_table); + omap3_sbc_t3x_usb_hub_init("sb-t35 usb hub", 0); } static void __init omap3_sbc_t3530_legacy_init(void) { - omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub"); + gpiod_add_lookup_table(&omap3_sbc_t3x_usb_gpio_table); + omap3_sbc_t3x_usb_hub_init("sb-t35 usb hub", 0); } static void __init omap3_evm_legacy_init(void) @@ -187,31 +177,59 @@ static void __init am35xx_emac_reset(void) omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */ } -static struct gpio cm_t3517_wlan_gpios[] __initdata = { - { 56, GPIOF_OUT_INIT_HIGH, "wlan pwr" }, - { 4, GPIOF_OUT_INIT_HIGH, "xcvr noe" }, +static struct gpiod_lookup_table cm_t3517_wlan_gpio_table = { + .dev_id = NULL, + .table = { + GPIO_LOOKUP("gpio-48-53", 8, "power", + GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("gpio-0-15", 4, "noe", + GPIO_ACTIVE_HIGH), + { } + }, }; static void __init omap3_sbc_t3517_wifi_init(void) { - int err = gpio_request_array(cm_t3517_wlan_gpios, - ARRAY_SIZE(cm_t3517_wlan_gpios)); - if (err) { - pr_err("SBC-T3517: wl12xx gpios request failed: %d\n", err); - return; - } + struct gpio_desc *d; + + gpiod_add_lookup_table(&cm_t3517_wlan_gpio_table); - gpio_export(cm_t3517_wlan_gpios[0].gpio, 0); - gpio_export(cm_t3517_wlan_gpios[1].gpio, 0); + /* This asserts the RESET line (reverse polarity) */ + d = gpiod_get(NULL, "power", GPIOD_OUT_HIGH); + if (IS_ERR(d)) { + pr_err("Unable to get CM T3517 WLAN power GPIO descriptor\n"); + } else { + gpiod_set_consumer_name(d, "wlan pwr"); + gpiod_export(d, 0); + } + d = gpiod_get(NULL, "noe", GPIOD_OUT_HIGH); + if (IS_ERR(d)) { + pr_err("Unable to get CM T3517 WLAN XCVR NOE GPIO descriptor\n"); + } else { + gpiod_set_consumer_name(d, "xcvr noe"); + gpiod_export(d, 0); + } msleep(100); - gpio_set_value(cm_t3517_wlan_gpios[1].gpio, 0); -} + gpiod_set_value(d, 0); +} + +static struct gpiod_lookup_table omap3_sbc_t3517_usb_gpio_table = { + .dev_id = NULL, + .table = { + GPIO_LOOKUP_IDX("gpio-144-159", 8, "reset", 0, + GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("gpio-96-111", 2, "reset", 1, + GPIO_ACTIVE_LOW), + { } + }, +}; static void __init omap3_sbc_t3517_legacy_init(void) { - omap3_sbc_t3x_usb_hub_init(152, "cm-t3517 usb hub"); - omap3_sbc_t3x_usb_hub_init(98, "sb-t35 usb hub"); + gpiod_add_lookup_table(&omap3_sbc_t3517_usb_gpio_table); + omap3_sbc_t3x_usb_hub_init("cm-t3517 usb hub", 0); + omap3_sbc_t3x_usb_hub_init("sb-t35 usb hub", 1); am35xx_emac_reset(); hsmmc2_internal_input_clk(); omap3_sbc_t3517_wifi_init(); @@ -257,9 +275,19 @@ static struct platform_device pandora_backlight = { .id = -1, }; +static struct gpiod_lookup_table pandora_soc_audio_gpios = { + .dev_id = "soc-audio", + .table = { + GPIO_LOOKUP("gpio-112-127", 6, "dac", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("gpio-0-15", 14, "amp", GPIO_ACTIVE_HIGH), + { } + }, +}; + static void __init omap3_pandora_legacy_init(void) { platform_device_register(&pandora_backlight); + gpiod_add_lookup_table(&pandora_soc_audio_gpios); } #endif /* CONFIG_ARCH_OMAP3 */ @@ -393,21 +421,6 @@ static struct ti_prm_platform_data ti_prm_pdata = { .clkdm_lookup = clkdm_lookup, }; -/* - * GPIOs for TWL are initialized by the I2C bus and need custom - * handing until DSS has device tree bindings. - */ -void omap_auxdata_legacy_init(struct device *dev) -{ - if (dev->platform_data) - return; - - if (strcmp("twl4030-gpio", dev_name(dev))) - return; - - dev->platform_data = &twl_gpio_auxdata; -} - #if defined(CONFIG_ARCH_OMAP3) && IS_ENABLED(CONFIG_SND_SOC_OMAP_MCBSP) static struct omap_mcbsp_platform_data mcbsp_pdata; static void __init omap3_mcbsp_init(void) @@ -428,9 +441,6 @@ static struct pdata_init auxdata_quirks[] __initdata = { { "nokia,n810", omap2420_n8x0_legacy_init, }, { "nokia,n810-wimax", omap2420_n8x0_legacy_init, }, #endif -#ifdef CONFIG_ARCH_OMAP3 - { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_twl_init, }, -#endif { /* sentinel */ }, }; @@ -440,7 +450,6 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = { #ifdef CONFIG_MACH_NOKIA_N8X0 OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL), OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data), - OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data), #endif #ifdef CONFIG_ARCH_OMAP3 OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu", diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index da829a90fe8c..700869c9eae1 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -54,12 +54,6 @@ static struct omap2_oscillator oscillator = { .shutdown_time = ULONG_MAX, }; -void omap_pm_setup_oscillator(u32 tstart, u32 tshut) -{ - oscillator.startup_time = tstart; - oscillator.shutdown_time = tshut; -} - void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { if (!tstart || !tshut) @@ -140,7 +134,7 @@ int __maybe_unused omap_pm_nop_init(void) int (*omap_pm_soc_init)(void); -int __init omap2_common_pm_late_init(void) +static int __init omap2_common_pm_late_init(void) { int error; diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 80e84ae66aee..f97ff93f2fb4 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -29,23 +29,9 @@ static inline int omap4_idle_init(void) extern void *omap3_secure_ram_storage; extern void omap3_pm_off_mode_enable(int); -extern void omap_sram_idle(void); +extern void omap_sram_idle(bool rcuidle); extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused); -#if defined(CONFIG_PM_OPP) -extern int omap3_opp_init(void); -extern int omap4_opp_init(void); -#else -static inline int omap3_opp_init(void) -{ - return -EINVAL; -} -static inline int omap4_opp_init(void) -{ - return -EINVAL; -} -#endif - extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); @@ -58,9 +44,6 @@ extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); #endif /* CONFIG_PM_DEBUG */ /* 24xx */ -extern void omap24xx_idle_loop_suspend(void); -extern unsigned int omap24xx_idle_loop_suspend_sz; - extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, void __iomem *sdrc_power); extern unsigned int omap24xx_cpu_suspend_sz; @@ -110,20 +93,16 @@ extern u16 pm44xx_errata; #ifdef CONFIG_POWER_AVS_OMAP extern int omap_devinit_smartreflex(void); -extern void omap_enable_smartreflex_on_init(void); #else static inline int omap_devinit_smartreflex(void) { return -EINVAL; } - -static inline void omap_enable_smartreflex_on_init(void) {} #endif #ifdef CONFIG_TWL4030_CORE extern int omap3_twl_init(void); extern int omap4_twl_init(void); -extern int omap3_twl_set_sr_bit(bool enable); #else static inline int omap3_twl_init(void) { @@ -145,13 +124,9 @@ static inline int omap4_cpcap_init(void) #endif #ifdef CONFIG_PM -extern void omap_pm_setup_oscillator(u32 tstart, u32 tshut); extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut); -extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm); #else -static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { } static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; } -static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { } #endif #ifdef CONFIG_SUSPEND diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c deleted file mode 100644 index 6953c47d8dc6..000000000000 --- a/arch/arm/mach-omap2/pm24xx.c +++ /dev/null @@ -1,312 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * OMAP2 Power Management Routines - * - * Copyright (C) 2005 Texas Instruments, Inc. - * Copyright (C) 2006-2008 Nokia Corporation - * - * Written by: - * Richard Woodruff <r-woodruff2@ti.com> - * Tony Lindgren - * Juha Yrjola - * Amit Kucheria <amit.kucheria@nokia.com> - * Igor Stoppa <igor.stoppa@nokia.com> - * - * Based on pm.c for omap1 - */ - -#include <linux/cpu_pm.h> -#include <linux/suspend.h> -#include <linux/sched.h> -#include <linux/proc_fs.h> -#include <linux/interrupt.h> -#include <linux/sysfs.h> -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/clk.h> -#include <linux/clk-provider.h> -#include <linux/irq.h> -#include <linux/time.h> - -#include <asm/fncpy.h> - -#include <asm/mach/time.h> -#include <asm/mach/irq.h> -#include <asm/mach-types.h> -#include <asm/system_misc.h> - -#include <linux/omap-dma.h> - -#include "soc.h" -#include "common.h" -#include "clock.h" -#include "prm2xxx.h" -#include "prm-regbits-24xx.h" -#include "cm2xxx.h" -#include "cm-regbits-24xx.h" -#include "sdrc.h" -#include "sram.h" -#include "pm.h" -#include "control.h" -#include "powerdomain.h" -#include "clockdomain.h" - -static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, - void __iomem *sdrc_power); - -static struct powerdomain *mpu_pwrdm, *core_pwrdm; -static struct clockdomain *dsp_clkdm, *mpu_clkdm, *wkup_clkdm, *gfx_clkdm; - -static struct clk *osc_ck, *emul_ck; - -static int omap2_enter_full_retention(void) -{ - u32 l; - - /* There is 1 reference hold for all children of the oscillator - * clock, the following will remove it. If no one else uses the - * oscillator itself it will be disabled if/when we enter retention - * mode. - */ - clk_disable(osc_ck); - - /* Clear old wake-up events */ - /* REVISIT: These write to reserved bits? */ - omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); - omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); - omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); - - pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET); - pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); - - /* Workaround to kill USB */ - l = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0) | OMAP24XX_USBSTANDBYCTRL; - omap_ctrl_writel(l, OMAP2_CONTROL_DEVCONF0); - - /* One last check for pending IRQs to avoid extra latency due - * to sleeping unnecessarily. */ - if (omap_irq_pending()) - goto no_sleep; - - /* Jump to SRAM suspend code */ - omap2_sram_suspend(sdrc_read_reg(SDRC_DLLA_CTRL), - OMAP_SDRC_REGADDR(SDRC_DLLA_CTRL), - OMAP_SDRC_REGADDR(SDRC_POWER)); - -no_sleep: - clk_enable(osc_ck); - - /* clear CORE wake-up events */ - omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); - omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); - - /* wakeup domain events - bit 1: GPT1, bit5 GPIO */ - omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1); - - /* MPU domain wake events */ - omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x1); - - omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x20); - - pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); - pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON); - - return 0; -} - -static int sti_console_enabled; - -static int omap2_allow_mpu_retention(void) -{ - if (!omap2xxx_cm_mpu_retention_allowed()) - return 0; - if (sti_console_enabled) - return 0; - - return 1; -} - -static void omap2_enter_mpu_retention(void) -{ - const int zero = 0; - - /* The peripherals seem not to be able to wake up the MPU when - * it is in retention mode. */ - if (omap2_allow_mpu_retention()) { - /* REVISIT: These write to reserved bits? */ - omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); - omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); - omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); - - /* Try to enter MPU retention */ - pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); - - } else { - /* Block MPU retention */ - pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); - } - - /* WFI */ - asm("mcr p15, 0, %0, c7, c0, 4" : : "r" (zero) : "memory", "cc"); - - pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); -} - -static int omap2_can_sleep(void) -{ - if (omap2xxx_cm_fclks_active()) - return 0; - if (__clk_is_enabled(osc_ck)) - return 0; - - return 1; -} - -static void omap2_pm_idle(void) -{ - int error; - - if (omap_irq_pending()) - return; - - error = cpu_cluster_pm_enter(); - if (error || !omap2_can_sleep()) { - omap2_enter_mpu_retention(); - goto out_cpu_cluster_pm; - } - - omap2_enter_full_retention(); - -out_cpu_cluster_pm: - cpu_cluster_pm_exit(); -} - -static void __init prcm_setup_regs(void) -{ - int i, num_mem_banks; - struct powerdomain *pwrdm; - - /* - * Enable autoidle - * XXX This should be handled by hwmod code or PRCM init code - */ - omap2_prm_write_mod_reg(OMAP24XX_AUTOIDLE_MASK, OCP_MOD, - OMAP2_PRCM_SYSCONFIG_OFFSET); - - /* - * Set CORE powerdomain memory banks to retain their contents - * during RETENTION - */ - num_mem_banks = pwrdm_get_mem_bank_count(core_pwrdm); - for (i = 0; i < num_mem_banks; i++) - pwrdm_set_mem_retst(core_pwrdm, i, PWRDM_POWER_RET); - - pwrdm_set_logic_retst(core_pwrdm, PWRDM_POWER_RET); - - pwrdm_set_logic_retst(mpu_pwrdm, PWRDM_POWER_RET); - - /* Force-power down DSP, GFX powerdomains */ - - pwrdm = clkdm_get_pwrdm(dsp_clkdm); - pwrdm_set_next_pwrst(pwrdm, PWRDM_POWER_OFF); - - pwrdm = clkdm_get_pwrdm(gfx_clkdm); - pwrdm_set_next_pwrst(pwrdm, PWRDM_POWER_OFF); - - /* Enable hardware-supervised idle for all clkdms */ - clkdm_for_each(omap_pm_clkdms_setup, NULL); - clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); - - omap_common_suspend_init(omap2_enter_full_retention); - - /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk - * stabilisation */ - omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, - OMAP2_PRCM_CLKSSETUP_OFFSET); - - /* Configure automatic voltage transition */ - omap2_prm_write_mod_reg(2 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, - OMAP2_PRCM_VOLTSETUP_OFFSET); - omap2_prm_write_mod_reg(OMAP24XX_AUTO_EXTVOLT_MASK | - (0x1 << OMAP24XX_SETOFF_LEVEL_SHIFT) | - OMAP24XX_MEMRETCTRL_MASK | - (0x1 << OMAP24XX_SETRET_LEVEL_SHIFT) | - (0x0 << OMAP24XX_VOLT_LEVEL_SHIFT), - OMAP24XX_GR_MOD, OMAP2_PRCM_VOLTCTRL_OFFSET); - - /* Enable wake-up events */ - omap2_prm_write_mod_reg(OMAP24XX_EN_GPIOS_MASK | OMAP24XX_EN_GPT1_MASK, - WKUP_MOD, PM_WKEN); - - /* Enable SYS_CLKEN control when all domains idle */ - omap2_prm_set_mod_reg_bits(OMAP_AUTOEXTCLKMODE_MASK, OMAP24XX_GR_MOD, - OMAP2_PRCM_CLKSRC_CTRL_OFFSET); -} - -int __init omap2_pm_init(void) -{ - u32 l; - - printk(KERN_INFO "Power Management for OMAP2 initializing\n"); - l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_REVISION_OFFSET); - printk(KERN_INFO "PRCM revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); - - /* Look up important powerdomains */ - - mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); - if (!mpu_pwrdm) - pr_err("PM: mpu_pwrdm not found\n"); - - core_pwrdm = pwrdm_lookup("core_pwrdm"); - if (!core_pwrdm) - pr_err("PM: core_pwrdm not found\n"); - - /* Look up important clockdomains */ - - mpu_clkdm = clkdm_lookup("mpu_clkdm"); - if (!mpu_clkdm) - pr_err("PM: mpu_clkdm not found\n"); - - wkup_clkdm = clkdm_lookup("wkup_clkdm"); - if (!wkup_clkdm) - pr_err("PM: wkup_clkdm not found\n"); - - dsp_clkdm = clkdm_lookup("dsp_clkdm"); - if (!dsp_clkdm) - pr_err("PM: dsp_clkdm not found\n"); - - gfx_clkdm = clkdm_lookup("gfx_clkdm"); - if (!gfx_clkdm) - pr_err("PM: gfx_clkdm not found\n"); - - - osc_ck = clk_get(NULL, "osc_ck"); - if (IS_ERR(osc_ck)) { - printk(KERN_ERR "could not get osc_ck\n"); - return -ENODEV; - } - - if (cpu_is_omap242x()) { - emul_ck = clk_get(NULL, "emul_ck"); - if (IS_ERR(emul_ck)) { - printk(KERN_ERR "could not get emul_ck\n"); - clk_put(osc_ck); - return -ENODEV; - } - } - - prcm_setup_regs(); - - /* - * We copy the assembler sleep/wakeup routines to SRAM. - * These routines need to be in SRAM as that's the only - * memory the MPU can see when it wakes up after the entire - * chip enters idle. - */ - omap2_sram_suspend = omap_sram_push(omap24xx_cpu_suspend, - omap24xx_cpu_suspend_sz); - - arm_pm_idle = omap2_pm_idle; - - return 0; -} diff --git a/arch/arm/mach-omap2/pm33xx-core.c b/arch/arm/mach-omap2/pm33xx-core.c index bf0d25fd2cea..4abb86dc98fd 100644 --- a/arch/arm/mach-omap2/pm33xx-core.c +++ b/arch/arm/mach-omap2/pm33xx-core.c @@ -16,7 +16,6 @@ #include <linux/clk.h> #include <linux/cpu.h> #include <linux/platform_data/gpio-omap.h> -#include <linux/pinctrl/pinmux.h> #include <linux/wkup_m3_ipc.h> #include <linux/of.h> #include <linux/rtc.h> @@ -105,8 +104,6 @@ static int amx3_common_init(int (*idle)(u32 wfi_flags)) static int am33xx_suspend_init(int (*idle)(u32 wfi_flags)) { - int ret; - gfx_l4ls_clkdm = clkdm_lookup("gfx_l4ls_gfx_clkdm"); if (!gfx_l4ls_clkdm) { @@ -114,9 +111,7 @@ static int am33xx_suspend_init(int (*idle)(u32 wfi_flags)) return -ENODEV; } - ret = amx3_common_init(idle); - - return ret; + return amx3_common_init(idle); } static int am43xx_suspend_init(int (*idle)(u32 wfi_flags)) @@ -393,12 +388,15 @@ static int __init amx3_idle_init(struct device_node *cpu_node, int cpu) if (!state_node) break; - if (!of_device_is_available(state_node)) + if (!of_device_is_available(state_node)) { + of_node_put(state_node); continue; + } if (i == CPUIDLE_STATE_MAX) { pr_warn("%s: cpuidle states reached max possible\n", __func__); + of_node_put(state_node); break; } @@ -408,6 +406,7 @@ static int __init amx3_idle_init(struct device_node *cpu_node, int cpu) states[state_count].wfi_flags |= WFI_FLAG_WAKE_M3 | WFI_FLAG_FLUSH_CACHE; + of_node_put(state_node); state_count++; } diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index d73c7b692116..68975771e633 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -26,6 +26,7 @@ #include <linux/delay.h> #include <linux/slab.h> #include <linux/of.h> +#include <linux/cpuidle.h> #include <trace/events/power.h> @@ -174,7 +175,7 @@ static int omap34xx_do_sram_idle(unsigned long save_state) return 0; } -void omap_sram_idle(void) +__cpuidle void omap_sram_idle(bool rcuidle) { /* Variable to tell what needs to be saved and restored * in omap_sram_idle*/ @@ -254,11 +255,18 @@ void omap_sram_idle(void) */ if (save_state) omap34xx_save_context(omap3_arm_context); + + if (rcuidle) + ct_cpuidle_enter(); + if (save_state == 1 || save_state == 3) cpu_suspend(save_state, omap34xx_do_sram_idle); else omap34xx_do_sram_idle(save_state); + if (rcuidle) + ct_cpuidle_exit(); + /* Restore normal SDRC POWER settings */ if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 && (omap_type() == OMAP2_DEVICE_TYPE_EMU || @@ -294,7 +302,7 @@ static void omap3_pm_idle(void) if (omap_irq_pending()) return; - omap_sram_idle(); + omap3_do_wfi(); } #ifdef CONFIG_SUSPEND @@ -316,7 +324,7 @@ static int omap3_pm_suspend(void) omap3_intc_suspend(); - omap_sram_idle(); + omap_sram_idle(false); restore: /* Restore next_pwrsts */ diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index 5a7a949ae965..37b168119fe4 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c @@ -76,7 +76,7 @@ static int omap4_pm_suspend(void) * domain CSWR is not supported by hardware. * More details can be found in OMAP4430 TRM section 4.3.4.2. */ - omap4_enter_lowpower(cpu_id, cpu_suspend_state); + omap4_enter_lowpower(cpu_id, cpu_suspend_state, false); /* Restore next powerdomain state */ list_for_each_entry(pwrst, &pwrst_list, node) { @@ -99,7 +99,7 @@ static int omap4_pm_suspend(void) * possible causes. * http://www.spinics.net/lists/arm-kernel/msg218641.html */ - pr_warn("A possible cause could be an old bootloader - try u-boot >= v2012.07\n"); + pr_debug("A possible cause could be an old bootloader - try u-boot >= v2012.07\n"); } else { pr_info("Successfully put all powerdomains to target state\n"); } @@ -257,7 +257,7 @@ int __init omap4_pm_init(void) * http://www.spinics.net/lists/arm-kernel/msg218641.html */ if (cpu_is_omap44xx()) - pr_warn("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n"); + pr_debug("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n"); ret = pwrdm_for_each(pwrdms_setup, NULL); if (ret) { diff --git a/arch/arm/mach-omap2/pmic-cpcap.c b/arch/arm/mach-omap2/pmic-cpcap.c index 668dc84fd31e..9f9a20274db8 100644 --- a/arch/arm/mach-omap2/pmic-cpcap.c +++ b/arch/arm/mach-omap2/pmic-cpcap.c @@ -18,10 +18,10 @@ #include "vc.h" /** - * omap_cpcap_vsel_to_vdc - convert CPCAP VSEL value to microvolts DC + * omap_cpcap_vsel_to_uv - convert CPCAP VSEL value to microvolts DC * @vsel: CPCAP VSEL value to convert * - * Returns the microvolts DC that the CPCAP PMIC should generate when + * Returns: the microvolts DC that the CPCAP PMIC should generate when * programmed with @vsel. */ static unsigned long omap_cpcap_vsel_to_uv(unsigned char vsel) @@ -35,7 +35,7 @@ static unsigned long omap_cpcap_vsel_to_uv(unsigned char vsel) * omap_cpcap_uv_to_vsel - convert microvolts DC to CPCAP VSEL value * @uv: microvolts DC to convert * - * Returns the VSEL value necessary for the CPCAP PMIC to + * Returns: the VSEL value necessary for the CPCAP PMIC to * generate an output voltage equal to or greater than @uv microvolts DC. */ static unsigned char omap_cpcap_uv_to_vsel(unsigned long uv) @@ -82,10 +82,10 @@ static struct omap_voltdm_pmic omap_cpcap_iva = { }; /** - * omap_max8952_vsel_to_vdc - convert MAX8952 VSEL value to microvolts DC + * omap_max8952_vsel_to_uv - convert MAX8952 VSEL value to microvolts DC * @vsel: MAX8952 VSEL value to convert * - * Returns the microvolts DC that the MAX8952 Regulator should generate when + * Returns: the microvolts DC that the MAX8952 Regulator should generate when * programmed with @vsel. */ static unsigned long omap_max8952_vsel_to_uv(unsigned char vsel) @@ -99,7 +99,7 @@ static unsigned long omap_max8952_vsel_to_uv(unsigned char vsel) * omap_max8952_uv_to_vsel - convert microvolts DC to MAX8952 VSEL value * @uv: microvolts DC to convert * - * Returns the VSEL value necessary for the MAX8952 Regulator to + * Returns: the VSEL value necessary for the MAX8952 Regulator to * generate an output voltage equal to or greater than @uv microvolts DC. */ static unsigned char omap_max8952_uv_to_vsel(unsigned long uv) @@ -129,10 +129,10 @@ static struct omap_voltdm_pmic omap443x_max8952_mpu = { }; /** - * omap_fan5355_vsel_to_vdc - convert FAN535503 VSEL value to microvolts DC + * omap_fan535503_vsel_to_uv - convert FAN535503 VSEL value to microvolts DC * @vsel: FAN535503 VSEL value to convert * - * Returns the microvolts DC that the FAN535503 Regulator should generate when + * Returns: the microvolts DC that the FAN535503 Regulator should generate when * programmed with @vsel. */ static unsigned long omap_fan535503_vsel_to_uv(unsigned char vsel) @@ -144,10 +144,10 @@ static unsigned long omap_fan535503_vsel_to_uv(unsigned char vsel) } /** - * omap_fan535508_vsel_to_vdc - convert FAN535508 VSEL value to microvolts DC + * omap_fan535508_vsel_to_uv - convert FAN535508 VSEL value to microvolts DC * @vsel: FAN535508 VSEL value to convert * - * Returns the microvolts DC that the FAN535508 Regulator should generate when + * Returns: the microvolts DC that the FAN535508 Regulator should generate when * programmed with @vsel. */ static unsigned long omap_fan535508_vsel_to_uv(unsigned char vsel) @@ -165,7 +165,7 @@ static unsigned long omap_fan535508_vsel_to_uv(unsigned char vsel) * omap_fan535503_uv_to_vsel - convert microvolts DC to FAN535503 VSEL value * @uv: microvolts DC to convert * - * Returns the VSEL value necessary for the MAX8952 Regulator to + * Returns: the VSEL value necessary for the MAX8952 Regulator to * generate an output voltage equal to or greater than @uv microvolts DC. */ static unsigned char omap_fan535503_uv_to_vsel(unsigned long uv) @@ -184,7 +184,7 @@ static unsigned char omap_fan535503_uv_to_vsel(unsigned long uv) * omap_fan535508_uv_to_vsel - convert microvolts DC to FAN535508 VSEL value * @uv: microvolts DC to convert * - * Returns the VSEL value necessary for the MAX8952 Regulator to + * Returns: the VSEL value necessary for the MAX8952 Regulator to * generate an output voltage equal to or greater than @uv microvolts DC. */ static unsigned char omap_fan535508_uv_to_vsel(unsigned long uv) @@ -264,7 +264,11 @@ int __init omap4_cpcap_init(void) static int __init cpcap_late_init(void) { - omap4_vc_set_pmic_signaling(PWRDM_POWER_RET); + if (!of_find_compatible_node(NULL, NULL, "motorola,cpcap")) + return 0; + + if (soc_is_omap443x() || soc_is_omap446x() || soc_is_omap447x()) + omap4_vc_set_pmic_signaling(PWRDM_POWER_RET); return 0; } diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 2d747f6cffe8..0225b9889404 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -37,8 +37,8 @@ #define PWRDM_TRACE_STATES_FLAG (1<<31) -void pwrdms_save_context(void); -void pwrdms_restore_context(void); +static void pwrdms_save_context(void); +static void pwrdms_restore_context(void); enum { PWRDM_STATE_NOW = 0, @@ -174,7 +174,7 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) break; case PWRDM_STATE_PREV: prev = pwrdm_read_prev_pwrst(pwrdm); - if (pwrdm->state != prev) + if (prev >= 0 && pwrdm->state != prev) pwrdm->state_counter[prev]++; if (prev == PWRDM_POWER_RET) _update_logic_membank_counters(pwrdm); @@ -187,9 +187,9 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) trace_state = (PWRDM_TRACE_STATES_FLAG | ((next & OMAP_POWERSTATE_MASK) << 8) | ((prev & OMAP_POWERSTATE_MASK) << 0)); - trace_power_domain_target_rcuidle(pwrdm->name, - trace_state, - raw_smp_processor_id()); + trace_power_domain_target(pwrdm->name, + trace_state, + raw_smp_processor_id()); } break; default: @@ -523,7 +523,7 @@ int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm) * Set the powerdomain @pwrdm's next power state to @pwrst. The powerdomain * may not enter this state immediately if the preconditions for this state * have not been satisfied. Returns -EINVAL if the powerdomain pointer is - * null or if the power state is invalid for the powerdomin, or returns 0 + * null or if the power state is invalid for the powerdomain, or returns 0 * upon success. */ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) @@ -541,8 +541,8 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) { /* Trace the pwrdm desired target state */ - trace_power_domain_target_rcuidle(pwrdm->name, pwrst, - raw_smp_processor_id()); + trace_power_domain_target(pwrdm->name, pwrst, + raw_smp_processor_id()); /* Program the pwrdm desired target state */ ret = arch_pwrdm->pwrdm_set_next_pwrst(pwrdm, pwrst); } @@ -1111,7 +1111,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst) int curr_pwrst; int ret = 0; - if (!pwrdm || IS_ERR(pwrdm)) + if (IS_ERR_OR_NULL(pwrdm)) return -EINVAL; while (!(pwrdm->pwrsts & (1 << pwrst))) { @@ -1149,82 +1149,6 @@ osps_out: } /** - * pwrdm_get_context_loss_count - get powerdomain's context loss count - * @pwrdm: struct powerdomain * to wait for - * - * Context loss count is the sum of powerdomain off-mode counter, the - * logic off counter and the per-bank memory off counter. Returns negative - * (and WARNs) upon error, otherwise, returns the context loss count. - */ -int pwrdm_get_context_loss_count(struct powerdomain *pwrdm) -{ - int i, count; - - if (!pwrdm) { - WARN(1, "powerdomain: %s: pwrdm is null\n", __func__); - return -ENODEV; - } - - count = pwrdm->state_counter[PWRDM_POWER_OFF]; - count += pwrdm->ret_logic_off_counter; - - for (i = 0; i < pwrdm->banks; i++) - count += pwrdm->ret_mem_off_counter[i]; - - /* - * Context loss count has to be a non-negative value. Clear the sign - * bit to get a value range from 0 to INT_MAX. - */ - count &= INT_MAX; - - pr_debug("powerdomain: %s: context loss count = %d\n", - pwrdm->name, count); - - return count; -} - -/** - * pwrdm_can_ever_lose_context - can this powerdomain ever lose context? - * @pwrdm: struct powerdomain * - * - * Given a struct powerdomain * @pwrdm, returns 1 if the powerdomain - * can lose either memory or logic context or if @pwrdm is invalid, or - * returns 0 otherwise. This function is not concerned with how the - * powerdomain registers are programmed (i.e., to go off or not); it's - * concerned with whether it's ever possible for this powerdomain to - * go off while some other part of the chip is active. This function - * assumes that every powerdomain can go to either ON or INACTIVE. - */ -bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm) -{ - int i; - - if (!pwrdm) { - pr_debug("powerdomain: %s: invalid powerdomain pointer\n", - __func__); - return true; - } - - if (pwrdm->pwrsts & PWRSTS_OFF) - return true; - - if (pwrdm->pwrsts & PWRSTS_RET) { - if (pwrdm->pwrsts_logic_ret & PWRSTS_OFF) - return true; - - for (i = 0; i < pwrdm->banks; i++) - if (pwrdm->pwrsts_mem_ret[i] & PWRSTS_OFF) - return true; - } - - for (i = 0; i < pwrdm->banks; i++) - if (pwrdm->pwrsts_mem_on[i] & PWRSTS_OFF) - return true; - - return false; -} - -/** * pwrdm_save_context - save powerdomain registers * * Register state is going to be lost due to a suspend or hibernate @@ -1238,7 +1162,7 @@ static int pwrdm_save_context(struct powerdomain *pwrdm, void *unused) } /** - * pwrdm_save_context - restore powerdomain registers + * pwrdm_restore_context - restore powerdomain registers * * Restore powerdomain control registers after a suspend or resume * event. @@ -1250,36 +1174,12 @@ static int pwrdm_restore_context(struct powerdomain *pwrdm, void *unused) return 0; } -static int pwrdm_lost_power(struct powerdomain *pwrdm, void *unused) -{ - int state; - - /* - * Power has been lost across all powerdomains, increment the - * counter. - */ - - state = pwrdm_read_pwrst(pwrdm); - if (state != PWRDM_POWER_OFF) { - pwrdm->state_counter[state]++; - pwrdm->state_counter[PWRDM_POWER_OFF]++; - } - pwrdm->state = state; - - return 0; -} - -void pwrdms_save_context(void) +static void pwrdms_save_context(void) { pwrdm_for_each(pwrdm_save_context, NULL); } -void pwrdms_restore_context(void) +static void pwrdms_restore_context(void) { pwrdm_for_each(pwrdm_restore_context, NULL); } - -void pwrdms_lost_power(void) -{ - pwrdm_for_each(pwrdm_lost_power, NULL); -} diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index 907cc659f47a..fbc89999460b 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -208,8 +208,6 @@ struct powerdomain *pwrdm_lookup(const char *name); int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), void *user); -int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user), - void *user); int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); @@ -243,8 +241,6 @@ int pwrdm_state_switch_nolock(struct powerdomain *pwrdm); int pwrdm_state_switch(struct powerdomain *pwrdm); int pwrdm_pre_transition(struct powerdomain *pwrdm); int pwrdm_post_transition(struct powerdomain *pwrdm); -int pwrdm_get_context_loss_count(struct powerdomain *pwrdm); -bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm); extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 state); @@ -273,8 +269,4 @@ extern struct powerdomain gfx_omap2_pwrdm; extern void pwrdm_lock(struct powerdomain *pwrdm); extern void pwrdm_unlock(struct powerdomain *pwrdm); -extern void pwrdms_save_context(void); -extern void pwrdms_restore_context(void); - -extern void pwrdms_lost_power(void); #endif diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 48e804c93caf..5e3544a63526 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -550,7 +550,6 @@ struct omap_prcm_init_data { struct device_node *np; }; -extern void omap_prcm_irq_cleanup(void); extern int omap_prcm_register_chain_handler( struct omap_prcm_irq_setup *irq_setup); extern int omap_prcm_event_to_irq(const char *event); diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c index 5add541e3b41..7236c50388a8 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.c +++ b/arch/arm/mach-omap2/prcm_mpu44xx.c @@ -35,18 +35,6 @@ void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg) writel_relaxed(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg)); } -u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) -{ - u32 v; - - v = omap4_prcm_mpu_read_inst_reg(inst, reg); - v &= ~mask; - v |= bits; - omap4_prcm_mpu_write_inst_reg(v, inst, reg); - - return v; -} - /** * omap2_set_globals_prcm_mpu - set the MPU PRCM base address (for early use) * @prcm_mpu: PRCM_MPU base virtual address diff --git a/arch/arm/mach-omap2/prcm_mpu_44xx_54xx.h b/arch/arm/mach-omap2/prcm_mpu_44xx_54xx.h index 7c6377566f33..0c519447e790 100644 --- a/arch/arm/mach-omap2/prcm_mpu_44xx_54xx.h +++ b/arch/arm/mach-omap2/prcm_mpu_44xx_54xx.h @@ -26,8 +26,6 @@ extern struct omap_domain_base prcm_mpu_base; extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx); extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx); -extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, - s16 idx); extern void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu); #endif diff --git a/arch/arm/mach-omap2/prm-regbits-33xx.h b/arch/arm/mach-omap2/prm-regbits-33xx.h index 3748c5266ae1..9b97f8c76cd1 100644 --- a/arch/arm/mach-omap2/prm-regbits-33xx.h +++ b/arch/arm/mach-omap2/prm-regbits-33xx.h @@ -15,6 +15,7 @@ #define AM33XX_GFX_MEM_STATEST_MASK (0x3 << 4) #define AM33XX_GLOBAL_WARM_SW_RST_MASK (1 << 1) #define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0) +#define AM33XX_RST_GLOBAL_COLD_SW_MASK (1 << 1) #define AM33XX_PRUSS_MEM_ONSTATE_MASK (0x3 << 5) #define AM33XX_PRUSS_MEM_RETSTATE_MASK (1 << 7) #define AM33XX_PRUSS_MEM_STATEST_MASK (0x3 << 23) diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 08df78810a5e..fc53a27eed01 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -15,9 +15,8 @@ # ifndef __ASSEMBLER__ extern struct omap_domain_base prm_base; extern u16 prm_features; -extern void omap2_set_globals_prm(void __iomem *prm); +extern enum reboot_mode prm_reboot_mode; int omap_prcm_init(void); -int omap2_prm_base_init(void); int omap2_prcm_base_init(void); # endif @@ -156,12 +155,10 @@ int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset); int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod, u16 offset, u16 st_offset); int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset); -extern u32 prm_read_reset_sources(void); extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx); extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx); void omap_prm_reset_system(void); -void omap_prm_reconfigure_io_chain(void); int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask); /* diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index 3d803f7182b9..bc263d564acc 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -104,9 +104,6 @@ int omap2_prm_deassert_hardreset(u8 rst_shift, u8 st_shift, u8 part, s16 prm_mod, u16 reset_offset, u16 st_offset); -extern int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); -extern int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm); -extern int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm); extern int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); extern int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index 4b65a0f9cf7d..505d685d6792 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -10,15 +10,12 @@ #include <linux/errno.h> #include <linux/err.h> #include <linux/io.h> +#include <linux/reboot.h> #include "powerdomain.h" #include "prm33xx.h" #include "prm-regbits-33xx.h" -#define AM33XX_PRM_RSTCTRL_OFFSET 0x0000 - -#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0) - /* Read a register in a PRM instance */ static u32 am33xx_prm_read_reg(s16 inst, u16 idx) { @@ -322,10 +319,19 @@ static int am33xx_check_vcvp(void) * * Immediately reboots the device through warm reset. */ -static void am33xx_prm_global_warm_sw_reset(void) +static void am33xx_prm_global_sw_reset(void) { - am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK, - AM33XX_RST_GLOBAL_WARM_SW_MASK, + /* + * Historically AM33xx performed warm reset for all requested reboot_mode. + * Keep this behaviour unchanged for all except newly added REBOOT_COLD. + */ + u32 mask = AM33XX_RST_GLOBAL_WARM_SW_MASK; + + if (prm_reboot_mode == REBOOT_COLD) + mask = AM33XX_RST_GLOBAL_COLD_SW_MASK; + + am33xx_prm_rmw_reg_bits(mask, + mask, AM33XX_PRM_DEVICE_MOD, AM33XX_PRM_RSTCTRL_OFFSET); @@ -386,7 +392,7 @@ static struct prm_ll_data am33xx_prm_ll_data = { .assert_hardreset = am33xx_prm_assert_hardreset, .deassert_hardreset = am33xx_prm_deassert_hardreset, .is_hardreset_asserted = am33xx_prm_is_hardreset_asserted, - .reset_system = am33xx_prm_global_warm_sw_reset, + .reset_system = am33xx_prm_global_sw_reset, }; int __init am33xx_prm_init(const struct omap_prcm_init_data *data) diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index 63e73e9b82bc..1b5d08f594aa 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -32,6 +32,7 @@ static void omap3xxx_prm_read_pending_irqs(unsigned long *events); static void omap3xxx_prm_ocp_barrier(void); static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); static void omap3xxx_prm_restore_irqen(u32 *saved_mask); +static void omap3xxx_prm_iva_idle(void); static const struct omap_prcm_irq omap3_prcm_irqs[] = { OMAP_PRCM_IRQ("wkup", 0, 0), @@ -268,7 +269,7 @@ static int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) * Toggles the reset signal to modem IP block. Required to allow * OMAP3430 without stacked modem to idle properly. */ -void __init omap3_prm_reset_modem(void) +static void __init omap3_prm_reset_modem(void) { omap2_prm_write_mod_reg( OMAP3430_RM_RSTCTRL_CORE_MODEM_SW_RSTPWRON_MASK | @@ -469,7 +470,7 @@ static u32 omap3xxx_prm_read_reset_sources(void) * function forces the IVA2 into idle state so it can go * into retention/off and thus allow full-chip retention/off. */ -void omap3xxx_prm_iva_idle(void) +static void omap3xxx_prm_iva_idle(void) { /* ensure IVA2 clock is disabled */ omap2_cm_write_mod_reg(0, OMAP3430_IVA2_MOD, CM_FCLKEN); diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index ed7c389aa5a7..ab899e461c62 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -138,8 +138,6 @@ extern void omap3_prm_vcvp_write(u32 val, u8 offset); extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); int __init omap3xxx_prm_init(const struct omap_prcm_init_data *data); -void omap3xxx_prm_iva_idle(void); -void omap3_prm_reset_modem(void); int omap3xxx_prm_clear_global_cold_reset(void); void omap3_prm_save_scratchpad_contents(u32 *ptr); void omap3_prm_init_pm(bool has_uart4, bool has_iva); diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 25093c1e5b9a..6c555438dd48 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -407,7 +407,7 @@ static bool omap44xx_prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx) } /** - * omap44xx_prm_clear_context_lost_flags_old - clear context loss flags + * omap44xx_prm_clear_context_loss_flags_old - clear context loss flags * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION) * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST) * @idx: CONTEXT register offset diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index fb2d48cfe756..ee4588acda50 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -67,6 +67,12 @@ struct omap_domain_base prm_base; u16 prm_features; /* + * Platforms that implement different reboot modes can store the requested + * mode here. + */ +enum reboot_mode prm_reboot_mode; + +/* * prm_ll_data: function pointers to SoC-specific implementations of * common PRM functions */ @@ -187,7 +193,7 @@ int omap_prcm_event_to_irq(const char *name) * * No return value. */ -void omap_prcm_irq_cleanup(void) +static void omap_prcm_irq_cleanup(void) { unsigned int irq; int i; @@ -345,41 +351,6 @@ err: } /** - * omap2_set_globals_prm - set the PRM base address (for early use) - * @prm: PRM base virtual address - * - * XXX Will be replaced when the PRM/CM drivers are completed. - */ -void __init omap2_set_globals_prm(void __iomem *prm) -{ - prm_base.va = prm; -} - -/** - * prm_read_reset_sources - return the sources of the SoC's last reset - * - * Return a u32 bitmask representing the reset sources that caused the - * SoC to reset. The low-level per-SoC functions called by this - * function remap the SoC-specific reset source bits into an - * OMAP-common set of reset source bits, defined in - * arch/arm/mach-omap2/prm.h. Returns the standardized reset source - * u32 bitmask from the hardware upon success, or returns (1 << - * OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources() - * function was registered. - */ -u32 prm_read_reset_sources(void) -{ - u32 ret = 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT; - - if (prm_ll_data->read_reset_sources) - ret = prm_ll_data->read_reset_sources(); - else - WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__); - - return ret; -} - -/** * prm_was_any_context_lost_old - was device context lost? (old API) * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION) * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST) @@ -405,7 +376,7 @@ bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx) } /** - * prm_clear_context_lost_flags_old - clear context loss flags (old API) + * prm_clear_context_loss_flags_old - clear context loss flags (old API) * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION) * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST) * @idx: CONTEXT register offset @@ -489,22 +460,6 @@ int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset) } /** - * omap_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain - * - * Clear any previously-latched I/O wakeup events and ensure that the - * I/O wakeup gates are aligned with the current mux settings. - * Calls SoC specific I/O chain reconfigure function if available, - * otherwise does nothing. - */ -void omap_prm_reconfigure_io_chain(void) -{ - if (!prcm_irq_setup || !prcm_irq_setup->reconfigure_io_chain) - return; - - prcm_irq_setup->reconfigure_io_chain(); -} - -/** * omap_prm_reset_system - trigger global SW reset * * Triggers SoC specific global warm reset to reboot the device. @@ -548,6 +503,7 @@ int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) /** * omap_prm_vp_check_txdone - check voltage processor TX done status + * @vp_id: unique VP instance ID * * Checks if voltage processor transmission has been completed. * Returns non-zero if a transmission has completed, 0 otherwise. @@ -565,6 +521,7 @@ u32 omap_prm_vp_check_txdone(u8 vp_id) /** * omap_prm_vp_clear_txdone - clears voltage processor TX done status + * @vp_id: unique VP instance ID * * Clears the status bit for completed voltage processor transmission * returned by prm_vp_check_txdone. @@ -740,7 +697,7 @@ static const struct of_device_id omap_prcm_dt_match_table[] __initconst = { * on the DT data. Returns 0 in success, negative error value * otherwise. */ -int __init omap2_prm_base_init(void) +static int __init omap2_prm_base_init(void) { struct device_node *np; const struct of_device_id *match; diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index 2be4106d0dd6..b1bf9e24d442 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c @@ -45,7 +45,7 @@ static struct omap2_sms_regs sms_context; * * Save SMS registers that need to be restored after off mode. */ -void omap2_sms_save_context(void) +static void omap2_sms_save_context(void) { sms_context.sms_sysconfig = sms_read_reg(SMS_SYSCONFIG); } @@ -60,55 +60,6 @@ void omap2_sms_restore_context(void) sms_write_reg(sms_context.sms_sysconfig, SMS_SYSCONFIG); } -/** - * omap2_sdrc_get_params - return SDRC register values for a given clock rate - * @r: SDRC clock rate (in Hz) - * @sdrc_cs0: chip select 0 ram timings ** - * @sdrc_cs1: chip select 1 ram timings ** - * - * Return pre-calculated values for the SDRC_ACTIM_CTRLA, - * SDRC_ACTIM_CTRLB, SDRC_RFR_CTRL and SDRC_MR registers in sdrc_cs[01] - * structs,for a given SDRC clock rate 'r'. - * These parameters control various timing delays in the SDRAM controller - * that are expressed in terms of the number of SDRC clock cycles to - * wait; hence the clock rate dependency. - * - * Supports 2 different timing parameters for both chip selects. - * - * Note 1: the sdrc_init_params_cs[01] must be sorted rate descending. - * Note 2: If sdrc_init_params_cs_1 is not NULL it must be of same size - * as sdrc_init_params_cs_0. - * - * Fills in the struct omap_sdrc_params * for each chip select. - * Returns 0 upon success or -1 upon failure. - */ -int omap2_sdrc_get_params(unsigned long r, - struct omap_sdrc_params **sdrc_cs0, - struct omap_sdrc_params **sdrc_cs1) -{ - struct omap_sdrc_params *sp0, *sp1; - - if (!sdrc_init_params_cs0) - return -1; - - sp0 = sdrc_init_params_cs0; - sp1 = sdrc_init_params_cs1; - - while (sp0->rate && sp0->rate != r) { - sp0++; - if (sdrc_init_params_cs1) - sp1++; - } - - if (!sp0->rate) - return -1; - - *sdrc_cs0 = sp0; - *sdrc_cs1 = sp1; - return 0; -} - - void __init omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms) { omap2_sdrc_base = sdrc; diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h index 5bdb832665c0..45b35422b587 100644 --- a/arch/arm/mach-omap2/sdrc.h +++ b/arch/arm/mach-omap2/sdrc.h @@ -80,10 +80,6 @@ static inline void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) {}; #endif -int omap2_sdrc_get_params(unsigned long r, - struct omap_sdrc_params **sdrc_cs0, - struct omap_sdrc_params **sdrc_cs1); -void omap2_sms_save_context(void); void omap2_sms_restore_context(void); struct memory_timings { @@ -95,7 +91,6 @@ struct memory_timings { }; extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode); -struct omap_sdrc_params *rx51_get_sdram_timings(void); u32 omap2xxx_sdrc_dll_is_unlocked(void); u32 omap2xxx_sdrc_reprogram(u32 level, u32 force); diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c index 529d46cfdea2..5a275b4fd404 100644 --- a/arch/arm/mach-omap2/sdrc2xxx.c +++ b/arch/arm/mach-omap2/sdrc2xxx.c @@ -1,7 +1,5 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/mach-omap2/sdrc2xxx.c - * * SDRAM timing related functions for OMAP2xxx * * Copyright (C) 2005, 2008 Texas Instruments Inc. diff --git a/arch/arm/mach-omap2/serial.h b/arch/arm/mach-omap2/serial.h deleted file mode 100644 index 7ca1fcff453b..000000000000 --- a/arch/arm/mach-omap2/serial.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (C) 2009 Texas Instruments - * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com> - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* OMAP2 serial ports */ -#define OMAP2_UART1_BASE 0x4806a000 -#define OMAP2_UART2_BASE 0x4806c000 -#define OMAP2_UART3_BASE 0x4806e000 - -/* OMAP3 serial ports */ -#define OMAP3_UART1_BASE OMAP2_UART1_BASE -#define OMAP3_UART2_BASE OMAP2_UART2_BASE -#define OMAP3_UART3_BASE 0x49020000 -#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */ -#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */ - -/* OMAP4 serial ports */ -#define OMAP4_UART1_BASE OMAP2_UART1_BASE -#define OMAP4_UART2_BASE OMAP2_UART2_BASE -#define OMAP4_UART3_BASE 0x48020000 -#define OMAP4_UART4_BASE 0x4806e000 - -/* TI81XX serial ports */ -#define TI81XX_UART1_BASE 0x48020000 -#define TI81XX_UART2_BASE 0x48022000 -#define TI81XX_UART3_BASE 0x48024000 - -/* AM3505/3517 UART4 */ -#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */ - -/* AM33XX serial port */ -#define AM33XX_UART1_BASE 0x44E09000 - -/* OMAP5 serial ports */ -#define OMAP5_UART1_BASE OMAP2_UART1_BASE -#define OMAP5_UART2_BASE OMAP2_UART2_BASE -#define OMAP5_UART3_BASE OMAP4_UART3_BASE -#define OMAP5_UART4_BASE OMAP4_UART4_BASE -#define OMAP5_UART5_BASE 0x48066000 -#define OMAP5_UART6_BASE 0x48068000 - -/* External port on Zoom2/3 */ -#define ZOOM_UART_BASE 0x10000000 -#define ZOOM_UART_VIRT 0xfa400000 - -#define OMAP_PORT_SHIFT 2 -#define ZOOM_PORT_SHIFT 1 - -#define OMAP24XX_BASE_BAUD (48000000/16) - -#ifndef __ASSEMBLER__ - -struct omap_board_data; -struct omap_uart_port_info; - -extern void omap_serial_init(void); -extern void omap_serial_board_init(struct omap_uart_port_info *platform_data); -extern void omap_serial_init_port(struct omap_board_data *bdata, - struct omap_uart_port_info *platform_data); -#endif diff --git a/arch/arm/mach-omap2/sleep33xx.S b/arch/arm/mach-omap2/sleep33xx.S index ac3d0b363c51..3bfd8b5e03ed 100644 --- a/arch/arm/mach-omap2/sleep33xx.S +++ b/arch/arm/mach-omap2/sleep33xx.S @@ -10,7 +10,7 @@ #include <linux/platform_data/pm33xx.h> #include <linux/ti-emif-sram.h> #include <asm/assembler.h> -#include <asm/memory.h> +#include <asm/page.h> #include "iomap.h" #include "cm33xx.h" diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index c4e97d35c310..781a131b40a6 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -465,7 +465,7 @@ l2_inv_gp: mov r12, #0x2 smc #0 @ Call SMI monitor (smieq) logic_l1_restore: - adr r0, l2dis_3630_offset @ adress for offset + adr r0, l2dis_3630_offset @ address for offset ldr r1, [r0] @ value for offset ldr r1, [r0, r1] @ value at l2dis_3630 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630 diff --git a/arch/arm/mach-omap2/sleep43xx.S b/arch/arm/mach-omap2/sleep43xx.S index 832c91327945..ec0972a48f08 100644 --- a/arch/arm/mach-omap2/sleep43xx.S +++ b/arch/arm/mach-omap2/sleep43xx.S @@ -11,7 +11,7 @@ #include <linux/platform_data/pm33xx.h> #include <asm/assembler.h> #include <asm/hardware/cache-l2x0.h> -#include <asm/memory.h> +#include <asm/page.h> #include "cm33xx.h" #include "common.h" diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S index f60f6a9aed73..f09c9197808b 100644 --- a/arch/arm/mach-omap2/sleep44xx.S +++ b/arch/arm/mach-omap2/sleep44xx.S @@ -9,7 +9,7 @@ #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/smp_scu.h> -#include <asm/memory.h> +#include <asm/page.h> #include <asm/hardware/cache-l2x0.h> #include "omap-secure.h" diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index db672cf19a51..d2133423b0c9 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c @@ -26,8 +26,6 @@ #include "control.h" #include "pm.h" -static bool sr_enable_on_init; - /* Read EFUSE values from control registers for OMAP3430 */ static void __init sr_set_nvalues(struct omap_volt_data *volt_data, struct omap_sr_data *sr_data) @@ -144,8 +142,6 @@ static int __init sr_init_by_name(const char *name, const char *voltdm) sr_set_nvalues(volt_data, sr_data); - sr_data->enable_on_init = sr_enable_on_init; - exit: i++; @@ -173,15 +169,6 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user) } #endif -/* - * API to be called from board files to enable smartreflex - * autocompensation at init. - */ -void __init omap_enable_smartreflex_on_init(void) -{ - sr_enable_on_init = true; -} - static const char * const omap4_sr_instances[] = { "mpu", "iva", diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c index 39cf270da718..898b011ae8d9 100644 --- a/arch/arm/mach-omap2/sram.c +++ b/arch/arm/mach-omap2/sram.c @@ -14,11 +14,11 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> +#include <linux/set_memory.h> #include <asm/fncpy.h> #include <asm/tlb.h> #include <asm/cacheflush.h> -#include <asm/set_memory.h> #include <asm/mach/map.h> @@ -45,7 +45,7 @@ #define GP_DEVICE 0x300 -#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) +#define ROUND_DOWN(value, boundary) ((value) & (~((boundary) - 1))) static unsigned long omap_sram_start; static unsigned long omap_sram_size; @@ -96,8 +96,7 @@ void *omap_sram_push(void *funcp, unsigned long size) dst = fncpy(sram, funcp, size); - set_memory_ro(base, pages); - set_memory_x(base, pages); + set_memory_rox(base, pages); return dst; } @@ -119,7 +118,7 @@ static void omap_sram_reset(void) */ static int is_sram_locked(void) { - if (OMAP2_DEVICE_TYPE_GP == omap_type()) { + if (omap_type() == OMAP2_DEVICE_TYPE_GP) { /* RAMFW: R/W access to all initiators for all qualifier sets */ if (cpu_is_omap242x()) { writel_relaxed(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */ @@ -217,8 +216,7 @@ static void __init omap2_map_sram(void) base = (unsigned long)omap_sram_base; pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE; - set_memory_ro(base, pages); - set_memory_x(base, pages); + set_memory_rox(base, pages); } static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h index 271062f23482..030cabc39821 100644 --- a/arch/arm/mach-omap2/sram.h +++ b/arch/arm/mach-omap2/sram.h @@ -17,10 +17,6 @@ extern int __init omap_sram_init(void); extern void *omap_sram_push(void *funcp, unsigned long size); -/* Do not use these */ -extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); -extern unsigned long omap24xx_sram_reprogram_clock_sz; - extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, u32 base_cs, u32 force_unlock); extern unsigned long omap242x_sram_ddr_init_sz; diff --git a/arch/arm/mach-omap2/ti81xx-restart.c b/arch/arm/mach-omap2/ti81xx-restart.c index d6dc518b1dde..5b5fb37caa50 100644 --- a/arch/arm/mach-omap2/ti81xx-restart.c +++ b/arch/arm/mach-omap2/ti81xx-restart.c @@ -26,5 +26,6 @@ void ti81xx_restart(enum reboot_mode mode, const char *cmd) { omap2_prm_set_mod_reg_bits(TI81XX_GLOBAL_RST_COLD, 0, TI81XX_PRM_DEVICE_RSTCTRL); - while (1); + while (1) + ; } diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 620ba69c8f11..5677c4a08f37 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -76,6 +76,7 @@ static void __init realtime_counter_init(void) } rate = clk_get_rate(sys_clk); + clk_put(sys_clk); if (soc_is_dra7xx()) { /* diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index a0c4c42e56b9..b46c254c2bc4 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c @@ -11,12 +11,12 @@ #include <linux/errno.h> #include <linux/delay.h> #include <linux/platform_device.h> -#include <linux/gpio.h> #include <linux/export.h> #include <linux/platform_data/usb-omap.h> #include <linux/usb/musb.h> +#include "usb-tusb6010.h" #include "gpmc.h" static u8 async_cs, sync_cs; @@ -97,7 +97,7 @@ static int tusb_set_sync_mode(unsigned sysclk_ps) } /* tusb driver calls this when it changes the chip's clocking */ -int tusb6010_platform_retime(unsigned is_refclk) +static int tusb6010_platform_retime(unsigned is_refclk) { static const char error[] = KERN_ERR "tusb6010 %s retime error %d\n"; @@ -121,7 +121,6 @@ int tusb6010_platform_retime(unsigned is_refclk) done: return status; } -EXPORT_SYMBOL_GPL(tusb6010_platform_retime); static struct resource tusb_resources[] = { /* Order is significant! The start/end fields @@ -133,10 +132,6 @@ static struct resource tusb_resources[] = { { /* Synchronous access */ .flags = IORESOURCE_MEM, }, - { /* IRQ */ - .name = "mc", - .flags = IORESOURCE_IRQ, - }, }; static u64 tusb_dmamask = ~(u32)0; @@ -154,11 +149,10 @@ static struct platform_device tusb_device = { /* this may be called only from board-*.c setup code */ -int __init -tusb6010_setup_interface(struct musb_hdrc_platform_data *data, - unsigned ps_refclk, unsigned waitpin, - unsigned async, unsigned sync, - unsigned irq, unsigned dmachan) +int __init tusb6010_setup_interface(struct musb_hdrc_platform_data *data, + unsigned int ps_refclk, unsigned int waitpin, + unsigned int async, unsigned int sync, + unsigned int dmachan) { int status; static char error[] __initdata = @@ -194,14 +188,6 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data, if (status < 0) return status; - /* IRQ */ - status = gpio_request_one(irq, GPIOF_IN, "TUSB6010 irq"); - if (status < 0) { - printk(error, 3, status); - return status; - } - tusb_resources[2].start = gpio_to_irq(irq); - /* set up memory timings ... can speed them up later */ if (!ps_refclk) { printk(error, 4, status); diff --git a/arch/arm/mach-omap2/usb-tusb6010.h b/arch/arm/mach-omap2/usb-tusb6010.h new file mode 100644 index 000000000000..d210ff6238c2 --- /dev/null +++ b/arch/arm/mach-omap2/usb-tusb6010.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __USB_TUSB6010_H +#define __USB_TUSB6010_H + +extern int __init tusb6010_setup_interface( + struct musb_hdrc_platform_data *data, + unsigned int ps_refclk, unsigned int waitpin, + unsigned int async_cs, unsigned int sync_cs, + unsigned int dmachan); + +#endif /* __USB_TUSB6010_H */ diff --git a/arch/arm/mach-omap2/usb.h b/arch/arm/mach-omap2/usb.h deleted file mode 100644 index 740a499befce..000000000000 --- a/arch/arm/mach-omap2/usb.h +++ /dev/null @@ -1,71 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#include <linux/platform_data/usb-omap.h> - -/* AM35x */ -/* USB 2.0 PHY Control */ -#define CONF2_PHY_GPIOMODE (1 << 23) -#define CONF2_OTGMODE (3 << 14) -#define CONF2_NO_OVERRIDE (0 << 14) -#define CONF2_FORCE_HOST (1 << 14) -#define CONF2_FORCE_DEVICE (2 << 14) -#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14) -#define CONF2_SESENDEN (1 << 13) -#define CONF2_VBDTCTEN (1 << 12) -#define CONF2_REFFREQ_24MHZ (2 << 8) -#define CONF2_REFFREQ_26MHZ (7 << 8) -#define CONF2_REFFREQ_13MHZ (6 << 8) -#define CONF2_REFFREQ (0xf << 8) -#define CONF2_PHYCLKGD (1 << 7) -#define CONF2_VBUSSENSE (1 << 6) -#define CONF2_PHY_PLLON (1 << 5) -#define CONF2_RESET (1 << 4) -#define CONF2_PHYPWRDN (1 << 3) -#define CONF2_OTGPWRDN (1 << 2) -#define CONF2_DATPOL (1 << 1) - -/* TI81XX specific definitions */ -#define USBCTRL0 0x620 -#define USBSTAT0 0x624 - -/* TI816X PHY controls bits */ -#define TI816X_USBPHY0_NORMAL_MODE (1 << 0) -#define TI816X_USBPHY_REFCLK_OSC (1 << 8) - -/* TI814X PHY controls bits */ -#define USBPHY_CM_PWRDN (1 << 0) -#define USBPHY_OTG_PWRDN (1 << 1) -#define USBPHY_CHGDET_DIS (1 << 2) -#define USBPHY_CHGDET_RSTRT (1 << 3) -#define USBPHY_SRCONDM (1 << 4) -#define USBPHY_SINKONDP (1 << 5) -#define USBPHY_CHGISINK_EN (1 << 6) -#define USBPHY_CHGVSRC_EN (1 << 7) -#define USBPHY_DMPULLUP (1 << 8) -#define USBPHY_DPPULLUP (1 << 9) -#define USBPHY_CDET_EXTCTL (1 << 10) -#define USBPHY_GPIO_MODE (1 << 12) -#define USBPHY_DPOPBUFCTL (1 << 13) -#define USBPHY_DMOPBUFCTL (1 << 14) -#define USBPHY_DPINPUT (1 << 15) -#define USBPHY_DMINPUT (1 << 16) -#define USBPHY_DPGPIO_PD (1 << 17) -#define USBPHY_DMGPIO_PD (1 << 18) -#define USBPHY_OTGVDET_EN (1 << 19) -#define USBPHY_OTGSESSEND_EN (1 << 20) -#define USBPHY_DATA_POLARITY (1 << 23) - -struct usbhs_phy_data { - int port; /* 1 indexed port number */ - int reset_gpio; - int vcc_gpio; - bool vcc_polarity; /* 1 active high, 0 active low */ -}; - -extern void usb_musb_init(struct omap_musb_board_data *board_data); -extern void usbhs_init(struct usbhs_omap_platform_data *pdata); -extern int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys); - -extern void am35x_musb_reset(void); -extern void am35x_musb_phy_power(u8 on); -extern void am35x_musb_clear_irq(void); -extern void am35x_set_mode(u8 musb_mode); diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index ea02d40405c4..fc26b96a20cc 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -802,21 +802,6 @@ static u8 omap_vc_calc_vsel(struct voltagedomain *voltdm, u32 uvolt) return voltdm->pmic->uv_to_vsel(uvolt); } -#ifdef CONFIG_PM -/** - * omap_pm_setup_sr_i2c_pcb_length - set length of SR I2C traces on PCB - * @mm: length of the PCB trace in millimetres - * - * Sets the PCB trace length for the I2C channel. By default uses 63mm. - * This is needed for properly calculating the capacitance value for - * the PCB trace, and for setting the SR I2C channel timing parameters. - */ -void __init omap_pm_setup_sr_i2c_pcb_length(u32 mm) -{ - sr_i2c_pcb_length = mm; -} -#endif - void __init omap_vc_init_channel(struct voltagedomain *voltdm) { struct omap_vc_channel *vc = voltdm->vc; diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 0a0c771dbb0a..000c2bca5ef0 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -51,7 +51,7 @@ static LIST_HEAD(voltdm_list); */ unsigned long voltdm_get_voltage(struct voltagedomain *voltdm) { - if (!voltdm || IS_ERR(voltdm)) { + if (IS_ERR_OR_NULL(voltdm)) { pr_warn("%s: VDD specified does not exist!\n", __func__); return 0; } @@ -67,13 +67,13 @@ unsigned long voltdm_get_voltage(struct voltagedomain *voltdm) * This API should be called by the kernel to do the voltage scaling * for a particular voltage domain during DVFS. */ -int voltdm_scale(struct voltagedomain *voltdm, +static int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt) { int ret, i; unsigned long volt = 0; - if (!voltdm || IS_ERR(voltdm)) { + if (IS_ERR_OR_NULL(voltdm)) { pr_warn("%s: VDD specified does not exist!\n", __func__); return -EINVAL; } @@ -124,7 +124,7 @@ void voltdm_reset(struct voltagedomain *voltdm) { unsigned long target_volt; - if (!voltdm || IS_ERR(voltdm)) { + if (IS_ERR_OR_NULL(voltdm)) { pr_warn("%s: VDD specified does not exist!\n", __func__); return; } @@ -154,7 +154,7 @@ void voltdm_reset(struct voltagedomain *voltdm) void omap_voltage_get_volttable(struct voltagedomain *voltdm, struct omap_volt_data **volt_data) { - if (!voltdm || IS_ERR(voltdm)) { + if (IS_ERR_OR_NULL(voltdm)) { pr_warn("%s: VDD specified does not exist!\n", __func__); return; } @@ -182,7 +182,7 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, { int i; - if (!voltdm || IS_ERR(voltdm)) { + if (IS_ERR_OR_NULL(voltdm)) { pr_warn("%s: VDD specified does not exist!\n", __func__); return ERR_PTR(-EINVAL); } @@ -216,7 +216,7 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, int omap_voltage_register_pmic(struct voltagedomain *voltdm, struct omap_voltdm_pmic *pmic) { - if (!voltdm || IS_ERR(voltdm)) { + if (IS_ERR_OR_NULL(voltdm)) { pr_warn("%s: VDD specified does not exist!\n", __func__); return -EINVAL; } diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 4a225f9559a5..e610f63a020d 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -163,8 +163,6 @@ extern void omap54xx_voltagedomains_init(void); struct voltagedomain *voltdm_lookup(const char *name); void voltdm_init(struct voltagedomain **voltdm_list); -int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm); -int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); void voltdm_reset(struct voltagedomain *voltdm); unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); #endif diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index a709655b978c..03c481c4742c 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -199,7 +199,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) struct omap_vp_instance *vp; u32 vpconfig, volt; - if (!voltdm || IS_ERR(voltdm)) { + if (IS_ERR_OR_NULL(voltdm)) { pr_warn("%s: VDD specified does not exist!\n", __func__); return; } @@ -244,7 +244,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) u32 vpconfig; int timeout; - if (!voltdm || IS_ERR(voltdm)) { + if (IS_ERR_OR_NULL(voltdm)) { pr_warn("%s: VDD specified does not exist!\n", __func__); return; } diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c index d4ea56a5f75a..898e7e332981 100644 --- a/arch/arm/mach-omap2/wd_timer.c +++ b/arch/arm/mach-omap2/wd_timer.c @@ -57,7 +57,7 @@ int omap2_wd_timer_disable(struct omap_hwmod *oh) } /** - * omap2_wdtimer_reset - reset and disable the WDTIMER IP block + * omap2_wd_timer_reset - reset and disable the WDTIMER IP block * @oh: struct omap_hwmod * * * After the WDTIMER IP blocks are reset on OMAP2/3, we must also take @@ -71,6 +71,8 @@ int omap2_wd_timer_disable(struct omap_hwmod *oh) * during a normal merge window. omap_hwmod_softreset() should be * renamed to omap_hwmod_set_ocp_softreset(), and omap_hwmod_softreset() * should call the hwmod _ocp_softreset() code. + * + * Returns: %0 on success or -errno value on error. */ int omap2_wd_timer_reset(struct omap_hwmod *oh) { |