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Diffstat (limited to 'arch/arm/mach-rockchip/platsmp.c')
-rw-r--r--arch/arm/mach-rockchip/platsmp.c37
1 files changed, 20 insertions, 17 deletions
diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index 51984a40b097..f432d22bfed8 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -1,16 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2013 MundoReader S.L.
* Author: Heiko Stuebner <heiko@sntech.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#include <linux/delay.h>
@@ -146,7 +137,7 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
/*
* We communicate with the bootrom to active the cpus other
* than cpu0, after a blob of initialize code, they will
- * stay at wfe state, once they are actived, they will check
+ * stay at wfe state, once they are activated, they will check
* the mailbox:
* sram_base_addr + 4: 0xdeadbeaf
* sram_base_addr + 8: start address for pc
@@ -189,7 +180,7 @@ static int __init rockchip_smp_prepare_sram(struct device_node *node)
rsize = resource_size(&res);
if (rsize < trampoline_sz) {
- pr_err("%s: reserved block with size 0x%x is to small for trampoline size 0x%x\n",
+ pr_err("%s: reserved block with size 0x%x is too small for trampoline size 0x%x\n",
__func__, rsize, trampoline_sz);
return -EINVAL;
}
@@ -198,7 +189,7 @@ static int __init rockchip_smp_prepare_sram(struct device_node *node)
rockchip_boot_fn = __pa_symbol(secondary_startup);
/* copy the trampoline to sram, that runs during startup of the core */
- memcpy(sram_base_addr, &rockchip_secondary_trampoline, trampoline_sz);
+ memcpy_toio(sram_base_addr, &rockchip_secondary_trampoline, trampoline_sz);
flush_cache_all();
outer_clean_range(0, trampoline_sz);
@@ -245,6 +236,7 @@ static int __init rockchip_smp_prepare_pmu(void)
}
pmu_base = of_iomap(node, 0);
+ of_node_put(node);
if (!pmu_base) {
pr_err("%s: could not map pmu registers\n", __func__);
return -ENOMEM;
@@ -277,19 +269,20 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
sram_base_addr = of_iomap(node, 0);
if (!sram_base_addr) {
pr_err("%s: could not map sram registers\n", __func__);
+ of_node_put(node);
return;
}
- if (has_pmu && rockchip_smp_prepare_pmu())
+ if (has_pmu && rockchip_smp_prepare_pmu()) {
+ of_node_put(node);
return;
+ }
if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {
- if (rockchip_smp_prepare_sram(node))
- return;
-
/* enable the SCU power domain */
pmu_set_power_domain(PMU_PWRDN_SCU, true);
+ of_node_put(node);
node = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
if (!node) {
pr_err("%s: missing scu\n", __func__);
@@ -299,6 +292,7 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
scu_base_addr = of_iomap(node, 0);
if (!scu_base_addr) {
pr_err("%s: could not map scu registers\n", __func__);
+ of_node_put(node);
return;
}
@@ -321,6 +315,15 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
/* Make sure that all cores except the first are really off */
for (i = 1; i < ncores; i++)
pmu_set_power_domain(0 + i, false);
+
+ if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {
+ if (rockchip_smp_prepare_sram(node)) {
+ of_node_put(node);
+ return;
+ }
+ }
+
+ of_node_put(node);
}
static void __init rk3036_smp_prepare_cpus(unsigned int max_cpus)