summaryrefslogtreecommitdiff
path: root/arch/arm/mm/cache-feroceon-l2.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mm/cache-feroceon-l2.c')
-rw-r--r--arch/arm/mm/cache-feroceon-l2.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 5c1b7a7b9af6..2bfefb252ffd 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -1,12 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* arch/arm/mm/cache-feroceon-l2.c - Feroceon L2 cache controller support
*
* Copyright (C) 2008 Marvell Semiconductor
*
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- *
* References:
* - Unified Layer 2 Cache for Feroceon CPU Cores,
* Document ID MV-S104858-00, Rev. A, October 23 2007.
@@ -298,7 +295,7 @@ static inline u32 read_extra_features(void)
return u;
}
-static inline void write_extra_features(u32 u)
+static inline void __init write_extra_features(u32 u)
{
__asm__("mcr p15, 1, %0, c15, c1, 0" : : "r" (u));
}