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Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi')
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi123
1 files changed, 108 insertions, 15 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index f3a66f888205..837a03dee875 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -139,15 +139,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
- clock-output-names = "osc32k";
- };
-
- iosc: internal-osc-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <16000000>;
- clock-accuracy = <300000000>;
- clock-output-names = "iosc";
+ clock-output-names = "ext-osc32k";
};
psci {
@@ -155,6 +147,30 @@
method = "smc";
};
+ sound: sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "sun50i-a64-audio";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&cpudai>;
+ simple-audio-card,bitclock-master = <&cpudai>;
+ simple-audio-card,mclk-fs = <128>;
+ simple-audio-card,aux-devs = <&codec_analog>;
+ simple-audio-card,routing =
+ "Left DAC", "AIF1 Slot 0 Left",
+ "Right DAC", "AIF1 Slot 0 Right",
+ "AIF1 Slot 0 Left ADC", "Left ADC",
+ "AIF1 Slot 0 Right ADC", "Right ADC";
+ status = "disabled";
+
+ cpudai: simple-audio-card,cpu {
+ sound-dai = <&dai>;
+ };
+
+ link_codec: simple-audio-card,codec {
+ sound-dai = <&codec>;
+ };
+ };
+
sound_spdif {
compatible = "simple-audio-card";
simple-audio-card,name = "On-board SPDIF";
@@ -277,6 +293,20 @@
reg = <0x0000 0x28000>;
};
};
+
+ sram_c1: sram@1d00000 {
+ compatible = "mmio-sram";
+ reg = <0x01d00000 0x40000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x01d00000 0x40000>;
+
+ ve_sram: sram-section@0 {
+ compatible = "allwinner,sun50i-a64-sram-c1",
+ "allwinner,sun4i-a10-sram-c1";
+ reg = <0x000000 0x40000>;
+ };
+ };
};
dma: dma-controller@1c02000 {
@@ -359,6 +389,17 @@
};
};
+ video-codec@1c0e000 {
+ compatible = "allwinner,sun50i-h5-video-engine";
+ reg = <0x01c0e000 0x1000>;
+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+ <&ccu CLK_DRAM_VE>;
+ clock-names = "ahb", "mod", "ram";
+ resets = <&ccu RST_BUS_VE>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ allwinner,sram = <&ve_sram 1>;
+ };
+
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun50i-a64-mmc";
reg = <0x01c0f000 0x1000>;
@@ -490,7 +531,7 @@
ccu: clock@1c20000 {
compatible = "allwinner,sun50i-a64-ccu";
reg = <0x01c20000 0x400>;
- clocks = <&osc24M>, <&osc32k>;
+ clocks = <&osc24M>, <&rtc 0>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -665,6 +706,30 @@
status = "disabled";
};
+ dai: dai@1c22c00 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun50i-a64-codec-i2s";
+ reg = <0x01c22c00 0x200>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+ clock-names = "apb", "mod";
+ resets = <&ccu RST_BUS_CODEC>;
+ reset-names = "rst";
+ dmas = <&dma 15>, <&dma 15>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ codec: codec@1c22e00 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-a33-codec";
+ reg = <0x01c22e00 0x600>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+ clock-names = "bus", "mod";
+ status = "disabled";
+ };
+
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
@@ -807,6 +872,28 @@
};
};
+ mali: gpu@1c40000 {
+ compatible = "allwinner,sun50i-a64-mali", "arm,mali-400";
+ reg = <0x01c40000 0x10000>;
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gp",
+ "gpmmu",
+ "pp0",
+ "ppmmu0",
+ "pp1",
+ "ppmmu1",
+ "pmu";
+ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+ clock-names = "bus", "core";
+ resets = <&ccu RST_BUS_GPU>;
+ };
+
gic: interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,
@@ -874,11 +961,12 @@
};
rtc: rtc@1f00000 {
- compatible = "allwinner,sun6i-a31-rtc";
- reg = <0x01f00000 0x54>;
+ compatible = "allwinner,sun50i-a64-rtc",
+ "allwinner,sun8i-h3-rtc";
+ reg = <0x01f00000 0x400>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
- clock-output-names = "rtc-osc32k", "rtc-osc32k-out";
+ clock-output-names = "osc32k", "osc32k-out", "iosc";
clocks = <&osc32k>;
#clock-cells = <1>;
};
@@ -895,13 +983,18 @@
r_ccu: clock@1f01400 {
compatible = "allwinner,sun50i-a64-r-ccu";
reg = <0x01f01400 0x100>;
- clocks = <&osc24M>, <&osc32k>, <&iosc>,
- <&ccu 11>;
+ clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, <&ccu 11>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <1>;
#reset-cells = <1>;
};
+ codec_analog: codec-analog@1f015c0 {
+ compatible = "allwinner,sun50i-a64-codec-analog";
+ reg = <0x01f015c0 0x4>;
+ status = "disabled";
+ };
+
r_i2c: i2c@1f02400 {
compatible = "allwinner,sun50i-a64-i2c",
"allwinner,sun6i-a31-i2c";