diff options
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index cdce3dcb8ec0..8d1110c14bad 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -150,6 +150,21 @@ #size-cells = <1>; ranges = <0x0 0x0 0x0 0x40000000>; + gpu: gpu@1800000 { + compatible = "allwinner,sun50i-h616-mali", + "arm,mali-bifrost"; + reg = <0x1800000 0x40000>; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&ccu CLK_GPU0>, <&ccu CLK_BUS_GPU>; + clock-names = "core", "bus"; + power-domains = <&prcm_ppu 2>; + resets = <&ccu RST_BUS_GPU>; + status = "disabled"; + }; + crypto: crypto@1904000 { compatible = "allwinner,sun50i-h616-crypto"; reg = <0x01904000 0x800>; @@ -290,6 +305,42 @@ }; /omit-if-no-ref/ + nand_pins: nand-pins { + pins = "PC0", "PC1", "PC2", "PC5", "PC8", "PC9", + "PC10", "PC11", "PC12", "PC13", "PC14", + "PC15", "PC16"; + function = "nand0"; + }; + + /omit-if-no-ref/ + nand_cs0_pin: nand-cs0-pin { + pins = "PC4"; + function = "nand0"; + bias-pull-up; + }; + + /omit-if-no-ref/ + nand_cs1_pin: nand-cs1-pin { + pins = "PC3"; + function = "nand0"; + bias-pull-up; + }; + + /omit-if-no-ref/ + nand_rb0_pin: nand-rb0-pin { + pins = "PC6"; + function = "nand0"; + bias-pull-up; + }; + + /omit-if-no-ref/ + nand_rb1_pin: nand-rb1-pin { + pins = "PC7"; + function = "nand0"; + bias-pull-up; + }; + + /omit-if-no-ref/ spi0_pins: spi0-pins { pins = "PC0", "PC2", "PC4"; function = "spi0"; @@ -362,6 +413,22 @@ #iommu-cells = <1>; }; + nfc: nand-controller@4011000 { + compatible = "allwinner,sun50i-h616-nand-controller"; + reg = <0x04011000 0x1000>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND0>, + <&ccu CLK_NAND1>, <&ccu CLK_MBUS_NAND>; + clock-names = "ahb", "mod", "ecc", "mbus"; + resets = <&ccu RST_BUS_NAND>; + reset-names = "ahb"; + dmas = <&dma 10>; + dma-names = "rxtx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + mmc0: mmc@4020000 { compatible = "allwinner,sun50i-h616-mmc", "allwinner,sun50i-a100-mmc"; @@ -874,6 +941,12 @@ #reset-cells = <1>; }; + prcm_ppu: power-controller@7010250 { + compatible = "allwinner,sun50i-h616-prcm-ppu"; + reg = <0x07010250 0x10>; + #power-domain-cells = <1>; + }; + nmi_intc: interrupt-controller@7010320 { compatible = "allwinner,sun50i-h616-nmi", "allwinner,sun9i-a80-nmi"; |