diff options
Diffstat (limited to 'arch/arm64/boot/dts/allwinner')
57 files changed, 3802 insertions, 118 deletions
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index 21149b346a60..773cc02a13d0 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -18,6 +18,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h64-remix-mini-pc.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a100-allwinner-perf1.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a133-liontron-h-a133l.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus-v1.2.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-emlid-neutis-n5-devboard.dtb @@ -39,6 +40,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h313-tanix-tx1.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-manta.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb @@ -47,3 +49,11 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-transpeed-8k618-t.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-yuzukihd-chameleon.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-2024.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-h.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-plus.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-sp.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun55i-a527-cubie-a5e.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun55i-h728-x96qpro+.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-avaota-a1.dtb diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts index f5c5c1464482..a7e3be0155a8 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts @@ -6,6 +6,9 @@ /dts-v1/; #include "sun50i-a100.dtsi" +#include "sun50i-a100-cpu-opp.dtsi" + +#include <dt-bindings/gpio/gpio.h> /{ model = "Allwinner A100 Perf1"; @@ -20,6 +23,26 @@ }; }; +&mmc0 { + vmmc-supply = <®_dcdc1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width = <4>; + status = "okay"; +}; + +&mmc2 { + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_aldo1>; + cap-mmc-hw-reset; + non-removable; + bus-width = <8>; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &pio { vcc-pb-supply = <®_dcdc1>; vcc-pc-supply = <®_eldo1>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi new file mode 100644 index 000000000000..c6a2efa037dc --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com> +// Copyright (c) 2020 ShuoSheng Huang <huangshuosheng@allwinnertech.com> + +/ { + cpu_opp_table: opp-table-cpu { + compatible = "allwinner,sun50i-a100-operating-points"; + nvmem-cells = <&cpu_speed_grade>; + opp-shared; + + opp-408000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <408000000>; + + opp-microvolt-speed0 = <900000>; + opp-microvolt-speed1 = <900000>; + opp-microvolt-speed2 = <900000>; + }; + + opp-600000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <600000000>; + + opp-microvolt-speed0 = <900000>; + opp-microvolt-speed1 = <900000>; + opp-microvolt-speed2 = <900000>; + }; + + opp-816000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <816000000>; + + opp-microvolt-speed0 = <940000>; + opp-microvolt-speed1 = <900000>; + opp-microvolt-speed2 = <900000>; + }; + + opp-1080000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <1080000000>; + + opp-microvolt-speed0 = <1020000>; + opp-microvolt-speed1 = <980000>; + opp-microvolt-speed2 = <950000>; + }; + + opp-1200000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <1200000000>; + + opp-microvolt-speed0 = <1100000>; + opp-microvolt-speed1 = <1020000>; + opp-microvolt-speed2 = <1000000>; + }; + + opp-1320000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <1320000000>; + + opp-microvolt-speed0 = <1160000>; + opp-microvolt-speed1 = <1060000>; + opp-microvolt-speed2 = <1030000>; + }; + + opp-1464000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <1464000000>; + + opp-microvolt-speed0 = <1180000>; + opp-microvolt-speed1 = <1180000>; + opp-microvolt-speed2 = <1130000>; + }; + }; +}; + +&cpu0 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu1 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu2 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu3 { + operating-points-v2 = <&cpu_opp_table>; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index a3dccf193765..bd366389b238 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -23,30 +23,43 @@ device_type = "cpu"; reg = <0x0>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; - cpu@1 { + cpu1: cpu@1 { compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <0x1>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; - cpu@2 { + cpu2: cpu@2 { compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <0x2>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; - cpu@3 { + cpu3: cpu@3 { compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <0x3>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; }; + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -92,6 +105,39 @@ #size-cells = <1>; ranges = <0 0 0 0x3fffffff>; + syscon: syscon@3000000 { + compatible = "allwinner,sun50i-a100-system-control", + "allwinner,sun50i-a64-system-control"; + reg = <0x03000000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram_a1: sram@20000 { + compatible = "mmio-sram"; + reg = <0x00020000 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00020000 0x4000>; + }; + + sram_c: sram@24000 { + compatible = "mmio-sram"; + reg = <0x024000 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x024000 0x21000>; + }; + + sram_a2: sram@100000 { + compatible = "mmio-sram"; + reg = <0x0100000 0x14000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0100000 0x14000>; + }; + }; + ccu: clock@3001000 { compatible = "allwinner,sun50i-a100-ccu"; reg = <0x03001000 0x1000>; @@ -133,6 +179,18 @@ ths_calibration: calib@14 { reg = <0x14 8>; }; + + cpu_speed_grade: cpu-speed-grade@1c { + reg = <0x1c 0x2>; + }; + }; + + watchdog@30090a0 { + compatible = "allwinner,sun50i-a100-wdt", + "allwinner,sun6i-a31-wdt"; + reg = <0x030090a0 0x20>; + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&dcxo24M>; }; pio: pinctrl@300b000 { @@ -152,12 +210,86 @@ interrupt-controller; #interrupt-cells = <3>; + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", "PF3", + "PF4", "PF5"; + function = "mmc0"; + drive-strength = <30>; + bias-pull-up; + }; + + /omit-if-no-ref/ + mmc1_pins: mmc1-pins { + pins = "PG0", "PG1", "PG2", "PG3", + "PG4", "PG5"; + function = "mmc1"; + drive-strength = <30>; + bias-pull-up; + }; + + mmc2_pins: mmc2-pins { + pins = "PC0", "PC1", "PC5", "PC6", + "PC8", "PC9", "PC10", "PC11", + "PC13", "PC14", "PC15", "PC16"; + function = "mmc2"; + drive-strength = <30>; + bias-pull-up; + }; + uart0_pb_pins: uart0-pb-pins { pins = "PB9", "PB10"; function = "uart0"; }; }; + mmc0: mmc@4020000 { + compatible = "allwinner,sun50i-a100-mmc"; + reg = <0x04020000 0x1000>; + clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC0>; + reset-names = "ahb"; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + max-frequency = <150000000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc1: mmc@4021000 { + compatible = "allwinner,sun50i-a100-mmc"; + reg = <0x04021000 0x1000>; + clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC1>; + reset-names = "ahb"; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + max-frequency = <150000000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc2: mmc@4022000 { + compatible = "allwinner,sun50i-a100-emmc"; + reg = <0x04022000 0x1000>; + clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC2>; + reset-names = "ahb"; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + max-frequency = <150000000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + uart0: serial@5000000 { compatible = "snps,dw-apb-uart"; reg = <0x05000000 0x400>; @@ -285,6 +417,97 @@ #thermal-sensor-cells = <1>; }; + usb_otg: usb@5100000 { + compatible = "allwinner,sun50i-a100-musb", + "allwinner,sun8i-a33-musb"; + reg = <0x05100000 0x0400>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + }; + + usbphy: phy@5100400 { + compatible = "allwinner,sun50i-a100-usb-phy", + "allwinner,sun20i-d1-usb-phy"; + reg = <0x05100400 0x100>, + <0x05101800 0x100>, + <0x05200800 0x100>; + reg-names = "phy_ctrl", + "pmu0", + "pmu1"; + clocks = <&ccu CLK_USB_PHY0>, + <&ccu CLK_USB_PHY1>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + + ehci0: usb@5101000 { + compatible = "allwinner,sun50i-a100-ehci", + "generic-ehci"; + reg = <0x05101000 0x100>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci0: usb@5101400 { + compatible = "allwinner,sun50i-a100-ohci", + "generic-ohci"; + reg = <0x05101400 0x100>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci1: usb@5200000 { + compatible = "allwinner,sun50i-a100-ehci", + "generic-ehci"; + reg = <0x05200000 0x100>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_BUS_EHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>, + <&ccu RST_BUS_EHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci1: usb@5200400 { + compatible = "allwinner,sun50i-a100-ohci", + "generic-ohci"; + reg = <0x05200400 0x100>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + r_ccu: clock@7010000 { compatible = "allwinner,sun50i-a100-r-ccu"; reg = <0x07010000 0x300>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a133-liontron-h-a133l.dts b/arch/arm64/boot/dts/allwinner/sun50i-a133-liontron-h-a133l.dts new file mode 100644 index 000000000000..fe77178d3e33 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-a133-liontron-h-a133l.dts @@ -0,0 +1,211 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Arm Ltd. + */ + +/dts-v1/; + +#include "sun50i-a100.dtsi" +#include "sun50i-a100-cpu-opp.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> + +/{ + model = "Liontron H-A133L"; + compatible = "liontron,h-a133l", "allwinner,sun50i-a100"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led { + function = LED_FUNCTION_POWER; + color = <LED_COLOR_ID_BLUE>; + gpios = <&pio 7 16 GPIO_ACTIVE_LOW>; /* PH16 */ + }; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply from a 12V->5V regulator */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_usb1_vbus: regulator-usb1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb1-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <®_vcc5v>; + enable-active-high; + gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ + }; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&mmc0 { + vmmc-supply = <®_dcdc1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width = <4>; + status = "okay"; +}; + +&mmc2 { + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_eldo1>; + cap-mmc-hw-reset; + non-removable; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + vcc-pb-supply = <®_dcdc1>; + vcc-pc-supply = <®_eldo1>; + vcc-pf-supply = <®_dcdc1>; + vcc-ph-supply = <®_dcdc1>; +}; + +&r_i2c0 { + status = "okay"; + + axp803: pmic@34 { + compatible = "x-powers,axp803"; + reg = <0x34>; + interrupt-parent = <&r_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +#include "axp803.dtsi" + +&ac_power_supply { + status = "okay"; +}; + +®_aldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-codec-avcc"; +}; + +®_aldo2 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-dram-1"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-usb-pl"; +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-io-usb-pd-emmc"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdd-cpux"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd-usb-cpus"; +}; + +®_dcdc4 { + regulator-always-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd-sys"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vcc-dram"; +}; + +/* DCDC6 unused */ +/* DLDO3 unused */ +/* DLDO4 unused */ + +®_eldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pc-emmc"; +}; + +/* ELDO2 unused */ +/* ELDO3 unused */ + +®_fldo1 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd-cpus-usb"; +}; + +/* reg_drivevbus unused */ +/* dc1sw unused */ + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "host"; /* USB A type receptacle, always powered */ + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts index e6d5bc0f7a61..d1f415acd7b5 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts @@ -53,7 +53,7 @@ }; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ clocks = <&rtc CLK_OSC32K_FANOUT>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts index 0af6dcdf7515..dec9960a7440 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts @@ -41,7 +41,7 @@ }; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts index bfb806cf6d7a..fd3794678c33 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts @@ -52,7 +52,7 @@ status = "okay"; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts index 4f8529d5ac00..c8303a66438d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts @@ -68,7 +68,7 @@ status = "okay"; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */ clocks = <&rtc CLK_OSC32K_FANOUT>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts index 596a25907432..709fe650a360 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts @@ -5,7 +5,7 @@ #include "sun50i-a64-sopine-baseboard.dts" / { - model = "Pine64 LTS"; + model = "Pine64 PINE A64 LTS"; compatible = "pine64,pine64-lts", "allwinner,sun50i-r18", "allwinner,sun50i-a64"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts index b54099b654c8..026d843cd7e0 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts @@ -4,7 +4,7 @@ #include "sun50i-a64-pine64.dts" / { - model = "Pine64+"; + model = "Pine64 PINE A64+"; compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; /* TODO: Camera, touchscreen, etc. */ diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts index 2accb5ddf783..3256acec1ff9 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts @@ -9,7 +9,7 @@ #include <dt-bindings/gpio/gpio.h> / { - model = "Pine64"; + model = "Pine64 PINE A64"; compatible = "pine64,pine64", "allwinner,sun50i-a64"; aliases { @@ -124,6 +124,17 @@ status = "okay"; }; +/* On Wifi/BT connector */ +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <®_dldo4>; + vqmmc-supply = <®_eldo1>; + bus-width = <4>; + non-removable; + status = "disabled"; +}; + &ohci0 { status = "okay"; }; @@ -286,6 +297,7 @@ &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts index 50ed2e9f10ed..86d44349e095 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts @@ -13,7 +13,7 @@ #include <dt-bindings/pwm/pwm.h> / { - model = "Pinebook"; + model = "Pine64 Pinebook"; compatible = "pine64,pinebook", "allwinner,sun50i-a64"; chassis-type = "laptop"; @@ -79,7 +79,7 @@ enable-active-high; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ }; @@ -390,6 +390,8 @@ &tcon0 { pinctrl-names = "default"; pinctrl-0 = <&lcd_rgb666_pins>; + assigned-clocks = <&ccu CLK_TCON0>; + assigned-clock-parents = <&ccu CLK_PLL_VIDEO0_2X>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi index 87847116ab6d..4bc6c1ef2cde 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi @@ -39,25 +39,35 @@ leds { compatible = "gpio-leds"; - led-0 { + led0: led-0 { function = LED_FUNCTION_INDICATOR; color = <LED_COLOR_ID_BLUE>; gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ + retain-state-suspended; }; - led-1 { + led1: led-1 { function = LED_FUNCTION_INDICATOR; color = <LED_COLOR_ID_GREEN>; gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */ + retain-state-suspended; }; - led-2 { + led2: led-2 { function = LED_FUNCTION_INDICATOR; color = <LED_COLOR_ID_RED>; gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ + retain-state-suspended; }; }; + multi-led { + compatible = "leds-group-multicolor"; + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_INDICATOR; + leds = <&led0>, <&led1>, <&led2>; + }; + reg_ps: ps-regulator { compatible = "regulator-fixed"; regulator-name = "ps"; @@ -178,12 +188,30 @@ &i2c1 { status = "okay"; + /* Alternative magnetometer */ + af8133j: magnetometer@1c { + compatible = "voltafield,af8133j"; + reg = <0x1c>; + reset-gpios = <&pio 1 1 GPIO_ACTIVE_LOW>; + avdd-supply = <®_dldo1>; + dvdd-supply = <®_dldo1>; + mount-matrix = "0", "-1", "0", + "-1", "0", "0", + "0", "0", "-1"; + + /* status will be fixed up in firmware */ + status = "disabled"; + }; + /* Magnetometer */ lis3mdl: magnetometer@1e { compatible = "st,lis3mdl-magn"; reg = <0x1e>; vdd-supply = <®_dldo1>; vddio-supply = <®_dldo1>; + mount-matrix = "0", "1", "0", + "-1", "0", "0", + "0", "0", "1"; }; /* Light/proximity sensor */ @@ -202,6 +230,9 @@ interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */ vdd-supply = <®_dldo1>; vddio-supply = <®_dldo1>; + mount-matrix = "0", "1", "0", + "-1", "0", "0", + "0", "0", "1"; }; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab-early-adopter.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab-early-adopter.dts index 6265360ce623..86cc85eb3d48 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab-early-adopter.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab-early-adopter.dts @@ -9,7 +9,7 @@ #include "sun50i-a64-pinetab.dts" / { - model = "PineTab, Early Adopter's version"; + model = "Pine64 PineTab Early Adopter"; compatible = "pine64,pinetab-early-adopter", "allwinner,sun50i-a64"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts index 0a5607f73049..f5fb1ee32dad 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts @@ -14,7 +14,7 @@ #include <dt-bindings/pwm/pwm.h> / { - model = "PineTab, Development Sample"; + model = "Pine64 PineTab Developer Sample"; compatible = "pine64,pinetab", "allwinner,sun50i-a64"; chassis-type = "tablet"; @@ -98,7 +98,7 @@ enable-active-high; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ post-power-on-delay-ms = <200>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts index 5e66ce1a334f..231e652cab67 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts @@ -8,7 +8,7 @@ #include "sun50i-a64-sopine.dtsi" / { - model = "SoPine with baseboard"; + model = "Pine64 SOPINE on Baseboard carrier board"; compatible = "pine64,sopine-baseboard", "pine64,sopine", "allwinner,sun50i-a64"; @@ -103,6 +103,17 @@ }; }; +/* On Wifi/BT connector */ +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <®_dldo4>; + vqmmc-supply = <®_eldo1>; + bus-width = <4>; + non-removable; + status = "disabled"; +}; + &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>; @@ -175,6 +186,14 @@ status = "okay"; }; +/* On Wifi/BT connector, with RTS/CTS */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; + status = "disabled"; +}; + /* On Pi-2 connector */ &uart2 { pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts index 1128030e4c25..ec055510af8b 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts @@ -74,7 +74,7 @@ status = "okay"; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ }; @@ -369,6 +369,8 @@ &tcon0 { pinctrl-names = "default"; pinctrl-0 = <&lcd_rgb666_pins>; + assigned-clocks = <&ccu CLK_TCON0>; + assigned-clock-parents = <&ccu CLK_PLL_VIDEO0_2X>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 57ac18738c99..0fecf0abb204 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -51,10 +51,16 @@ device_type = "cpu"; reg = <0>; enable-method = "psci"; - next-level-cache = <&L2>; clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; }; cpu1: cpu@1 { @@ -62,10 +68,16 @@ device_type = "cpu"; reg = <1>; enable-method = "psci"; - next-level-cache = <&L2>; clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; }; cpu2: cpu@2 { @@ -73,10 +85,16 @@ device_type = "cpu"; reg = <2>; enable-method = "psci"; - next-level-cache = <&L2>; clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; }; cpu3: cpu@3 { @@ -84,16 +102,25 @@ device_type = "cpu"; reg = <3>; enable-method = "psci"; - next-level-cache = <&L2>; clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; }; - L2: l2-cache { + l2_cache: l2-cache { compatible = "cache"; cache-level = <2>; cache-unified; + cache-size = <0x80000>; + cache-line-size = <64>; + cache-sets = <512>; }; }; @@ -107,27 +134,19 @@ gpu_opp_table: opp-table-gpu { compatible = "operating-points-v2"; - opp-120000000 { - opp-hz = /bits/ 64 <120000000>; - }; - - opp-312000000 { - opp-hz = /bits/ 64 <312000000>; - }; - opp-432000000 { opp-hz = /bits/ 64 <432000000>; }; }; - osc24M: osc24M_clk { + osc24M: osc24M-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; clock-output-names = "osc24M"; }; - osc32k: osc32k_clk { + osc32k: osc32k-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; @@ -216,21 +235,21 @@ }; trips { - cpu_alert0: cpu_alert0 { + cpu_alert0: cpu-alert0 { /* milliCelsius */ temperature = <75000>; hysteresis = <2000>; type = "passive"; }; - cpu_alert1: cpu_alert1 { + cpu_alert1: cpu-alert1 { /* milliCelsius */ temperature = <90000>; hysteresis = <2000>; type = "hot"; }; - cpu_crit: cpu_crit { + cpu_crit: cpu-crit { /* milliCelsius */ temperature = <110000>; hysteresis = <2000>; @@ -244,6 +263,14 @@ polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 1>; + + trips { + gpu0_crit: gpu0-crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; }; gpu1_thermal: gpu1-thermal { @@ -251,6 +278,14 @@ polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 2>; + + trips { + gpu1_crit: gpu1-crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; }; }; @@ -410,6 +445,8 @@ clock-names = "ahb", "tcon-ch0"; clock-output-names = "tcon-data-clock"; #clock-cells = <0>; + assigned-clocks = <&ccu CLK_TCON0>; + assigned-clock-parents = <&ccu CLK_PLL_MIPI>; resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; reset-names = "lcd", "lvds"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts new file mode 100644 index 000000000000..7906b79c0389 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2024 Arm Ltd. + */ + +/dts-v1/; + +#include "sun50i-h616.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "Tanix TX1"; + compatible = "oranth,tanix-tx1", "allwinner,sun50i-h616"; + + aliases { + serial0 = &uart0; + ethernet0 = &sdio_wifi; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key { + label = "hidden"; + linux,code = <BTN_0>; + gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 */ + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + function = LED_FUNCTION_POWER; + color = <LED_COLOR_ID_BLUE>; + gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ + default-state = "on"; + }; + }; + + wifi_pwrseq: pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc CLK_OSC32K_FANOUT>; + clock-names = "ext_clock"; + pinctrl-0 = <&x32clk_fanout_pin>; + pinctrl-names = "default"; + reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */ + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply directly from the DC input */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; +}; + +&codec { + allwinner,audio-routing = "Line Out", "LINEOUT"; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&ehci0 { + status = "okay"; +}; + +&gpu { + mali-supply = <®_dcdc1>; + status = "okay"; +}; + +&ir { + status = "okay"; +}; + +&mmc1 { + vmmc-supply = <®_dldo1>; + vqmmc-supply = <®_aldo1>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + sdio_wifi: wifi@1 { + reg = <1>; + }; +}; + +&mmc2 { + vmmc-supply = <®_dldo1>; + vqmmc-supply = <®_aldo1>; + bus-width = <8>; + non-removable; + max-frequency = <100000000>; + cap-mmc-hw-reset; + mmc-ddr-1_8v; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&pio { + vcc-pc-supply = <®_aldo1>; + vcc-pf-supply = <®_dldo1>; + vcc-pg-supply = <®_aldo1>; + vcc-ph-supply = <®_dldo1>; + vcc-pi-supply = <®_dldo1>; +}; + +&r_i2c { + status = "okay"; + + axp313: pmic@36 { + compatible = "x-powers,axp313a"; + reg = <0x36>; + #interrupt-cells = <1>; + interrupt-controller; + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + + regulators { + /* Supplies VCC-PLL, so needs to be always on. */ + reg_aldo1: aldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8"; + }; + + /* Supplies VCC-IO, so needs to be always on. */ + reg_dldo1: dldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3"; + }; + + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <990000>; + regulator-name = "vdd-gpu-sys"; + }; + + reg_dcdc2: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1120000>; + regulator-name = "vdd-cpu"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdd-dram"; + }; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; + +&usbotg { + dr_mode = "host"; /* USB A type receptable */ + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts index 4c3921ac236c..18fa541795a6 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts @@ -45,16 +45,40 @@ startup-delay-us = <100000>; enable-active-high; gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; + vin-supply = <®_vcc3v3>; + }; + + reg_gmac_2v5: gmac-2v5 { + /* 2V5 supply for GMAC PHY IO */ + compatible = "regulator-fixed"; + regulator-name = "gmac-2v5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + vin-supply = <®_vcc3v3>; + }; + + reg_vcc5v: regulator-vcc5v { + /* board 5V supply from micro USB or pin headers */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; }; reg_vcc3v3: vcc3v3 { + /* board 3V3 supply by SY8089A */ compatible = "regulator-fixed"; regulator-name = "vcc3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <®_vcc5v>; }; vdd_cpux: gpio-regulator { + /* cpu voltage regulator MP2143DJ */ compatible = "regulator-gpio"; regulator-name = "vdd-cpux"; regulator-type = "voltage"; @@ -66,9 +90,10 @@ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; gpios-states = <0x1>; states = <1100000 0>, <1300000 1>; + vin-supply = <®_vcc5v>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ post-power-on-delay-ms = <200>; @@ -111,6 +136,7 @@ vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + disable-wp; status = "okay"; }; @@ -146,6 +172,18 @@ status = "okay"; }; +&pio { + vcc-pa-supply = <®_vcc3v3>; + vcc-pc-supply = <®_vcc3v3>; + vcc-pd-supply = <®_gmac_2v5>; + vcc-pf-supply = <®_vcc3v3>; + vcc-pg-supply = <®_vcc3v3>; +}; + +&r_pio { + vcc-pl-supply = <®_vcc3v3>; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pa_pins>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts index 05486cccee1c..128295f5a5d6 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts @@ -88,6 +88,7 @@ &mmc0 { vmmc-supply = <®_vcc3v3>; + disable-wp; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ status = "okay"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts index a3e040da38a0..44fdc8b3f79d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts @@ -103,7 +103,7 @@ states = <1100000 0x0>, <1300000 0x1>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ post-power-on-delay-ms = <200>; @@ -157,6 +157,7 @@ &mmc0 { vmmc-supply = <®_vcc3v3>; + disable-wp; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ status = "okay"; @@ -170,7 +171,7 @@ non-removable; status = "okay"; - rtl8189etv: sdio_wifi@1 { + rtl8189etv: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts index ce3ae19e72db..0f29da7d51e6 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts @@ -153,6 +153,7 @@ &mmc0 { vmmc-supply = <®_vcc3v3>; + disable-wp; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ status = "okay"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts index d7f8bad6bb98..d4fc4e60e4e7 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts @@ -85,7 +85,7 @@ status = "okay"; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 2 14 GPIO_ACTIVE_LOW>; /* PC14 */ }; @@ -153,6 +153,7 @@ &mmc0 { vmmc-supply = <®_vcc3v3>; + disable-wp; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ status = "okay"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts index 7ec5ac850a0d..3322cc4d9aa4 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts @@ -82,6 +82,7 @@ &mmc0 { vmmc-supply = <®_vcc3v3>; + disable-wp; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ status = "okay"; @@ -97,7 +98,7 @@ * Explicitly define the sdio device, so that we can add an ethernet * alias for it (which e.g. makes u-boot set a mac-address). */ - rtl8189ftv: sdio_wifi@1 { + rtl8189ftv: wifi@1 { reg = <1>; }; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts index 22530ace12d5..3eb986c354a9 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts @@ -52,7 +52,7 @@ regulator-max-microvolt = <3300000>; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */ post-power-on-delay-ms = <200>; @@ -79,6 +79,7 @@ &mmc0 { vmmc-supply = <®_vcc3v3>; + disable-wp; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; status = "okay"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index d3caf27b6a55..01a29c1988a6 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -16,7 +16,6 @@ reg = <0>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ #cooling-cells = <2>; }; @@ -26,7 +25,6 @@ reg = <1>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ #cooling-cells = <2>; }; @@ -36,7 +34,6 @@ reg = <2>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ #cooling-cells = <2>; }; @@ -46,7 +43,6 @@ reg = <3>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ #cooling-cells = <2>; }; }; @@ -207,7 +203,7 @@ }; cooling-maps { - cpu-hot-limit { + map0 { trip = <&cpu_hot_trip>; cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts index 381d58cea092..2c64d834a2c4 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts @@ -34,7 +34,7 @@ }; }; - ext_osc32k: ext_osc32k_clk { + ext_osc32k: ext-osc32k-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; @@ -129,6 +129,7 @@ &mmc0 { vmmc-supply = <®_cldo1>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; + disable-wp; bus-width = <4>; status = "okay"; }; @@ -151,28 +152,12 @@ vcc-pg-supply = <®_aldo1>; }; -&r_ir { - linux,rc-map-name = "rc-beelink-gs1"; - status = "okay"; -}; - -&r_pio { - /* - * FIXME: We can't add that supply for now since it would - * create a circular dependency between pinctrl, the regulator - * and the RSB Bus. - * - * vcc-pl-supply = <®_aldo1>; - */ - vcc-pm-supply = <®_aldo1>; -}; - -&r_rsb { +&r_i2c { status = "okay"; - axp805: pmic@745 { + axp805: pmic@36 { compatible = "x-powers,axp805", "x-powers,axp806"; - reg = <0x745>; + reg = <0x36>; interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; @@ -290,6 +275,22 @@ }; }; +&r_ir { + linux,rc-map-name = "rc-beelink-gs1"; + status = "okay"; +}; + +&r_pio { + /* + * PL0 and PL1 are used for PMIC I2C + * don't enable the pl-supply else + * it will fail at boot + * + * vcc-pl-supply = <®_aldo1>; + */ + vcc-pm-supply = <®_aldo1>; +}; + &spdif { pinctrl-names = "default"; pinctrl-0 = <&spdif_tx_pin>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts index 6fc65e8db220..dc7381c944c9 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts @@ -33,7 +33,7 @@ }; }; - ext_osc32k: ext_osc32k_clk { + ext_osc32k: ext-osc32k-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; @@ -131,6 +131,7 @@ &mmc0 { vmmc-supply = <®_cldo1>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + disable-wp; bus-width = <4>; status = "okay"; }; @@ -143,7 +144,7 @@ non-removable; status = "okay"; - brcm: sdio-wifi@1 { + brcm: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&r_pio>; @@ -175,16 +176,12 @@ vcc-pg-supply = <®_vcc_wifi_io>; }; -&r_ir { - status = "okay"; -}; - -&r_rsb { +&r_i2c { status = "okay"; - axp805: pmic@745 { + axp805: pmic@36 { compatible = "x-powers,axp805", "x-powers,axp806"; - reg = <0x745>; + reg = <0x36>; interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; @@ -295,6 +292,10 @@ }; }; +&r_ir { + status = "okay"; +}; + &rtc { clocks = <&ext_osc32k>; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts index fb31dcb1cb6d..0911c537cc6b 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts @@ -11,7 +11,7 @@ serial1 = &uart1; /* BT-UART */ }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; @@ -28,7 +28,7 @@ non-removable; status = "okay"; - brcm: sdio-wifi@1 { + brcm: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&r_pio>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi index 92745128fcfe..e34dbb992021 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi @@ -32,7 +32,7 @@ }; }; - ext_osc32k: ext_osc32k_clk { + ext_osc32k: ext-osc32k-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; @@ -94,6 +94,7 @@ &mmc0 { vmmc-supply = <®_cldo1>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; + disable-wp; bus-width = <4>; status = "okay"; }; @@ -112,20 +113,12 @@ vcc-pg-supply = <®_aldo1>; }; -&r_ir { - status = "okay"; -}; - -&r_pio { - vcc-pm-supply = <®_bldo3>; -}; - -&r_rsb { +&r_i2c { status = "okay"; - axp805: pmic@745 { + axp805: pmic@36 { compatible = "x-powers,axp805", "x-powers,axp806"; - reg = <0x745>; + reg = <0x36>; interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; @@ -240,6 +233,14 @@ }; }; +&r_ir { + status = "okay"; +}; + +&r_pio { + vcc-pm-supply = <®_bldo3>; +}; + &rtc { clocks = <&ext_osc32k>; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts index b710f1a0f53a..066fbeff8bfa 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts @@ -5,13 +5,13 @@ #include "sun50i-h6-pine-h64.dts" +/delete-node/ ®_gmac_3v3; + / { - model = "Pine H64 model B"; + model = "Pine64 PINE H64 Model B"; compatible = "pine64,pine-h64-model-b", "allwinner,sun50i-h6"; - /delete-node/ reg_gmac_3v3; - - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ post-power-on-delay-ms = <200>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts index 1ffd68f43f87..fa7a765ee828 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts @@ -9,7 +9,7 @@ #include <dt-bindings/gpio/gpio.h> / { - model = "Pine H64 model A"; + model = "Pine64 PINE H64 Model A"; compatible = "pine64,pine-h64", "allwinner,sun50i-h6"; aliases { @@ -22,7 +22,7 @@ stdout-path = "serial0:115200n8"; }; - ext_osc32k: ext_osc32k_clk { + ext_osc32k: ext-osc32k-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; @@ -133,6 +133,7 @@ &mmc0 { vmmc-supply = <®_cldo1>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; + disable-wp; bus-width = <4>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi index 855b7d43bc50..bb7de37c0d58 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi @@ -124,6 +124,7 @@ pinctrl-0 = <&mmc0_pins>; vmmc-supply = <®_vcc3v3>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; + disable-wp; bus-width = <4>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index d11e5041bae9..73e8604315c5 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -27,8 +27,14 @@ reg = <0>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; }; cpu1: cpu@1 { @@ -37,8 +43,14 @@ reg = <1>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; }; cpu2: cpu@2 { @@ -47,8 +59,14 @@ reg = <2>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; }; cpu3: cpu@3 { @@ -57,8 +75,23 @@ reg = <3>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; + }; + + l2_cache: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x80000>; + cache-line-size = <64>; + cache-sets = <512>; }; }; @@ -68,7 +101,7 @@ status = "disabled"; }; - osc24M: osc24M_clk { + osc24M: osc24M-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi index af421ba24ce0..bebfeb2a337a 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi @@ -6,6 +6,7 @@ /dts-v1/; #include "sun50i-h616.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -62,6 +63,15 @@ }; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&gpu { + mali-supply = <®_dcdc1>; + status = "okay"; +}; + &mmc0 { vmmc-supply = <®_dldo1>; /* Card detection pin is not connected */ diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi new file mode 100644 index 000000000000..dd10aaf472b6 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2023 Martin Botka <martin@somainline.org> + +/ { + cpu_opp_table: opp-table-cpu { + compatible = "allwinner,sun50i-h616-operating-points"; + nvmem-cells = <&cpu_speed_grade>; + opp-shared; + + opp-480000000 { + opp-hz = /bits/ 64 <480000000>; + opp-microvolt = <900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x3f>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x12>; + }; + + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + opp-microvolt = <900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x2d>; + }; + + opp-792000000 { + opp-hz = /bits/ 64 <792000000>; + opp-microvolt-speed1 = <900000>; + opp-microvolt-speed4 = <940000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x12>; + }; + + opp-936000000 { + opp-hz = /bits/ 64 <936000000>; + opp-microvolt = <900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x0d>; + }; + + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt-speed0 = <950000>; + opp-microvolt-speed1 = <940000>; + opp-microvolt-speed2 = <950000>; + opp-microvolt-speed3 = <950000>; + opp-microvolt-speed4 = <1020000>; + opp-microvolt-speed5 = <900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x3f>; + }; + + opp-1032000000 { + opp-hz = /bits/ 64 <1032000000>; + opp-microvolt = <900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x20>; + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt-speed0 = <1000000>; + opp-microvolt-speed2 = <1000000>; + opp-microvolt-speed3 = <1000000>; + opp-microvolt-speed5 = <950000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x2d>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt-speed0 = <1050000>; + opp-microvolt-speed1 = <1020000>; + opp-microvolt-speed2 = <1050000>; + opp-microvolt-speed3 = <1050000>; + opp-microvolt-speed4 = <1100000>; + opp-microvolt-speed5 = <1020000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x3f>; + }; + + opp-1320000000 { + opp-hz = /bits/ 64 <1320000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x1d>; + }; + + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x2d>; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt-speed1 = <1100000>; + opp-microvolt-speed3 = <1100000>; + opp-microvolt-speed5 = <1160000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x2a>; + }; + }; +}; + +&cpu0 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu1 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu2 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu3 { + operating-points-v2 = <&cpu_opp_table>; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi index fc7315b94406..a8644fb52b04 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi @@ -59,6 +59,11 @@ }; }; +&codec { + allwinner,audio-routing = "Line Out", "LINEOUT"; + status = "okay"; +}; + &ehci1 { status = "okay"; }; @@ -72,6 +77,10 @@ status = "okay"; }; +&gpu { + status = "okay"; +}; + &mdio0 { ext_rgmii_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; @@ -81,6 +90,7 @@ &mmc0 { cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + disable-wp; bus-width = <4>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts index b5d713926a34..f2e3300e078a 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts @@ -6,12 +6,17 @@ /dts-v1/; #include "sun50i-h616-orangepi-zero.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" / { model = "OrangePi Zero2"; compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; }; +&cpu0 { + cpu-supply = <®_dcdca>; +}; + &emac0 { allwinner,rx-delay-ps = <3100>; allwinner,tx-delay-ps = <700>; @@ -19,6 +24,10 @@ phy-supply = <®_dcdce>; }; +&gpu { + mali-supply = <®_dcdcc>; +}; + &mmc0 { vmmc-supply = <®_dcdce>; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts index 959b6fd18483..085f3e4e8eaa 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "sun50i-h616.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -32,6 +33,15 @@ }; }; +&codec { + allwinner,audio-routing = "Line Out", "LINEOUT"; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdca>; +}; + &ehci0 { status = "okay"; }; @@ -40,6 +50,11 @@ status = "okay"; }; +&gpu { + mali-supply = <®_dcdcc>; + status = "okay"; +}; + &ir { status = "okay"; }; @@ -47,6 +62,7 @@ &mmc0 { vmmc-supply = <®_dcdce>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + disable-wp; bus-width = <4>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index b2e85e52d1a1..ceedae9e399b 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -26,6 +26,14 @@ reg = <0>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; + #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; }; cpu1: cpu@1 { @@ -34,6 +42,14 @@ reg = <1>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; + #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; }; cpu2: cpu@2 { @@ -42,6 +58,14 @@ reg = <2>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; + #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; }; cpu3: cpu@3 { @@ -50,6 +74,23 @@ reg = <3>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; + #cooling-cells = <2>; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&l2_cache>; + }; + + l2_cache: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x40000>; + cache-line-size = <64>; + cache-sets = <256>; }; }; @@ -109,6 +150,31 @@ #size-cells = <1>; ranges = <0x0 0x0 0x0 0x40000000>; + gpu: gpu@1800000 { + compatible = "allwinner,sun50i-h616-mali", + "arm,mali-bifrost"; + reg = <0x1800000 0x40000>; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&ccu CLK_GPU0>, <&ccu CLK_BUS_GPU>; + clock-names = "core", "bus"; + power-domains = <&prcm_ppu 2>; + resets = <&ccu RST_BUS_GPU>; + status = "disabled"; + }; + + crypto: crypto@1904000 { + compatible = "allwinner,sun50i-h616-crypto"; + reg = <0x01904000 0x800>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, + <&ccu CLK_MBUS_CE>, <&rtc CLK_IOSC>; + clock-names = "bus", "mod", "ram", "trng"; + resets = <&ccu RST_BUS_CE>; + }; + syscon: syscon@3000000 { compatible = "allwinner,sun50i-h616-system-control"; reg = <0x03000000 0x1000>; @@ -156,6 +222,10 @@ ths_calibration: thermal-sensor-calibration@14 { reg = <0x14 0x8>; }; + + cpu_speed_grade: cpu-speed-grade@0 { + reg = <0x0 2>; + }; }; watchdog: watchdog@30090a0 { @@ -194,7 +264,7 @@ }; i2c0_pins: i2c0-pins { - pins = "PI6", "PI7"; + pins = "PI5", "PI6"; function = "i2c0"; }; @@ -298,6 +368,15 @@ #interrupt-cells = <3>; }; + iommu: iommu@30f0000 { + compatible = "allwinner,sun50i-h616-iommu"; + reg = <0x030f0000 0x10000>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_IOMMU>; + resets = <&ccu RST_BUS_IOMMU>; + #iommu-cells = <1>; + }; + mmc0: mmc@4020000 { compatible = "allwinner,sun50i-h616-mmc", "allwinner,sun50i-a100-mmc"; @@ -566,6 +645,40 @@ }; }; + gpadc: adc@5070000 { + compatible = "allwinner,sun50i-h616-gpadc", + "allwinner,sun20i-d1-gpadc"; + reg = <0x05070000 0x400>; + clocks = <&ccu CLK_BUS_GPADC>; + resets = <&ccu RST_BUS_GPADC>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + #io-channel-cells = <1>; + }; + + ths: thermal-sensor@5070400 { + compatible = "allwinner,sun50i-h616-ths"; + reg = <0x05070400 0x400>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_THS>; + clock-names = "bus"; + resets = <&ccu RST_BUS_THS>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + allwinner,sram = <&syscon>; + #thermal-sensor-cells = <1>; + }; + + lradc: lradc@5070800 { + compatible = "allwinner,sun50i-h616-lradc", + "allwinner,sun50i-r329-lradc"; + reg = <0x05070800 0x400>; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_KEYADC>; + resets = <&ccu RST_BUS_KEYADC>; + status = "disabled"; + }; + spdif: spdif@5093000 { compatible = "allwinner,sun50i-h616-spdif"; reg = <0x05093000 0x400>; @@ -581,17 +694,18 @@ status = "disabled"; }; - ths: thermal-sensor@5070400 { - compatible = "allwinner,sun50i-h616-ths"; - reg = <0x05070400 0x400>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_THS>; - clock-names = "bus"; - resets = <&ccu RST_BUS_THS>; - nvmem-cells = <&ths_calibration>; - nvmem-cell-names = "calibration"; - allwinner,sram = <&syscon>; - #thermal-sensor-cells = <1>; + codec: codec@5096000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-h616-codec"; + reg = <0x05096000 0x31c>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_AUDIO_CODEC>, + <&ccu CLK_AUDIO_CODEC_1X>; + clock-names = "apb", "codec"; + resets = <&ccu RST_BUS_AUDIO_CODEC>; + dmas = <&dma 6>; + dma-names = "tx"; + status = "disabled"; }; usbotg: usb@5100000 { @@ -775,6 +889,21 @@ #reset-cells = <1>; }; + prcm_ppu: power-controller@7010250 { + compatible = "allwinner,sun50i-h616-prcm-ppu"; + reg = <0x07010250 0x10>; + #power-domain-cells = <1>; + }; + + nmi_intc: interrupt-controller@7010320 { + compatible = "allwinner,sun50i-h616-nmi", + "allwinner,sun9i-a80-nmi"; + reg = <0x07010320 0xc>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + }; + r_pio: pinctrl@7022000 { compatible = "allwinner,sun50i-h616-r-pinctrl"; reg = <0x07022000 0x400>; @@ -820,6 +949,8 @@ dmas = <&dma 48>, <&dma 48>; dma-names = "rx", "tx"; resets = <&r_ccu RST_R_APB2_I2C>; + pinctrl-names = "default"; + pinctrl-0 = <&r_i2c_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi index 8c1263a3939e..3f416d129b72 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi @@ -4,6 +4,16 @@ */ #include "sun50i-h616.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&gpu { + mali-supply = <®_dcdc1>; + status = "okay"; +}; &mmc2 { pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts index 18b29c6b867f..16c68177ff69 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts @@ -111,6 +111,7 @@ }; &mmc0 { + disable-wp; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ vmmc-supply = <®_vcc3v3>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts index 21ca1977055d..b340bbcb710d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "sun50i-h616.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -53,12 +54,26 @@ }; }; +&codec { + allwinner,audio-routing = "Line Out", "LINEOUT"; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &ehci1 { status = "okay"; }; /* USB 2 & 3 are on the FPC connector (or the exansion board) */ +&gpu { + mali-supply = <®_dcdc1>; + status = "okay"; +}; + &mmc0 { cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ bus-width = <4>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts index b3b1b8692125..c51d4d9120de 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts @@ -6,12 +6,17 @@ /dts-v1/; #include "sun50i-h616-orangepi-zero.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" / { model = "OrangePi Zero3"; compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &emac0 { allwinner,tx-delay-ps = <700>; phy-mode = "rgmii-rxid"; @@ -22,6 +27,10 @@ motorcomm,clk-out-frequency-hz = <125000000>; }; +&gpu { + mali-supply = <®_dcdc1>; +}; + &mmc0 { /* * The schematic shows the card detect pin wired up to PF6, via an diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts index ac0a2b7ea6f3..efe0faa252f5 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "sun50i-h616.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -41,7 +42,7 @@ regulator-always-on; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; @@ -51,6 +52,15 @@ }; }; +&codec { + allwinner,audio-routing = "Line Out", "LINEOUT"; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &ehci0 { status = "okay"; }; @@ -59,6 +69,11 @@ status = "okay"; }; +&gpu { + mali-supply = <®_dcdc1>; + status = "okay"; +}; + &ir { status = "okay"; }; @@ -66,6 +81,7 @@ &mmc0 { vmmc-supply = <®_dldo1>; cd-gpios = <&pio 8 16 GPIO_ACTIVE_LOW>; /* PI16 */ + disable-wp; bus-width = <4>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-yuzukihd-chameleon.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-yuzukihd-chameleon.dts new file mode 100644 index 000000000000..eae56908b9b4 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-yuzukihd-chameleon.dts @@ -0,0 +1,222 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2024 Arm Ltd. + */ + +/dts-v1/; + +#include "sun50i-h616.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + model = "Yuzuki Chameleon"; + compatible = "yuzukihd,chameleon", "allwinner,sun50i-h618"; + + aliases { + ethernet1 = &sdio_wifi; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply directly from the USB-C socket */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + wifi_pwrseq: pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc CLK_OSC32K_FANOUT>; + clock-names = "ext_clock"; + pinctrl-0 = <&x32clk_fanout_pin>; + pinctrl-names = "default"; + reset-gpios = <&pio 6 11 GPIO_ACTIVE_LOW>; /* PG11 */ + }; +}; + +&codec { + allwinner,audio-routing = "Line Out", "LINEOUT"; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&ehci2 { + status = "okay"; +}; + +&ehci3 { + status = "okay"; +}; + +&mmc0 { + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + disable-wp; + vmmc-supply = <®_dldo1>; + status = "okay"; +}; + +&mmc1 { + bus-width = <4>; + mmc-pwrseq = <&wifi_pwrseq>; + non-removable; + vmmc-supply = <®_dldo1>; + vqmmc-supply = <®_dldo1>; + status = "okay"; + + sdio_wifi: wifi@1 { + reg = <1>; + interrupt-parent = <&pio>; + interrupts = <6 12 IRQ_TYPE_LEVEL_LOW>; /* PG12 */ + interrupt-names = "host-wake"; + }; +}; + +&mmc2 { + bus-width = <8>; + cap-mmc-hw-reset; + mmc-ddr-3_3v; + non-removable; + vmmc-supply = <®_dldo1>; + vqmmc-supply = <®_dldo1>; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; + +&ohci3 { + status = "okay"; +}; + +&pio { + vcc-pc-supply = <®_dldo1>; + vcc-pf-supply = <®_dldo1>; /* via VCC_IO */ + vcc-pg-supply = <®_dldo1>; + vcc-ph-supply = <®_dldo1>; /* via VCC_IO */ + vcc-pi-supply = <®_dldo1>; +}; + +&r_i2c { + status = "okay"; + + axp313: pmic@36 { + compatible = "x-powers,axp313a"; + reg = <0x36>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&pio>; + interrupts = <2 2 IRQ_TYPE_LEVEL_LOW>; /* PC2 */ + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + + regulators { + /* Supplies VCC-PLL, so needs to be always on. */ + reg_aldo1: aldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8"; + }; + + /* Supplies VCC-IO, so needs to be always on. */ + reg_dldo1: dldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3"; + }; + + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <990000>; + regulator-name = "vdd-gpu-sys"; + }; + + reg_dcdc2: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpu"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd-dram"; + }; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; + +/* Connected to the Bluetooth UART pins of the XR829 Wifi/BT chip. */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; + status = "okay"; +}; + +&usbotg { + /* + * PHY0 pins are connected to a USB-C socket, but a role switch + * is not implemented: both CC pins are pulled to GND. + * The VBUS pins power the device, so a fixed peripheral mode + * is the best choice. + * The board can be powered via GPIOs, in this case port0 *can* + * act as a host (with a cable/adapter ignoring CC), as VBUS is + * then provided by the GPIOs. Any user of this setup would + * need to adjust the DT accordingly: dr_mode set to "host", + * enabling OHCI0 and EHCI0. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18 */ + usb0_vbus-supply = <®_vcc5v>; + usb1_vbus-supply = <®_vcc5v>; + usb2_vbus-supply = <®_vcc5v>; + usb3_vbus-supply = <®_vcc5v>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts index b6e3c169797f..ce90327e1b2e 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts @@ -42,7 +42,7 @@ regulator-always-on; }; - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ post-power-on-delay-ms = <200>; @@ -191,7 +191,7 @@ compatible = "x-powers,axp803"; reg = <0x3a3>; interrupt-parent = <&r_intc>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_LOW>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; x-powers,drive-vbus-en; vin1-supply = <®_vcc5v>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts new file mode 100644 index 000000000000..1a750c5f6fac --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts @@ -0,0 +1,381 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (C) 2024 Ryan Walklin <ryan@testtoast.com>. + */ + +/dts-v1/; + +#include "sun50i-h616.dtsi" +#include "sun50i-h616-cpu-opp.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "Anbernic RG35XX 2024"; + chassis-type = "handset"; + compatible = "anbernic,rg35xx-2024", "allwinner,sun50i-h700"; + + aliases { + serial0 = &uart0; + }; + + battery: battery { + compatible = "simple-battery"; + constant-charge-current-max-microamp = <1024000>; + voltage-max-design-microvolt = <4200000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio_keys_gamepad: gpio-keys-gamepad { + compatible = "gpio-keys"; + + button-a { + label = "Action-Pad A"; + gpios = <&pio 0 0 GPIO_ACTIVE_LOW>; /* PA0 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_EAST>; + }; + + button-b { + label = "Action-Pad B"; + gpios = <&pio 0 1 GPIO_ACTIVE_LOW>; /* PA1 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_SOUTH>; + }; + + button-down { + label = "D-Pad Down"; + gpios = <&pio 4 0 GPIO_ACTIVE_LOW>; /* PE0 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_DPAD_DOWN>; + }; + + button-l1 { + label = "Key L1"; + gpios = <&pio 0 10 GPIO_ACTIVE_LOW>; /* PA10 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_TL>; + }; + + button-l2 { + label = "Key L2"; + gpios = <&pio 0 11 GPIO_ACTIVE_LOW>; /* PA11 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_TL2>; + }; + + button-left { + label = "D-Pad left"; + gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-menu { + label = "Key Menu"; + gpios = <&pio 4 3 GPIO_ACTIVE_LOW>; /* PE3 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_MODE>; + }; + + button-r1 { + label = "Key R1"; + gpios = <&pio 0 12 GPIO_ACTIVE_LOW>; /* PA12 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_TR>; + }; + + button-r2 { + label = "Key R2"; + gpios = <&pio 0 7 GPIO_ACTIVE_LOW>; /* PA7 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_TR2>; + }; + + button-right { + label = "D-Pad Right"; + gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-select { + label = "Key Select"; + gpios = <&pio 0 5 GPIO_ACTIVE_LOW>; /* PA5 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_SELECT>; + }; + button-start { + label = "Key Start"; + gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_START>; + }; + + button-up { + label = "D-Pad Up"; + gpios = <&pio 0 6 GPIO_ACTIVE_LOW>; /* PA6 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_DPAD_UP>; + }; + + button-x { + label = "Action-Pad X"; + gpios = <&pio 0 3 GPIO_ACTIVE_LOW>; /* PA3 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_NORTH>; + }; + + button-y { + label = "Action Pad Y"; + gpios = <&pio 0 2 GPIO_ACTIVE_LOW>; /* PA2 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_WEST>; + }; + }; + + gpio-keys-volume { + compatible = "gpio-keys"; + autorepeat; + + button-vol-up { + label = "Key Volume Up"; + gpios = <&pio 4 1 GPIO_ACTIVE_LOW>; /* PE1 */ + linux,input-type = <EV_KEY>; + linux,code = <KEY_VOLUMEUP>; + }; + + button-vol-down { + label = "Key Volume Down"; + gpios = <&pio 4 2 GPIO_ACTIVE_LOW>; /* PE2 */ + linux,input-type = <EV_KEY>; + linux,code = <KEY_VOLUMEDOWN>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + function = LED_FUNCTION_POWER; + color = <LED_COLOR_ID_GREEN>; + gpios = <&pio 8 12 GPIO_ACTIVE_HIGH>; /* PI12 */ + default-state = "on"; + }; + + led-1 { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_GREEN>; + gpios = <&pio 8 11 GPIO_ACTIVE_HIGH>; /* PI11 */ + }; + }; + + reg_vcc5v: regulator-vcc5v { /* USB-C power input */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&codec { + /* Both speakers and headphone jack connected to 74HC4052D analog mux*/ + allwinner,audio-routing = "Speaker", "LINEOUT", + "Headphone", "LINEOUT"; + allwinner,pa-gpios = <&pio 8 5 GPIO_ACTIVE_HIGH>; // PI5 + hp-det-gpios = <&pio 8 3 GPIO_ACTIVE_HIGH>; // PI3 + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc1>; +}; + +&ehci0 { + status = "okay"; +}; + +&gpu { + mali-supply = <®_dcdc2>; + status = "okay"; +}; + +&mmc0 { + vmmc-supply = <®_cldo3>; + disable-wp; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width = <4>; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&pio { + vcc-pa-supply = <®_cldo3>; + vcc-pc-supply = <®_cldo3>; + vcc-pe-supply = <®_cldo3>; + vcc-pf-supply = <®_cldo3>; + vcc-pg-supply = <®_aldo4>; + vcc-ph-supply = <®_cldo3>; + vcc-pi-supply = <®_cldo3>; +}; + +&r_i2c { + status = "okay"; + + axp717: pmic@34 { + compatible = "x-powers,axp717"; + reg = <0x34>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + vin4-supply = <®_vcc5v>; + + axp_adc: adc { + compatible = "x-powers,axp717-adc"; + #io-channel-cells = <1>; + }; + + battery_power: battery-power { + compatible = "x-powers,axp717-battery-power-supply"; + monitored-battery = <&battery>; + x-powers,no-thermistor; + }; + + regulators { + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1160000>; + regulator-name = "vdd-cpu"; + }; + + reg_dcdc2: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <940000>; + regulator-max-microvolt = <940000>; + regulator-name = "vdd-gpu-sys"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-dram"; + }; + + reg_aldo1: aldo1 { + /* 1.8v - unused */ + }; + + reg_aldo2: aldo2 { + /* 1.8v - unused */ + }; + + reg_aldo3: aldo3 { + /* 1.8v - unused */ + }; + + reg_aldo4: aldo4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "avcc"; + }; + + reg_bldo1: bldo1 { + /* 1.8v - unused */ + }; + + reg_bldo2: bldo2 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pll"; + }; + + reg_bldo3: bldo3 { + /* 2.8v - unused */ + }; + + reg_bldo4: bldo4 { + /* 1.2v - unused */ + }; + + reg_cldo1: cldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-spkr-amp"; + }; + + reg_cldo2: cldo2 { + /* 3.3v - unused */ + }; + + reg_cldo3: cldo3 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-io"; + }; + + reg_cldo4: cldo4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; + }; + + reg_boost: boost { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5200000>; + regulator-name = "boost"; + }; + + /* + * Regulator function is unknown, but reading + * GPIO values in bootloader is inconsistent + * on reboot if this is disabled. Setting to + * default value from regulator OTP mem. + */ + reg_cpusldo: cpusldo { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + }; + }; + + usb_power: usb-power { + compatible = "x-powers,axp717-usb-power-supply"; + input-current-limit-microamp = <1500000>; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; + +/* the AXP717 has USB type-C role switch functionality, not yet described by the binding */ +&usbotg { + dr_mode = "peripheral"; /* USB type-C receptable */ + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts new file mode 100644 index 000000000000..bef4d107482f --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts @@ -0,0 +1,138 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (C) 2024 Ryan Walklin <ryan@testtoast.com>. + * Copyright (C) 2024 Chris Morgan <macroalpha82@gmail.com>. + */ + +#include "sun50i-h700-anbernic-rg35xx-plus.dts" + +/ { + model = "Anbernic RG35XX H"; + compatible = "anbernic,rg35xx-h", "allwinner,sun50i-h700"; + + adc-joystick { + compatible = "adc-joystick"; + io-channels = <&adc_mux 0>, + <&adc_mux 1>, + <&adc_mux 2>, + <&adc_mux 3>; + pinctrl-0 = <&joy_mux_pin>; + pinctrl-names = "default"; + poll-interval = <60>; + #address-cells = <1>; + #size-cells = <0>; + + axis@0 { + reg = <0>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <4096 0>; + linux,code = <ABS_X>; + }; + + axis@1 { + reg = <1>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <0 4096>; + linux,code = <ABS_Y>; + }; + + axis@2 { + reg = <2>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <0 4096>; + linux,code = <ABS_RX>; + }; + + axis@3 { + reg = <3>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <4096 0>; + linux,code = <ABS_RY>; + }; + }; + + adc_mux: adc-mux { + compatible = "io-channel-mux"; + channels = "left_x", "left_y", "right_x", "right_y"; + #io-channel-cells = <1>; + io-channels = <&gpadc 0>; + io-channel-names = "parent"; + mux-controls = <&gpio_mux>; + settle-time-us = <100>; + }; + + gpio_mux: mux-controller { + compatible = "gpio-mux"; + mux-gpios = <&pio 8 1 GPIO_ACTIVE_LOW>, + <&pio 8 2 GPIO_ACTIVE_LOW>; + #mux-control-cells = <0>; + }; + + reg_vcc3v8_usb: regulator-vcc3v8-usb { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&pio 4 5 GPIO_ACTIVE_HIGH>; /* PE5 */ + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + regulator-name = "vcc3v8-usb"; + }; + + reg_vcc5v0_usb: regulator-vcc5v0-usb { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&pio 8 7 GPIO_ACTIVE_HIGH>; /* PI7 */ + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v0-usb"; + vin-supply = <®_vcc3v8_usb>; + }; +}; + +&gpadc { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + channel@0 { + reg = <0>; + }; +}; + +&gpio_keys_gamepad { + button-thumbl { + label = "GPIO Thumb Left"; + gpios = <&pio 4 8 GPIO_ACTIVE_LOW>; /* PE8 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_THUMBL>; + }; + + button-thumbr { + label = "GPIO Thumb Right"; + gpios = <&pio 4 9 GPIO_ACTIVE_LOW>; /* PE9 */ + linux,input-type = <EV_KEY>; + linux,code = <BTN_THUMBR>; + }; +}; + +&ehci1 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + joy_mux_pin: joy-mux-pin { + pins = "PI0"; + function = "gpio_out"; + }; +}; + +&usbphy { + usb1_vbus-supply = <®_vcc5v0_usb>; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts new file mode 100644 index 000000000000..60a8e4922103 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (C) 2024 Ryan Walklin <ryan@testtoast.com>. + */ + +#include "sun50i-h700-anbernic-rg35xx-2024.dts" + +/ { + model = "Anbernic RG35XX Plus"; + compatible = "anbernic,rg35xx-plus", "allwinner,sun50i-h700"; + + wifi_pwrseq: pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc CLK_OSC32K_FANOUT>; + clock-names = "ext_clock"; + pinctrl-0 = <&x32clk_fanout_pin>; + pinctrl-names = "default"; + post-power-on-delay-ms = <200>; + reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */ + }; +}; + +/* SDIO WiFi RTL8821CS */ +&mmc1 { + vmmc-supply = <®_cldo4>; + vqmmc-supply = <®_aldo4>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + sdio_wifi: wifi@1 { + reg = <1>; + interrupt-parent = <&pio>; + interrupts = <6 15 IRQ_TYPE_LEVEL_LOW>; /* PG15 */ + interrupt-names = "host-wake"; + }; +}; + +/* Bluetooth RTL8821CS */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8821cs-bt", "realtek,rtl8723bs-bt"; + device-wake-gpios = <&pio 6 17 GPIO_ACTIVE_HIGH>; /* PG17 */ + enable-gpios = <&pio 6 19 GPIO_ACTIVE_HIGH>; /* PG19 */ + host-wake-gpios = <&pio 6 16 GPIO_ACTIVE_HIGH>; /* PG16 */ + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-sp.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-sp.dts new file mode 100644 index 000000000000..0cf16dc903cd --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-sp.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (C) 2024 Ryan Walklin <ryan@testtoast.com>. + * Copyright (C) 2024 Chris Morgan <macroalpha82@gmail.com>. + */ + +#include <dt-bindings/input/gpio-keys.h> +#include "sun50i-h700-anbernic-rg35xx-plus.dts" + +/ { + model = "Anbernic RG35XX SP"; + compatible = "anbernic,rg35xx-sp", "allwinner,sun50i-h700"; + + gpio-keys-lid { + compatible = "gpio-keys"; + + lid-switch { + label = "Lid Switch"; + gpios = <&pio 4 7 GPIO_ACTIVE_LOW>; /* PE7 */ + linux,can-disable; + linux,code = <SW_LID>; + linux,input-type = <EV_SW>; + wakeup-event-action = <EV_ACT_DEASSERTED>; + wakeup-source; + }; + }; +}; + +&r_i2c { + rtc_ext: rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi new file mode 100644 index 000000000000..8b7cbc2e78f5 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -0,0 +1,639 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) +// Copyright (C) 2023-2024 Arm Ltd. + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/sun6i-rtc.h> +#include <dt-bindings/clock/sun55i-a523-ccu.h> +#include <dt-bindings/clock/sun55i-a523-r-ccu.h> +#include <dt-bindings/reset/sun55i-a523-ccu.h> +#include <dt-bindings/reset/sun55i-a523-r-ccu.h> + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x000>; + enable-method = "psci"; + }; + + cpu1: cpu@100 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x100>; + enable-method = "psci"; + }; + + cpu2: cpu@200 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x200>; + enable-method = "psci"; + }; + + cpu3: cpu@300 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x300>; + enable-method = "psci"; + }; + + cpu4: cpu@400 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x400>; + enable-method = "psci"; + }; + + cpu5: cpu@500 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x500>; + enable-method = "psci"; + }; + + cpu6: cpu@600 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x600>; + enable-method = "psci"; + }; + + cpu7: cpu@700 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x700>; + enable-method = "psci"; + }; + }; + + osc24M: osc24M-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "osc24M"; + }; + + pmu { + compatible = "arm,cortex-a55-pmu"; + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + arm,no-tick-in-suspend; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x40000000>; + + pio: pinctrl@2000000 { + compatible = "allwinner,sun55i-a523-pinctrl"; + reg = <0x2000000 0x800>; + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>; + clock-names = "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; + + rgmii0_pins: rgmii0-pins { + pins = "PH0", "PH1", "PH2", "PH3", "PH4", + "PH5", "PH6", "PH7", "PH9", "PH10", + "PH14", "PH15", "PH16", "PH17", "PH18"; + allwinner,pinmux = <5>; + function = "emac0"; + drive-strength = <40>; + bias-disable; + }; + + mmc0_pins: mmc0-pins { + pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5"; + allwinner,pinmux = <2>; + function = "mmc0"; + drive-strength = <30>; + bias-pull-up; + }; + + /omit-if-no-ref/ + mmc1_pins: mmc1-pins { + pins = "PG0" ,"PG1", "PG2", "PG3", "PG4", "PG5"; + allwinner,pinmux = <2>; + function = "mmc1"; + drive-strength = <30>; + bias-pull-up; + }; + + mmc2_pins: mmc2-pins { + pins = "PC0", "PC1" ,"PC5", "PC6", "PC8", + "PC9", "PC10", "PC11", "PC13", "PC14", + "PC15", "PC16"; + allwinner,pinmux = <3>; + function = "mmc2"; + drive-strength = <30>; + bias-pull-up; + }; + + uart0_pb_pins: uart0-pb-pins { + pins = "PB9", "PB10"; + allwinner,pinmux = <2>; + function = "uart0"; + }; + }; + + ccu: clock-controller@2001000 { + compatible = "allwinner,sun55i-a523-ccu"; + reg = <0x02001000 0x1000>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>, + <&rtc CLK_IOSC>, <&rtc CLK_OSC32K_FANOUT>; + clock-names = "hosc", "losc", + "iosc", "losc-fanout"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + mmc0: mmc@4020000 { + compatible = "allwinner,sun55i-a523-mmc", + "allwinner,sun20i-d1-mmc"; + reg = <0x04020000 0x1000>; + clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC0>; + reset-names = "ahb"; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + status = "disabled"; + + max-frequency = <150000000>; + cap-sd-highspeed; + cap-mmc-highspeed; + cap-sdio-irq; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc1: mmc@4021000 { + compatible = "allwinner,sun55i-a523-mmc", + "allwinner,sun20i-d1-mmc"; + reg = <0x04021000 0x1000>; + clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC1>; + reset-names = "ahb"; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + status = "disabled"; + + max-frequency = <150000000>; + cap-sd-highspeed; + cap-mmc-highspeed; + cap-sdio-irq; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc2: mmc@4022000 { + compatible = "allwinner,sun55i-a523-mmc", + "allwinner,sun20i-d1-mmc"; + reg = <0x04022000 0x1000>; + clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC2>; + reset-names = "ahb"; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + status = "disabled"; + + max-frequency = <150000000>; + cap-sd-highspeed; + cap-mmc-highspeed; + cap-sdio-irq; + #address-cells = <1>; + #size-cells = <0>; + }; + + wdt: watchdog@2050000 { + compatible = "allwinner,sun55i-a523-wdt"; + reg = <0x2050000 0x20>; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; + clock-names = "hosc", "losc"; + status = "okay"; + }; + + uart0: serial@2500000 { + compatible = "snps,dw-apb-uart"; + reg = <0x02500000 0x400>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART0>; + resets = <&ccu RST_BUS_UART0>; + status = "disabled"; + }; + + uart1: serial@2500400 { + compatible = "snps,dw-apb-uart"; + reg = <0x02500400 0x400>; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART1>; + resets = <&ccu RST_BUS_UART1>; + status = "disabled"; + }; + + uart2: serial@2500800 { + compatible = "snps,dw-apb-uart"; + reg = <0x02500800 0x400>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART2>; + resets = <&ccu RST_BUS_UART2>; + status = "disabled"; + }; + + uart3: serial@2500c00 { + compatible = "snps,dw-apb-uart"; + reg = <0x02500c00 0x400>; + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART3>; + resets = <&ccu RST_BUS_UART3>; + status = "disabled"; + }; + + uart4: serial@2501000 { + compatible = "snps,dw-apb-uart"; + reg = <0x02501000 0x400>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART4>; + resets = <&ccu RST_BUS_UART4>; + status = "disabled"; + }; + + uart5: serial@2501400 { + compatible = "snps,dw-apb-uart"; + reg = <0x02501400 0x400>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART5>; + resets = <&ccu RST_BUS_UART5>; + status = "disabled"; + }; + + uart6: serial@2501800 { + compatible = "snps,dw-apb-uart"; + reg = <0x02501800 0x400>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART6>; + resets = <&ccu RST_BUS_UART6>; + status = "disabled"; + }; + + uart7: serial@2501c00 { + compatible = "snps,dw-apb-uart"; + reg = <0x02501c00 0x400>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART7>; + resets = <&ccu RST_BUS_UART7>; + status = "disabled"; + }; + + i2c0: i2c@2502000 { + compatible = "allwinner,sun55i-a523-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x2502000 0x400>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2C0>; + resets = <&ccu RST_BUS_I2C0>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c1: i2c@2502400 { + compatible = "allwinner,sun55i-a523-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x2502400 0x400>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2C1>; + resets = <&ccu RST_BUS_I2C1>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c2: i2c@2502800 { + compatible = "allwinner,sun55i-a523-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x2502800 0x400>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2C2>; + resets = <&ccu RST_BUS_I2C2>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c3: i2c@2502c00 { + compatible = "allwinner,sun55i-a523-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x2502c00 0x400>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2C3>; + resets = <&ccu RST_BUS_I2C3>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c4: i2c@2503000 { + compatible = "allwinner,sun55i-a523-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x2503000 0x400>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2C4>; + resets = <&ccu RST_BUS_I2C4>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c5: i2c@2503400 { + compatible = "allwinner,sun55i-a523-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x2503400 0x400>; + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2C5>; + resets = <&ccu RST_BUS_I2C5>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + syscon: syscon@3000000 { + compatible = "allwinner,sun55i-a523-system-control", + "allwinner,sun50i-a64-system-control"; + reg = <0x03000000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + }; + + gic: interrupt-controller@3400000 { + compatible = "arm,gic-v3"; + #address-cells = <1>; + #interrupt-cells = <3>; + #size-cells = <1>; + ranges; + interrupt-controller; + reg = <0x3400000 0x10000>, + <0x3460000 0x100000>; + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + dma-noncoherent; + + its: msi-controller@3440000 { + compatible = "arm,gic-v3-its"; + reg = <0x3440000 0x20000>; + msi-controller; + #msi-cells = <1>; + dma-noncoherent; + }; + }; + + usb_otg: usb@4100000 { + compatible = "allwinner,sun55i-a523-musb", + "allwinner,sun8i-a33-musb"; + reg = <0x4100000 0x400>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + extcon = <&usbphy 0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + usbphy: phy@4100400 { + compatible = "allwinner,sun55i-a523-usb-phy", + "allwinner,sun20i-d1-usb-phy"; + reg = <0x4100400 0x100>, + <0x4101800 0x100>, + <0x4200800 0x100>; + reg-names = "phy_ctrl", + "pmu0", + "pmu1"; + clocks = <&osc24M>, + <&osc24M>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + + ehci0: usb@4101000 { + compatible = "allwinner,sun55i-a523-ehci", + "generic-ehci"; + reg = <0x4101000 0x100>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci0: usb@4101400 { + compatible = "allwinner,sun55i-a523-ohci", + "generic-ohci"; + reg = <0x4101400 0x100>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci1: usb@4200000 { + compatible = "allwinner,sun55i-a523-ehci", + "generic-ehci"; + reg = <0x4200000 0x100>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_BUS_EHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>, + <&ccu RST_BUS_EHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci1: usb@4200400 { + compatible = "allwinner,sun55i-a523-ohci", + "generic-ohci"; + reg = <0x4200400 0x100>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + emac0: ethernet@4500000 { + compatible = "allwinner,sun55i-a523-emac0", + "allwinner,sun50i-a64-emac"; + reg = <0x04500000 0x10000>; + clocks = <&ccu CLK_BUS_EMAC0>; + clock-names = "stmmaceth"; + resets = <&ccu RST_BUS_EMAC0>; + reset-names = "stmmaceth"; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii0_pins>; + syscon = <&syscon>; + status = "disabled"; + + mdio0: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + r_ccu: clock-controller@7010000 { + compatible = "allwinner,sun55i-a523-r-ccu"; + reg = <0x7010000 0x250>; + clocks = <&osc24M>, + <&rtc CLK_OSC32K>, + <&rtc CLK_IOSC>, + <&ccu CLK_PLL_PERIPH0_200M>, + <&ccu CLK_PLL_AUDIO0_4X>; + clock-names = "hosc", + "losc", + "iosc", + "pll-periph", + "pll-audio"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + nmi_intc: interrupt-controller@7010320 { + compatible = "allwinner,sun55i-a523-nmi"; + reg = <0x07010320 0xc>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; + }; + + r_pio: pinctrl@7022000 { + compatible = "allwinner,sun55i-a523-r-pinctrl"; + reg = <0x7022000 0x800>; + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu CLK_R_APB0>, + <&osc24M>, + <&rtc CLK_OSC32K>; + clock-names = "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; + + r_i2c_pins: r-i2c-pins { + pins = "PL0" ,"PL1"; + allwinner,pinmux = <2>; + function = "r_i2c0"; + }; + }; + + r_i2c0: i2c@7081400 { + compatible = "allwinner,sun55i-a523-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x07081400 0x400>; + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu CLK_BUS_R_I2C0>; + resets = <&r_ccu RST_BUS_R_I2C0>; + pinctrl-names = "default"; + pinctrl-0 = <&r_i2c_pins>; + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + }; + + rtc: rtc@7090000 { + compatible = "allwinner,sun55i-a523-rtc", + "allwinner,sun50i-r329-rtc"; + reg = <0x7090000 0x400>; + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu CLK_BUS_R_RTC>, + <&osc24M>, + <&r_ccu CLK_R_AHB>; + clock-names = "bus", "hosc", "ahb"; + #clock-cells = <1>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts new file mode 100644 index 000000000000..0f58d92a6adc --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts @@ -0,0 +1,318 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) +// Copyright (C) 2025 Arm Ltd. + +/dts-v1/; + +#include "sun55i-a523.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Radxa Cubie A5E"; + compatible = "radxa,cubie-a5e", "allwinner,sun55i-a527"; + + aliases { + ethernet0 = &emac0; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + ext_osc32k: ext-osc32k-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "ext_osc32k"; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply from the USB-C connector */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_usb_vbus: vbus { + compatible = "regulator-fixed"; + regulator-name = "usb-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <®_vcc5v>; + gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ + enable-active-high; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&emac0 { + phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_cldo3>; + + allwinner,tx-delay-ps = <300>; + allwinner,rx-delay-ps = <400>; + + status = "okay"; +}; + +&mdio0 { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&mmc0 { + vmmc-supply = <®_cldo3>; + cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ + bus-width = <4>; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + vcc-pb-supply = <®_cldo3>; /* via VCC-IO */ + vcc-pc-supply = <®_cldo1>; + vcc-pd-supply = <®_cldo3>; + vcc-pe-supply = <®_aldo2>; + vcc-pf-supply = <®_cldo3>; /* actually switchable */ + vcc-pg-supply = <®_bldo1>; + vcc-ph-supply = <®_cldo3>; /* via VCC-IO */ + vcc-pi-supply = <®_cldo3>; + vcc-pj-supply = <®_cldo4>; + vcc-pk-supply = <®_cldo1>; +}; + +&r_i2c0 { + status = "okay"; + + axp717: pmic@34 { + compatible = "x-powers,axp717"; + reg = <0x34>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + vin4-supply = <®_vcc5v>; + aldoin-supply = <®_vcc5v>; + bldoin-supply = <®_vcc5v>; + cldoin-supply = <®_vcc5v>; + + regulators { + /* Supplies the "little" cluster (1.4 GHz cores) */ + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1160000>; + regulator-name = "vdd-cpul"; + }; + + reg_dcdc2: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <920000>; + regulator-max-microvolt = <920000>; + regulator-name = "vdd-gpu-sys"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-dram"; + }; + + reg_aldo1: aldo1 { + /* not connected */ + }; + + reg_aldo2: aldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pe"; + }; + + reg_aldo3: aldo3 { + /* supplies the I2C pins for this PMIC */ + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pl-usb"; + }; + + reg_aldo4: aldo4 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pll-dxco-avcc"; + }; + + reg_bldo1: bldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pg-iowifi"; + }; + + reg_bldo2: bldo2 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pm-lpddr4"; + }; + + reg_bldo3: bldo3 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-mipi-cam"; + }; + + reg_bldo4: bldo4 { + /* not connected */ + }; + + reg_cldo1: cldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pc-and-their-dog"; + }; + + reg_cldo2: cldo2 { + /* not connected */ + }; + + reg_cldo3: cldo3 { + /* IO, USB-2, 3V3, card, NAND, sensor, PI */ + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-io-mmc-spi-ana"; + }; + + reg_cldo4: cldo4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pj-phy"; + }; + + reg_cpusldo: cpusldo { + /* supplies the management core */ + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd-cpus"; + }; + }; + }; + + axp323: pmic@36 { + compatible = "x-powers,axp323"; + reg = <0x36>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + status = "okay"; + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + + regulators { + aldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-mipi-dsi"; + }; + + dldo1 { + /* not connected */ + }; + + /* Supplies the "big" cluster (1.8 GHz cores) */ + reg_dcdc1_323: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1160000>; + regulator-name = "vdd-cpub"; + }; + + /* DCDC2 is polyphased with DCDC1 */ + + /* RISC-V management core supply */ + reg_dcdc3_323: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd-dnr"; + }; + }; + }; +}; + +&r_pio { +/* + * Specifying the supply would create a circular dependency. + * + * vcc-pl-supply = <®_aldo3>; + */ + vcc-pm-supply = <®_aldo3>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&usb_otg { + /* + * The USB-C port is the primary power supply, so in this configuration + * relies on the other end of the USB cable to supply the VBUS power. + * So use this port in peripheral mode. + * It is possible to supply the board with the 5V pins on the GPIO + * header, and since the DCIN_5V line is hardwired to the USB-C VBUS + * pins, the port turns into a host port, unconditionally supplying + * power. The dr_mode property should be changed to "host" here, if + * users choose this setup. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +/* + * The schematic describes USB0_ID (PL10), measuring VBUS_5V, which looks to + * be always on. Also there is USB-VBUSDET (PL2), which is measuring the same + * VBUS_5V. There is also DCIN_DET, which measures DCIN_5V, so the power + * input rail. + * None of them seem to make any sense in relation to detecting USB devices + * or whether there is power provided via any USB pins: they would always + * report high, otherwise the system wouldn't be running. + * The AXP717C provides proper USB-C CC pin functionality, but the PMIC is + * not connected to those pins of the USB-C connector. + */ +&usbphy { + usb0_vbus-supply = <®_vcc5v>; + usb1_vbus-supply = <®_usb_vbus>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts new file mode 100644 index 000000000000..59db103546f6 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts @@ -0,0 +1,287 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) +// Copyright (C) 2024 Arm Ltd. + +/dts-v1/; + +#include "sun55i-a523.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "X96Q Pro+"; + compatible = "amediatech,x96q-pro-plus", "allwinner,sun55i-h728"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + ext_osc32k: ext-osc32k-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "ext_osc32k"; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply from the barrel plug */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_vcc3v3: vcc3v3 { + /* 3.3V dummy supply for the SD card */ + compatible = "regulator-fixed"; + regulator-name = "vcc-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <®_vcc5v>; + regulator-always-on; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&mmc0 { + vmmc-supply = <®_vcc3v3>; + cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ + bus-width = <4>; + disable-wp; + status = "okay"; +}; + +&mmc2 { + vmmc-supply = <®_cldo3>; + vqmmc-supply = <®_cldo1>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + vcc-pb-supply = <®_cldo3>; /* via VCC-IO */ + vcc-pc-supply = <®_cldo1>; + vcc-pd-supply = <®_dcdc4>; + vcc-pe-supply = <®_dcdc4>; + vcc-pf-supply = <®_cldo3>; /* actually switchable */ + vcc-pg-supply = <®_bldo1>; + vcc-ph-supply = <®_cldo3>; /* via VCC-IO */ + vcc-pi-supply = <®_dcdc4>; + vcc-pj-supply = <®_dcdc4>; + vcc-pk-supply = <®_bldo3>; +}; + +&r_i2c0 { + status = "okay"; + + axp717: pmic@34 { + compatible = "x-powers,axp717"; + reg = <0x34>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + vin4-supply = <®_vcc5v>; + aldoin-supply = <®_vcc5v>; + bldoin-supply = <®_vcc5v>; + cldoin-supply = <®_vcc5v>; + + regulators { + /* Supplies the "little" cluster (1.0(?) GHz cores) */ + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1160000>; + regulator-name = "vdd-cpul"; + }; + + reg_dcdc2: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <920000>; + regulator-max-microvolt = <920000>; + regulator-name = "vdd-gpu-sys"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1360000>; + regulator-max-microvolt = <1360000>; + regulator-name = "vdd-dram"; + }; + + reg_dcdc4: dcdc4 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd-dcdc4"; + }; + + reg_aldo1: aldo1 { + /* not connected */ + }; + + reg_aldo2: aldo2 { + /* not connected */ + }; + + reg_aldo3: aldo3 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-aldo3"; + }; + + reg_aldo4: aldo4 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pll-dxco-avcc"; + }; + + reg_bldo1: bldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pg-wifi-lvds"; + }; + + reg_bldo2: bldo2 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-dram-1v8"; + }; + + reg_bldo3: bldo3 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc-bldo3"; + }; + + reg_bldo4: bldo4 { + /* not connected */ + }; + + reg_cldo1: cldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-codec-sd"; + }; + + reg_cldo2: cldo2 { + }; + + reg_cldo3: cldo3 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-codec-eth-sd"; + }; + + reg_cldo4: cldo4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-eth-phy"; + }; + + reg_cpusldo: cpusldo { + /* supplies the management core */ + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd-cpus"; + }; + }; + }; + + axp323: pmic@36 { + compatible = "x-powers,axp323"; + reg = <0x36>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + status = "okay"; + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + + regulators { + aldo1 { + /* not connected */ + }; + + dldo1 { + /* not connected */ + }; + + /* Supplies the "big" cluster (1.8 GHz cores) */ + reg_dcdc1_323: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1160000>; + regulator-name = "vdd-cpub"; + }; + + /* DCDC2 is polyphased with DCDC1 */ + + reg_dcdc3_323: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-name = "vdd-dcdc3"; + }; + }; + }; +}; + +&r_pio { +/* + * Specifying the supply would create a circular dependency. + * + * vcc-pl-supply = <®_aldo3>; + */ + vcc-pm-supply = <®_aldo3>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&usb_otg { + /* USB0 is a USB-A receptacle, always powered, so force host mode. */ + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts new file mode 100644 index 000000000000..08127f0cdd35 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts @@ -0,0 +1,327 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) +// Copyright (C) 2024 Arm Ltd. + +/dts-v1/; + +#include "sun55i-a523.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Avaota A1"; + compatible = "yuzukihd,avaota-a1", "allwinner,sun55i-t527"; + + aliases { + ethernet0 = &emac0; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + ext_osc32k: ext-osc32k-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "ext_osc32k"; + }; + + reg_vcc12v: vcc12v { + /* DC input jack */ + compatible = "regulator-fixed"; + regulator-name = "vcc-12v"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply from the 12V->5V regulator */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <®_vcc12v>; + regulator-always-on; + }; + + reg_usb_vbus: vbus { + compatible = "regulator-fixed"; + regulator-name = "usb-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <®_vcc5v>; + gpio = <&pio 8 12 GPIO_ACTIVE_HIGH>; /* PI12 */ + enable-active-high; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&emac0 { + phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_dcdc4>; + + allwinner,tx-delay-ps = <100>; + allwinner,rx-delay-ps = <300>; + + status = "okay"; +}; + +&mdio0 { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&mmc0 { + vmmc-supply = <®_cldo3>; + cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ + bus-width = <4>; + status = "okay"; +}; + +&mmc2 { + bus-width = <8>; + cap-mmc-hw-reset; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + vmmc-supply = <®_cldo3>; + vqmmc-supply = <®_cldo1>; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + vcc-pb-supply = <®_cldo3>; /* via VCC-IO */ + vcc-pc-supply = <®_cldo1>; + vcc-pd-supply = <®_dcdc4>; + vcc-pe-supply = <®_dcdc4>; + vcc-pf-supply = <®_cldo3>; /* actually switchable */ + vcc-pg-supply = <®_bldo1>; + vcc-ph-supply = <®_cldo3>; /* via VCC-IO */ + vcc-pi-supply = <®_dcdc4>; + vcc-pj-supply = <®_dcdc4>; + vcc-pk-supply = <®_bldo3>; +}; + +&r_i2c0 { + status = "okay"; + + axp717: pmic@35 { + compatible = "x-powers,axp717"; + reg = <0x35>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + vin4-supply = <®_vcc5v>; + aldoin-supply = <®_vcc5v>; + bldoin-supply = <®_vcc5v>; + cldoin-supply = <®_vcc5v>; + + regulators { + /* Supplies the "little" cluster (1.4 GHz cores) */ + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1160000>; + regulator-name = "vdd-cpul"; + }; + + reg_dcdc2: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <920000>; + regulator-max-microvolt = <920000>; + regulator-name = "vdd-gpu-sys"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1160000>; + regulator-max-microvolt = <1160000>; + regulator-name = "vdd-dram"; + }; + + reg_dcdc4: dcdc4 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vdd-io"; + }; + + reg_aldo1: aldo1 { + /* not connected */ + }; + + reg_aldo2: aldo2 { + /* not connected */ + }; + + reg_aldo3: aldo3 { + /* supplies the I2C pins for this PMIC */ + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pl-pm"; + }; + + reg_aldo4: aldo4 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pll-dxco-avcc"; + }; + + reg_bldo1: bldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pg-wifi-lvds"; + }; + + reg_bldo2: bldo2 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-dram-1v8"; + }; + + reg_bldo3: bldo3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-cvp-pk-vid1v8"; + }; + + reg_bldo4: bldo4 { + /* not connected */ + }; + + reg_cldo1: cldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pc"; + }; + + reg_cldo2: cldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-efuse"; + }; + + reg_cldo3: cldo3 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-io-mmc-spi-ana"; + }; + + reg_cldo4: cldo4 { + /* not connected */ + }; + + reg_cpusldo: cpusldo { + /* supplies the management core */ + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd-cpus"; + }; + }; + }; + + axp323: pmic@36 { + compatible = "x-powers,axp323"; + reg = <0x36>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + status = "okay"; + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + + regulators { + aldo1 { + /* not connected */ + }; + + dldo1 { + /* not connected */ + }; + + /* Supplies the "big" cluster (1.8 GHz cores) */ + reg_dcdc1_323: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1160000>; + regulator-name = "vdd-cpub"; + }; + + /* DCDC2 is polyphased with DCDC1 */ + + /* Some RISC-V management core related voltage */ + reg_dcdc3_323: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd-dnr"; + }; + }; + }; +}; + +&r_pio { +/* + * Specifying the supply would create a circular dependency. + * + * vcc-pl-supply = <®_aldo3>; + */ + vcc-pm-supply = <®_aldo3>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&usb_otg { + /* + * The CC pins of the USB-C port have two pull-down resistors + * connected to GND, which fixes this port to a peripheral role. + * There is a regulator, controlled by a GPIO, to provide VBUS power + * to the port, and a VBUSDET GPIO, to detect externally provided + * power, but without the CC pins there is no real way to do a + * runtime role detection. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + usb0_vbus-supply = <®_usb_vbus>; + usb0_vbus_det-gpios = <&pio 8 13 GPIO_ACTIVE_HIGH>; /* PI13 */ + status = "okay"; +}; |