diff options
Diffstat (limited to 'arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 67 |
1 files changed, 45 insertions, 22 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index 439497ab967d..657e986e5dba 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -34,6 +34,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x0>; }; @@ -41,6 +42,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x1>; }; @@ -48,6 +50,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x2>; }; @@ -55,12 +58,38 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x3>; }; + + l2_shared: cache { + compatible = "cache"; + cache-level = <2>; + cache-unified; + }; + }; + + firmware { + svc { + compatible = "intel,stratix10-svc"; + method = "smc"; + memory-region = <&service_reserved>; + + fpga_mgr: fpga-mgr { + compatible = "intel,stratix10-soc-fpga-mgr"; + }; + }; + }; + + fpga-region { + compatible = "fpga-region"; + #address-cells = <0x2>; + #size-cells = <0x2>; + fpga-mgr = <&fpga_mgr>; }; pmu { - compatible = "arm,armv8-pmuv3"; + compatible = "arm,cortex-a53-pmu"; interrupts = <0 170 4>, <0 171 4>, <0 172 4>, @@ -101,16 +130,19 @@ cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk { #clock-cells = <0>; compatible = "fixed-clock"; + clock-frequency = <150000000>; }; cb_intosc_ls_clk: cb-intosc-ls-clk { #clock-cells = <0>; compatible = "fixed-clock"; + clock-frequency = <300000000>; }; f2s_free_clk: f2s-free-clk { #clock-cells = <0>; compatible = "fixed-clock"; + status = "disabled"; }; osc1: osc1 { @@ -125,7 +157,7 @@ }; }; - soc { + soc@0 { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; @@ -133,13 +165,6 @@ interrupt-parent = <&intc>; ranges = <0 0 0 0xffffffff>; - base_fpga_region { - #address-cells = <0x2>; - #size-cells = <0x2>; - compatible = "fpga-region"; - fpga-mgr = <&fpga_mgr>; - }; - clkmgr: clock-controller@ffd10000 { compatible = "intel,stratix10-clkmgr"; reg = <0xffd10000 0x1000>; @@ -373,7 +398,7 @@ rst: rstmgr@ffd11000 { #reset-cells = <1>; - compatible = "altr,stratix10-rst-mgr"; + compatible = "altr,stratix10-rst-mgr", "altr,rst-mgr"; reg = <0xffd11000 0x1000>; }; @@ -510,6 +535,7 @@ resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>; reset-names = "dwc2", "dwc2-ecc"; clocks = <&clkmgr STRATIX10_USB_CLK>; + clock-names = "otg"; iommus = <&smmu 7>; status = "disabled"; }; @@ -604,6 +630,15 @@ interrupts = <5 4>; }; + sdmmca-ecc@ff8c8c00 { + compatible = "altr,socfpga-s10-sdmmc-ecc", + "altr,socfpga-sdmmc-ecc"; + reg = <0xff8c8c00 0x100>; + altr,ecc-parent = <&mmc>; + interrupts = <14 4>, + <15 4>; + }; + }; qspi: spi@ff8d2000 { @@ -620,18 +655,6 @@ status = "disabled"; }; - - firmware { - svc { - compatible = "intel,stratix10-svc"; - method = "smc"; - memory-region = <&service_reserved>; - - fpga_mgr: fpga-mgr { - compatible = "intel,stratix10-soc-fpga-mgr"; - }; - }; - }; }; usbphy0: usbphy0 { |