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Diffstat (limited to 'arch/arm64/boot/dts/amazon/alpine-v3.dtsi')
-rw-r--r--arch/arm64/boot/dts/amazon/alpine-v3.dtsi14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
index 39481d7fd7d4..bd35e0e9d0ab 100644
--- a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
+++ b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
@@ -244,7 +244,7 @@
next-level-cache = <&cluster3_l2>;
};
- cluster0_l2: cache@0 {
+ cluster0_l2: cache-0 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
@@ -253,7 +253,7 @@
cache-unified;
};
- cluster1_l2: cache@100 {
+ cluster1_l2: cache-100 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
@@ -262,7 +262,7 @@
cache-unified;
};
- cluster2_l2: cache@200 {
+ cluster2_l2: cache-200 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
@@ -271,7 +271,7 @@
cache-unified;
};
- cluster3_l2: cache@300 {
+ cluster3_l2: cache-300 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
@@ -318,8 +318,9 @@
#size-cells = <2>;
ranges;
- gic: interrupt-controller@f0000000 {
+ gic: interrupt-controller@f0800000 {
compatible = "arm,gic-v3";
+ #address-cells = <0>;
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0xf0800000 0 0x10000>, /* GICD */
@@ -355,14 +356,13 @@
msix: msix@fbe00000 {
compatible = "al,alpine-msix";
reg = <0x0 0xfbe00000 0x0 0x100000>;
- interrupt-controller;
msi-controller;
al,msi-base-spi = <336>;
al,msi-num-spis = <959>;
interrupt-parent = <&gic>;
};
- io-fabric {
+ io-bus@fc000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;