diff options
Diffstat (limited to 'arch/arm64/boot/dts/apm/apm-shadowcat.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 63 |
1 files changed, 30 insertions, 33 deletions
diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi index a8526f8157ec..5bbedb0a7107 100644 --- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi +++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi @@ -22,7 +22,6 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_0>; - #clock-cells = <1>; clocks = <&pmd0clk 0>; }; cpu@1 { @@ -32,7 +31,6 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_0>; - #clock-cells = <1>; clocks = <&pmd0clk 0>; }; cpu@100 { @@ -42,7 +40,6 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_1>; - #clock-cells = <1>; clocks = <&pmd1clk 0>; }; cpu@101 { @@ -52,7 +49,6 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_1>; - #clock-cells = <1>; clocks = <&pmd1clk 0>; }; cpu@200 { @@ -62,7 +58,6 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_2>; - #clock-cells = <1>; clocks = <&pmd2clk 0>; }; cpu@201 { @@ -72,7 +67,6 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_2>; - #clock-cells = <1>; clocks = <&pmd2clk 0>; }; cpu@300 { @@ -82,7 +76,6 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_3>; - #clock-cells = <1>; clocks = <&pmd3clk 0>; }; cpu@301 { @@ -92,20 +85,27 @@ enable-method = "spin-table"; cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_3>; - #clock-cells = <1>; clocks = <&pmd3clk 0>; }; xgene_L2_0: l2-cache-0 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; xgene_L2_1: l2-cache-1 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; xgene_L2_2: l2-cache-2 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; xgene_L2_3: l2-cache-3 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; }; @@ -203,6 +203,13 @@ }; }; + refclk: clock-100000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "refclk"; + }; + pmu { compatible = "arm,armv8-pmuv3"; interrupts = <1 12 0xff04>; @@ -217,6 +224,16 @@ clock-frequency = <50000000>; }; + i2cslimpro { + compatible = "apm,xgene-slimpro-i2c"; + mboxes = <&mailbox 0>; + }; + + hwmonslimpro { + compatible = "apm,xgene-slimpro-hwmon"; + mboxes = <&mailbox 7>; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -228,17 +245,10 @@ #size-cells = <2>; ranges; - refclk: refclk { - compatible = "fixed-clock"; - #clock-cells = <1>; - clock-frequency = <100000000>; - clock-output-names = "refclk"; - }; - pmdpll: pmdpll@170000f0 { compatible = "apm,xgene-pcppll-v2-clock"; #clock-cells = <1>; - clocks = <&refclk 0>; + clocks = <&refclk>; reg = <0x0 0x170000f0 0x0 0x10>; clock-output-names = "pmdpll"; }; @@ -278,7 +288,7 @@ socpll: socpll@17000120 { compatible = "apm,xgene-socpll-v2-clock"; #clock-cells = <1>; - clocks = <&refclk 0>; + clocks = <&refclk>; reg = <0x0 0x17000120 0x0 0x1000>; clock-output-names = "socpll"; }; @@ -577,18 +587,7 @@ 0x0 0x7 0x4>; }; - i2cslimpro { - compatible = "apm,xgene-slimpro-i2c"; - mboxes = <&mailbox 0>; - }; - - hwmonslimpro { - compatible = "apm,xgene-slimpro-hwmon"; - mboxes = <&mailbox 7>; - }; - serial0: serial@10600000 { - device_type = "serial"; compatible = "ns16550"; reg = <0 0x10600000 0x0 0x1000>; reg-shift = <2>; @@ -610,7 +609,7 @@ pcie0: pcie@1f2b0000 { status = "disabled"; device_type = "pci"; - compatible = "apm,xgene-pcie", "apm,xgene2-pcie"; + compatible = "apm,xgene-pcie"; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; @@ -636,7 +635,7 @@ pcie1: pcie@1f2c0000 { status = "disabled"; device_type = "pci"; - compatible = "apm,xgene-pcie", "apm,xgene2-pcie"; + compatible = "apm,xgene-pcie"; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; @@ -721,7 +720,7 @@ }; }; - sbgpio: gpio@17001000{ + sbgpio: gpio@17001000 { compatible = "apm,xgene-gpio-sb"; reg = <0x0 0x17001000 0x0 0x400>; #gpio-cells = <2>; @@ -802,7 +801,6 @@ interrupts = <0 0x45 0x4>; #clock-cells = <1>; clocks = <&sbapbclk 0>; - bus_num = <1>; }; i2c4: i2c@10640000 { @@ -812,7 +810,6 @@ reg = <0x0 0x10640000 0x0 0x1000>; interrupts = <0 0x3a 0x4>; clocks = <&i2c4clk 0>; - bus_num = <4>; }; }; }; |