diff options
Diffstat (limited to 'arch/arm64/boot/dts/apple/t8103.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/apple/t8103.dtsi | 195 |
1 files changed, 195 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index 9b0dad6b6184..20faf0c0d809 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -11,6 +11,7 @@ #include <dt-bindings/interrupt-controller/apple-aic.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/apple.h> +#include <dt-bindings/spmi/spmi.h> / { compatible = "apple,t8103", "apple,arm-platform"; @@ -326,6 +327,20 @@ clock-output-names = "clkref"; }; + clk_120m: clock-120m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <120000000>; + clock-output-names = "clk_120m"; + }; + + clk_200m: clock-200m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + clock-output-names = "clk_200m"; + }; + /* * This is a fabulated representation of the input clock * to NCO since we don't know the true clock tree. @@ -356,6 +371,67 @@ #performance-domain-cells = <0>; }; + display_dfr: display-pipe@228200000 { + compatible = "apple,t8103-display-pipe", "apple,h7-display-pipe"; + reg = <0x2 0x28200000 0x0 0xc000>, + <0x2 0x28400000 0x0 0x4000>; + reg-names = "be", "fe"; + power-domains = <&ps_dispdfr_fe>, <&ps_dispdfr_be>; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 502 IRQ_TYPE_LEVEL_HIGH>, + <AIC_IRQ 506 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "be", "fe"; + iommus = <&displaydfr_dart 0>; + status = "disabled"; + + port { + dfr_adp_out_mipi: endpoint { + remote-endpoint = <&dfr_mipi_in_adp>; + }; + }; + }; + + displaydfr_dart: iommu@228304000 { + compatible = "apple,t8103-dart"; + reg = <0x2 0x28304000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 504 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + power-domains = <&ps_dispdfr_fe>; + status = "disabled"; + }; + + displaydfr_mipi: dsi@228600000 { + compatible = "apple,t8103-display-pipe-mipi", "apple,h7-display-pipe-mipi"; + reg = <0x2 0x28600000 0x0 0x100000>; + power-domains = <&ps_mipi_dsi>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + dfr_mipi_in: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + dfr_mipi_in_adp: endpoint@0 { + reg = <0>; + remote-endpoint = <&dfr_adp_out_mipi>; + }; + }; + + dfr_mipi_out: port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + sio_dart: iommu@235004000 { compatible = "apple,t8103-dart"; reg = <0x2 0x35004000 0x0 0x4000>; @@ -441,6 +517,48 @@ status = "disabled"; }; + spi0: spi@235100000 { + compatible = "apple,t8103-spi", "apple,spi"; + reg = <0x2 0x35100000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 614 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_200m>; + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + power-domains = <&ps_spi0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi1: spi@235104000 { + compatible = "apple,t8103-spi", "apple,spi"; + reg = <0x2 0x35104000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 615 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_200m>; + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + power-domains = <&ps_spi1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi3: spi@23510c000 { + compatible = "apple,t8103-spi", "apple,spi"; + reg = <0x2 0x3510c000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_120m>; + pinctrl-0 = <&spi3_pins>; + pinctrl-names = "default"; + power-domains = <&ps_spi3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + serial0: serial@235200000 { compatible = "apple,s5l-uart"; reg = <0x2 0x35200000 0x0 0x1000>; @@ -597,6 +715,26 @@ <APPLE_PINMUX(134, 1)>; }; + spi0_pins: spi0-pins { + pinmux = <APPLE_PINMUX(67, 1)>, /* CLK */ + <APPLE_PINMUX(68, 1)>, /* MOSI */ + <APPLE_PINMUX(69, 1)>; /* MISO */ + }; + + spi1_pins: spi1-pins { + pinmux = <APPLE_PINMUX(42, 1)>, + <APPLE_PINMUX(43, 1)>, + <APPLE_PINMUX(44, 1)>, + <APPLE_PINMUX(45, 1)>; + }; + + spi3_pins: spi3-pins { + pinmux = <APPLE_PINMUX(46, 1)>, + <APPLE_PINMUX(47, 1)>, + <APPLE_PINMUX(48, 1)>, + <APPLE_PINMUX(49, 1)>; + }; + pcie_pins: pcie-pins { pinmux = <APPLE_PINMUX(150, 1)>, <APPLE_PINMUX(151, 1)>, @@ -604,6 +742,63 @@ }; }; + nub_spmi: spmi@23d0d9300 { + compatible = "apple,t8103-spmi", "apple,spmi"; + reg = <0x2 0x3d0d9300 0x0 0x100>; + #address-cells = <2>; + #size-cells = <0>; + + pmic1: pmic@f { + compatible = "apple,sera-pmic", "apple,spmi-nvmem"; + reg = <0xf SPMI_USID>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + boot_stage: boot-stage@9f01 { + reg = <0x9f01 0x1>; + }; + + boot_error_count: boot-error-count@9f02 { + reg = <0x9f02 0x1>; + bits = <0 4>; + }; + + panic_count: panic-count@9f02 { + reg = <0x9f02 0x1>; + bits = <4 4>; + }; + + boot_error_stage: boot-error-stage@9f03 { + reg = <0x9f03 0x1>; + }; + + shutdown_flag: shutdown-flag@9f0f { + reg = <0x9f0f 0x1>; + bits = <3 1>; + }; + + fault_shadow: fault-shadow@a67b { + reg = <0xa67b 0x10>; + }; + + socd: socd@ab00 { + reg = <0xab00 0x400>; + }; + + pm_setting: pm-setting@d001 { + reg = <0xd001 0x1>; + }; + + rtc_offset: rtc-offset@d100 { + reg = <0xd100 0x6>; + }; + }; + }; + }; + pinctrl_nub: pinctrl@23d1f0000 { compatible = "apple,t8103-pinctrl", "apple,pinctrl"; reg = <0x2 0x3d1f0000 0x0 0x4000>; |