diff options
Diffstat (limited to 'arch/arm64/boot/dts/exynos/exynos850.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos850.dtsi | 198 |
1 files changed, 172 insertions, 26 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi index c61441f3a89a..cb55015c8dce 100644 --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -93,6 +93,8 @@ compatible = "arm,cortex-a55"; reg = <0x0>; enable-method = "psci"; + clocks = <&cmu_cpucl0 CLK_CLUSTER0_SCLK>; + clock-names = "cluster0_clk"; }; cpu1: cpu@1 { device_type = "cpu"; @@ -117,6 +119,8 @@ compatible = "arm,cortex-a55"; reg = <0x100>; enable-method = "psci"; + clocks = <&cmu_cpucl1 CLK_CLUSTER1_SCLK>; + clock-names = "cluster1_clk"; }; cpu5: cpu@101 { device_type = "cpu"; @@ -184,6 +188,16 @@ clock-names = "fin_pll", "mct"; }; + pdma0: dma-controller@120c0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x120c0000 0x1000>; + clocks = <&cmu_core CLK_GOUT_PDMA_CORE_ACLK>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + interrupts = <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>; + arm,pl330-broken-no-flushp; + }; + gic: interrupt-controller@12a01000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; @@ -200,7 +214,6 @@ pmu_system_controller: system-controller@11860000 { compatible = "samsung,exynos850-pmu", "syscon"; reg = <0x11860000 0x10000>; - clocks = <&cmu_apm CLK_GOUT_PMU_ALIVE_PCLK>; reboot: syscon-reboot { compatible = "syscon-reboot"; @@ -245,6 +258,37 @@ "dout_peri_uart", "dout_peri_ip"; }; + cmu_cpucl1: clock-controller@10800000 { + compatible = "samsung,exynos850-cmu-cpucl1"; + reg = <0x10800000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>, <&cmu_top CLK_DOUT_CPUCL1_SWITCH>, + <&cmu_top CLK_DOUT_CPUCL1_DBG>; + clock-names = "oscclk", "dout_cpucl1_switch", + "dout_cpucl1_dbg"; + }; + + cmu_cpucl0: clock-controller@10900000 { + compatible = "samsung,exynos850-cmu-cpucl0"; + reg = <0x10900000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>, <&cmu_top CLK_DOUT_CPUCL0_SWITCH>, + <&cmu_top CLK_DOUT_CPUCL0_DBG>; + clock-names = "oscclk", "dout_cpucl0_switch", + "dout_cpucl0_dbg"; + }; + + cmu_g3d: clock-controller@11400000 { + compatible = "samsung,exynos850-cmu-g3d"; + reg = <0x11400000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>, <&cmu_top CLK_DOUT_G3D_SWITCH>; + clock-names = "oscclk", "dout_g3d_switch"; + }; + cmu_apm: clock-controller@11800000 { compatible = "samsung,exynos850-cmu-apm"; reg = <0x11800000 0x8000>; @@ -351,7 +395,8 @@ reg = <0x11850000 0x1000>; wakeup-interrupt-controller { - compatible = "samsung,exynos850-wakeup-eint"; + compatible = "samsung,exynos850-wakeup-eint", + "samsung,exynos7-wakeup-eint"; }; }; @@ -360,7 +405,8 @@ reg = <0x11c30000 0x1000>; wakeup-interrupt-controller { - compatible = "samsung,exynos850-wakeup-eint"; + compatible = "samsung,exynos850-wakeup-eint", + "samsung,exynos7-wakeup-eint"; }; }; @@ -370,6 +416,14 @@ interrupts = <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>; }; + trng: rng@12081400 { + compatible = "samsung,exynos850-trng"; + reg = <0x12081400 0x100>; + clocks = <&cmu_core CLK_GOUT_SSS_ACLK>, + <&cmu_core CLK_GOUT_SSS_PCLK>; + clock-names = "secss", "pclk"; + }; + pinctrl_hsi: pinctrl@13430000 { compatible = "samsung,exynos850-pinctrl"; reg = <0x13430000 0x1000>; @@ -388,7 +442,7 @@ }; rtc: rtc@11a30000 { - compatible = "samsung,s3c6410-rtc"; + compatible = "samsung,exynos850-rtc", "samsung,s3c6410-rtc"; reg = <0x11a30000 0x100>; interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; @@ -398,7 +452,8 @@ }; mmc_0: mmc@12100000 { - compatible = "samsung,exynos7-dw-mshc-smu"; + compatible = "samsung,exynos850-dw-mshc-smu", + "samsung,exynos7-dw-mshc-smu"; reg = <0x12100000 0x2000>; interrupts = <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -411,7 +466,7 @@ }; i2c_0: i2c@13830000 { - compatible = "samsung,s3c2440-i2c"; + compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c"; reg = <0x13830000 0x100>; interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -424,7 +479,7 @@ }; i2c_1: i2c@13840000 { - compatible = "samsung,s3c2440-i2c"; + compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c"; reg = <0x13840000 0x100>; interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -437,7 +492,7 @@ }; i2c_2: i2c@13850000 { - compatible = "samsung,s3c2440-i2c"; + compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c"; reg = <0x13850000 0x100>; interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -450,7 +505,7 @@ }; i2c_3: i2c@13860000 { - compatible = "samsung,s3c2440-i2c"; + compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c"; reg = <0x13860000 0x100>; interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -463,7 +518,7 @@ }; i2c_4: i2c@13870000 { - compatible = "samsung,s3c2440-i2c"; + compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c"; reg = <0x13870000 0x100>; interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -477,7 +532,7 @@ /* I2C_5 (also called CAM_PMIC_I2C in TRM) */ i2c_5: i2c@13880000 { - compatible = "samsung,s3c2440-i2c"; + compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c"; reg = <0x13880000 0x100>; interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -491,7 +546,7 @@ /* I2C_6 (also called MOTOR_I2C in TRM) */ i2c_6: i2c@13890000 { - compatible = "samsung,s3c2440-i2c"; + compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c"; reg = <0x13890000 0x100>; interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -549,22 +604,54 @@ }; sysreg_peri: syscon@10020000 { - compatible = "samsung,exynos850-sysreg", "syscon"; + compatible = "samsung,exynos850-peri-sysreg", + "samsung,exynos850-sysreg", "syscon"; reg = <0x10020000 0x10000>; clocks = <&cmu_peri CLK_GOUT_SYSREG_PERI_PCLK>; }; sysreg_cmgp: syscon@11c20000 { - compatible = "samsung,exynos850-sysreg", "syscon"; + compatible = "samsung,exynos850-cmgp-sysreg", + "samsung,exynos850-sysreg", "syscon"; reg = <0x11c20000 0x10000>; clocks = <&cmu_cmgp CLK_GOUT_SYSREG_CMGP_PCLK>; }; + usbdrd: usb@13600000 { + compatible = "samsung,exynos850-dwusb3"; + ranges = <0x0 0x13600000 0x10000>; + clocks = <&cmu_hsi CLK_GOUT_USB_BUS_EARLY_CLK>, + <&cmu_hsi CLK_GOUT_USB_REF_CLK>; + clock-names = "bus_early", "ref"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + + usbdrd_dwc3: usb@0 { + compatible = "snps,dwc3"; + reg = <0x0 0x10000>; + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usbdrd_phy 0>; + phy-names = "usb2-phy"; + }; + }; + + usbdrd_phy: phy@135d0000 { + compatible = "samsung,exynos850-usbdrd-phy"; + reg = <0x135d0000 0x100>; + clocks = <&cmu_hsi CLK_GOUT_USB_PHY_ACLK>, + <&cmu_hsi CLK_GOUT_USB_PHY_REF_CLK>; + clock-names = "phy", "ref"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <1>; + status = "disabled"; + }; + usi_uart: usi@138200c0 { compatible = "samsung,exynos850-usi"; reg = <0x138200c0 0x20>; samsung,sysreg = <&sysreg_peri 0x1010>; - samsung,mode = <USI_V2_UART>; + samsung,mode = <USI_MODE_UART>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -590,7 +677,7 @@ compatible = "samsung,exynos850-usi"; reg = <0x138a00c0 0x20>; samsung,sysreg = <&sysreg_peri 0x1020>; - samsung,mode = <USI_V2_I2C>; + samsung,mode = <USI_MODE_I2C>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -600,7 +687,8 @@ status = "disabled"; hsi2c_0: i2c@138a0000 { - compatible = "samsung,exynosautov9-hsi2c"; + compatible = "samsung,exynos850-hsi2c", + "samsung,exynosautov9-hsi2c"; reg = <0x138a0000 0xc0>; interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -618,7 +706,7 @@ compatible = "samsung,exynos850-usi"; reg = <0x138b00c0 0x20>; samsung,sysreg = <&sysreg_peri 0x1030>; - samsung,mode = <USI_V2_I2C>; + samsung,mode = <USI_MODE_I2C>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -628,7 +716,8 @@ status = "disabled"; hsi2c_1: i2c@138b0000 { - compatible = "samsung,exynosautov9-hsi2c"; + compatible = "samsung,exynos850-hsi2c", + "samsung,exynosautov9-hsi2c"; reg = <0x138b0000 0xc0>; interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -646,7 +735,7 @@ compatible = "samsung,exynos850-usi"; reg = <0x138c00c0 0x20>; samsung,sysreg = <&sysreg_peri 0x1040>; - samsung,mode = <USI_V2_I2C>; + samsung,mode = <USI_MODE_I2C>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -656,7 +745,8 @@ status = "disabled"; hsi2c_2: i2c@138c0000 { - compatible = "samsung,exynosautov9-hsi2c"; + compatible = "samsung,exynos850-hsi2c", + "samsung,exynosautov9-hsi2c"; reg = <0x138c0000 0xc0>; interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -674,7 +764,7 @@ compatible = "samsung,exynos850-usi"; reg = <0x139400c0 0x20>; samsung,sysreg = <&sysreg_peri 0x1050>; - samsung,mode = <USI_V2_SPI>; + samsung,mode = <USI_MODE_SPI>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -682,13 +772,31 @@ <&cmu_peri CLK_GOUT_SPI0_IPCLK>; clock-names = "pclk", "ipclk"; status = "disabled"; + + spi_0: spi@13940000 { + compatible = "samsung,exynos850-spi"; + reg = <0x13940000 0x30>; + clocks = <&cmu_peri CLK_GOUT_SPI0_PCLK>, + <&cmu_peri CLK_GOUT_SPI0_IPCLK>; + clock-names = "spi", "spi_busclk0"; + dmas = <&pdma0 5>, <&pdma0 4>; + dma-names = "tx", "rx"; + interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + num-cs = <1>; + samsung,spi-src-clk = <0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; usi_cmgp0: usi@11d000c0 { compatible = "samsung,exynos850-usi"; reg = <0x11d000c0 0x20>; samsung,sysreg = <&sysreg_cmgp 0x2000>; - samsung,mode = <USI_V2_I2C>; + samsung,mode = <USI_MODE_I2C>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -698,7 +806,8 @@ status = "disabled"; hsi2c_3: i2c@11d00000 { - compatible = "samsung,exynosautov9-hsi2c"; + compatible = "samsung,exynos850-hsi2c", + "samsung,exynosautov9-hsi2c"; reg = <0x11d00000 0xc0>; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -722,13 +831,31 @@ clock-names = "uart", "clk_uart_baud0"; status = "disabled"; }; + + spi_1: spi@11d00000 { + compatible = "samsung,exynos850-spi"; + reg = <0x11d00000 0x30>; + clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI0_PCLK>, + <&cmu_cmgp CLK_GOUT_CMGP_USI0_IPCLK>; + clock-names = "spi", "spi_busclk0"; + dmas = <&pdma0 12>, <&pdma0 13>; + dma-names = "tx", "rx"; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + num-cs = <1>; + samsung,spi-src-clk = <0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; usi_cmgp1: usi@11d200c0 { compatible = "samsung,exynos850-usi"; reg = <0x11d200c0 0x20>; samsung,sysreg = <&sysreg_cmgp 0x2010>; - samsung,mode = <USI_V2_I2C>; + samsung,mode = <USI_MODE_I2C>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -738,7 +865,8 @@ status = "disabled"; hsi2c_4: i2c@11d20000 { - compatible = "samsung,exynosautov9-hsi2c"; + compatible = "samsung,exynos850-hsi2c", + "samsung,exynosautov9-hsi2c"; reg = <0x11d20000 0xc0>; interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -762,6 +890,24 @@ clock-names = "uart", "clk_uart_baud0"; status = "disabled"; }; + + spi_2: spi@11d20000 { + compatible = "samsung,exynos850-spi"; + reg = <0x11d20000 0x30>; + clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI1_PCLK>, + <&cmu_cmgp CLK_GOUT_CMGP_USI1_IPCLK>; + clock-names = "spi", "spi_busclk0"; + dmas = <&pdma0 14>, <&pdma0 15>; + dma-names = "tx", "rx"; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&spi2_pins>; + pinctrl-names = "default"; + num-cs = <1>; + samsung,spi-src-clk = <0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; }; }; |