diff options
Diffstat (limited to 'arch/arm64/boot/dts/exynos/exynosautov920.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 847 |
1 files changed, 833 insertions, 14 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi index c1c8566d74f5..2cb8041c8a9f 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -6,6 +6,7 @@ * */ +#include <dt-bindings/clock/samsung,exynosautov920.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/samsung,exynos-usi.h> @@ -38,17 +39,6 @@ clock-output-names = "oscclk"; }; - /* - * FIXME: Keep the stub clock for serial driver, until proper clock - * driver is implemented. - */ - clock_usi: clock-usi { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; - clock-output-names = "usi"; - }; - cpus: cpus { #address-cells = <2>; #size-cells = <0>; @@ -99,6 +89,13 @@ compatible = "arm,cortex-a78ae"; reg = <0x0 0x0>; enable-method = "psci"; + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2_cache_cl0>; }; cpu1: cpu@100 { @@ -106,6 +103,13 @@ compatible = "arm,cortex-a78ae"; reg = <0x0 0x100>; enable-method = "psci"; + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2_cache_cl0>; }; cpu2: cpu@200 { @@ -113,6 +117,13 @@ compatible = "arm,cortex-a78ae"; reg = <0x0 0x200>; enable-method = "psci"; + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2_cache_cl0>; }; cpu3: cpu@300 { @@ -120,6 +131,13 @@ compatible = "arm,cortex-a78ae"; reg = <0x0 0x300>; enable-method = "psci"; + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2_cache_cl0>; }; cpu4: cpu@10000 { @@ -127,6 +145,13 @@ compatible = "arm,cortex-a78ae"; reg = <0x0 0x10000>; enable-method = "psci"; + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2_cache_cl1>; }; cpu5: cpu@10100 { @@ -134,6 +159,13 @@ compatible = "arm,cortex-a78ae"; reg = <0x0 0x10100>; enable-method = "psci"; + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2_cache_cl1>; }; cpu6: cpu@10200 { @@ -141,6 +173,13 @@ compatible = "arm,cortex-a78ae"; reg = <0x0 0x10200>; enable-method = "psci"; + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2_cache_cl1>; }; cpu7: cpu@10300 { @@ -148,6 +187,13 @@ compatible = "arm,cortex-a78ae"; reg = <0x0 0x10300>; enable-method = "psci"; + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2_cache_cl1>; }; cpu8: cpu@20000 { @@ -155,6 +201,13 @@ compatible = "arm,cortex-a78ae"; reg = <0x0 0x20000>; enable-method = "psci"; + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2_cache_cl2>; }; cpu9: cpu@20100 { @@ -162,6 +215,70 @@ compatible = "arm,cortex-a78ae"; reg = <0x0 0x20100>; enable-method = "psci"; + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&l2_cache_cl2>; + }; + + l2_cache_cl0: l2-cache0 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x40000>; + cache-line-size = <64>; + cache-sets = <512>; + next-level-cache = <&l3_cache_cl0>; + }; + + l2_cache_cl1: l2-cache1 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x40000>; + cache-line-size = <64>; + cache-sets = <512>; + next-level-cache = <&l3_cache_cl1>; + }; + + l2_cache_cl2: l2-cache2 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x40000>; + cache-line-size = <64>; + cache-sets = <512>; + next-level-cache = <&l3_cache_cl2>; + }; + + l3_cache_cl0: l3-cache0 { + compatible = "cache"; + cache-level = <3>; + cache-unified; + cache-size = <0x200000>;/* 2MB L3 cache for cpu cluster-0 */ + cache-line-size = <64>; + cache-sets = <2048>; + }; + + l3_cache_cl1: l3-cache1 { + compatible = "cache"; + cache-level = <3>; + cache-unified; + cache-size = <0x200000>;/* 2MB L3 cache for cpu cluster-1 */ + cache-line-size = <64>; + cache-sets = <2048>; + }; + + l3_cache_cl2: l3-cache2 { + compatible = "cache"; + cache-level = <3>; + cache-unified; + cache-size = <0x100000>;/* 1MB L3 cache for cpu cluster-2 */ + cache-line-size = <64>; + cache-sets = <1365>; }; }; @@ -182,6 +299,37 @@ reg = <0x10000000 0x24>; }; + cmu_misc: clock-controller@10020000 { + compatible = "samsung,exynosautov920-cmu-misc"; + reg = <0x10020000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_MISC_NOC>; + clock-names = "oscclk", + "noc"; + }; + + watchdog_cl0: watchdog@10060000 { + compatible = "samsung,exynosautov920-wdt"; + reg = <0x10060000 0x100>; + interrupts = <GIC_SPI 953 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&xtcxo>, <&xtcxo>; + clock-names = "watchdog", "watchdog_src"; + samsung,syscon-phandle = <&pmu_system_controller>; + samsung,cluster-index = <0>; + }; + + watchdog_cl1: watchdog@10070000 { + compatible = "samsung,exynosautov920-wdt"; + reg = <0x10070000 0x100>; + interrupts = <GIC_SPI 952 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&xtcxo>, <&xtcxo>; + clock-names = "watchdog", "watchdog_src"; + samsung,syscon-phandle = <&pmu_system_controller>; + samsung,cluster-index = <1>; + }; + gic: interrupt-controller@10400000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; @@ -192,6 +340,82 @@ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; }; + spdma0: dma-controller@10180000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x10180000 0x1000>; + interrupts = <GIC_SPI 918 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_misc CLK_MOUT_MISC_NOC_USER>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; + + spdma1: dma-controller@10190000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x10190000 0x1000>; + interrupts = <GIC_SPI 917 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_misc CLK_MOUT_MISC_NOC_USER>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; + + pdma0: dma-controller@101a0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x101a0000 0x1000>; + interrupts = <GIC_SPI 916 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_misc CLK_MOUT_MISC_NOC_USER>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; + + pdma1: dma-controller@101b0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x101b0000 0x1000>; + interrupts = <GIC_SPI 915 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_misc CLK_MOUT_MISC_NOC_USER>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; + + pdma2: dma-controller@101c0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x101c0000 0x1000>; + interrupts = <GIC_SPI 914 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_misc CLK_MOUT_MISC_NOC_USER>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; + + pdma3: dma-controller@101d0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x101d0000 0x1000>; + interrupts = <GIC_SPI 913 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_misc CLK_MOUT_MISC_NOC_USER>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; + + pdma4: dma-controller@101e0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x101e0000 0x1000>; + interrupts = <GIC_SPI 912 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_misc CLK_MOUT_MISC_NOC_USER>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; + + cmu_peric0: clock-controller@10800000 { + compatible = "samsung,exynosautov920-cmu-peric0"; + reg = <0x10800000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_PERIC0_NOC>, + <&cmu_top DOUT_CLKCMU_PERIC0_IP>; + clock-names = "oscclk", + "noc", + "ip"; + }; + syscon_peric0: syscon@10820000 { compatible = "samsung,exynosautov920-peric0-sysreg", "syscon"; @@ -209,11 +433,12 @@ "samsung,exynos850-usi"; reg = <0x108800c0 0x20>; samsung,sysreg = <&syscon_peric0 0x1000>; - samsung,mode = <USI_V2_UART>; + samsung,mode = <USI_MODE_UART>; #address-cells = <1>; #size-cells = <1>; ranges; - clocks = <&clock_usi>, <&clock_usi>; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>; clock-names = "pclk", "ipclk"; status = "disabled"; @@ -224,13 +449,246 @@ interrupts = <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&uart0_bus>; - clocks = <&clock_usi>, <&clock_usi>; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <256>; + status = "disabled"; + }; + }; + + usi_1: usi@108a00c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x108a00c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1008>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_1: serial@108a0000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x108a0000 0xc0>; + interrupts = <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_bus>; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <256>; status = "disabled"; }; }; + usi_2: usi@108c00c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x108c00c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1010>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_2: serial@108c0000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x108c0000 0xc0>; + interrupts = <GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_bus>; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_3: usi@108e00c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x108e00c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1018>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_3: serial@108e0000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x108e0000 0xc0>; + interrupts = <GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart3_bus>; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_4: usi@109000c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x109000c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1020>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_4: serial@10900000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10900000 0xc0>; + interrupts = <GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_bus>; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_5: usi@109200c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x109200c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1028>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_5: serial@10920000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10920000 0xc0>; + interrupts = <GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart5_bus>; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_6: usi@109400c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x109400c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1030>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI06_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_6: serial@10940000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10940000 0xc0>; + interrupts = <GIC_SPI 776 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart6_bus>; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI06_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_7: usi@109600c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x109600c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1038>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI07_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_7: serial@10960000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10960000 0xc0>; + interrupts = <GIC_SPI 778 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart7_bus>; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI07_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_8: usi@109800c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x109800c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1040>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI08_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_8: serial@10980000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10980000 0xc0>; + interrupts = <GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart8_bus>; + clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI08_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + pwm: pwm@109b0000 { compatible = "samsung,exynosautov920-pwm", "samsung,exynos4210-pwm"; @@ -242,6 +700,19 @@ status = "disabled"; }; + cmu_peric1: clock-controller@10c00000 { + compatible = "samsung,exynosautov920-cmu-peric1"; + reg = <0x10c00000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_PERIC1_NOC>, + <&cmu_top DOUT_CLKCMU_PERIC1_IP>; + clock-names = "oscclk", + "noc", + "ip"; + }; + syscon_peric1: syscon@10c20000 { compatible = "samsung,exynosautov920-peric1-sysreg", "syscon"; @@ -254,6 +725,276 @@ interrupts = <GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH>; }; + usi_9: usi@10c800c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x10c800c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1000>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_9: serial@10c8000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10c80000 0xc0>; + interrupts = <GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart9_bus>; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <256>; + status = "disabled"; + }; + }; + + usi_10: usi@10ca00c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x10ca00c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1008>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_10: serial@10ca0000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10ca0000 0xc0>; + interrupts = <GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart10_bus>; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_11: usi@10cc00c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x10cc00c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1010>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_11: serial@10cc0000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10cc0000 0xc0>; + interrupts = <GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart11_bus>; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_12: usi@10ce00c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x10ce00c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1018>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI12_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_12: serial@10ce0000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10ce0000 0xc0>; + interrupts = <GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart12_bus>; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI12_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_13: usi@10d000c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x10d000c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1020>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI13_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_13: serial@10d00000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10d00000 0xc0>; + interrupts = <GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart13_bus>; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI13_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_14: usi@10d200c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x10d200c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1028>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI14_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_14: serial@10d20000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10d20000 0xc0>; + interrupts = <GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart14_bus>; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI14_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_15: usi@10d400c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x10d400c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1030>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI15_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_15: serial@10d40000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10d40000 0xc0>; + interrupts = <GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart15_bus>; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI15_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_16: usi@10d600c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x10d600c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1038>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI16_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_16: serial@10d60000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10d60000 0xc0>; + interrupts = <GIC_SPI 801 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart16_bus>; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI16_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + usi_17: usi@10d800c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x10d800c0 0x20>; + samsung,sysreg = <&syscon_peric1 0x1040>; + samsung,mode = <USI_V2_UART>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI17_USI>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_17: serial@10d80000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10d80000 0xc0>; + interrupts = <GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart17_bus>; + clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI17_USI>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; + status = "disabled"; + }; + }; + + cmu_top: clock-controller@11000000 { + compatible = "samsung,exynosautov920-cmu-top"; + reg = <0x11000000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>; + clock-names = "oscclk"; + }; + pinctrl_alive: pinctrl@11850000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x11850000 0x10000>; @@ -269,12 +1010,38 @@ reg = <0x11860000 0x10000>; }; + cmu_hsi0: clock-controller@16000000 { + compatible = "samsung,exynosautov920-cmu-hsi0"; + reg = <0x16000000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_HSI0_NOC>; + clock-names = "oscclk", + "noc"; + }; + pinctrl_hsi0: pinctrl@16040000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x16040000 0x10000>; interrupts = <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>; }; + cmu_hsi1: clock-controller@16400000 { + compatible = "samsung,exynosautov920-cmu-hsi1"; + reg = <0x16400000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_HSI1_NOC>, + <&cmu_top DOUT_CLKCMU_HSI1_USBDRD>, + <&cmu_top DOUT_CLKCMU_HSI1_MMC_CARD>; + clock-names = "oscclk", + "noc", + "usbdrd", + "mmc_card"; + }; + pinctrl_hsi1: pinctrl@16450000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x16450000 0x10000>; @@ -293,10 +1060,62 @@ interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; }; + ufs_0_phy: phy@16e04000 { + compatible = "samsung,exynosautov920-ufs-phy"; + reg = <0x16e04000 0x4000>; + reg-names = "phy-pma"; + clocks = <&xtcxo>; + clock-names = "ref_clk"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + status = "disabled"; + }; + pinctrl_aud: pinctrl@1a460000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x1a460000 0x10000>; }; + + cmu_cpucl0: clock-controller@1ec00000 { + compatible = "samsung,exynosautov920-cmu-cpucl0"; + reg = <0x1ec00000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_CPUCL0_SWITCH>, + <&cmu_top DOUT_CLKCMU_CPUCL0_CLUSTER>, + <&cmu_top DOUT_CLKCMU_CPUCL0_DBG>; + clock-names = "oscclk", + "switch", + "cluster", + "dbg"; + }; + + cmu_cpucl1: clock-controller@1ed00000 { + compatible = "samsung,exynosautov920-cmu-cpucl1"; + reg = <0x1ed00000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_CPUCL1_SWITCH>, + <&cmu_top DOUT_CLKCMU_CPUCL1_CLUSTER>; + clock-names = "oscclk", + "switch", + "cluster"; + }; + + cmu_cpucl2: clock-controller@1ee00000 { + compatible = "samsung,exynosautov920-cmu-cpucl2"; + reg = <0x1ee00000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_CPUCL2_SWITCH>, + <&cmu_top DOUT_CLKCMU_CPUCL2_CLUSTER>; + clock-names = "oscclk", + "switch", + "cluster"; + }; }; timer { |