summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/exynos/google
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm64/boot/dts/exynos/google')
-rw-r--r--arch/arm64/boot/dts/exynos/google/Makefile1
-rw-r--r--arch/arm64/boot/dts/exynos/google/gs101-oriole.dts116
-rw-r--r--arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi294
-rw-r--r--arch/arm64/boot/dts/exynos/google/gs101-raven.dts29
-rw-r--r--arch/arm64/boot/dts/exynos/google/gs101.dtsi1019
5 files changed, 1320 insertions, 139 deletions
diff --git a/arch/arm64/boot/dts/exynos/google/Makefile b/arch/arm64/boot/dts/exynos/google/Makefile
index 0a6d5e1fe4ee..7385f82b03c9 100644
--- a/arch/arm64/boot/dts/exynos/google/Makefile
+++ b/arch/arm64/boot/dts/exynos/google/Makefile
@@ -2,3 +2,4 @@
dtb-$(CONFIG_ARCH_EXYNOS) += \
gs101-oriole.dtb \
+ gs101-raven.dtb
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
index 6ccade2c8cb4..8df42bedbc03 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
+++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
@@ -8,122 +8,22 @@
/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include "gs101-pinctrl.h"
-#include "gs101.dtsi"
+#include "gs101-pixel-common.dtsi"
/ {
model = "Oriole";
compatible = "google,gs101-oriole", "google,gs101";
-
- aliases {
- serial0 = &serial_0;
- };
-
- chosen {
- /* Bootloader expects bootargs specified otherwise it crashes */
- bootargs = "";
- stdout-path = &serial_0;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&key_voldown>, <&key_volup>, <&key_power>;
-
- button-vol-down {
- label = "KEY_VOLUMEDOWN";
- linux,code = <KEY_VOLUMEDOWN>;
- gpios = <&gpa7 3 GPIO_ACTIVE_LOW>;
- wakeup-source;
- };
-
- button-vol-up {
- label = "KEY_VOLUMEUP";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&gpa8 1 GPIO_ACTIVE_LOW>;
- wakeup-source;
- };
-
- button-power {
- label = "KEY_POWER";
- linux,code = <KEY_POWER>;
- gpios = <&gpa10 1 GPIO_ACTIVE_LOW>;
- wakeup-source;
- };
- };
-};
-
-&ext_24_5m {
- clock-frequency = <24576000>;
-};
-
-&ext_200m {
- clock-frequency = <200000000>;
-};
-
-&hsi2c_8 {
- status = "okay";
-
- eeprom: eeprom@50 {
- compatible = "atmel,24c08";
- reg = <0x50>;
- };
-};
-
-&hsi2c_12 {
- status = "okay";
- /* TODO: add the devices once drivers exist */
-};
-
-&pinctrl_far_alive {
- key_voldown: key-voldown-pins {
- samsung,pins = "gpa7-3";
- samsung,pin-function = <GS101_PIN_FUNC_EINT>;
- samsung,pin-pud = <GS101_PIN_PULL_NONE>;
- samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
- };
-
- key_volup: key-volup-pins {
- samsung,pins = "gpa8-1";
- samsung,pin-function = <GS101_PIN_FUNC_EINT>;
- samsung,pin-pud = <GS101_PIN_PULL_NONE>;
- samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
- };
-};
-
-&pinctrl_gpio_alive {
- key_power: key-power-pins {
- samsung,pins = "gpa10-1";
- samsung,pin-function = <GS101_PIN_FUNC_EINT>;
- samsung,pin-pud = <GS101_PIN_PULL_NONE>;
- samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
- };
-};
-
-&serial_0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_bus>;
- status = "okay";
-};
-
-&usi_uart {
- samsung,clkreq-on; /* needed for UART mode */
- status = "okay";
-};
-
-&usi8 {
- samsung,mode = <USI_V2_I2C>;
- status = "okay";
};
-&usi12 {
- samsung,mode = <USI_V2_I2C>;
+&cont_splash_mem {
+ reg = <0x0 0xfac00000 (1080 * 2400 * 4)>;
status = "okay";
};
-&watchdog_cl0 {
- timeout-sec = <30>;
+&framebuffer0 {
+ width = <1080>;
+ height = <2400>;
+ stride = <(1080 * 4)>;
+ format = "a8r8g8b8";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
new file mode 100644
index 000000000000..d6ddcc13f7b2
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
@@ -0,0 +1,294 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Device Tree nodes common for all GS101-based Pixel
+ *
+ * Copyright 2021-2023 Google LLC
+ * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/usb/pd.h>
+#include "gs101-pinctrl.h"
+#include "gs101.dtsi"
+
+/ {
+ aliases {
+ serial0 = &serial_0;
+ };
+
+ chosen {
+ /* Bootloader expects bootargs specified otherwise it crashes */
+ bootargs = "";
+ stdout-path = &serial_0;
+
+ /* Use display framebuffer as setup by bootloader */
+ framebuffer0: framebuffer-0 {
+ compatible = "simple-framebuffer";
+ memory-region = <&cont_splash_mem>;
+ /* format properties to be added by actual board */
+ status = "disabled";
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&key_voldown>, <&key_volup>, <&key_power>;
+ pinctrl-names = "default";
+
+ button-vol-down {
+ label = "KEY_VOLUMEDOWN";
+ linux,code = <KEY_VOLUMEDOWN>;
+ gpios = <&gpa7 3 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ };
+
+ button-vol-up {
+ label = "KEY_VOLUMEUP";
+ linux,code = <KEY_VOLUMEUP>;
+ gpios = <&gpa8 1 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ };
+
+ button-power {
+ label = "KEY_POWER";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpa10 1 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ };
+ };
+
+ /* TODO: Remove this once PMIC is implemented */
+ reg_placeholder: regulator-0 {
+ compatible = "regulator-fixed";
+ regulator-name = "placeholder_reg";
+ };
+
+ /* TODO: Remove this once S2MPG11 slave PMIC is implemented */
+ ufs_0_fixed_vcc_reg: regulator-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "ufs-vcc";
+ gpio = <&gpp0 1 GPIO_ACTIVE_HIGH>;
+ regulator-boot-on;
+ enable-active-high;
+ };
+
+ reserved-memory {
+ cont_splash_mem: splash@fac00000 {
+ /* size to be updated by actual board */
+ reg = <0x0 0xfac00000 0x0>;
+ no-map;
+ status = "disabled";
+ };
+ };
+};
+
+&ext_24_5m {
+ clock-frequency = <24576000>;
+};
+
+&ext_200m {
+ clock-frequency = <200000000>;
+};
+
+&hsi2c_8 {
+ status = "okay";
+
+ eeprom: eeprom@50 {
+ compatible = "atmel,24c08";
+ reg = <0x50>;
+ };
+};
+
+&hsi2c_12 {
+ status = "okay";
+ /* TODO: add the devices once drivers exist */
+
+ usb-typec@25 {
+ compatible = "maxim,max77759-tcpci", "maxim,max33359";
+ reg = <0x25>;
+ interrupts-extended = <&gpa8 2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&typec_int>;
+ pinctrl-names = "default";
+
+ connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ data-role = "dual";
+ power-role = "dual";
+ self-powered;
+ try-power-role = "sink";
+ op-sink-microwatt = <2600000>;
+ slow-charger-loop;
+ /*
+ * max77759 operating in reverse boost mode (0xA) can
+ * source up to 1.5A while extboost can only do ~1A.
+ * Since extboost is the primary path, advertise 900mA.
+ */
+ source-pdos = <PDO_FIXED(5000, 900,
+ (PDO_FIXED_SUSPEND
+ | PDO_FIXED_USB_COMM
+ | PDO_FIXED_DATA_SWAP
+ | PDO_FIXED_DUAL_ROLE))>;
+ sink-pdos = <PDO_FIXED(5000, 3000,
+ (PDO_FIXED_DATA_SWAP
+ | PDO_FIXED_USB_COMM
+ | PDO_FIXED_HIGHER_CAP
+ | PDO_FIXED_DUAL_ROLE))
+ PDO_FIXED(9000, 2200, 0)
+ PDO_PPS_APDO(5000, 11000, 3000)>;
+ sink-vdos = <VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,
+ IDH_PTYPE_DFP_HOST, 2, 0x18d1)
+ VDO_CERT(0x0)
+ VDO_PRODUCT(0x4ee1, 0x0)
+ VDO_UFP(UFP_VDO_VER1_2,
+ (DEV_USB2_CAPABLE
+ | DEV_USB3_CAPABLE),
+ UFP_RECEPTACLE, 0,
+ AMA_VCONN_NOT_REQ, 0,
+ UFP_ALTMODE_NOT_SUPP,
+ UFP_USB32_GEN1)
+ /* padding */ 0
+ VDO_DFP(DFP_VDO_VER1_1,
+ (HOST_USB2_CAPABLE
+ | HOST_USB3_CAPABLE),
+ DFP_RECEPTACLE, 0)>;
+ sink-vdos-v1 = <VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,
+ 0, 0, 0x18d1)
+ VDO_CERT(0x0)
+ VDO_PRODUCT(0x4ee1, 0x0)>;
+ /*
+ * Until bootloader is updated to set those two when
+ * console is enabled, we disable PD here.
+ */
+ pd-disable;
+ typec-power-opmode = "default";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usbc0_orien_sw: endpoint {
+ remote-endpoint = <&usbdrd31_phy_orien_switch>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usbc0_role_sw: endpoint {
+ remote-endpoint = <&usbdrd31_dwc3_role_switch>;
+ };
+ };
+ };
+ };
+ };
+};
+
+&pinctrl_far_alive {
+ key_voldown: key-voldown-pins {
+ samsung,pins = "gpa7-3";
+ samsung,pin-function = <GS101_PIN_FUNC_EINT>;
+ samsung,pin-pud = <GS101_PIN_PULL_NONE>;
+ samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
+ };
+
+ key_volup: key-volup-pins {
+ samsung,pins = "gpa8-1";
+ samsung,pin-function = <GS101_PIN_FUNC_EINT>;
+ samsung,pin-pud = <GS101_PIN_PULL_NONE>;
+ samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
+ };
+
+ typec_int: typec-int-pins {
+ samsung,pins = "gpa8-2";
+ samsung,pin-function = <GS101_PIN_FUNC_EINT>;
+ samsung,pin-pud = <GS101_PIN_PULL_UP>;
+ samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
+ };
+};
+
+&pinctrl_gpio_alive {
+ key_power: key-power-pins {
+ samsung,pins = "gpa10-1";
+ samsung,pin-function = <GS101_PIN_FUNC_EINT>;
+ samsung,pin-pud = <GS101_PIN_PULL_NONE>;
+ samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
+ };
+};
+
+&serial_0 {
+ status = "okay";
+};
+
+&ufs_0 {
+ status = "okay";
+ vcc-supply = <&ufs_0_fixed_vcc_reg>;
+};
+
+&ufs_0_phy {
+ status = "okay";
+};
+
+&usbdrd31 {
+ vdd10-supply = <&reg_placeholder>;
+ vdd33-supply = <&reg_placeholder>;
+ status = "okay";
+};
+
+&usbdrd31_dwc3 {
+ dr_mode = "otg";
+ usb-role-switch;
+ role-switch-default-mode = "peripheral";
+ maximum-speed = "super-speed-plus";
+ status = "okay";
+
+ port {
+ usbdrd31_dwc3_role_switch: endpoint {
+ remote-endpoint = <&usbc0_role_sw>;
+ };
+ };
+};
+
+&usbdrd31_phy {
+ orientation-switch;
+ /* TODO: Update these once PMIC is implemented */
+ pll-supply = <&reg_placeholder>;
+ dvdd-usb20-supply = <&reg_placeholder>;
+ vddh-usb20-supply = <&reg_placeholder>;
+ vdd33-usb20-supply = <&reg_placeholder>;
+ vdda-usbdp-supply = <&reg_placeholder>;
+ vddh-usbdp-supply = <&reg_placeholder>;
+ status = "okay";
+
+ port {
+ usbdrd31_phy_orien_switch: endpoint {
+ remote-endpoint = <&usbc0_orien_sw>;
+ };
+ };
+};
+
+&usi_uart {
+ samsung,clkreq-on; /* needed for UART mode */
+ status = "okay";
+};
+
+&usi8 {
+ samsung,mode = <USI_MODE_I2C>;
+ status = "okay";
+};
+
+&usi12 {
+ samsung,mode = <USI_MODE_I2C>;
+ status = "okay";
+};
+
+&watchdog_cl0 {
+ timeout-sec = <30>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-raven.dts b/arch/arm64/boot/dts/exynos/google/gs101-raven.dts
new file mode 100644
index 000000000000..1e7e6b34b864
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/google/gs101-raven.dts
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Raven Device Tree
+ *
+ * Copyright 2021-2023 Google LLC
+ * Copyright 2023-2025 Linaro Ltd
+ */
+
+/dts-v1/;
+
+#include "gs101-pixel-common.dtsi"
+
+/ {
+ model = "Raven";
+ compatible = "google,gs101-raven", "google,gs101";
+};
+
+&cont_splash_mem {
+ reg = <0x0 0xfac00000 (1440 * 3120 * 4)>;
+ status = "okay";
+};
+
+&framebuffer0 {
+ width = <1440>;
+ height = <3120>;
+ stride = <(1440 * 4)>;
+ format = "a8r8g8b8";
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 55e6bcb3689e..48c691fd0a3a 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -73,7 +73,7 @@
compatible = "arm,cortex-a55";
reg = <0x0000>;
enable-method = "psci";
- cpu-idle-states = <&ANANKE_CPU_SLEEP>;
+ cpu-idle-states = <&ananke_cpu_sleep>;
capacity-dmips-mhz = <250>;
dynamic-power-coefficient = <70>;
};
@@ -83,7 +83,7 @@
compatible = "arm,cortex-a55";
reg = <0x0100>;
enable-method = "psci";
- cpu-idle-states = <&ANANKE_CPU_SLEEP>;
+ cpu-idle-states = <&ananke_cpu_sleep>;
capacity-dmips-mhz = <250>;
dynamic-power-coefficient = <70>;
};
@@ -93,7 +93,7 @@
compatible = "arm,cortex-a55";
reg = <0x0200>;
enable-method = "psci";
- cpu-idle-states = <&ANANKE_CPU_SLEEP>;
+ cpu-idle-states = <&ananke_cpu_sleep>;
capacity-dmips-mhz = <250>;
dynamic-power-coefficient = <70>;
};
@@ -103,7 +103,7 @@
compatible = "arm,cortex-a55";
reg = <0x0300>;
enable-method = "psci";
- cpu-idle-states = <&ANANKE_CPU_SLEEP>;
+ cpu-idle-states = <&ananke_cpu_sleep>;
capacity-dmips-mhz = <250>;
dynamic-power-coefficient = <70>;
};
@@ -113,7 +113,7 @@
compatible = "arm,cortex-a76";
reg = <0x0400>;
enable-method = "psci";
- cpu-idle-states = <&ENYO_CPU_SLEEP>;
+ cpu-idle-states = <&enyo_cpu_sleep>;
capacity-dmips-mhz = <620>;
dynamic-power-coefficient = <284>;
};
@@ -123,7 +123,7 @@
compatible = "arm,cortex-a76";
reg = <0x0500>;
enable-method = "psci";
- cpu-idle-states = <&ENYO_CPU_SLEEP>;
+ cpu-idle-states = <&enyo_cpu_sleep>;
capacity-dmips-mhz = <620>;
dynamic-power-coefficient = <284>;
};
@@ -133,7 +133,7 @@
compatible = "arm,cortex-x1";
reg = <0x0600>;
enable-method = "psci";
- cpu-idle-states = <&HERA_CPU_SLEEP>;
+ cpu-idle-states = <&hera_cpu_sleep>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <650>;
};
@@ -143,7 +143,7 @@
compatible = "arm,cortex-x1";
reg = <0x0700>;
enable-method = "psci";
- cpu-idle-states = <&HERA_CPU_SLEEP>;
+ cpu-idle-states = <&hera_cpu_sleep>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <650>;
};
@@ -151,7 +151,7 @@
idle-states {
entry-method = "psci";
- ANANKE_CPU_SLEEP: cpu-ananke-sleep {
+ ananke_cpu_sleep: cpu-ananke-sleep {
idle-state-name = "c2";
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
@@ -160,7 +160,7 @@
min-residency-us = <2000>;
};
- ENYO_CPU_SLEEP: cpu-enyo-sleep {
+ enyo_cpu_sleep: cpu-enyo-sleep {
idle-state-name = "c2";
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
@@ -169,7 +169,7 @@
min-residency-us = <2500>;
};
- HERA_CPU_SLEEP: cpu-hera-sleep {
+ hera_cpu_sleep: cpu-hera-sleep {
idle-state-name = "c2";
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
@@ -196,6 +196,14 @@
clock-output-names = "ext-200m";
};
+ firmware {
+ acpm_ipc: power-management {
+ compatible = "google,gs101-acpm-ipc";
+ mboxes = <&ap2apm_mailbox>;
+ shmem = <&apm_sram>;
+ };
+ };
+
pmu-0 {
compatible = "arm,cortex-a55-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster0>;
@@ -213,9 +221,9 @@
pmu-3 {
compatible = "arm,dsu-pmu";
- interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH 0>;
cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
<&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
+ interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH 0>;
};
psci {
@@ -288,6 +296,8 @@
compatible = "google,gs101-mct",
"samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
+ clocks = <&ext_24_5m>, <&cmu_misc CLK_GOUT_MISC_MCT_PCLK>;
+ clock-names = "fin_pll", "mct";
interrupts = <GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 754 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 755 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -300,17 +310,15 @@
<GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 763 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&ext_24_5m>, <&cmu_misc CLK_GOUT_MISC_MCT_PCLK>;
- clock-names = "fin_pll", "mct";
};
watchdog_cl0: watchdog@10060000 {
compatible = "google,gs101-wdt";
reg = <0x10060000 0x100>;
- interrupts = <GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cmu_misc CLK_GOUT_MISC_WDT_CLUSTER0_PCLK>,
<&ext_24_5m>;
clock-names = "watchdog", "watchdog_src";
+ interrupts = <GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH 0>;
samsung,syscon-phandle = <&pmu_system_controller>;
samsung,cluster-index = <0>;
status = "disabled";
@@ -319,10 +327,10 @@
watchdog_cl1: watchdog@10070000 {
compatible = "google,gs101-wdt";
reg = <0x10070000 0x100>;
- interrupts = <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cmu_misc CLK_GOUT_MISC_WDT_CLUSTER1_PCLK>,
<&ext_24_5m>;
clock-names = "watchdog", "watchdog_src";
+ interrupts = <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH 0>;
samsung,syscon-phandle = <&pmu_system_controller>;
samsung,cluster-index = <1>;
status = "disabled";
@@ -370,12 +378,398 @@
pinctrl_peric0: pinctrl@10840000 {
compatible = "google,gs101-pinctrl";
reg = <0x10840000 0x00001000>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_GPIO_PERIC0_PCLK>;
+ clock-names = "pclk";
interrupts = <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH 0>;
};
+ usi1: usi@109000c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109000c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1000>;
+ status = "disabled";
+
+ hsi2c_1: i2c@10900000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10900000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c1_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_1: serial@10900000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10900000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart1_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_1: spi@10900000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10900000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi1_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi2: usi@109100c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109100c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1004>;
+ status = "disabled";
+
+ hsi2c_2: i2c@10910000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10910000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c2_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_2: serial@10910000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10910000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart2_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_2: spi@10910000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10910000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi2_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi3: usi@109200c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109200c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1008>;
+ status = "disabled";
+
+ hsi2c_3: i2c@10920000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10920000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c3_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_3: serial@10920000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10920000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart3_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_3: spi@10920000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10920000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi3_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi4: usi@109300c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109300c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x100c>;
+ status = "disabled";
+
+ hsi2c_4: i2c@10930000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10930000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c4_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_4: serial@10930000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10930000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart4_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_4: spi@10930000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10930000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi4_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi5: usi@109400c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109400c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1010>;
+ status = "disabled";
+
+ hsi2c_5: i2c@10940000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10940000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c5_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_5: serial@10940000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10940000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart5_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_5: spi@10940000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10940000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi5_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi6: usi@109500c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109500c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1014>;
+ status = "disabled";
+
+ hsi2c_6: i2c@10950000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10950000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c6_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_6: serial@10950000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10950000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart6_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_6: spi@10950000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10950000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi6_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi7: usi@109600c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x109600c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1018>;
+ status = "disabled";
+
+ hsi2c_7: i2c@10960000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10960000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c7_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_7: serial@10960000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10960000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart7_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_7: spi@10960000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10960000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi7_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
usi8: usi@109700c0 {
- compatible = "google,gs101-usi",
- "samsung,exynos850-usi";
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x109700c0 0x20>;
ranges;
#address-cells = <1>;
@@ -390,21 +784,47 @@
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10970000 0xc0>;
- interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&hsi2c8_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>;
clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c8_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_8: serial@10970000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10970000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart8_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_8: spi@10970000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10970000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi8_bus>;
+ pinctrl-names = "default";
status = "disabled";
};
};
usi_uart: usi@10a000c0 {
- compatible = "google,gs101-usi",
- "samsung,exynos850-usi";
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10a000c0 0x20>;
ranges;
#address-cells = <1>;
@@ -413,22 +833,78 @@
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1020>;
- samsung,mode = <USI_V2_UART>;
+ samsung,mode = <USI_MODE_UART>;
status = "disabled";
serial_0: serial@10a00000 {
compatible = "google,gs101-uart";
reg = <0x10a00000 0xc0>;
- interrupts = <GIC_SPI 634
- IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart0_bus>;
+ pinctrl-names = "default";
samsung,uart-fifosize = <256>;
status = "disabled";
};
};
+ usi14: usi@10a200c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10a200c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1028>;
+ status = "disabled";
+
+ hsi2c_14: i2c@10a20000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10a20000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c14_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_14: serial@10a20000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10a20000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart14_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_14: spi@10a20000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10a20000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi14_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
cmu_peric1: clock-controller@10c00000 {
compatible = "google,gs101-cmu-peric1";
reg = <0x10c00000 0x4000>;
@@ -448,12 +924,233 @@
pinctrl_peric1: pinctrl@10c40000 {
compatible = "google,gs101-pinctrl";
reg = <0x10c40000 0x00001000>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_GPIO_PERIC1_PCLK>;
+ clock-names = "pclk";
interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>;
};
+ usi0: usi@10d100c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d100c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1000>;
+ status = "disabled";
+
+ hsi2c_0: i2c@10d10000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d10000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c0_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_usi0: serial@10d10000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d10000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart0_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_0: spi@10d10000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d10000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi0_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi9: usi@10d200c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d200c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1004>;
+ status = "disabled";
+
+ hsi2c_9: i2c@10d20000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d20000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c9_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_9: serial@10d20000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d20000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart9_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_9: spi@10d20000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d20000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi9_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi10: usi@10d300c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d300c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1008>;
+ status = "disabled";
+
+ hsi2c_10: i2c@10d30000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d30000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c10_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_10: serial@10d30000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d30000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart10_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_10: spi@10d30000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d30000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi10_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi11: usi@10d400c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d400c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x100c>;
+ status = "disabled";
+
+ hsi2c_11: i2c@10d40000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d40000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c11_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_11: serial@10d40000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d40000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart11_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_11: spi@10d40000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d40000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi11_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
usi12: usi@10d500c0 {
- compatible = "google,gs101-usi",
- "samsung,exynos850-usi";
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
reg = <0x10d500c0 0x20>;
ranges;
#address-cells = <1>;
@@ -468,14 +1165,154 @@
compatible = "google,gs101-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10d50000 0xc0>;
- interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-0 = <&hsi2c12_bus>;
- pinctrl-names = "default";
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>;
clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c12_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_12: serial@10d50000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d50000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart12_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_12: spi@10d50000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d50000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi12_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ usi13: usi@10d600c0 {
+ compatible = "google,gs101-usi", "samsung,exynos850-usi";
+ reg = <0x10d600c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1014>;
+ status = "disabled";
+
+ hsi2c_13: i2c@10d60000 {
+ compatible = "google,gs101-hsi2c",
+ "samsung,exynosautov9-hsi2c";
+ reg = <0x10d60000 0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>;
+ clock-names = "hsi2c", "hsi2c_pclk";
+ interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&hsi2c13_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ serial_13: serial@10d60000 {
+ compatible = "google,gs101-uart";
+ reg = <0x10d60000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&uart13_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
+
+ spi_13: spi@10d60000 {
+ compatible = "google,gs101-spi";
+ reg = <0x10d60000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-0 = <&spi13_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+ };
+
+ cmu_hsi0: clock-controller@11000000 {
+ compatible = "google,gs101-cmu-hsi0";
+ reg = <0x11000000 0x4000>;
+ #clock-cells = <1>;
+
+ clocks = <&ext_24_5m>,
+ <&cmu_top CLK_DOUT_CMU_HSI0_BUS>,
+ <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>,
+ <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>,
+ <&cmu_top CLK_DOUT_CMU_HSI0_USBDPDBG>;
+ clock-names = "oscclk", "bus", "dpgtc", "usb31drd",
+ "usbdpdbg";
+ };
+
+ usbdrd31_phy: phy@11100000 {
+ compatible = "google,gs101-usb31drd-phy";
+ reg = <0x11100000 0x0200>,
+ <0x110f0000 0x0800>,
+ <0x110e0000 0x2800>;
+ reg-names = "phy", "pcs", "pma";
+ clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_ACLK_PHYCTRL>,
+ <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB20_PHY_REFCLK_26>,
+ <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_CTRL_ACLK>,
+ <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_CTRL_PCLK>,
+ <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USBDPPHY_SCL_APB_PCLK>;
+ clock-names = "phy", "ref", "ctrl_aclk", "ctrl_pclk", "scl_pclk";
+ #phy-cells = <1>;
+ samsung,pmu-syscon = <&pmu_system_controller>;
+ status = "disabled";
+ };
+
+ usbdrd31: usb@11110000 {
+ compatible = "google,gs101-dwusb3";
+ ranges = <0x0 0x11110000 0x10000>;
+ clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_BUS_CLK_EARLY>,
+ <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB31DRD_SUSPEND_CLK_26>,
+ <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_ACLK>,
+ <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_PCLK>;
+ clock-names = "bus_early", "susp_clk", "link_aclk", "link_pclk";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+
+ usbdrd31_dwc3: usb@0 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x10000>;
+ clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB31DRD_REF_CLK_40>;
+ clock-names = "ref";
+ interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH 0>;
+ phys = <&usbdrd31_phy 0>, <&usbdrd31_phy 1>;
+ phy-names = "usb2-phy", "usb3-phy";
+ snps,has-lpm-erratum;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
status = "disabled";
};
};
@@ -483,15 +1320,74 @@
pinctrl_hsi1: pinctrl@11840000 {
compatible = "google,gs101-pinctrl";
reg = <0x11840000 0x00001000>;
+ /* TODO: update once support for this CMU exists */
+ clocks = <0>;
+ clock-names = "pclk";
interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0>;
};
+ cmu_hsi2: clock-controller@14400000 {
+ compatible = "google,gs101-cmu-hsi2";
+ reg = <0x14400000 0x4000>;
+ #clock-cells = <1>;
+ clocks = <&ext_24_5m>,
+ <&cmu_top CLK_DOUT_CMU_HSI2_BUS>,
+ <&cmu_top CLK_DOUT_CMU_HSI2_PCIE>,
+ <&cmu_top CLK_DOUT_CMU_HSI2_UFS_EMBD>,
+ <&cmu_top CLK_DOUT_CMU_HSI2_MMC_CARD>;
+ clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
+ };
+
+ sysreg_hsi2: syscon@14420000 {
+ compatible = "google,gs101-hsi2-sysreg", "syscon";
+ reg = <0x14420000 0x10000>;
+ clocks = <&cmu_hsi2 CLK_GOUT_HSI2_SYSREG_HSI2_PCLK>;
+ };
+
pinctrl_hsi2: pinctrl@14440000 {
compatible = "google,gs101-pinctrl";
reg = <0x14440000 0x00001000>;
+ clocks = <&cmu_hsi2 CLK_GOUT_HSI2_GPIO_HSI2_PCLK>;
+ clock-names = "pclk";
interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
};
+ ufs_0: ufs@14700000 {
+ compatible = "google,gs101-ufs";
+ reg = <0x14700000 0x200>,
+ <0x14701100 0x200>,
+ <0x14780000 0xa000>,
+ <0x14600000 0x100>;
+ reg-names = "hci", "vs_hci", "unipro", "ufsp";
+ interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_ACLK>,
+ <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_CLK_UNIPRO>,
+ <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_FMP_CLK>,
+ <&cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_ACLK>,
+ <&cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_PCLK>,
+ <&cmu_hsi2 CLK_GOUT_HSI2_SYSREG_HSI2_PCLK>;
+ clock-names = "core_clk", "sclk_unipro_main", "fmp",
+ "aclk", "pclk", "sysreg";
+ freq-table-hz = <0 0>, <0 0>, <0 0>, <0 0>, <0 0>, <0 0>;
+ pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
+ pinctrl-names = "default";
+ phys = <&ufs_0_phy>;
+ phy-names = "ufs-phy";
+ samsung,sysreg = <&sysreg_hsi2 0x710>;
+ status = "disabled";
+ };
+
+ ufs_0_phy: phy@14704000 {
+ compatible = "google,gs101-ufs-phy";
+ reg = <0x14704000 0x3000>;
+ reg-names = "phy-pma";
+ samsung,pmu-syscon = <&pmu_system_controller>;
+ #phy-cells = <0>;
+ clocks = <&ext_24_5m>;
+ clock-names = "ref_clk";
+ status = "disabled";
+ };
+
cmu_apm: clock-controller@17400000 {
compatible = "google,gs101-cmu-apm";
reg = <0x17400000 0x8000>;
@@ -509,11 +1405,46 @@
pmu_system_controller: system-controller@17460000 {
compatible = "google,gs101-pmu", "syscon";
reg = <0x17460000 0x10000>;
+ google,pmu-intr-gen-syscon = <&pmu_intr_gen>;
+
+ poweroff: syscon-poweroff {
+ compatible = "syscon-poweroff";
+ offset = <0x3e9c>; /* PAD_CTRL_PWR_HOLD */
+ mask = <0x00000100>;
+ value = <0x0>;
+ };
+
+ reboot: syscon-reboot {
+ compatible = "syscon-reboot";
+ offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
+ mask = <0x2>; /* SWRESET_SYSTEM */
+ value = <0x2>; /* reset value */
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x0810>; /* EXYNOS_PMU_SYSIP_DAT0 */
+ mode-bootloader = <0xfc>;
+ mode-charge = <0x0a>;
+ mode-fastboot = <0xfa>;
+ mode-reboot-ab-update = <0x52>;
+ mode-recovery = <0xff>;
+ mode-rescue = <0xf9>;
+ mode-shutdown-thermal = <0x51>;
+ mode-shutdown-thermal-battery = <0x51>;
+ };
+ };
+
+ pmu_intr_gen: syscon@17470000 {
+ compatible = "google,gs101-pmu-intr-gen", "syscon";
+ reg = <0x17470000 0x10000>;
};
pinctrl_gpio_alive: pinctrl@174d0000 {
compatible = "google,gs101-pinctrl";
reg = <0x174d0000 0x00001000>;
+ clocks = <&cmu_apm CLK_GOUT_APM_APBIF_GPIO_ALIVE_PCLK>;
+ clock-names = "pclk";
wakeup-interrupt-controller {
compatible = "google,gs101-wakeup-eint",
@@ -525,6 +1456,8 @@
pinctrl_far_alive: pinctrl@174e0000 {
compatible = "google,gs101-pinctrl";
reg = <0x174e0000 0x00001000>;
+ clocks = <&cmu_apm CLK_GOUT_APM_APBIF_GPIO_FAR_ALIVE_PCLK>;
+ clock-names = "pclk";
wakeup-interrupt-controller {
compatible = "google,gs101-wakeup-eint",
@@ -533,14 +1466,30 @@
};
};
+ ap2apm_mailbox: mailbox@17610000 {
+ compatible = "google,gs101-mbox";
+ reg = <0x17610000 0x1000>;
+ clocks = <&cmu_apm CLK_GOUT_APM_MAILBOX_APM_AP_PCLK>;
+ clock-names = "pclk";
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <0>;
+ };
+
pinctrl_gsactrl: pinctrl@17940000 {
compatible = "google,gs101-pinctrl";
reg = <0x17940000 0x00001000>;
+ /* TODO: update once support for this CMU exists */
+ clocks = <0>;
+ clock-names = "pclk";
};
pinctrl_gsacore: pinctrl@17a80000 {
compatible = "google,gs101-pinctrl";
reg = <0x17a80000 0x00001000>;
+ /* TODO: update once support for this CMU exists */
+ clocks = <0>;
+ clock-names = "pclk";
+ status = "disabled";
};
cmu_top: clock-controller@1e080000 {
@@ -553,6 +1502,14 @@
};
};
+ apm_sram: sram@2039000 {
+ compatible = "mmio-sram";
+ reg = <0x0 0x2039000 0x40000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x2039000 0x40000>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts =
generated by cgit (git 2.34.1) at 2025-07-25 08:37:04 +0000