diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts index 3516af4726a5..c4532c809f0a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts @@ -29,23 +29,33 @@ &i2c0 { status = "okay"; + ina220@40 { compatible = "ti,ina220"; reg = <0x40>; shunt-resistor = <1000>; }; + adt7461a@4c { compatible = "adi,adt7461"; reg = <0x4c>; }; + + rtc@51 { + compatible = "nxp,pcf85263"; + reg = <0x51>; + }; + eeprom@52 { compatible = "atmel,24c512"; reg = <0x52>; }; + eeprom@53 { compatible = "atmel,24c512"; reg = <0x53>; }; + rtc@68 { compatible = "pericom,pt7c4338"; reg = <0x68>; @@ -61,7 +71,7 @@ 0x1 0x0 0x0 0x7e800000 0x00010000 0x2 0x0 0x0 0x7fb00000 0x00000100>; - nor@0,0 { + flash@0,0 { compatible = "cfi-flash"; #address-cells = <1>; #size-cells = <1>; @@ -94,12 +104,26 @@ compatible = "n25q128a13", "jedec,spi-nor"; /* 16MB */ reg = <0>; spi-max-frequency = <1000000>; /* input clock */ + /* + * Standard CS timing properties replace the deprecated vendor + * variants below. + */ + spi-cs-setup-delay-ns = <100>; + spi-cs-hold-delay-ns = <100>; + fsl,spi-cs-sck-delay = <100>; + fsl,spi-sck-cs-delay = <100>; }; slic@2 { compatible = "maxim,ds26522"; reg = <2>; spi-max-frequency = <2000000>; + /* + * Standard CS timing properties replace the deprecated vendor + * variants below. + */ + spi-cs-setup-delay-ns = <100>; + spi-cs-hold-delay-ns = <50>; fsl,spi-cs-sck-delay = <100>; fsl,spi-sck-cs-delay = <50>; }; @@ -108,6 +132,12 @@ compatible = "maxim,ds26522"; reg = <3>; spi-max-frequency = <2000000>; + /* + * Standard CS timing properties replace the deprecated vendor + * variants below. + */ + spi-cs-setup-delay-ns = <100>; + spi-cs-hold-delay-ns = <50>; fsl,spi-cs-sck-delay = <100>; fsl,spi-sck-cs-delay = <50>; }; |