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Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi286
1 files changed, 149 insertions, 137 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index b9fd24cdc919..50d9b03a284a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -85,6 +85,7 @@
l2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
@@ -153,7 +154,7 @@
};
thermal-zones {
- ddr-controller {
+ ddr-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 0>;
@@ -173,7 +174,7 @@
};
};
- serdes {
+ serdes-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 1>;
@@ -193,7 +194,7 @@
};
};
- fman {
+ fman-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 2>;
@@ -213,7 +214,7 @@
};
};
- core-cluster {
+ cluster-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 3>;
@@ -244,7 +245,7 @@
};
};
- sec {
+ sec-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 4>;
@@ -267,19 +268,19 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <1 13 0xf08>, /* Physical Secure PPI */
- <1 14 0xf08>, /* Physical Non-Secure PPI */
- <1 11 0xf08>, /* Virtual PPI */
- <1 10 0xf08>; /* Hypervisor PPI */
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
fsl,erratum-a008585;
};
pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <0 106 0x4>,
- <0 107 0x4>,
- <0 95 0x4>,
- <0 97 0x4>;
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>,
<&cpu1>,
<&cpu2>,
@@ -288,13 +289,14 @@
gic: interrupt-controller@1400000 {
compatible = "arm,gic-400";
+ #address-cells = <0>;
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x1401000 0 0x1000>, /* GICD */
<0x0 0x1402000 0 0x2000>, /* GICC */
<0x0 0x1404000 0 0x2000>, /* GICH */
<0x0 0x1406000 0 0x2000>; /* GICV */
- interrupts = <1 9 0xf08>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
soc: soc {
@@ -351,7 +353,7 @@
#size-cells = <1>;
ranges = <0x0 0x00 0x1700000 0x100000>;
reg = <0x00 0x1700000 0x0 0x100000>;
- interrupts = <0 75 0x4>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
dma-coherent;
sec_jr0: jr@10000 {
@@ -359,7 +361,7 @@
"fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x10000 0x10000>;
- interrupts = <0 71 0x4>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr1: jr@20000 {
@@ -367,7 +369,7 @@
"fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x20000 0x10000>;
- interrupts = <0 72 0x4>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr2: jr@30000 {
@@ -375,7 +377,7 @@
"fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x30000 0x10000>;
- interrupts = <0 73 0x4>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr3: jr@40000 {
@@ -383,7 +385,7 @@
"fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x40000 0x10000>;
- interrupts = <0 74 0x4>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
};
};
@@ -404,7 +406,7 @@
ifc: memory-controller@1530000 {
compatible = "fsl,ifc";
reg = <0x0 0x1530000 0x0 0x10000>;
- interrupts = <0 43 0x4>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
};
qspi: spi@1550000 {
@@ -414,7 +416,7 @@
reg = <0x0 0x1550000 0x0 0x10000>,
<0x0 0x40000000 0x0 0x4000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
- interrupts = <0 99 0x4>;
+ interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "qspi_en", "qspi";
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>,
@@ -423,69 +425,68 @@
status = "disabled";
};
- esdhc: esdhc@1560000 {
+ esdhc: mmc@1560000 {
compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
reg = <0x0 0x1560000 0x0 0x10000>;
- interrupts = <0 62 0x4>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>;
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
- big-endian;
bus-width = <4>;
};
ddr: memory-controller@1080000 {
compatible = "fsl,qoriq-memory-controller";
reg = <0x0 0x1080000 0x0 0x1000>;
- interrupts = <0 144 0x4>;
- big-endian;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
};
tmu: tmu@1f00000 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f00000 0x0 0x10000>;
- interrupts = <0 33 0x4>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
- fsl,tmu-calibration = <0x00000000 0x00000023
- 0x00000001 0x0000002a
- 0x00000002 0x00000031
- 0x00000003 0x00000037
- 0x00000004 0x0000003e
- 0x00000005 0x00000044
- 0x00000006 0x0000004b
- 0x00000007 0x00000051
- 0x00000008 0x00000058
- 0x00000009 0x0000005e
- 0x0000000a 0x00000065
- 0x0000000b 0x0000006b
-
- 0x00010000 0x00000023
- 0x00010001 0x0000002b
- 0x00010002 0x00000033
- 0x00010003 0x0000003b
- 0x00010004 0x00000043
- 0x00010005 0x0000004b
- 0x00010006 0x00000054
- 0x00010007 0x0000005c
- 0x00010008 0x00000064
- 0x00010009 0x0000006c
-
- 0x00020000 0x00000021
- 0x00020001 0x0000002c
- 0x00020002 0x00000036
- 0x00020003 0x00000040
- 0x00020004 0x0000004b
- 0x00020005 0x00000055
- 0x00020006 0x0000005f
-
- 0x00030000 0x00000013
- 0x00030001 0x0000001d
- 0x00030002 0x00000028
- 0x00030003 0x00000032
- 0x00030004 0x0000003d
- 0x00030005 0x00000047
- 0x00030006 0x00000052
- 0x00030007 0x0000005c>;
+ fsl,tmu-calibration =
+ <0x00000000 0x00000023>,
+ <0x00000001 0x0000002a>,
+ <0x00000002 0x00000031>,
+ <0x00000003 0x00000037>,
+ <0x00000004 0x0000003e>,
+ <0x00000005 0x00000044>,
+ <0x00000006 0x0000004b>,
+ <0x00000007 0x00000051>,
+ <0x00000008 0x00000058>,
+ <0x00000009 0x0000005e>,
+ <0x0000000a 0x00000065>,
+ <0x0000000b 0x0000006b>,
+
+ <0x00010000 0x00000023>,
+ <0x00010001 0x0000002b>,
+ <0x00010002 0x00000033>,
+ <0x00010003 0x0000003b>,
+ <0x00010004 0x00000043>,
+ <0x00010005 0x0000004b>,
+ <0x00010006 0x00000054>,
+ <0x00010007 0x0000005c>,
+ <0x00010008 0x00000064>,
+ <0x00010009 0x0000006c>,
+
+ <0x00020000 0x00000021>,
+ <0x00020001 0x0000002c>,
+ <0x00020002 0x00000036>,
+ <0x00020003 0x00000040>,
+ <0x00020004 0x0000004b>,
+ <0x00020005 0x00000055>,
+ <0x00020006 0x0000005f>,
+
+ <0x00030000 0x00000013>,
+ <0x00030001 0x0000001d>,
+ <0x00030002 0x00000028>,
+ <0x00030003 0x00000032>,
+ <0x00030004 0x0000003d>,
+ <0x00030005 0x00000047>,
+ <0x00030006 0x00000052>,
+ <0x00030007 0x0000005c>;
#thermal-sensor-cells = <1>;
};
@@ -503,11 +504,11 @@
memory-region = <&bman_fbpr>;
};
- bportals: bman-portals@508000000 {
+ bportals: bman-portals-bus@508000000 {
ranges = <0x0 0x5 0x08000000 0x8000000>;
};
- qportals: qman-portals@500000000 {
+ qportals: qman-portals-bus@500000000 {
ranges = <0x0 0x5 0x00000000 0x8000000>;
};
@@ -516,21 +517,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x2100000 0x0 0x10000>;
- interrupts = <0 64 0x4>;
- clock-names = "dspi";
- clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
- QORIQ_CLK_PLL_DIV(1)>;
- spi-num-chipselects = <5>;
- big-endian;
- status = "disabled";
- };
-
- dspi1: spi@2110000 {
- compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2110000 0x0 0x10000>;
- interrupts = <0 65 0x4>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi";
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
@@ -544,8 +531,8 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x2180000 0x0 0x10000>;
- interrupts = <0 56 0x4>;
- clock-names = "i2c";
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "ipg";
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
dmas = <&edma0 1 38>,
@@ -559,11 +546,14 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x2190000 0x0 0x10000>;
- interrupts = <0 57 0x4>;
- clock-names = "i2c";
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "ipg";
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
scl-gpios = <&gpio4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ dmas = <&edma0 1 36>,
+ <&edma0 1 37>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -572,11 +562,14 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x21a0000 0x0 0x10000>;
- interrupts = <0 58 0x4>;
- clock-names = "i2c";
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "ipg";
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
scl-gpios = <&gpio4 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ dmas = <&edma0 1 34>,
+ <&edma0 1 35>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -585,18 +578,21 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x21b0000 0x0 0x10000>;
- interrupts = <0 59 0x4>;
- clock-names = "i2c";
+ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "ipg";
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ dmas = <&edma0 1 40>,
+ <&edma0 1 41>;
+ dma-names = "rx", "tx";
status = "disabled";
};
duart0: serial@21c0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x00 0x21c0500 0x0 0x100>;
- interrupts = <0 54 0x4>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
};
@@ -604,7 +600,7 @@
duart1: serial@21c0600 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x00 0x21c0600 0x0 0x100>;
- interrupts = <0 54 0x4>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
};
@@ -612,7 +608,7 @@
duart2: serial@21d0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21d0500 0x0 0x100>;
- interrupts = <0 55 0x4>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
};
@@ -620,7 +616,7 @@
duart3: serial@21d0600 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21d0600 0x0 0x100>;
- interrupts = <0 55 0x4>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
};
@@ -628,7 +624,7 @@
gpio1: gpio@2300000 {
compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x2300000 0x0 0x10000>;
- interrupts = <0 66 0x4>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@@ -638,7 +634,7 @@
gpio2: gpio@2310000 {
compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x2310000 0x0 0x10000>;
- interrupts = <0 67 0x4>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@@ -648,7 +644,7 @@
gpio3: gpio@2320000 {
compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x2320000 0x0 0x10000>;
- interrupts = <0 68 0x4>;
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@@ -658,14 +654,14 @@
gpio4: gpio@2330000 {
compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x2330000 0x0 0x10000>;
- interrupts = <0 134 0x4>;
+ interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
- uqe: uqe@2400000 {
+ uqe: uqe-bus@2400000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,qe", "simple-bus";
@@ -679,7 +675,6 @@
qeic: qeic@80 {
compatible = "fsl,qe-ic";
reg = <0x80 0x80>;
- #address-cells = <0>;
interrupt-controller;
#interrupt-cells = <1>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
@@ -687,16 +682,12 @@
};
si1: si@700 {
- #address-cells = <1>;
- #size-cells = <0>;
compatible = "fsl,ls1043-qe-si",
"fsl,t1040-qe-si";
reg = <0x700 0x80>;
};
siram1: siram@1000 {
- #address-cells = <1>;
- #size-cells = <1>;
compatible = "fsl,ls1043-qe-siram",
"fsl,t1040-qe-siram";
reg = <0x1000 0x800>;
@@ -733,69 +724,86 @@
lpuart0: serial@2950000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x0 0x2950000 0x0 0x1000>;
- interrupts = <0 48 0x4>;
+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_SYSCLK 0>;
clock-names = "ipg";
+ dmas = <&edma0 1 32>,
+ <&edma0 1 33>;
+ dma-names = "rx", "tx";
status = "disabled";
};
lpuart1: serial@2960000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x0 0x2960000 0x0 0x1000>;
- interrupts = <0 49 0x4>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
clock-names = "ipg";
+ dmas = <&edma0 1 30>,
+ <&edma0 1 31>;
+ dma-names = "rx", "tx";
status = "disabled";
};
lpuart2: serial@2970000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x0 0x2970000 0x0 0x1000>;
- interrupts = <0 50 0x4>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
clock-names = "ipg";
+ dmas = <&edma0 1 28>,
+ <&edma0 1 29>;
+ dma-names = "rx", "tx";
status = "disabled";
};
lpuart3: serial@2980000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x0 0x2980000 0x0 0x1000>;
- interrupts = <0 51 0x4>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
clock-names = "ipg";
+ dmas = <&edma0 1 26>,
+ <&edma0 1 27>;
+ dma-names = "rx", "tx";
status = "disabled";
};
lpuart4: serial@2990000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x0 0x2990000 0x0 0x1000>;
- interrupts = <0 52 0x4>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
clock-names = "ipg";
+ dmas = <&edma0 1 24>,
+ <&edma0 1 25>;
+ dma-names = "rx", "tx";
status = "disabled";
};
lpuart5: serial@29a0000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x0 0x29a0000 0x0 0x1000>;
- interrupts = <0 53 0x4>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
clock-names = "ipg";
+ dmas = <&edma0 1 22>,
+ <&edma0 1 23>;
+ dma-names = "rx", "tx";
status = "disabled";
};
wdog0: watchdog@2ad0000 {
compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
reg = <0x0 0x2ad0000 0x0 0x10000>;
- interrupts = <0 83 0x4>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
- clock-names = "wdog";
big-endian;
};
@@ -805,8 +813,8 @@
reg = <0x0 0x2c00000 0x0 0x10000>,
<0x0 0x2c10000 0x0 0x10000>,
<0x0 0x2c20000 0x0 0x10000>;
- interrupts = <0 103 0x4>,
- <0 103 0x4>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "edma-tx", "edma-err";
dma-channels = <32>;
big-endian;
@@ -817,7 +825,7 @@
QORIQ_CLK_PLL_DIV(1)>;
};
- aux_bus: aux_bus {
+ aux_bus: bus {
#address-cells = <2>;
#size-cells = <2>;
compatible = "simple-bus";
@@ -825,10 +833,11 @@
dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
usb0: usb@2f00000 {
- compatible = "snps,dwc3";
+ compatible = "fsl,ls1043a-dwc3", "fsl,ls1028a-dwc3";
reg = <0x0 0x2f00000 0x0 0x10000>;
- interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
+ dma-coherent;
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
usb3-lpm-capable;
@@ -837,10 +846,11 @@
};
usb1: usb@3000000 {
- compatible = "snps,dwc3";
+ compatible = "fsl,ls1043a-dwc3", "fsl,ls1028a-dwc3";
reg = <0x0 0x3000000 0x0 0x10000>;
- interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
+ dma-coherent;
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
usb3-lpm-capable;
@@ -849,10 +859,11 @@
};
usb2: usb@3100000 {
- compatible = "snps,dwc3";
+ compatible = "fsl,ls1043a-dwc3", "fsl,ls1028a-dwc3";
reg = <0x0 0x3100000 0x0 0x10000>;
- interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
+ dma-coherent;
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
usb3-lpm-capable;
@@ -865,7 +876,7 @@
reg = <0x0 0x3200000 0x0 0x10000>,
<0x0 0x20140520 0x0 0x4>;
reg-names = "ahci", "sata-ecc";
- interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
dma-coherent;
@@ -876,21 +887,21 @@
compatible = "fsl,ls1043a-msi";
reg = <0x0 0x1571000 0x0 0x8>;
msi-controller;
- interrupts = <0 116 0x4>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
};
msi2: msi-controller2@1572000 {
compatible = "fsl,ls1043a-msi";
reg = <0x0 0x1572000 0x0 0x8>;
msi-controller;
- interrupts = <0 126 0x4>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
};
msi3: msi-controller3@1573000 {
compatible = "fsl,ls1043a-msi";
reg = <0x0 0x1573000 0x0 0x8>;
msi-controller;
- interrupts = <0 160 0x4>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
};
pcie1: pcie@3400000 {
@@ -898,8 +909,8 @@
reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
<0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
- interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>,
- <0 118 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
@@ -925,8 +936,8 @@
reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
<0x48 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
- interrupts = <0 127 IRQ_TYPE_LEVEL_HIGH>,
- <0 128 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
@@ -952,8 +963,8 @@
reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
<0x50 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
- interrupts = <0 161 IRQ_TYPE_LEVEL_HIGH>,
- <0 162 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
@@ -975,7 +986,7 @@
};
qdma: dma-controller@8380000 {
- compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
+ compatible = "fsl,ls1043a-qdma", "fsl,ls1021a-qdma";
reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
<0x0 0x8390000 0x0 0x10000>, /* Status regs */
<0x0 0x83a0000 0x0 0x40000>; /* Block regs */
@@ -986,6 +997,7 @@
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "qdma-error", "qdma-queue0",
"qdma-queue1", "qdma-queue2", "qdma-queue3";
+ #dma-cells = <1>;
dma-channels = <8>;
block-number = <1>;
block-offset = <0x10000>;
@@ -995,13 +1007,13 @@
big-endian;
};
- rcpm: power-controller@1ee2140 {
+ rcpm: wakeup-controller@1ee2140 {
compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x4>;
#fsl,rcpm-wakeup-cells = <1>;
};
- ftm_alarm0: timer@29d0000 {
+ ftm_alarm0: rtc@29d0000 {
compatible = "fsl,ls1043a-ftm-alarm";
reg = <0x0 0x29d0000 0x0 0x10000>;
fsl,rcpm-wakeup = <&rcpm 0x20000>;
generated by cgit (git 2.34.1) at 2025-12-30 10:36:13 +0000