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Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index 6f6667b70028..e9bc1f4fa13c 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -12,6 +12,13 @@
#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
#include "fsl-ls208xa.dtsi"
+/ {
+ pmu {
+ compatible = "arm,cortex-a57-pmu";
+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
&cpu {
cpu0: cpu@0 {
device_type = "cpu";
@@ -95,18 +102,26 @@
cluster0_l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
};
cluster1_l2: l2-cache1 {
compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
};
cluster2_l2: l2-cache2 {
compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
};
cluster3_l2: l2-cache3 {
compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
};
CPU_PW20: cpu-pw20 {
@@ -150,3 +165,7 @@
ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
+
+&timer {
+ fsl,erratum-a008585;
+};