diff options
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hip05.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/hisilicon/hip05.dtsi | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi index 7b2abd10d3d6..d0912ca5f237 100644 --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi @@ -211,18 +211,26 @@ cluster0_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; cluster1_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; cluster2_l2: l2-cache2 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; cluster3_l2: l2-cache3 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; }; @@ -271,6 +279,12 @@ }; }; + refclk200mhz: refclk200mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, @@ -290,12 +304,6 @@ #size-cells = <2>; ranges; - refclk200mhz: refclk200mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; - }; - uart0: serial@80300000 { compatible = "snps,dw-apb-uart"; reg = <0x0 0x80300000 0x0 0x10000>; |