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Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra186.dtsi')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra186.dtsi654
1 files changed, 323 insertions, 331 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 6602fe421ee8..b00630451909 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -36,6 +36,12 @@
interrupt-controller;
#gpio-cells = <2>;
gpio-controller;
+ gpio-ranges = <&pinmux 0 0 140>;
+ };
+
+ pinmux: pinmux@2430000 {
+ compatible = "nvidia,tegra186-pinmux";
+ reg = <0x0 0x2430000 0x0 0x15000>;
};
ethernet@2490000 {
@@ -78,7 +84,8 @@
reg = <0x0 0x2600000 0x0 0x210000>;
resets = <&bpmp TEGRA186_RESET_GPCDMA>;
reset-names = "gpcdma";
- interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
@@ -112,6 +119,7 @@
#dma-cells = <1>;
iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
dma-coherent;
+ dma-channel-mask = <0xfffffffe>;
status = "okay";
};
@@ -122,129 +130,28 @@
<&bpmp TEGRA186_CLK_APB2APE>;
clock-names = "ape", "apb2ape";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_AUD>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x02900000 0x0 0x02900000 0x200000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x02900000 0x0 0x02900000 0x0 0x200000>;
status = "disabled";
- adma: dma-controller@2930000 {
- compatible = "nvidia,tegra186-adma";
- reg = <0x02930000 0x20000>;
- interrupt-parent = <&agic>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- clocks = <&bpmp TEGRA186_CLK_AHUB>;
- clock-names = "d_audio";
- status = "disabled";
- };
-
- agic: interrupt-controller@2a40000 {
- compatible = "nvidia,tegra186-agic",
- "nvidia,tegra210-agic";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0x02a41000 0x1000>,
- <0x02a42000 0x2000>;
- interrupts = <GIC_SPI 145
- (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&bpmp TEGRA186_CLK_APE>;
- clock-names = "clk";
- status = "disabled";
- };
-
tegra_ahub: ahub@2900800 {
compatible = "nvidia,tegra186-ahub";
- reg = <0x02900800 0x800>;
+ reg = <0x0 0x02900800 0x0 0x800>;
clocks = <&bpmp TEGRA186_CLK_AHUB>;
clock-names = "ahub";
assigned-clocks = <&bpmp TEGRA186_CLK_AHUB>;
- assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x02900800 0x02900800 0x11800>;
+ assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>;
+ assigned-clock-rates = <81600000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x02900800 0x0 0x02900800 0x0 0x11800>;
status = "disabled";
- tegra_admaif: admaif@290f000 {
- compatible = "nvidia,tegra186-admaif";
- reg = <0x0290f000 0x1000>;
- dmas = <&adma 1>, <&adma 1>,
- <&adma 2>, <&adma 2>,
- <&adma 3>, <&adma 3>,
- <&adma 4>, <&adma 4>,
- <&adma 5>, <&adma 5>,
- <&adma 6>, <&adma 6>,
- <&adma 7>, <&adma 7>,
- <&adma 8>, <&adma 8>,
- <&adma 9>, <&adma 9>,
- <&adma 10>, <&adma 10>,
- <&adma 11>, <&adma 11>,
- <&adma 12>, <&adma 12>,
- <&adma 13>, <&adma 13>,
- <&adma 14>, <&adma 14>,
- <&adma 15>, <&adma 15>,
- <&adma 16>, <&adma 16>,
- <&adma 17>, <&adma 17>,
- <&adma 18>, <&adma 18>,
- <&adma 19>, <&adma 19>,
- <&adma 20>, <&adma 20>;
- dma-names = "rx1", "tx1",
- "rx2", "tx2",
- "rx3", "tx3",
- "rx4", "tx4",
- "rx5", "tx5",
- "rx6", "tx6",
- "rx7", "tx7",
- "rx8", "tx8",
- "rx9", "tx9",
- "rx10", "tx10",
- "rx11", "tx11",
- "rx12", "tx12",
- "rx13", "tx13",
- "rx14", "tx14",
- "rx15", "tx15",
- "rx16", "tx16",
- "rx17", "tx17",
- "rx18", "tx18",
- "rx19", "tx19",
- "rx20", "tx20";
- status = "disabled";
- };
-
tegra_i2s1: i2s@2901000 {
compatible = "nvidia,tegra186-i2s",
"nvidia,tegra210-i2s";
- reg = <0x2901000 0x100>;
+ reg = <0x0 0x2901000 0x0 0x100>;
clocks = <&bpmp TEGRA186_CLK_I2S1>,
<&bpmp TEGRA186_CLK_I2S1_SYNC_INPUT>;
clock-names = "i2s", "sync_input";
@@ -258,7 +165,7 @@
tegra_i2s2: i2s@2901100 {
compatible = "nvidia,tegra186-i2s",
"nvidia,tegra210-i2s";
- reg = <0x2901100 0x100>;
+ reg = <0x0 0x2901100 0x0 0x100>;
clocks = <&bpmp TEGRA186_CLK_I2S2>,
<&bpmp TEGRA186_CLK_I2S2_SYNC_INPUT>;
clock-names = "i2s", "sync_input";
@@ -272,7 +179,7 @@
tegra_i2s3: i2s@2901200 {
compatible = "nvidia,tegra186-i2s",
"nvidia,tegra210-i2s";
- reg = <0x2901200 0x100>;
+ reg = <0x0 0x2901200 0x0 0x100>;
clocks = <&bpmp TEGRA186_CLK_I2S3>,
<&bpmp TEGRA186_CLK_I2S3_SYNC_INPUT>;
clock-names = "i2s", "sync_input";
@@ -286,7 +193,7 @@
tegra_i2s4: i2s@2901300 {
compatible = "nvidia,tegra186-i2s",
"nvidia,tegra210-i2s";
- reg = <0x2901300 0x100>;
+ reg = <0x0 0x2901300 0x0 0x100>;
clocks = <&bpmp TEGRA186_CLK_I2S4>,
<&bpmp TEGRA186_CLK_I2S4_SYNC_INPUT>;
clock-names = "i2s", "sync_input";
@@ -300,7 +207,7 @@
tegra_i2s5: i2s@2901400 {
compatible = "nvidia,tegra186-i2s",
"nvidia,tegra210-i2s";
- reg = <0x2901400 0x100>;
+ reg = <0x0 0x2901400 0x0 0x100>;
clocks = <&bpmp TEGRA186_CLK_I2S5>,
<&bpmp TEGRA186_CLK_I2S5_SYNC_INPUT>;
clock-names = "i2s", "sync_input";
@@ -314,7 +221,7 @@
tegra_i2s6: i2s@2901500 {
compatible = "nvidia,tegra186-i2s",
"nvidia,tegra210-i2s";
- reg = <0x2901500 0x100>;
+ reg = <0x0 0x2901500 0x0 0x100>;
clocks = <&bpmp TEGRA186_CLK_I2S6>,
<&bpmp TEGRA186_CLK_I2S6_SYNC_INPUT>;
clock-names = "i2s", "sync_input";
@@ -325,82 +232,10 @@
status = "disabled";
};
- tegra_dmic1: dmic@2904000 {
- compatible = "nvidia,tegra210-dmic";
- reg = <0x2904000 0x100>;
- clocks = <&bpmp TEGRA186_CLK_DMIC1>;
- clock-names = "dmic";
- assigned-clocks = <&bpmp TEGRA186_CLK_DMIC1>;
- assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
- assigned-clock-rates = <3072000>;
- sound-name-prefix = "DMIC1";
- status = "disabled";
- };
-
- tegra_dmic2: dmic@2904100 {
- compatible = "nvidia,tegra210-dmic";
- reg = <0x2904100 0x100>;
- clocks = <&bpmp TEGRA186_CLK_DMIC2>;
- clock-names = "dmic";
- assigned-clocks = <&bpmp TEGRA186_CLK_DMIC2>;
- assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
- assigned-clock-rates = <3072000>;
- sound-name-prefix = "DMIC2";
- status = "disabled";
- };
-
- tegra_dmic3: dmic@2904200 {
- compatible = "nvidia,tegra210-dmic";
- reg = <0x2904200 0x100>;
- clocks = <&bpmp TEGRA186_CLK_DMIC3>;
- clock-names = "dmic";
- assigned-clocks = <&bpmp TEGRA186_CLK_DMIC3>;
- assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
- assigned-clock-rates = <3072000>;
- sound-name-prefix = "DMIC3";
- status = "disabled";
- };
-
- tegra_dmic4: dmic@2904300 {
- compatible = "nvidia,tegra210-dmic";
- reg = <0x2904300 0x100>;
- clocks = <&bpmp TEGRA186_CLK_DMIC4>;
- clock-names = "dmic";
- assigned-clocks = <&bpmp TEGRA186_CLK_DMIC4>;
- assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
- assigned-clock-rates = <3072000>;
- sound-name-prefix = "DMIC4";
- status = "disabled";
- };
-
- tegra_dspk1: dspk@2905000 {
- compatible = "nvidia,tegra186-dspk";
- reg = <0x2905000 0x100>;
- clocks = <&bpmp TEGRA186_CLK_DSPK1>;
- clock-names = "dspk";
- assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
- assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
- assigned-clock-rates = <12288000>;
- sound-name-prefix = "DSPK1";
- status = "disabled";
- };
-
- tegra_dspk2: dspk@2905100 {
- compatible = "nvidia,tegra186-dspk";
- reg = <0x2905100 0x100>;
- clocks = <&bpmp TEGRA186_CLK_DSPK2>;
- clock-names = "dspk";
- assigned-clocks = <&bpmp TEGRA186_CLK_DSPK2>;
- assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
- assigned-clock-rates = <12288000>;
- sound-name-prefix = "DSPK2";
- status = "disabled";
- };
-
tegra_sfc1: sfc@2902000 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
- reg = <0x2902000 0x200>;
+ reg = <0x0 0x2902000 0x0 0x200>;
sound-name-prefix = "SFC1";
status = "disabled";
};
@@ -408,7 +243,7 @@
tegra_sfc2: sfc@2902200 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
- reg = <0x2902200 0x200>;
+ reg = <0x0 0x2902200 0x0 0x200>;
sound-name-prefix = "SFC2";
status = "disabled";
};
@@ -416,7 +251,7 @@
tegra_sfc3: sfc@2902400 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
- reg = <0x2902400 0x200>;
+ reg = <0x0 0x2902400 0x0 0x200>;
sound-name-prefix = "SFC3";
status = "disabled";
};
@@ -424,31 +259,15 @@
tegra_sfc4: sfc@2902600 {
compatible = "nvidia,tegra186-sfc",
"nvidia,tegra210-sfc";
- reg = <0x2902600 0x200>;
+ reg = <0x0 0x2902600 0x0 0x200>;
sound-name-prefix = "SFC4";
status = "disabled";
};
- tegra_mvc1: mvc@290a000 {
- compatible = "nvidia,tegra186-mvc",
- "nvidia,tegra210-mvc";
- reg = <0x290a000 0x200>;
- sound-name-prefix = "MVC1";
- status = "disabled";
- };
-
- tegra_mvc2: mvc@290a200 {
- compatible = "nvidia,tegra186-mvc",
- "nvidia,tegra210-mvc";
- reg = <0x290a200 0x200>;
- sound-name-prefix = "MVC2";
- status = "disabled";
- };
-
tegra_amx1: amx@2903000 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
- reg = <0x2903000 0x100>;
+ reg = <0x0 0x2903000 0x0 0x100>;
sound-name-prefix = "AMX1";
status = "disabled";
};
@@ -456,7 +275,7 @@
tegra_amx2: amx@2903100 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
- reg = <0x2903100 0x100>;
+ reg = <0x0 0x2903100 0x0 0x100>;
sound-name-prefix = "AMX2";
status = "disabled";
};
@@ -464,7 +283,7 @@
tegra_amx3: amx@2903200 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
- reg = <0x2903200 0x100>;
+ reg = <0x0 0x2903200 0x0 0x100>;
sound-name-prefix = "AMX3";
status = "disabled";
};
@@ -472,7 +291,7 @@
tegra_amx4: amx@2903300 {
compatible = "nvidia,tegra186-amx",
"nvidia,tegra210-amx";
- reg = <0x2903300 0x100>;
+ reg = <0x0 0x2903300 0x0 0x100>;
sound-name-prefix = "AMX4";
status = "disabled";
};
@@ -480,7 +299,7 @@
tegra_adx1: adx@2903800 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
- reg = <0x2903800 0x100>;
+ reg = <0x0 0x2903800 0x0 0x100>;
sound-name-prefix = "ADX1";
status = "disabled";
};
@@ -488,7 +307,7 @@
tegra_adx2: adx@2903900 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
- reg = <0x2903900 0x100>;
+ reg = <0x0 0x2903900 0x0 0x100>;
sound-name-prefix = "ADX2";
status = "disabled";
};
@@ -496,7 +315,7 @@
tegra_adx3: adx@2903a00 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
- reg = <0x2903a00 0x100>;
+ reg = <0x0 0x2903a00 0x0 0x100>;
sound-name-prefix = "ADX3";
status = "disabled";
};
@@ -504,17 +323,89 @@
tegra_adx4: adx@2903b00 {
compatible = "nvidia,tegra186-adx",
"nvidia,tegra210-adx";
- reg = <0x2903b00 0x100>;
+ reg = <0x0 0x2903b00 0x0 0x100>;
sound-name-prefix = "ADX4";
status = "disabled";
};
+ tegra_dmic1: dmic@2904000 {
+ compatible = "nvidia,tegra210-dmic";
+ reg = <0x0 0x2904000 0x0 0x100>;
+ clocks = <&bpmp TEGRA186_CLK_DMIC1>;
+ clock-names = "dmic";
+ assigned-clocks = <&bpmp TEGRA186_CLK_DMIC1>;
+ assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
+ assigned-clock-rates = <3072000>;
+ sound-name-prefix = "DMIC1";
+ status = "disabled";
+ };
+
+ tegra_dmic2: dmic@2904100 {
+ compatible = "nvidia,tegra210-dmic";
+ reg = <0x0 0x2904100 0x0 0x100>;
+ clocks = <&bpmp TEGRA186_CLK_DMIC2>;
+ clock-names = "dmic";
+ assigned-clocks = <&bpmp TEGRA186_CLK_DMIC2>;
+ assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
+ assigned-clock-rates = <3072000>;
+ sound-name-prefix = "DMIC2";
+ status = "disabled";
+ };
+
+ tegra_dmic3: dmic@2904200 {
+ compatible = "nvidia,tegra210-dmic";
+ reg = <0x0 0x2904200 0x0 0x100>;
+ clocks = <&bpmp TEGRA186_CLK_DMIC3>;
+ clock-names = "dmic";
+ assigned-clocks = <&bpmp TEGRA186_CLK_DMIC3>;
+ assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
+ assigned-clock-rates = <3072000>;
+ sound-name-prefix = "DMIC3";
+ status = "disabled";
+ };
+
+ tegra_dmic4: dmic@2904300 {
+ compatible = "nvidia,tegra210-dmic";
+ reg = <0x0 0x2904300 0x0 0x100>;
+ clocks = <&bpmp TEGRA186_CLK_DMIC4>;
+ clock-names = "dmic";
+ assigned-clocks = <&bpmp TEGRA186_CLK_DMIC4>;
+ assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
+ assigned-clock-rates = <3072000>;
+ sound-name-prefix = "DMIC4";
+ status = "disabled";
+ };
+
+ tegra_dspk1: dspk@2905000 {
+ compatible = "nvidia,tegra186-dspk";
+ reg = <0x0 0x2905000 0x0 0x100>;
+ clocks = <&bpmp TEGRA186_CLK_DSPK1>;
+ clock-names = "dspk";
+ assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
+ assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
+ assigned-clock-rates = <12288000>;
+ sound-name-prefix = "DSPK1";
+ status = "disabled";
+ };
+
+ tegra_dspk2: dspk@2905100 {
+ compatible = "nvidia,tegra186-dspk";
+ reg = <0x0 0x2905100 0x0 0x100>;
+ clocks = <&bpmp TEGRA186_CLK_DSPK2>;
+ clock-names = "dspk";
+ assigned-clocks = <&bpmp TEGRA186_CLK_DSPK2>;
+ assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
+ assigned-clock-rates = <12288000>;
+ sound-name-prefix = "DSPK2";
+ status = "disabled";
+ };
+
tegra_ope1: processing-engine@2908000 {
compatible = "nvidia,tegra186-ope",
"nvidia,tegra210-ope";
- reg = <0x2908000 0x100>;
- #address-cells = <1>;
- #size-cells = <1>;
+ reg = <0x0 0x2908000 0x0 0x100>;
+ #address-cells = <2>;
+ #size-cells = <2>;
ranges;
sound-name-prefix = "OPE1";
status = "disabled";
@@ -522,31 +413,149 @@
equalizer@2908100 {
compatible = "nvidia,tegra186-peq",
"nvidia,tegra210-peq";
- reg = <0x2908100 0x100>;
+ reg = <0x0 0x2908100 0x0 0x100>;
};
dynamic-range-compressor@2908200 {
compatible = "nvidia,tegra186-mbdrc",
"nvidia,tegra210-mbdrc";
- reg = <0x2908200 0x200>;
+ reg = <0x0 0x2908200 0x0 0x200>;
};
};
+ tegra_mvc1: mvc@290a000 {
+ compatible = "nvidia,tegra186-mvc",
+ "nvidia,tegra210-mvc";
+ reg = <0x0 0x290a000 0x0 0x200>;
+ sound-name-prefix = "MVC1";
+ status = "disabled";
+ };
+
+ tegra_mvc2: mvc@290a200 {
+ compatible = "nvidia,tegra186-mvc",
+ "nvidia,tegra210-mvc";
+ reg = <0x0 0x290a200 0x0 0x200>;
+ sound-name-prefix = "MVC2";
+ status = "disabled";
+ };
+
tegra_amixer: amixer@290bb00 {
compatible = "nvidia,tegra186-amixer",
"nvidia,tegra210-amixer";
- reg = <0x290bb00 0x800>;
+ reg = <0x0 0x290bb00 0x0 0x800>;
sound-name-prefix = "MIXER1";
status = "disabled";
};
+ tegra_admaif: admaif@290f000 {
+ compatible = "nvidia,tegra186-admaif";
+ reg = <0x0 0x0290f000 0x0 0x1000>;
+ dmas = <&adma 1>, <&adma 1>,
+ <&adma 2>, <&adma 2>,
+ <&adma 3>, <&adma 3>,
+ <&adma 4>, <&adma 4>,
+ <&adma 5>, <&adma 5>,
+ <&adma 6>, <&adma 6>,
+ <&adma 7>, <&adma 7>,
+ <&adma 8>, <&adma 8>,
+ <&adma 9>, <&adma 9>,
+ <&adma 10>, <&adma 10>,
+ <&adma 11>, <&adma 11>,
+ <&adma 12>, <&adma 12>,
+ <&adma 13>, <&adma 13>,
+ <&adma 14>, <&adma 14>,
+ <&adma 15>, <&adma 15>,
+ <&adma 16>, <&adma 16>,
+ <&adma 17>, <&adma 17>,
+ <&adma 18>, <&adma 18>,
+ <&adma 19>, <&adma 19>,
+ <&adma 20>, <&adma 20>;
+ dma-names = "rx1", "tx1",
+ "rx2", "tx2",
+ "rx3", "tx3",
+ "rx4", "tx4",
+ "rx5", "tx5",
+ "rx6", "tx6",
+ "rx7", "tx7",
+ "rx8", "tx8",
+ "rx9", "tx9",
+ "rx10", "tx10",
+ "rx11", "tx11",
+ "rx12", "tx12",
+ "rx13", "tx13",
+ "rx14", "tx14",
+ "rx15", "tx15",
+ "rx16", "tx16",
+ "rx17", "tx17",
+ "rx18", "tx18",
+ "rx19", "tx19",
+ "rx20", "tx20";
+ status = "disabled";
+ };
+
tegra_asrc: asrc@2910000 {
compatible = "nvidia,tegra186-asrc";
- reg = <0x2910000 0x2000>;
+ reg = <0x0 0x2910000 0x0 0x2000>;
sound-name-prefix = "ASRC1";
status = "disabled";
};
};
+
+ adma: dma-controller@2930000 {
+ compatible = "nvidia,tegra186-adma";
+ reg = <0x0 0x02930000 0x0 0x20000>;
+ interrupt-parent = <&agic>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&bpmp TEGRA186_CLK_AHUB>;
+ clock-names = "d_audio";
+ status = "disabled";
+ };
+
+ agic: interrupt-controller@2a40000 {
+ compatible = "nvidia,tegra186-agic",
+ "nvidia,tegra210-agic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x0 0x02a41000 0x0 0x1000>,
+ <0x0 0x02a42000 0x0 0x2000>;
+ interrupts = <GIC_SPI 145
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&bpmp TEGRA186_CLK_APE>;
+ clock-names = "clk";
+ status = "disabled";
+ };
};
mc: memory-controller@2c00000 {
@@ -608,9 +617,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTA>;
- clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTA>;
- reset-names = "serial";
+ dmas = <&gpcdma 8>, <&gpcdma 8>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -620,9 +629,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTB>;
- clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTB>;
- reset-names = "serial";
+ dmas = <&gpcdma 9>, <&gpcdma 9>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -632,9 +641,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTD>;
- clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTD>;
- reset-names = "serial";
+ dmas = <&gpcdma 19>, <&gpcdma 19>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -644,9 +653,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTE>;
- clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTE>;
- reset-names = "serial";
+ dmas = <&gpcdma 20>, <&gpcdma 20>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -656,9 +665,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTF>;
- clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTF>;
- reset-names = "serial";
+ dmas = <&gpcdma 12>, <&gpcdma 12>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -672,8 +681,6 @@
clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C1>;
reset-names = "i2c";
- iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
- dma-coherent;
dmas = <&gpcdma 21>, <&gpcdma 21>;
dma-names = "rx", "tx";
status = "disabled";
@@ -689,8 +696,6 @@
clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C3>;
reset-names = "i2c";
- iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
- dma-coherent;
dmas = <&gpcdma 23>, <&gpcdma 23>;
dma-names = "rx", "tx";
status = "disabled";
@@ -710,8 +715,6 @@
pinctrl-names = "default", "idle";
pinctrl-0 = <&state_dpaux1_i2c>;
pinctrl-1 = <&state_dpaux1_off>;
- iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
- dma-coherent;
dmas = <&gpcdma 26>, <&gpcdma 26>;
dma-names = "rx", "tx";
status = "disabled";
@@ -745,8 +748,6 @@
pinctrl-names = "default", "idle";
pinctrl-0 = <&state_dpaux_i2c>;
pinctrl-1 = <&state_dpaux_off>;
- iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
- dma-coherent;
dmas = <&gpcdma 30>, <&gpcdma 30>;
dma-names = "rx", "tx";
status = "disabled";
@@ -762,8 +763,6 @@
clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C7>;
reset-names = "i2c";
- iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
- dma-coherent;
dmas = <&gpcdma 27>, <&gpcdma 27>;
dma-names = "rx", "tx";
status = "disabled";
@@ -779,8 +778,6 @@
clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C9>;
reset-names = "i2c";
- iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
- dma-coherent;
dmas = <&gpcdma 31>, <&gpcdma 31>;
dma-names = "rx", "tx";
status = "disabled";
@@ -790,7 +787,6 @@
compatible = "nvidia,tegra186-pwm";
reg = <0x0 0x3280000 0x0 0x10000>;
clocks = <&bpmp TEGRA186_CLK_PWM1>;
- clock-names = "pwm";
resets = <&bpmp TEGRA186_RESET_PWM1>;
reset-names = "pwm";
status = "disabled";
@@ -801,7 +797,6 @@
compatible = "nvidia,tegra186-pwm";
reg = <0x0 0x3290000 0x0 0x10000>;
clocks = <&bpmp TEGRA186_CLK_PWM2>;
- clock-names = "pwm";
resets = <&bpmp TEGRA186_RESET_PWM2>;
reset-names = "pwm";
status = "disabled";
@@ -812,7 +807,6 @@
compatible = "nvidia,tegra186-pwm";
reg = <0x0 0x32a0000 0x0 0x10000>;
clocks = <&bpmp TEGRA186_CLK_PWM3>;
- clock-names = "pwm";
resets = <&bpmp TEGRA186_RESET_PWM3>;
reset-names = "pwm";
status = "disabled";
@@ -823,7 +817,6 @@
compatible = "nvidia,tegra186-pwm";
reg = <0x0 0x32c0000 0x0 0x10000>;
clocks = <&bpmp TEGRA186_CLK_PWM5>;
- clock-names = "pwm";
resets = <&bpmp TEGRA186_RESET_PWM5>;
reset-names = "pwm";
status = "disabled";
@@ -834,7 +827,6 @@
compatible = "nvidia,tegra186-pwm";
reg = <0x0 0x32d0000 0x0 0x10000>;
clocks = <&bpmp TEGRA186_CLK_PWM6>;
- clock-names = "pwm";
resets = <&bpmp TEGRA186_RESET_PWM6>;
reset-names = "pwm";
status = "disabled";
@@ -845,7 +837,6 @@
compatible = "nvidia,tegra186-pwm";
reg = <0x0 0x32e0000 0x0 0x10000>;
clocks = <&bpmp TEGRA186_CLK_PWM7>;
- clock-names = "pwm";
resets = <&bpmp TEGRA186_RESET_PWM7>;
reset-names = "pwm";
status = "disabled";
@@ -856,7 +847,6 @@
compatible = "nvidia,tegra186-pwm";
reg = <0x0 0x32f0000 0x0 0x10000>;
clocks = <&bpmp TEGRA186_CLK_PWM8>;
- clock-names = "pwm";
resets = <&bpmp TEGRA186_RESET_PWM8>;
reset-names = "pwm";
status = "disabled";
@@ -975,6 +965,34 @@
status = "disabled";
};
+ sata@3507000 {
+ compatible = "nvidia,tegra186-ahci";
+ reg = <0x0 0x03507000 0x0 0x00002000>, /* AHCI */
+ <0x0 0x03500000 0x0 0x00007000>, /* SATA */
+ <0x0 0x03A90000 0x0 0x00010000>; /* SATA AUX */
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+
+ power-domains = <&bpmp TEGRA186_POWER_DOMAIN_SAX>;
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_SATAR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_SATAW &emc>;
+ interconnect-names = "dma-mem", "write";
+ iommus = <&smmu TEGRA186_SID_SATA>;
+
+ clocks = <&bpmp TEGRA186_CLK_SATA>,
+ <&bpmp TEGRA186_CLK_SATA_OOB>;
+ clock-names = "sata", "sata-oob";
+ assigned-clocks = <&bpmp TEGRA186_CLK_SATA>,
+ <&bpmp TEGRA186_CLK_SATA_OOB>;
+ assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>,
+ <&bpmp TEGRA186_CLK_PLLP>;
+ assigned-clock-rates = <102000000>,
+ <204000000>;
+ resets = <&bpmp TEGRA186_RESET_SATA>,
+ <&bpmp TEGRA186_RESET_SATACOLD>;
+ reset-names = "sata", "sata-cold";
+ status = "disabled";
+ };
+
hda@3510000 {
compatible = "nvidia,tegra186-hda", "nvidia,tegra30-hda";
reg = <0x0 0x03510000 0x0 0x10000>;
@@ -1161,6 +1179,7 @@
gic: interrupt-controller@3881000 {
compatible = "arm,gic-400";
+ #address-cells = <0>;
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x03881000 0x0 0x1000>,
@@ -1173,7 +1192,7 @@
};
cec@3960000 {
- compatible = "nvidia,tegra186-cec";
+ compatible = "nvidia,tegra186-cec", "nvidia,tegra210-cec";
reg = <0x0 0x03960000 0x0 0x10000>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_CEC>;
@@ -1200,8 +1219,6 @@
clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C2>;
reset-names = "i2c";
- iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
- dma-coherent;
dmas = <&gpcdma 22>, <&gpcdma 22>;
dma-names = "rx", "tx";
status = "disabled";
@@ -1217,8 +1234,6 @@
clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C8>;
reset-names = "i2c";
- iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
- dma-coherent;
dmas = <&gpcdma 0>, <&gpcdma 0>;
dma-names = "rx", "tx";
status = "disabled";
@@ -1230,9 +1245,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTC>;
- clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTC>;
- reset-names = "serial";
+ dmas = <&gpcdma 3>, <&gpcdma 3>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -1242,9 +1257,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTG>;
- clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTG>;
- reset-names = "serial";
+ dmas = <&gpcdma 2>, <&gpcdma 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -1266,15 +1281,20 @@
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pinmux_aon 0 0 47>;
interrupt-controller;
#interrupt-cells = <2>;
};
+ pinmux_aon: pinmux@c300000 {
+ compatible = "nvidia,tegra186-pinmux-aon";
+ reg = <0x0 0xc300000 0x0 0x4000>;
+ };
+
pwm4: pwm@c340000 {
compatible = "nvidia,tegra186-pwm";
reg = <0x0 0xc340000 0x0 0x10000>;
clocks = <&bpmp TEGRA186_CLK_PWM4>;
- clock-names = "pwm";
resets = <&bpmp TEGRA186_RESET_PWM4>;
reset-names = "pwm";
status = "disabled";
@@ -1292,18 +1312,13 @@
#interrupt-cells = <2>;
interrupt-controller;
- sdmmc1_3v3: sdmmc1-3v3 {
- pins = "sdmmc1-hv";
- power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
- };
-
sdmmc1_1v8: sdmmc1-1v8 {
pins = "sdmmc1-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
- sdmmc2_3v3: sdmmc2-3v3 {
- pins = "sdmmc2-hv";
+ sdmmc1_3v3: sdmmc1-3v3 {
+ pins = "sdmmc1-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
@@ -1312,8 +1327,8 @@
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
- sdmmc3_3v3: sdmmc3-3v3 {
- pins = "sdmmc3-hv";
+ sdmmc2_3v3: sdmmc2-3v3 {
+ pins = "sdmmc2-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
};
@@ -1321,6 +1336,11 @@
pins = "sdmmc3-hv";
power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
};
+
+ sdmmc3_3v3: sdmmc3-3v3 {
+ pins = "sdmmc3-hv";
+ power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
+ };
};
ccplex@e000000 {
@@ -1506,10 +1526,10 @@
resets = <&bpmp TEGRA186_RESET_HOST1X>;
reset-names = "host1x";
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
- ranges = <0x15000000 0x0 0x15000000 0x01000000>;
+ ranges = <0x0 0x15000000 0x0 0x15000000 0x0 0x01000000>;
interconnects = <&mc TEGRA186_MEMORY_CLIENT_HOST1XDMAR &emc>;
interconnect-names = "dma-mem";
@@ -1528,7 +1548,7 @@
dpaux1: dpaux@15040000 {
compatible = "nvidia,tegra186-dpaux";
- reg = <0x15040000 0x10000>;
+ reg = <0x0 0x15040000 0x0 0x10000>;
interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_DPAUX1>,
<&bpmp TEGRA186_CLK_PLLDP>;
@@ -1562,7 +1582,7 @@
display-hub@15200000 {
compatible = "nvidia,tegra186-display";
- reg = <0x15200000 0x00040000>;
+ reg = <0x0 0x15200000 0x0 0x00040000>;
resets = <&bpmp TEGRA186_RESET_NVDISPLAY0_MISC>,
<&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP0>,
<&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP1>,
@@ -1580,14 +1600,14 @@
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
- ranges = <0x15200000 0x15200000 0x40000>;
+ ranges = <0x0 0x15200000 0x0 0x15200000 0x0 0x40000>;
display@15200000 {
compatible = "nvidia,tegra186-dc";
- reg = <0x15200000 0x10000>;
+ reg = <0x0 0x15200000 0x0 0x10000>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_P0>;
clock-names = "dc";
@@ -1606,7 +1626,7 @@
display@15210000 {
compatible = "nvidia,tegra186-dc";
- reg = <0x15210000 0x10000>;
+ reg = <0x0 0x15210000 0x0 0x10000>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_P1>;
clock-names = "dc";
@@ -1625,7 +1645,7 @@
display@15220000 {
compatible = "nvidia,tegra186-dc";
- reg = <0x15220000 0x10000>;
+ reg = <0x0 0x15220000 0x0 0x10000>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_P2>;
clock-names = "dc";
@@ -1645,7 +1665,7 @@
dsia: dsi@15300000 {
compatible = "nvidia,tegra186-dsi";
- reg = <0x15300000 0x10000>;
+ reg = <0x0 0x15300000 0x0 0x10000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_DSI>,
<&bpmp TEGRA186_CLK_DSIA_LP>,
@@ -1660,7 +1680,7 @@
vic@15340000 {
compatible = "nvidia,tegra186-vic";
- reg = <0x15340000 0x40000>;
+ reg = <0x0 0x15340000 0x0 0x40000>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_VIC>;
clock-names = "vic";
@@ -1676,7 +1696,7 @@
nvjpg@15380000 {
compatible = "nvidia,tegra186-nvjpg";
- reg = <0x15380000 0x40000>;
+ reg = <0x0 0x15380000 0x0 0x40000>;
clocks = <&bpmp TEGRA186_CLK_NVJPG>;
clock-names = "nvjpg";
resets = <&bpmp TEGRA186_RESET_NVJPG>;
@@ -1691,7 +1711,7 @@
dsib: dsi@15400000 {
compatible = "nvidia,tegra186-dsi";
- reg = <0x15400000 0x10000>;
+ reg = <0x0 0x15400000 0x0 0x10000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_DSIB>,
<&bpmp TEGRA186_CLK_DSIB_LP>,
@@ -1706,7 +1726,7 @@
nvdec@15480000 {
compatible = "nvidia,tegra186-nvdec";
- reg = <0x15480000 0x40000>;
+ reg = <0x0 0x15480000 0x0 0x40000>;
clocks = <&bpmp TEGRA186_CLK_NVDEC>;
clock-names = "nvdec";
resets = <&bpmp TEGRA186_RESET_NVDEC>;
@@ -1722,7 +1742,7 @@
nvenc@154c0000 {
compatible = "nvidia,tegra186-nvenc";
- reg = <0x154c0000 0x40000>;
+ reg = <0x0 0x154c0000 0x0 0x40000>;
clocks = <&bpmp TEGRA186_CLK_NVENC>;
clock-names = "nvenc";
resets = <&bpmp TEGRA186_RESET_NVENC>;
@@ -1737,7 +1757,7 @@
sor0: sor@15540000 {
compatible = "nvidia,tegra186-sor";
- reg = <0x15540000 0x10000>;
+ reg = <0x0 0x15540000 0x0 0x10000>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_SOR0>,
<&bpmp TEGRA186_CLK_SOR0_OUT>,
@@ -1761,7 +1781,7 @@
sor1: sor@15580000 {
compatible = "nvidia,tegra186-sor";
- reg = <0x15580000 0x10000>;
+ reg = <0x0 0x15580000 0x0 0x10000>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_SOR1>,
<&bpmp TEGRA186_CLK_SOR1_OUT>,
@@ -1785,7 +1805,7 @@
dpaux: dpaux@155c0000 {
compatible = "nvidia,tegra186-dpaux";
- reg = <0x155c0000 0x10000>;
+ reg = <0x0 0x155c0000 0x0 0x10000>;
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_DPAUX>,
<&bpmp TEGRA186_CLK_PLLDP>;
@@ -1819,7 +1839,7 @@
padctl@15880000 {
compatible = "nvidia,tegra186-dsi-padctl";
- reg = <0x15880000 0x10000>;
+ reg = <0x0 0x15880000 0x0 0x10000>;
resets = <&bpmp TEGRA186_RESET_DSI>;
reset-names = "dsi";
status = "disabled";
@@ -1827,7 +1847,7 @@
dsic: dsi@15900000 {
compatible = "nvidia,tegra186-dsi";
- reg = <0x15900000 0x10000>;
+ reg = <0x0 0x15900000 0x0 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_DSIC>,
<&bpmp TEGRA186_CLK_DSIC_LP>,
@@ -1842,7 +1862,7 @@
dsid: dsi@15940000 {
compatible = "nvidia,tegra186-dsi";
- reg = <0x15940000 0x10000>;
+ reg = <0x0 0x15940000 0x0 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_DSID>,
<&bpmp TEGRA186_CLK_DSID_LP>,
@@ -1900,34 +1920,6 @@
};
};
- sata@3507000 {
- compatible = "nvidia,tegra186-ahci";
- reg = <0x0 0x03507000 0x0 0x00002000>, /* AHCI */
- <0x0 0x03500000 0x0 0x00007000>, /* SATA */
- <0x0 0x03A90000 0x0 0x00010000>; /* SATA AUX */
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
-
- power-domains = <&bpmp TEGRA186_POWER_DOMAIN_SAX>;
- interconnects = <&mc TEGRA186_MEMORY_CLIENT_SATAR &emc>,
- <&mc TEGRA186_MEMORY_CLIENT_SATAW &emc>;
- interconnect-names = "dma-mem", "write";
- iommus = <&smmu TEGRA186_SID_SATA>;
-
- clocks = <&bpmp TEGRA186_CLK_SATA>,
- <&bpmp TEGRA186_CLK_SATA_OOB>;
- clock-names = "sata", "sata-oob";
- assigned-clocks = <&bpmp TEGRA186_CLK_SATA>,
- <&bpmp TEGRA186_CLK_SATA_OOB>;
- assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>,
- <&bpmp TEGRA186_CLK_PLLP>;
- assigned-clock-rates = <102000000>,
- <204000000>;
- resets = <&bpmp TEGRA186_RESET_SATA>,
- <&bpmp TEGRA186_RESET_SATACOLD>;
- reset-names = "sata", "sata-cold";
- status = "disabled";
- };
-
bpmp: bpmp {
compatible = "nvidia,tegra186-bpmp";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,
@@ -2058,14 +2050,7 @@
};
};
- pmu_denver {
- compatible = "nvidia,denver-pmu";
- interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&denver_0 &denver_1>;
- };
-
- pmu_a57 {
+ pmu-a57 {
compatible = "arm,cortex-a57-pmu";
interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
@@ -2074,6 +2059,13 @@
interrupt-affinity = <&ca57_0 &ca57_1 &ca57_2 &ca57_3>;
};
+ pmu-denver {
+ compatible = "nvidia,denver-pmu";
+ interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&denver_0 &denver_1>;
+ };
+
sound {
status = "disabled";
generated by cgit (git 2.34.1) at 2025-12-29 03:07:57 +0000