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Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8916.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916.dtsi186
1 files changed, 98 insertions, 88 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index cedff4166bfb..de9fdc0dfc5f 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/arm/coresight-cti-dt.h>
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-msm8916.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/interconnect/qcom,msm8916.h>
@@ -125,7 +126,7 @@
sleep_clk: sleep-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <32768>;
+ clock-frequency = <32764>;
};
};
@@ -133,67 +134,67 @@
#address-cells = <1>;
#size-cells = <0>;
- CPU0: cpu@0 {
+ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0>;
- next-level-cache = <&L2_0>;
+ next-level-cache = <&l2_0>;
enable-method = "psci";
clocks = <&apcs>;
operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>;
- power-domains = <&CPU_PD0>;
+ power-domains = <&cpu_pd0>;
power-domain-names = "psci";
qcom,acc = <&cpu0_acc>;
qcom,saw = <&cpu0_saw>;
};
- CPU1: cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x1>;
- next-level-cache = <&L2_0>;
+ next-level-cache = <&l2_0>;
enable-method = "psci";
clocks = <&apcs>;
operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>;
- power-domains = <&CPU_PD1>;
+ power-domains = <&cpu_pd1>;
power-domain-names = "psci";
qcom,acc = <&cpu1_acc>;
qcom,saw = <&cpu1_saw>;
};
- CPU2: cpu@2 {
+ cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x2>;
- next-level-cache = <&L2_0>;
+ next-level-cache = <&l2_0>;
enable-method = "psci";
clocks = <&apcs>;
operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>;
- power-domains = <&CPU_PD2>;
+ power-domains = <&cpu_pd2>;
power-domain-names = "psci";
qcom,acc = <&cpu2_acc>;
qcom,saw = <&cpu2_saw>;
};
- CPU3: cpu@3 {
+ cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x3>;
- next-level-cache = <&L2_0>;
+ next-level-cache = <&l2_0>;
enable-method = "psci";
clocks = <&apcs>;
operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>;
- power-domains = <&CPU_PD3>;
+ power-domains = <&cpu_pd3>;
power-domain-names = "psci";
qcom,acc = <&cpu3_acc>;
qcom,saw = <&cpu3_saw>;
};
- L2_0: l2-cache {
+ l2_0: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
@@ -202,7 +203,7 @@
idle-states {
entry-method = "psci";
- CPU_SLEEP_0: cpu-sleep-0 {
+ cpu_sleep_0: cpu-sleep-0 {
compatible = "arm,idle-state";
idle-state-name = "standalone-power-collapse";
arm,psci-suspend-param = <0x40000002>;
@@ -215,7 +216,7 @@
domain-idle-states {
- CLUSTER_RET: cluster-retention {
+ cluster_ret: cluster-retention {
compatible = "domain-idle-state";
arm,psci-suspend-param = <0x41000012>;
entry-latency-us = <500>;
@@ -223,7 +224,7 @@
min-residency-us = <2000>;
};
- CLUSTER_PWRDN: cluster-gdhs {
+ cluster_pwrdn: cluster-gdhs {
compatible = "domain-idle-state";
arm,psci-suspend-param = <0x41000032>;
entry-latency-us = <2000>;
@@ -273,33 +274,33 @@
compatible = "arm,psci-1.0";
method = "smc";
- CPU_PD0: power-domain-cpu0 {
+ cpu_pd0: power-domain-cpu0 {
#power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&CPU_SLEEP_0>;
+ power-domains = <&cluster_pd>;
+ domain-idle-states = <&cpu_sleep_0>;
};
- CPU_PD1: power-domain-cpu1 {
+ cpu_pd1: power-domain-cpu1 {
#power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&CPU_SLEEP_0>;
+ power-domains = <&cluster_pd>;
+ domain-idle-states = <&cpu_sleep_0>;
};
- CPU_PD2: power-domain-cpu2 {
+ cpu_pd2: power-domain-cpu2 {
#power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&CPU_SLEEP_0>;
+ power-domains = <&cluster_pd>;
+ domain-idle-states = <&cpu_sleep_0>;
};
- CPU_PD3: power-domain-cpu3 {
+ cpu_pd3: power-domain-cpu3 {
#power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&CPU_SLEEP_0>;
+ power-domains = <&cluster_pd>;
+ domain-idle-states = <&cpu_sleep_0>;
};
- CLUSTER_PD: power-domain-cluster {
+ cluster_pd: power-domain-cluster {
#power-domain-cells = <0>;
- domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
+ domain-idle-states = <&cluster_ret>, <&cluster_pwrdn>;
};
};
@@ -308,11 +309,11 @@
smd-edge {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
- qcom,ipc = <&apcs 8 0>;
+ mboxes = <&apcs 0>;
qcom,smd-edge = <15>;
rpm_requests: rpm-requests {
- compatible = "qcom,rpm-msm8916";
+ compatible = "qcom,rpm-msm8916", "qcom,smd-rpm";
qcom,smd-channels = "rpm_requests";
rpmcc: clock-controller {
@@ -360,7 +361,7 @@
interrupts = <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>;
- qcom,ipc = <&apcs 8 14>;
+ mboxes = <&apcs 14>;
qcom,local-pid = <0>;
qcom,remote-pid = <1>;
@@ -385,7 +386,7 @@
interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>;
- qcom,ipc = <&apcs 8 18>;
+ mboxes = <&apcs 18>;
qcom,local-pid = <0>;
qcom,remote-pid = <4>;
@@ -410,8 +411,7 @@
#address-cells = <1>;
#size-cells = <0>;
- qcom,ipc-1 = <&apcs 8 13>;
- qcom,ipc-3 = <&apcs 8 19>;
+ mboxes = <0>, <&apcs 13>, <0>, <&apcs 19>;
apps_smsm: apps@0 {
reg = <0>;
@@ -824,7 +824,7 @@
reg = <0x00850000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- cpu = <&CPU0>;
+ cpu = <&cpu0>;
status = "disabled";
};
@@ -833,7 +833,7 @@
reg = <0x00852000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- cpu = <&CPU1>;
+ cpu = <&cpu1>;
status = "disabled";
};
@@ -842,7 +842,7 @@
reg = <0x00854000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- cpu = <&CPU2>;
+ cpu = <&cpu2>;
status = "disabled";
};
@@ -851,7 +851,7 @@
reg = <0x00856000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- cpu = <&CPU3>;
+ cpu = <&cpu3>;
status = "disabled";
};
@@ -865,7 +865,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- cpu = <&CPU0>;
+ cpu = <&cpu0>;
arm,cs-dev-assoc = <&etm0>;
status = "disabled";
@@ -880,7 +880,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- cpu = <&CPU1>;
+ cpu = <&cpu1>;
arm,cs-dev-assoc = <&etm1>;
status = "disabled";
@@ -895,7 +895,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- cpu = <&CPU2>;
+ cpu = <&cpu2>;
arm,cs-dev-assoc = <&etm2>;
status = "disabled";
@@ -910,7 +910,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- cpu = <&CPU3>;
+ cpu = <&cpu3>;
arm,cs-dev-assoc = <&etm3>;
status = "disabled";
@@ -924,7 +924,7 @@
clock-names = "apb_pclk", "atclk";
arm,coresight-loses-context-with-cpu;
- cpu = <&CPU0>;
+ cpu = <&cpu0>;
status = "disabled";
@@ -945,7 +945,7 @@
clock-names = "apb_pclk", "atclk";
arm,coresight-loses-context-with-cpu;
- cpu = <&CPU1>;
+ cpu = <&cpu1>;
status = "disabled";
@@ -966,7 +966,7 @@
clock-names = "apb_pclk", "atclk";
arm,coresight-loses-context-with-cpu;
- cpu = <&CPU2>;
+ cpu = <&cpu2>;
status = "disabled";
@@ -987,7 +987,7 @@
clock-names = "apb_pclk", "atclk";
arm,coresight-loses-context-with-cpu;
- cpu = <&CPU3>;
+ cpu = <&cpu3>;
status = "disabled";
@@ -1232,29 +1232,50 @@
bias-pull-down;
};
- blsp_uart1_default: blsp-uart1-default-state {
- /* TX, RX, CTS_N, RTS_N */
- pins = "gpio0", "gpio1", "gpio2", "gpio3";
- function = "blsp_uart1";
- drive-strength = <16>;
- bias-disable;
+ blsp_uart1_console_default: blsp-uart1-console-default-state {
+ tx-pins {
+ pins = "gpio0";
+ function = "blsp_uart1";
+ drive-strength = <16>;
+ bias-disable;
+ bootph-all;
+ };
+
+ rx-pins {
+ pins = "gpio1";
+ function = "blsp_uart1";
+ drive-strength = <16>;
+ bias-pull-up;
+ bootph-all;
+ };
};
- blsp_uart1_sleep: blsp-uart1-sleep-state {
- pins = "gpio0", "gpio1", "gpio2", "gpio3";
+ blsp_uart1_console_sleep: blsp-uart1-console-sleep-state {
+ pins = "gpio0", "gpio1";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
- blsp_uart2_default: blsp-uart2-default-state {
- pins = "gpio4", "gpio5";
- function = "blsp_uart2";
- drive-strength = <16>;
- bias-disable;
+ blsp_uart2_console_default: blsp-uart2-console-default-state {
+ tx-pins {
+ pins = "gpio4";
+ function = "blsp_uart2";
+ drive-strength = <16>;
+ bias-disable;
+ bootph-all;
+ };
+
+ rx-pins {
+ pins = "gpio5";
+ function = "blsp_uart2";
+ drive-strength = <16>;
+ bias-pull-up;
+ bootph-all;
+ };
};
- blsp_uart2_sleep: blsp-uart2-sleep-state {
+ blsp_uart2_console_sleep: blsp-uart2-console-sleep-state {
pins = "gpio4", "gpio5";
function = "gpio";
drive-strength = <2>;
@@ -1498,8 +1519,8 @@
reg = <0x01800000 0x80000>;
clocks = <&xo_board>,
<&sleep_clk>,
- <&mdss_dsi0_phy 1>,
- <&mdss_dsi0_phy 0>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<0>,
<0>,
<0>;
@@ -1591,8 +1612,8 @@
assigned-clocks = <&gcc BYTE0_CLK_SRC>,
<&gcc PCLK0_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi0_phy 0>,
- <&mdss_dsi0_phy 1>;
+ assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
clocks = <&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_AHB_CLK>,
@@ -1978,7 +1999,7 @@
interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
qcom,smd-edge = <0>;
- qcom,ipc = <&apcs 8 12>;
+ mboxes = <&apcs 12>;
qcom,remote-pid = <1>;
label = "hexagon";
@@ -2159,9 +2180,6 @@
clock-names = "core", "iface";
dmas = <&blsp_dma 0>, <&blsp_dma 1>;
dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_uart1_default>;
- pinctrl-1 = <&blsp_uart1_sleep>;
status = "disabled";
};
@@ -2173,9 +2191,6 @@
clock-names = "core", "iface";
dmas = <&blsp_dma 2>, <&blsp_dma 3>;
dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_uart2_default>;
- pinctrl-1 = <&blsp_uart2_sleep>;
status = "disabled";
};
@@ -2459,7 +2474,7 @@
smd-edge {
interrupts = <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>;
- qcom,ipc = <&apcs 8 17>;
+ mboxes = <&apcs 17>;
qcom,smd-edge = <6>;
qcom,remote-pid = <4>;
@@ -2626,7 +2641,6 @@
thermal-zones {
cpu0-1-thermal {
polling-delay-passive = <250>;
- polling-delay = <1000>;
thermal-sensors = <&tsens 5>;
@@ -2646,17 +2660,16 @@
cooling-maps {
map0 {
trip = <&cpu0_1_alert0>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
cpu2-3-thermal {
polling-delay-passive = <250>;
- polling-delay = <1000>;
thermal-sensors = <&tsens 4>;
@@ -2676,17 +2689,16 @@
cooling-maps {
map0 {
trip = <&cpu2_3_alert0>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
gpu-thermal {
polling-delay-passive = <250>;
- polling-delay = <1000>;
thermal-sensors = <&tsens 2>;
@@ -2713,7 +2725,6 @@
camera-thermal {
polling-delay-passive = <250>;
- polling-delay = <1000>;
thermal-sensors = <&tsens 1>;
@@ -2728,7 +2739,6 @@
modem-thermal {
polling-delay-passive = <250>;
- polling-delay = <1000>;
thermal-sensors = <&tsens 0>;
generated by cgit (git 2.34.1) at 2025-07-23 13:25:17 +0000