diff options
Diffstat (limited to 'arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi b/arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi new file mode 100644 index 000000000000..a94b0bfa98dc --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include <dt-bindings/input/input.h> +#include <dt-bindings/spmi/spmi.h> + +&spmi_bus { + pmm8620au_0: pmic@0 { + compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmm8620au_0_rtc: rtc@6100 { + compatible = "qcom,pmk8350-rtc"; + reg = <0x6100>, <0x6200>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + allow-set-time; + }; + + pmm8620au_0_gpios: gpio@8800 { + compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmm8620au_0_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmm8650au_1: pmic@2 { + compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; + reg = <0x2 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmm8650au_1_gpios: gpio@8800 { + compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmm8650au_1_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; |