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Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7180.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sc7180.dtsi15
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 87c432c12a24..01e727b021ec 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -6,6 +6,7 @@
*/
#include <dt-bindings/clock/qcom,dispcc-sc7180.h>
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-sc7180.h>
#include <dt-bindings/clock/qcom,gpucc-sc7180.h>
#include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
@@ -3195,7 +3196,7 @@
mdp: display-controller@ae01000 {
compatible = "qcom,sc7180-dpu";
reg = <0 0x0ae01000 0 0x8f000>,
- <0 0x0aeb0000 0 0x2008>;
+ <0 0x0aeb0000 0 0x3000>;
reg-names = "mdp", "vbif";
clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
@@ -3284,8 +3285,10 @@
"iface",
"bus";
- assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
+ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
+ assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SC7180_CX>;
@@ -3433,8 +3436,8 @@
reg = <0 0x0af00000 0 0x200000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_DISP_GPLL0_CLK_SRC>,
- <&mdss_dsi0_phy 0>,
- <&mdss_dsi0_phy 1>,
+ <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
<&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
clock-names = "bi_tcxo",
@@ -3720,7 +3723,7 @@
};
apps_rsc: rsc@18200000 {
- compatible = "qcom,rpmh-rsc";
+ compatible = "qcom,sc7180-rpmh-apps-rsc", "qcom,rpmh-rsc";
reg = <0 0x18200000 0 0x10000>,
<0 0x18210000 0 0x10000>,
<0 0x18220000 0 0x10000>;