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Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm845-db845c.dts')
-rw-r--r--arch/arm64/boot/dts/qcom/sdm845-db845c.dts285
1 files changed, 145 insertions, 140 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index f41c6d600ea8..ce23f87e0316 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -5,19 +5,21 @@
/dts-v1/;
+#include <dt-bindings/arm/qcom,ids.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
#include "sdm845.dtsi"
+#include "sdm845-wcd9340.dtsi"
#include "pm8998.dtsi"
#include "pmi8998.dtsi"
/ {
model = "Thundercomm Dragonboard 845c";
compatible = "thundercomm,db845c", "qcom,sdm845";
- qcom,msm-id = <341 0x20001>;
+ qcom,msm-id = <QCOM_ID_SDA845 0x20001>;
qcom,board-id = <8 0>;
aliases {
@@ -30,7 +32,7 @@
};
/* Fixed crystal oscillator dedicated to MCP2517FD */
- clk40M: can-clock {
+ clk40m: can-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <40000000>;
@@ -54,7 +56,7 @@
key-vol-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
- gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
+ gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
};
};
@@ -65,16 +67,16 @@
label = "green:user4";
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_GREEN>;
- gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "panic-indicator";
+ gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>;
default-state = "off";
+ panic-indicator;
};
led-1 {
label = "yellow:wlan";
function = LED_FUNCTION_WLAN;
color = <LED_COLOR_ID_YELLOW>;
- gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
+ gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tx";
default-state = "off";
};
@@ -83,7 +85,7 @@
label = "blue:bt";
function = LED_FUNCTION_BLUETOOTH;
color = <LED_COLOR_ID_BLUE>;
- gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
+ gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "bluetooth-power";
default-state = "off";
};
@@ -100,6 +102,14 @@
};
};
+ reserved-memory {
+ /* Cont splash region set up by the bootloader */
+ cont_splash_mem: framebuffer@9d400000 {
+ reg = <0x0 0x9d400000 0x0 0x2400000>;
+ no-map;
+ };
+ };
+
lt9611_1v8: lt9611-vdd18-regulator {
compatible = "regulator-fixed";
regulator-name = "LT9611_1V8";
@@ -142,32 +152,32 @@
*/
};
- cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
+ cam0_dvdd_1v2: cam0-dvdd-1v2-regulator {
compatible = "regulator-fixed";
regulator-name = "CAM0_DVDD_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
enable-active-high;
- gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
vin-supply = <&vbat>;
};
- cam0_avdd_2v8: reg_cam0_avdd_2v8 {
+ cam0_avdd_2v8: cam0-avdd-2v8-regulator {
compatible = "regulator-fixed";
regulator-name = "CAM0_AVDD_2V8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
enable-active-high;
- gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
+ gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cam0_avdd_2v8_en_default>;
vin-supply = <&vbat>;
};
/* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
- cam3_avdd_2v8: reg_cam3_avdd_2v8 {
+ cam3_avdd_2v8: cam3-avdd-2v8-regulator {
compatible = "regulator-fixed";
regulator-name = "CAM3_AVDD_2V8";
regulator-min-microvolt = <2800000>;
@@ -186,6 +196,12 @@
gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
enable-active-high;
+ /*
+ * FIXME: this regulator is responsible for VBUS on the left USB
+ * port. Keep it always on until we can correctly model this
+ * relationship.
+ */
+ regulator-always-on;
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pwren_state>;
@@ -269,7 +285,7 @@
};
&apps_rsc {
- pm8998-rpmh-regulators {
+ regulators-0 {
compatible = "qcom,pm8998-rpmh-regulators";
qcom,pmic-id = "a";
vdd-s1-supply = <&vph_pwr>;
@@ -394,7 +410,7 @@
};
};
- pmi8998-rpmh-regulators {
+ regulators-1 {
compatible = "qcom,pmi8998-rpmh-regulators";
qcom,pmic-id = "b";
@@ -409,28 +425,16 @@
};
};
-&cdsp_pas {
- status = "okay";
- firmware-name = "qcom/sdm845/cdsp.mbn";
-};
-
-&dsi0 {
+&camss {
status = "okay";
- vdda-supply = <&vreg_l26a_1p2>;
- ports {
- port@1 {
- endpoint {
- remote-endpoint = <&lt9611_a>;
- data-lanes = <0 1 2 3>;
- };
- };
- };
+ vdda-phy-supply = <&vreg_l1a_0p875>;
+ vdda-pll-supply = <&vreg_l26a_1p2>;
};
-&dsi0_phy {
+&cdsp_pas {
status = "okay";
- vdds-supply = <&vreg_l1a_0p875>;
+ firmware-name = "qcom/sdm845/cdsp.mbn";
};
&gcc {
@@ -441,10 +445,6 @@
<GCC_LPASS_SWAY_CLK>;
};
-&gmu {
- status = "okay";
-};
-
&gpi_dma0 {
status = "okay";
};
@@ -455,10 +455,10 @@
&gpu {
status = "okay";
- zap-shader {
- memory-region = <&gpu_mem>;
- firmware-name = "qcom/sdm845/a630_zap.mbn";
- };
+};
+
+&gpu_zap_shader {
+ firmware-name = "qcom/sdm845/a630_zap.mbn";
};
&i2c10 {
@@ -488,7 +488,15 @@
reg = <0>;
lt9611_a: endpoint {
- remote-endpoint = <&dsi0_out>;
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lt9611_b: endpoint {
+ remote-endpoint = <&mdss_dsi1_out>;
};
};
@@ -506,18 +514,57 @@
&i2c11 {
/* On Low speed expansion */
clock-frequency = <100000>;
- label = "LS-I2C1";
status = "okay";
};
&i2c14 {
/* On Low speed expansion */
clock-frequency = <100000>;
- label = "LS-I2C0";
status = "okay";
};
&mdss {
+ memory-region = <&cont_splash_mem>;
+ status = "okay";
+};
+
+&mdss_dsi0 {
+ status = "okay";
+ vdda-supply = <&vreg_l26a_1p2>;
+
+ qcom,dual-dsi-mode;
+ qcom,master-dsi;
+};
+
+&mdss_dsi0_out {
+ remote-endpoint = <&lt9611_a>;
+ data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi0_phy {
+ status = "okay";
+ vdds-supply = <&vreg_l1a_0p875>;
+};
+
+&mdss_dsi1 {
+ vdda-supply = <&vreg_l26a_1p2>;
+
+ qcom,dual-dsi-mode;
+
+ /* DSI1 is slave, so use DSI0 clocks */
+ assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
+
+ status = "okay";
+};
+
+&mdss_dsi1_out {
+ remote-endpoint = <&lt9611_b>;
+ data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi1_phy {
+ vdds-supply = <&vreg_l1a_0p875>;
status = "okay";
};
@@ -529,7 +576,7 @@
&pcie0 {
status = "okay";
perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
- enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>;
vddpe-3v3-supply = <&pcie0_3p3v_dual>;
@@ -559,7 +606,7 @@
vdda-pll-supply = <&vreg_l26a_1p2>;
};
-&pm8998_gpio {
+&pm8998_gpios {
gpio-line-names =
"NC",
"NC",
@@ -615,14 +662,9 @@
};
};
-&pm8998_pon {
- resin {
- compatible = "qcom,pm8941-resin";
- interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- linux,code = <KEY_VOLUMEDOWN>;
- };
+&pm8998_resin {
+ linux,code = <KEY_VOLUMEDOWN>;
+ status = "okay";
};
&pmi8998_lpg {
@@ -655,10 +697,6 @@
};
};
-&pmi8998_rradc {
- status = "okay";
-};
-
/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
&q6afedai {
dai@22 {
@@ -669,19 +707,19 @@
&q6asmdai {
dai@0 {
- reg = <0>;
+ reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
dai@1 {
- reg = <1>;
+ reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
dai@2 {
- reg = <2>;
+ reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
dai@3 {
- reg = <3>;
+ reg = <MSM_FRONTEND_DAI_MULTIMEDIA4>;
direction = <2>;
is-compress-dai;
};
@@ -708,8 +746,14 @@
cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
};
+&slpi_pas {
+ firmware-name = "qcom/sdm845/Thundercomm/db845c/slpi.mbn";
+
+ status = "okay";
+};
+
&sound {
- compatible = "qcom,db845c-sndcard";
+ compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard";
pinctrl-0 = <&quat_mi2s_active
&quat_mi2s_sd0_active
&quat_mi2s_sd1_active
@@ -726,11 +770,7 @@
"DMIC2", "MIC BIAS3",
"DMIC3", "MIC BIAS3",
"SpkrLeft IN", "SPK1 OUT",
- "SpkrRight IN", "SPK2 OUT",
- "MM_DL1", "MultiMedia1 Playback",
- "MM_DL2", "MultiMedia2 Playback",
- "MM_DL4", "MultiMedia4 Playback",
- "MultiMedia3 Capture", "MM_UL3";
+ "SpkrRight IN", "SPK2 OUT";
mm1-dai-link {
link-name = "MultiMedia1";
@@ -815,7 +855,7 @@
can@0 {
compatible = "microchip,mcp2517fd";
reg = <0>;
- clocks = <&clk40M>;
+ clocks = <&clk40m>;
interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
spi-max-frequency = <10000000>;
vdd-supply = <&vdc_5v>;
@@ -825,13 +865,12 @@
&spi2 {
/* On Low speed expansion */
- label = "LS-SPI0";
status = "okay";
};
&tlmm {
- cam0_default: cam0_default {
- rst {
+ cam0_default: cam0-default-state {
+ rst-pins {
pins = "gpio9";
function = "gpio";
@@ -839,7 +878,7 @@
bias-disable;
};
- mclk0 {
+ mclk0-pins {
pins = "gpio13";
function = "cam_mclk";
@@ -848,8 +887,8 @@
};
};
- cam3_default: cam3_default {
- rst {
+ cam3_default: cam3-default-state {
+ rst-pins {
function = "gpio";
pins = "gpio21";
@@ -857,7 +896,7 @@
bias-disable;
};
- mclk3 {
+ mclk3-pins {
function = "cam_mclk";
pins = "gpio16";
@@ -866,7 +905,7 @@
};
};
- dsi_sw_sel: dsi-sw-sel {
+ dsi_sw_sel: dsi-sw-sel-state {
pins = "gpio120";
function = "gpio";
@@ -875,20 +914,20 @@
output-high;
};
- lt9611_irq_pin: lt9611-irq {
+ lt9611_irq_pin: lt9611-irq-state {
pins = "gpio84";
function = "gpio";
bias-disable;
};
- pcie0_default_state: pcie0-default {
- clkreq {
+ pcie0_default_state: pcie0-default-state {
+ clkreq-pins {
pins = "gpio36";
function = "pci_e0";
bias-pull-up;
};
- reset-n {
+ reset-n-pins {
pins = "gpio35";
function = "gpio";
@@ -897,7 +936,7 @@
bias-pull-down;
};
- wake-n {
+ wake-n-pins {
pins = "gpio37";
function = "gpio";
@@ -906,7 +945,7 @@
};
};
- pcie0_pwren_state: pcie0-pwren {
+ pcie0_pwren_state: pcie0-pwren-state {
pins = "gpio90";
function = "gpio";
@@ -914,8 +953,8 @@
bias-disable;
};
- pcie1_default_state: pcie1-default {
- perst-n {
+ pcie1_default_state: pcie1-default-state {
+ perst-n-pins {
pins = "gpio102";
function = "gpio";
@@ -923,13 +962,13 @@
bias-disable;
};
- clkreq {
+ clkreq-pins {
pins = "gpio103";
function = "pci_e1";
bias-pull-up;
};
- wake-n {
+ wake-n-pins {
pins = "gpio11";
function = "gpio";
@@ -937,7 +976,7 @@
bias-pull-up;
};
- reset-n {
+ reset-n-pins {
pins = "gpio75";
function = "gpio";
@@ -947,8 +986,8 @@
};
};
- sdc2_default_state: sdc2-default {
- clk {
+ sdc2_default_state: sdc2-default-state {
+ clk-pins {
pins = "sdc2_clk";
bias-disable;
@@ -959,37 +998,30 @@
drive-strength = <16>;
};
- cmd {
+ cmd-pins {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <10>;
};
- data {
+ data-pins {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <10>;
};
};
- sdc2_card_det_n: sd-card-det-n {
+ sdc2_card_det_n: sd-card-det-n-state {
pins = "gpio126";
function = "gpio";
bias-pull-up;
};
-
- wcd_intr_default: wcd_intr_default {
- pins = <54>;
- function = "gpio";
-
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
};
&uart3 {
label = "LS-UART0";
+ pinctrl-0 = <&qup_uart3_4pin>;
+
status = "disabled";
};
@@ -1089,10 +1121,6 @@
};
&wcd9340 {
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
- clock-names = "extclk";
- clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
vdd-buck-supply = <&vreg_s4a_1p8>;
vdd-buck-sido-supply = <&vreg_s4a_1p8>;
@@ -1100,7 +1128,7 @@
vdd-rx-supply = <&vreg_s4a_1p8>;
vdd-io-supply = <&vreg_s4a_1p8>;
- swm: swm@c85 {
+ swm: soundwire@c85 {
left_spkr: speaker@0,1 {
compatible = "sdw10217201000";
reg = <0 1>;
@@ -1130,54 +1158,31 @@
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
qcom,snoc-host-cap-8bit-quirk;
- qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
+ qcom,calibration-variant = "Thundercomm_DB845C";
};
/* PINCTRL - additions to nodes defined in sdm845.dtsi */
&qup_spi2_default {
- pinconf {
- pins = "gpio27", "gpio28", "gpio29", "gpio30";
- drive-strength = <16>;
- };
-};
-
-&qup_uart3_default {
- pinmux {
- pins = "gpio41", "gpio42", "gpio43", "gpio44";
- function = "qup3";
- };
+ drive-strength = <16>;
};
&qup_i2c10_default {
- pinconf {
- pins = "gpio55", "gpio56";
- drive-strength = <2>;
- bias-disable;
- };
+ drive-strength = <2>;
+ bias-disable;
};
-&qup_uart9_default {
- pinconf-tx {
- pins = "gpio4";
- drive-strength = <2>;
- bias-disable;
- };
-
- pinconf-rx {
- pins = "gpio5";
- drive-strength = <2>;
- bias-pull-up;
- };
+&qup_uart9_rx {
+ drive-strength = <2>;
+ bias-pull-up;
};
-&pm8998_gpio {
-
+&qup_uart9_tx {
+ drive-strength = <2>;
+ bias-disable;
};
/* PINCTRL - additions to nodes defined in sdm845.dtsi */
&qup_spi0_default {
- config {
- drive-strength = <6>;
- bias-disable;
- };
+ drive-strength = <6>;
+ bias-disable;
};
generated by cgit (git 2.34.1) at 2025-12-28 13:47:06 +0000