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Diffstat (limited to 'arch/arm64/boot/dts/qcom/sm6125.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sm6125.dtsi10
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index 350d807a622f..8f2d65543373 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/clock/qcom,dispcc-sm6125.h>
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-sm6125.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/dma/qcom-gpi.h>
@@ -1250,7 +1251,7 @@
mdss_mdp: display-controller@5e01000 {
compatible = "qcom,sm6125-dpu";
reg = <0x05e01000 0x83208>,
- <0x05eb0000 0x2008>;
+ <0x05eb0000 0x3000>;
reg-names = "mdp", "vbif";
interrupt-parent = <&mdss>;
@@ -1340,7 +1341,8 @@
"bus";
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
<&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
+ assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmpd SM6125_VDDCX>;
@@ -1415,8 +1417,8 @@
reg = <0x05f00000 0x20000>;
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
- <&mdss_dsi0_phy 0>,
- <&mdss_dsi0_phy 1>,
+ <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<0>,
<0>,
<0>,